wa.c 11 KB

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  1. /*
  2. Broadcom B43 wireless driver
  3. PHY workarounds.
  4. Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
  5. Copyright (c) 2005-2007 Michael Buesch <m@bues.ch>
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; see the file COPYING. If not, write to
  16. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  17. Boston, MA 02110-1301, USA.
  18. */
  19. #include "b43.h"
  20. #include "main.h"
  21. #include "tables.h"
  22. #include "phy_common.h"
  23. #include "wa.h"
  24. void b43_wa_initgains(struct b43_wldev *dev)
  25. {
  26. struct b43_phy *phy = &dev->phy;
  27. b43_phy_write(dev, B43_PHY_LNAHPFCTL, 0x1FF9);
  28. b43_phy_mask(dev, B43_PHY_LPFGAINCTL, 0xFF0F);
  29. if (phy->rev <= 2)
  30. b43_ofdmtab_write16(dev, B43_OFDMTAB_LPFGAIN, 0, 0x1FBF);
  31. b43_radio_write16(dev, 0x0002, 0x1FBF);
  32. b43_phy_write(dev, 0x0024, 0x4680);
  33. b43_phy_write(dev, 0x0020, 0x0003);
  34. b43_phy_write(dev, 0x001D, 0x0F40);
  35. b43_phy_write(dev, 0x001F, 0x1C00);
  36. if (phy->rev <= 3)
  37. b43_phy_maskset(dev, 0x002A, 0x00FF, 0x0400);
  38. else if (phy->rev == 5) {
  39. b43_phy_maskset(dev, 0x002A, 0x00FF, 0x1A00);
  40. b43_phy_write(dev, 0x00CC, 0x2121);
  41. }
  42. if (phy->rev >= 3)
  43. b43_phy_write(dev, 0x00BA, 0x3ED5);
  44. }
  45. static void b43_wa_rssi_lt(struct b43_wldev *dev) /* RSSI lookup table */
  46. {
  47. int i;
  48. if (0 /* FIXME: For APHY.rev=2 this might be needed */) {
  49. for (i = 0; i < 8; i++)
  50. b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i + 8);
  51. for (i = 8; i < 16; i++)
  52. b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i - 8);
  53. } else {
  54. for (i = 0; i < 64; i++)
  55. b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i);
  56. }
  57. }
  58. static void b43_wa_analog(struct b43_wldev *dev)
  59. {
  60. u16 ofdmrev;
  61. ofdmrev = b43_phy_read(dev, B43_PHY_VERSION_OFDM) & B43_PHYVER_VERSION;
  62. if (ofdmrev > 2) {
  63. b43_phy_write(dev, B43_PHY_PWRDOWN, 0x1000);
  64. } else {
  65. b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 3, 0x1044);
  66. b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 4, 0x7201);
  67. b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 6, 0x0040);
  68. }
  69. }
  70. static void b43_wa_fft(struct b43_wldev *dev) /* Fine frequency table */
  71. {
  72. int i;
  73. for (i = 0; i < B43_TAB_FINEFREQG_SIZE; i++)
  74. b43_ofdmtab_write16(dev, B43_OFDMTAB_DACRFPABB, i,
  75. b43_tab_finefreqg[i]);
  76. }
  77. static void b43_wa_nft(struct b43_wldev *dev) /* Noise figure table */
  78. {
  79. struct b43_phy *phy = &dev->phy;
  80. int i;
  81. if (phy->rev == 1)
  82. for (i = 0; i < B43_TAB_NOISEG1_SIZE; i++)
  83. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i,
  84. b43_tab_noiseg1[i]);
  85. else
  86. for (i = 0; i < B43_TAB_NOISEG2_SIZE; i++)
  87. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i,
  88. b43_tab_noiseg2[i]);
  89. }
  90. static void b43_wa_rt(struct b43_wldev *dev) /* Rotor table */
  91. {
  92. int i;
  93. for (i = 0; i < B43_TAB_ROTOR_SIZE; i++)
  94. b43_ofdmtab_write32(dev, B43_OFDMTAB_ROTOR, i, b43_tab_rotor[i]);
  95. }
  96. static void b43_write_nst(struct b43_wldev *dev, const u16 *nst)
  97. {
  98. int i;
  99. for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
  100. b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE, i, nst[i]);
  101. }
  102. static void b43_wa_nst(struct b43_wldev *dev) /* Noise scale table */
  103. {
  104. struct b43_phy *phy = &dev->phy;
  105. if (phy->rev >= 6) {
  106. if (b43_phy_read(dev, B43_PHY_ENCORE) & B43_PHY_ENCORE_EN)
  107. b43_write_nst(dev, b43_tab_noisescaleg3);
  108. else
  109. b43_write_nst(dev, b43_tab_noisescaleg2);
  110. } else {
  111. b43_write_nst(dev, b43_tab_noisescaleg1);
  112. }
  113. }
  114. static void b43_wa_art(struct b43_wldev *dev) /* ADV retard table */
  115. {
  116. int i;
  117. for (i = 0; i < B43_TAB_RETARD_SIZE; i++)
  118. b43_ofdmtab_write32(dev, B43_OFDMTAB_ADVRETARD,
  119. i, b43_tab_retard[i]);
  120. }
  121. static void b43_wa_msst(struct b43_wldev *dev) /* Min sigma square table */
  122. {
  123. struct b43_phy *phy = &dev->phy;
  124. int i;
  125. const u16 *tab;
  126. if (phy->type == B43_PHYTYPE_G) {
  127. tab = b43_tab_sigmasqr2;
  128. } else {
  129. B43_WARN_ON(1);
  130. return;
  131. }
  132. for (i = 0; i < B43_TAB_SIGMASQR_SIZE; i++) {
  133. b43_ofdmtab_write16(dev, B43_OFDMTAB_MINSIGSQ,
  134. i, tab[i]);
  135. }
  136. }
  137. static void b43_wa_crs_ed(struct b43_wldev *dev)
  138. {
  139. struct b43_phy *phy = &dev->phy;
  140. if (phy->rev == 1) {
  141. b43_phy_write(dev, B43_PHY_CRSTHRES1_R1, 0x4F19);
  142. } else if (phy->rev == 2) {
  143. b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x1861);
  144. b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0271);
  145. b43_phy_set(dev, B43_PHY_ANTDWELL, 0x0800);
  146. } else {
  147. b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x0098);
  148. b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0070);
  149. b43_phy_write(dev, B43_PHY_OFDM(0xC9), 0x0080);
  150. b43_phy_set(dev, B43_PHY_ANTDWELL, 0x0800);
  151. }
  152. }
  153. static void b43_wa_crs_thr(struct b43_wldev *dev)
  154. {
  155. b43_phy_maskset(dev, B43_PHY_CRS0, ~0x03C0, 0xD000);
  156. }
  157. static void b43_wa_crs_blank(struct b43_wldev *dev)
  158. {
  159. b43_phy_write(dev, B43_PHY_OFDM(0x2C), 0x005A);
  160. }
  161. static void b43_wa_cck_shiftbits(struct b43_wldev *dev)
  162. {
  163. b43_phy_write(dev, B43_PHY_CCKSHIFTBITS, 0x0026);
  164. }
  165. static void b43_wa_wrssi_offset(struct b43_wldev *dev)
  166. {
  167. int i;
  168. if (dev->phy.rev == 1) {
  169. for (i = 0; i < 16; i++) {
  170. b43_ofdmtab_write16(dev, B43_OFDMTAB_WRSSI_R1,
  171. i, 0x0020);
  172. }
  173. } else {
  174. for (i = 0; i < 32; i++) {
  175. b43_ofdmtab_write16(dev, B43_OFDMTAB_WRSSI,
  176. i, 0x0820);
  177. }
  178. }
  179. }
  180. static void b43_wa_txpuoff_rxpuon(struct b43_wldev *dev)
  181. {
  182. b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_0F, 2, 15);
  183. b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_0F, 3, 20);
  184. }
  185. static void b43_wa_altagc(struct b43_wldev *dev)
  186. {
  187. struct b43_phy *phy = &dev->phy;
  188. if (phy->rev == 1) {
  189. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 0, 254);
  190. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 1, 13);
  191. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 2, 19);
  192. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 3, 25);
  193. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 0, 0x2710);
  194. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 1, 0x9B83);
  195. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 2, 0x9B83);
  196. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 3, 0x0F8D);
  197. b43_phy_write(dev, B43_PHY_LMS, 4);
  198. } else {
  199. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0, 254);
  200. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 1, 13);
  201. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 2, 19);
  202. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 3, 25);
  203. }
  204. b43_phy_maskset(dev, B43_PHY_CCKSHIFTBITS_WA, 0x00FF, 0x5700);
  205. b43_phy_maskset(dev, B43_PHY_OFDM(0x1A), ~0x007F, 0x000F);
  206. b43_phy_maskset(dev, B43_PHY_OFDM(0x1A), ~0x3F80, 0x2B80);
  207. b43_phy_maskset(dev, B43_PHY_ANTWRSETT, 0xF0FF, 0x0300);
  208. b43_radio_set(dev, 0x7A, 0x0008);
  209. b43_phy_maskset(dev, B43_PHY_N1P1GAIN, ~0x000F, 0x0008);
  210. b43_phy_maskset(dev, B43_PHY_P1P2GAIN, ~0x0F00, 0x0600);
  211. b43_phy_maskset(dev, B43_PHY_N1N2GAIN, ~0x0F00, 0x0700);
  212. b43_phy_maskset(dev, B43_PHY_N1P1GAIN, ~0x0F00, 0x0100);
  213. if (phy->rev == 1) {
  214. b43_phy_maskset(dev, B43_PHY_N1N2GAIN, ~0x000F, 0x0007);
  215. }
  216. b43_phy_maskset(dev, B43_PHY_OFDM(0x88), ~0x00FF, 0x001C);
  217. b43_phy_maskset(dev, B43_PHY_OFDM(0x88), ~0x3F00, 0x0200);
  218. b43_phy_maskset(dev, B43_PHY_OFDM(0x96), ~0x00FF, 0x001C);
  219. b43_phy_maskset(dev, B43_PHY_OFDM(0x89), ~0x00FF, 0x0020);
  220. b43_phy_maskset(dev, B43_PHY_OFDM(0x89), ~0x3F00, 0x0200);
  221. b43_phy_maskset(dev, B43_PHY_OFDM(0x82), ~0x00FF, 0x002E);
  222. b43_phy_maskset(dev, B43_PHY_OFDM(0x96), 0x00FF, 0x1A00);
  223. b43_phy_maskset(dev, B43_PHY_OFDM(0x81), ~0x00FF, 0x0028);
  224. b43_phy_maskset(dev, B43_PHY_OFDM(0x81), 0x00FF, 0x2C00);
  225. if (phy->rev == 1) {
  226. b43_phy_write(dev, B43_PHY_PEAK_COUNT, 0x092B);
  227. b43_phy_maskset(dev, B43_PHY_OFDM(0x1B), ~0x001E, 0x0002);
  228. } else {
  229. b43_phy_mask(dev, B43_PHY_OFDM(0x1B), ~0x001E);
  230. b43_phy_write(dev, B43_PHY_OFDM(0x1F), 0x287A);
  231. b43_phy_maskset(dev, B43_PHY_LPFGAINCTL, ~0x000F, 0x0004);
  232. if (phy->rev >= 6) {
  233. b43_phy_write(dev, B43_PHY_OFDM(0x22), 0x287A);
  234. b43_phy_maskset(dev, B43_PHY_LPFGAINCTL, 0x0FFF, 0x3000);
  235. }
  236. }
  237. b43_phy_maskset(dev, B43_PHY_DIVSRCHIDX, 0x8080, 0x7874);
  238. b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x1C00);
  239. if (phy->rev == 1) {
  240. b43_phy_maskset(dev, B43_PHY_DIVP1P2GAIN, ~0x0F00, 0x0600);
  241. b43_phy_write(dev, B43_PHY_OFDM(0x8B), 0x005E);
  242. b43_phy_maskset(dev, B43_PHY_ANTWRSETT, ~0x00FF, 0x001E);
  243. b43_phy_write(dev, B43_PHY_OFDM(0x8D), 0x0002);
  244. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 0, 0);
  245. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 1, 7);
  246. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 2, 16);
  247. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 3, 28);
  248. } else {
  249. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 0, 0);
  250. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 1, 7);
  251. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 2, 16);
  252. b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 3, 28);
  253. }
  254. if (phy->rev >= 6) {
  255. b43_phy_mask(dev, B43_PHY_OFDM(0x26), ~0x0003);
  256. b43_phy_mask(dev, B43_PHY_OFDM(0x26), ~0x1000);
  257. }
  258. b43_phy_read(dev, B43_PHY_VERSION_OFDM); /* Dummy read */
  259. }
  260. static void b43_wa_tr_ltov(struct b43_wldev *dev) /* TR Lookup Table Original Values */
  261. {
  262. b43_gtab_write(dev, B43_GTAB_ORIGTR, 0, 0x7654);
  263. }
  264. static void b43_wa_cpll_nonpilot(struct b43_wldev *dev)
  265. {
  266. b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_11, 0, 0);
  267. b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_11, 1, 0);
  268. }
  269. static void b43_wa_boards_g(struct b43_wldev *dev)
  270. {
  271. struct ssb_sprom *sprom = dev->dev->bus_sprom;
  272. struct b43_phy *phy = &dev->phy;
  273. if (dev->dev->board_vendor != SSB_BOARDVENDOR_BCM ||
  274. dev->dev->board_type != SSB_BOARD_BU4306 ||
  275. dev->dev->board_rev != 0x17) {
  276. if (phy->rev < 2) {
  277. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 1, 0x0002);
  278. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 2, 0x0001);
  279. } else {
  280. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 1, 0x0002);
  281. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 2, 0x0001);
  282. if ((sprom->boardflags_lo & B43_BFL_EXTLNA) &&
  283. (phy->rev >= 7)) {
  284. b43_phy_mask(dev, B43_PHY_EXTG(0x11), 0xF7FF);
  285. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0020, 0x0001);
  286. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0021, 0x0001);
  287. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0022, 0x0001);
  288. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0023, 0x0000);
  289. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0000, 0x0000);
  290. b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0003, 0x0002);
  291. }
  292. }
  293. }
  294. if (sprom->boardflags_lo & B43_BFL_FEM) {
  295. b43_phy_write(dev, B43_PHY_GTABCTL, 0x3120);
  296. b43_phy_write(dev, B43_PHY_GTABDATA, 0xC480);
  297. }
  298. }
  299. void b43_wa_all(struct b43_wldev *dev)
  300. {
  301. struct b43_phy *phy = &dev->phy;
  302. if (phy->type == B43_PHYTYPE_G) {
  303. switch (phy->rev) {
  304. case 1://XXX review rev1
  305. b43_wa_crs_ed(dev);
  306. b43_wa_crs_thr(dev);
  307. b43_wa_crs_blank(dev);
  308. b43_wa_cck_shiftbits(dev);
  309. b43_wa_fft(dev);
  310. b43_wa_nft(dev);
  311. b43_wa_rt(dev);
  312. b43_wa_nst(dev);
  313. b43_wa_art(dev);
  314. b43_wa_wrssi_offset(dev);
  315. b43_wa_altagc(dev);
  316. break;
  317. case 2:
  318. case 6:
  319. case 7:
  320. case 8:
  321. case 9:
  322. b43_wa_tr_ltov(dev);
  323. b43_wa_crs_ed(dev);
  324. b43_wa_rssi_lt(dev);
  325. b43_wa_nft(dev);
  326. b43_wa_nst(dev);
  327. b43_wa_msst(dev);
  328. b43_wa_wrssi_offset(dev);
  329. b43_wa_altagc(dev);
  330. b43_wa_analog(dev);
  331. b43_wa_txpuoff_rxpuon(dev);
  332. break;
  333. default:
  334. B43_WARN_ON(1);
  335. }
  336. b43_wa_boards_g(dev);
  337. } else { /* No N PHY support so far, LP PHY is in phy_lp.c */
  338. B43_WARN_ON(1);
  339. }
  340. b43_wa_cpll_nonpilot(dev);
  341. }