pcie_bus.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699
  1. /*
  2. * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
  3. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/pci.h>
  19. #include <linux/moduleparam.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/suspend.h>
  22. #include "wil6210.h"
  23. #include <linux/rtnetlink.h>
  24. #include <linux/pm_runtime.h>
  25. static int n_msi = 3;
  26. module_param(n_msi, int, 0444);
  27. MODULE_PARM_DESC(n_msi, " Use MSI interrupt: 0 - use INTx, 1 - single, or 3 - (default) ");
  28. bool ftm_mode;
  29. module_param(ftm_mode, bool, 0444);
  30. MODULE_PARM_DESC(ftm_mode, " Set factory test mode, default - false");
  31. static int wil6210_pm_notify(struct notifier_block *notify_block,
  32. unsigned long mode, void *unused);
  33. static
  34. int wil_set_capabilities(struct wil6210_priv *wil)
  35. {
  36. const char *wil_fw_name;
  37. u32 jtag_id = wil_r(wil, RGF_USER_JTAG_DEV_ID);
  38. u8 chip_revision = (wil_r(wil, RGF_USER_REVISION_ID) &
  39. RGF_USER_REVISION_ID_MASK);
  40. int platform_capa;
  41. struct fw_map *iccm_section, *sct;
  42. bitmap_zero(wil->hw_capa, hw_capa_last);
  43. bitmap_zero(wil->fw_capabilities, WMI_FW_CAPABILITY_MAX);
  44. bitmap_zero(wil->platform_capa, WIL_PLATFORM_CAPA_MAX);
  45. wil->wil_fw_name = ftm_mode ? WIL_FW_NAME_FTM_DEFAULT :
  46. WIL_FW_NAME_DEFAULT;
  47. wil->chip_revision = chip_revision;
  48. switch (jtag_id) {
  49. case JTAG_DEV_ID_SPARROW:
  50. memcpy(fw_mapping, sparrow_fw_mapping,
  51. sizeof(sparrow_fw_mapping));
  52. switch (chip_revision) {
  53. case REVISION_ID_SPARROW_D0:
  54. wil->hw_name = "Sparrow D0";
  55. wil->hw_version = HW_VER_SPARROW_D0;
  56. wil_fw_name = ftm_mode ? WIL_FW_NAME_FTM_SPARROW_PLUS :
  57. WIL_FW_NAME_SPARROW_PLUS;
  58. if (wil_fw_verify_file_exists(wil, wil_fw_name))
  59. wil->wil_fw_name = wil_fw_name;
  60. sct = wil_find_fw_mapping("mac_rgf_ext");
  61. if (!sct) {
  62. wil_err(wil, "mac_rgf_ext section not found in fw_mapping\n");
  63. return -EINVAL;
  64. }
  65. memcpy(sct, &sparrow_d0_mac_rgf_ext, sizeof(*sct));
  66. break;
  67. case REVISION_ID_SPARROW_B0:
  68. wil->hw_name = "Sparrow B0";
  69. wil->hw_version = HW_VER_SPARROW_B0;
  70. break;
  71. default:
  72. wil->hw_name = "Unknown";
  73. wil->hw_version = HW_VER_UNKNOWN;
  74. break;
  75. }
  76. wil->rgf_fw_assert_code_addr = SPARROW_RGF_FW_ASSERT_CODE;
  77. wil->rgf_ucode_assert_code_addr = SPARROW_RGF_UCODE_ASSERT_CODE;
  78. break;
  79. case JTAG_DEV_ID_TALYN:
  80. wil->hw_name = "Talyn-MA";
  81. wil->hw_version = HW_VER_TALYN;
  82. memcpy(fw_mapping, talyn_fw_mapping, sizeof(talyn_fw_mapping));
  83. wil->rgf_fw_assert_code_addr = TALYN_RGF_FW_ASSERT_CODE;
  84. wil->rgf_ucode_assert_code_addr = TALYN_RGF_UCODE_ASSERT_CODE;
  85. if (wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1) &
  86. BIT_NO_FLASH_INDICATION)
  87. set_bit(hw_capa_no_flash, wil->hw_capa);
  88. wil_fw_name = ftm_mode ? WIL_FW_NAME_FTM_TALYN :
  89. WIL_FW_NAME_TALYN;
  90. if (wil_fw_verify_file_exists(wil, wil_fw_name))
  91. wil->wil_fw_name = wil_fw_name;
  92. break;
  93. case JTAG_DEV_ID_TALYN_MB:
  94. wil->hw_name = "Talyn-MB";
  95. wil->hw_version = HW_VER_TALYN_MB;
  96. memcpy(fw_mapping, talyn_mb_fw_mapping,
  97. sizeof(talyn_mb_fw_mapping));
  98. wil->rgf_fw_assert_code_addr = TALYN_RGF_FW_ASSERT_CODE;
  99. wil->rgf_ucode_assert_code_addr = TALYN_RGF_UCODE_ASSERT_CODE;
  100. set_bit(hw_capa_no_flash, wil->hw_capa);
  101. wil->use_enhanced_dma_hw = true;
  102. wil->use_rx_hw_reordering = true;
  103. wil->use_compressed_rx_status = true;
  104. wil_fw_name = ftm_mode ? WIL_FW_NAME_FTM_TALYN :
  105. WIL_FW_NAME_TALYN;
  106. if (wil_fw_verify_file_exists(wil, wil_fw_name))
  107. wil->wil_fw_name = wil_fw_name;
  108. break;
  109. default:
  110. wil_err(wil, "Unknown board hardware, chip_id 0x%08x, chip_revision 0x%08x\n",
  111. jtag_id, chip_revision);
  112. wil->hw_name = "Unknown";
  113. wil->hw_version = HW_VER_UNKNOWN;
  114. return -EINVAL;
  115. }
  116. wil_init_txrx_ops(wil);
  117. iccm_section = wil_find_fw_mapping("fw_code");
  118. if (!iccm_section) {
  119. wil_err(wil, "fw_code section not found in fw_mapping\n");
  120. return -EINVAL;
  121. }
  122. wil->iccm_base = iccm_section->host;
  123. wil_info(wil, "Board hardware is %s, flash %sexist\n", wil->hw_name,
  124. test_bit(hw_capa_no_flash, wil->hw_capa) ? "doesn't " : "");
  125. /* Get platform capabilities */
  126. if (wil->platform_ops.get_capa) {
  127. platform_capa =
  128. wil->platform_ops.get_capa(wil->platform_handle);
  129. memcpy(wil->platform_capa, &platform_capa,
  130. min(sizeof(wil->platform_capa), sizeof(platform_capa)));
  131. }
  132. /* extract FW capabilities from file without loading the FW */
  133. wil_request_firmware(wil, wil->wil_fw_name, false);
  134. wil_refresh_fw_capabilities(wil);
  135. return 0;
  136. }
  137. void wil_disable_irq(struct wil6210_priv *wil)
  138. {
  139. int irq = wil->pdev->irq;
  140. disable_irq(irq);
  141. if (wil->n_msi == 3) {
  142. disable_irq(irq + 1);
  143. disable_irq(irq + 2);
  144. }
  145. }
  146. void wil_enable_irq(struct wil6210_priv *wil)
  147. {
  148. int irq = wil->pdev->irq;
  149. enable_irq(irq);
  150. if (wil->n_msi == 3) {
  151. enable_irq(irq + 1);
  152. enable_irq(irq + 2);
  153. }
  154. }
  155. static void wil_remove_all_additional_vifs(struct wil6210_priv *wil)
  156. {
  157. struct wil6210_vif *vif;
  158. int i;
  159. for (i = 1; i < wil->max_vifs; i++) {
  160. vif = wil->vifs[i];
  161. if (vif) {
  162. wil_vif_prepare_stop(vif);
  163. wil_vif_remove(wil, vif->mid);
  164. }
  165. }
  166. }
  167. /* Bus ops */
  168. static int wil_if_pcie_enable(struct wil6210_priv *wil)
  169. {
  170. struct pci_dev *pdev = wil->pdev;
  171. int rc;
  172. /* on platforms with buggy ACPI, pdev->msi_enabled may be set to
  173. * allow pci_enable_device to work. This indicates INTx was not routed
  174. * and only MSI should be used
  175. */
  176. int msi_only = pdev->msi_enabled;
  177. wil_dbg_misc(wil, "if_pcie_enable\n");
  178. pci_set_master(pdev);
  179. /* how many MSI interrupts to request? */
  180. switch (n_msi) {
  181. case 3:
  182. case 1:
  183. wil_dbg_misc(wil, "Setup %d MSI interrupts\n", n_msi);
  184. break;
  185. case 0:
  186. wil_dbg_misc(wil, "MSI interrupts disabled, use INTx\n");
  187. break;
  188. default:
  189. wil_err(wil, "Invalid n_msi=%d, default to 1\n", n_msi);
  190. n_msi = 1;
  191. }
  192. if (n_msi == 3 &&
  193. pci_alloc_irq_vectors(pdev, n_msi, n_msi, PCI_IRQ_MSI) < n_msi) {
  194. wil_err(wil, "3 MSI mode failed, try 1 MSI\n");
  195. n_msi = 1;
  196. }
  197. if (n_msi == 1 && pci_enable_msi(pdev)) {
  198. wil_err(wil, "pci_enable_msi failed, use INTx\n");
  199. n_msi = 0;
  200. }
  201. wil->n_msi = n_msi;
  202. if (wil->n_msi == 0 && msi_only) {
  203. wil_err(wil, "Interrupt pin not routed, unable to use INTx\n");
  204. rc = -ENODEV;
  205. goto stop_master;
  206. }
  207. rc = wil6210_init_irq(wil, pdev->irq);
  208. if (rc)
  209. goto release_vectors;
  210. /* need reset here to obtain MAC */
  211. mutex_lock(&wil->mutex);
  212. rc = wil_reset(wil, false);
  213. mutex_unlock(&wil->mutex);
  214. if (rc)
  215. goto release_irq;
  216. return 0;
  217. release_irq:
  218. wil6210_fini_irq(wil, pdev->irq);
  219. release_vectors:
  220. /* safe to call if no allocation */
  221. pci_free_irq_vectors(pdev);
  222. stop_master:
  223. pci_clear_master(pdev);
  224. return rc;
  225. }
  226. static int wil_if_pcie_disable(struct wil6210_priv *wil)
  227. {
  228. struct pci_dev *pdev = wil->pdev;
  229. wil_dbg_misc(wil, "if_pcie_disable\n");
  230. pci_clear_master(pdev);
  231. /* disable and release IRQ */
  232. wil6210_fini_irq(wil, pdev->irq);
  233. /* safe to call if no MSI */
  234. pci_disable_msi(pdev);
  235. /* TODO: disable HW */
  236. return 0;
  237. }
  238. static int wil_platform_rop_ramdump(void *wil_handle, void *buf, uint32_t size)
  239. {
  240. struct wil6210_priv *wil = wil_handle;
  241. if (!wil)
  242. return -EINVAL;
  243. return wil_fw_copy_crash_dump(wil, buf, size);
  244. }
  245. static int wil_platform_rop_fw_recovery(void *wil_handle)
  246. {
  247. struct wil6210_priv *wil = wil_handle;
  248. if (!wil)
  249. return -EINVAL;
  250. wil_fw_error_recovery(wil);
  251. return 0;
  252. }
  253. static void wil_platform_ops_uninit(struct wil6210_priv *wil)
  254. {
  255. if (wil->platform_ops.uninit)
  256. wil->platform_ops.uninit(wil->platform_handle);
  257. memset(&wil->platform_ops, 0, sizeof(wil->platform_ops));
  258. }
  259. static int wil_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  260. {
  261. struct wil6210_priv *wil;
  262. struct device *dev = &pdev->dev;
  263. int rc;
  264. const struct wil_platform_rops rops = {
  265. .ramdump = wil_platform_rop_ramdump,
  266. .fw_recovery = wil_platform_rop_fw_recovery,
  267. };
  268. u32 bar_size = pci_resource_len(pdev, 0);
  269. int dma_addr_size[] = {64, 48, 40, 32}; /* keep descending order */
  270. int i, start_idx;
  271. /* check HW */
  272. dev_info(&pdev->dev, WIL_NAME
  273. " device found [%04x:%04x] (rev %x) bar size 0x%x\n",
  274. (int)pdev->vendor, (int)pdev->device, (int)pdev->revision,
  275. bar_size);
  276. if ((bar_size < WIL6210_MIN_MEM_SIZE) ||
  277. (bar_size > WIL6210_MAX_MEM_SIZE)) {
  278. dev_err(&pdev->dev, "Unexpected BAR0 size 0x%x\n",
  279. bar_size);
  280. return -ENODEV;
  281. }
  282. wil = wil_if_alloc(dev);
  283. if (IS_ERR(wil)) {
  284. rc = (int)PTR_ERR(wil);
  285. dev_err(dev, "wil_if_alloc failed: %d\n", rc);
  286. return rc;
  287. }
  288. wil->pdev = pdev;
  289. pci_set_drvdata(pdev, wil);
  290. wil->bar_size = bar_size;
  291. /* rollback to if_free */
  292. wil->platform_handle =
  293. wil_platform_init(&pdev->dev, &wil->platform_ops, &rops, wil);
  294. if (!wil->platform_handle) {
  295. rc = -ENODEV;
  296. wil_err(wil, "wil_platform_init failed\n");
  297. goto if_free;
  298. }
  299. /* rollback to err_plat */
  300. rc = pci_enable_device(pdev);
  301. if (rc && pdev->msi_enabled == 0) {
  302. wil_err(wil,
  303. "pci_enable_device failed, retry with MSI only\n");
  304. /* Work around for platforms that can't allocate IRQ:
  305. * retry with MSI only
  306. */
  307. pdev->msi_enabled = 1;
  308. rc = pci_enable_device(pdev);
  309. }
  310. if (rc) {
  311. wil_err(wil,
  312. "pci_enable_device failed, even with MSI only\n");
  313. goto err_plat;
  314. }
  315. /* rollback to err_disable_pdev */
  316. pci_set_power_state(pdev, PCI_D0);
  317. rc = pci_request_region(pdev, 0, WIL_NAME);
  318. if (rc) {
  319. wil_err(wil, "pci_request_region failed\n");
  320. goto err_disable_pdev;
  321. }
  322. /* rollback to err_release_reg */
  323. wil->csr = pci_ioremap_bar(pdev, 0);
  324. if (!wil->csr) {
  325. wil_err(wil, "pci_ioremap_bar failed\n");
  326. rc = -ENODEV;
  327. goto err_release_reg;
  328. }
  329. /* rollback to err_iounmap */
  330. wil_info(wil, "CSR at %pR -> 0x%p\n", &pdev->resource[0], wil->csr);
  331. rc = wil_set_capabilities(wil);
  332. if (rc) {
  333. wil_err(wil, "wil_set_capabilities failed, rc %d\n", rc);
  334. goto err_iounmap;
  335. }
  336. /* device supports >32bit addresses.
  337. * for legacy DMA start from 48 bit.
  338. */
  339. start_idx = wil->use_enhanced_dma_hw ? 0 : 1;
  340. for (i = start_idx; i < ARRAY_SIZE(dma_addr_size); i++) {
  341. rc = dma_set_mask_and_coherent(dev,
  342. DMA_BIT_MASK(dma_addr_size[i]));
  343. if (rc) {
  344. dev_err(dev, "dma_set_mask_and_coherent(%d) failed: %d\n",
  345. dma_addr_size[i], rc);
  346. continue;
  347. }
  348. dev_info(dev, "using dma mask %d", dma_addr_size[i]);
  349. wil->dma_addr_size = dma_addr_size[i];
  350. break;
  351. }
  352. if (wil->dma_addr_size == 0)
  353. goto err_iounmap;
  354. wil6210_clear_irq(wil);
  355. /* FW should raise IRQ when ready */
  356. rc = wil_if_pcie_enable(wil);
  357. if (rc) {
  358. wil_err(wil, "Enable device failed\n");
  359. goto err_iounmap;
  360. }
  361. /* rollback to bus_disable */
  362. rc = wil_if_add(wil);
  363. if (rc) {
  364. wil_err(wil, "wil_if_add failed: %d\n", rc);
  365. goto bus_disable;
  366. }
  367. /* in case of WMI-only FW, perform full reset and FW loading */
  368. if (test_bit(WMI_FW_CAPABILITY_WMI_ONLY, wil->fw_capabilities)) {
  369. wil_dbg_misc(wil, "Loading WMI only FW\n");
  370. mutex_lock(&wil->mutex);
  371. rc = wil_reset(wil, true);
  372. mutex_unlock(&wil->mutex);
  373. if (rc) {
  374. wil_err(wil, "failed to load WMI only FW\n");
  375. goto if_remove;
  376. }
  377. }
  378. if (IS_ENABLED(CONFIG_PM))
  379. wil->pm_notify.notifier_call = wil6210_pm_notify;
  380. rc = register_pm_notifier(&wil->pm_notify);
  381. if (rc)
  382. /* Do not fail the driver initialization, as suspend can
  383. * be prevented in a later phase if needed
  384. */
  385. wil_err(wil, "register_pm_notifier failed: %d\n", rc);
  386. wil6210_debugfs_init(wil);
  387. wil_pm_runtime_allow(wil);
  388. return 0;
  389. if_remove:
  390. wil_if_remove(wil);
  391. bus_disable:
  392. wil_if_pcie_disable(wil);
  393. err_iounmap:
  394. pci_iounmap(pdev, wil->csr);
  395. err_release_reg:
  396. pci_release_region(pdev, 0);
  397. err_disable_pdev:
  398. pci_disable_device(pdev);
  399. err_plat:
  400. wil_platform_ops_uninit(wil);
  401. if_free:
  402. wil_if_free(wil);
  403. return rc;
  404. }
  405. static void wil_pcie_remove(struct pci_dev *pdev)
  406. {
  407. struct wil6210_priv *wil = pci_get_drvdata(pdev);
  408. void __iomem *csr = wil->csr;
  409. wil_dbg_misc(wil, "pcie_remove\n");
  410. unregister_pm_notifier(&wil->pm_notify);
  411. wil_pm_runtime_forbid(wil);
  412. wil6210_debugfs_remove(wil);
  413. rtnl_lock();
  414. wil_p2p_wdev_free(wil);
  415. wil_remove_all_additional_vifs(wil);
  416. rtnl_unlock();
  417. wil_if_remove(wil);
  418. wil_if_pcie_disable(wil);
  419. pci_iounmap(pdev, csr);
  420. pci_release_region(pdev, 0);
  421. pci_disable_device(pdev);
  422. wil_platform_ops_uninit(wil);
  423. wil_if_free(wil);
  424. }
  425. static const struct pci_device_id wil6210_pcie_ids[] = {
  426. { PCI_DEVICE(0x1ae9, 0x0310) },
  427. { PCI_DEVICE(0x1ae9, 0x0302) }, /* same as above, firmware broken */
  428. { PCI_DEVICE(0x17cb, 0x1201) }, /* Talyn */
  429. { /* end: all zeroes */ },
  430. };
  431. MODULE_DEVICE_TABLE(pci, wil6210_pcie_ids);
  432. static int wil6210_suspend(struct device *dev, bool is_runtime)
  433. {
  434. int rc = 0;
  435. struct pci_dev *pdev = to_pci_dev(dev);
  436. struct wil6210_priv *wil = pci_get_drvdata(pdev);
  437. bool keep_radio_on, active_ifaces;
  438. wil_dbg_pm(wil, "suspend: %s\n", is_runtime ? "runtime" : "system");
  439. mutex_lock(&wil->vif_mutex);
  440. active_ifaces = wil_has_active_ifaces(wil, true, false);
  441. mutex_unlock(&wil->vif_mutex);
  442. keep_radio_on = active_ifaces && wil->keep_radio_on_during_sleep;
  443. rc = wil_can_suspend(wil, is_runtime);
  444. if (rc)
  445. goto out;
  446. rc = wil_suspend(wil, is_runtime, keep_radio_on);
  447. if (!rc) {
  448. /* In case radio stays on, platform device will control
  449. * PCIe master
  450. */
  451. if (!keep_radio_on) {
  452. /* disable bus mastering */
  453. pci_clear_master(pdev);
  454. wil->suspend_stats.r_off.successful_suspends++;
  455. } else {
  456. wil->suspend_stats.r_on.successful_suspends++;
  457. }
  458. }
  459. out:
  460. return rc;
  461. }
  462. static int wil6210_resume(struct device *dev, bool is_runtime)
  463. {
  464. int rc = 0;
  465. struct pci_dev *pdev = to_pci_dev(dev);
  466. struct wil6210_priv *wil = pci_get_drvdata(pdev);
  467. bool keep_radio_on, active_ifaces;
  468. wil_dbg_pm(wil, "resume: %s\n", is_runtime ? "runtime" : "system");
  469. mutex_lock(&wil->vif_mutex);
  470. active_ifaces = wil_has_active_ifaces(wil, true, false);
  471. mutex_unlock(&wil->vif_mutex);
  472. keep_radio_on = active_ifaces && wil->keep_radio_on_during_sleep;
  473. /* In case radio stays on, platform device will control
  474. * PCIe master
  475. */
  476. if (!keep_radio_on)
  477. /* allow master */
  478. pci_set_master(pdev);
  479. rc = wil_resume(wil, is_runtime, keep_radio_on);
  480. if (rc) {
  481. wil_err(wil, "device failed to resume (%d)\n", rc);
  482. if (!keep_radio_on) {
  483. pci_clear_master(pdev);
  484. wil->suspend_stats.r_off.failed_resumes++;
  485. } else {
  486. wil->suspend_stats.r_on.failed_resumes++;
  487. }
  488. } else {
  489. if (keep_radio_on)
  490. wil->suspend_stats.r_on.successful_resumes++;
  491. else
  492. wil->suspend_stats.r_off.successful_resumes++;
  493. }
  494. return rc;
  495. }
  496. static int wil6210_pm_notify(struct notifier_block *notify_block,
  497. unsigned long mode, void *unused)
  498. {
  499. struct wil6210_priv *wil = container_of(
  500. notify_block, struct wil6210_priv, pm_notify);
  501. int rc = 0;
  502. enum wil_platform_event evt;
  503. wil_dbg_pm(wil, "pm_notify: mode (%ld)\n", mode);
  504. switch (mode) {
  505. case PM_HIBERNATION_PREPARE:
  506. case PM_SUSPEND_PREPARE:
  507. case PM_RESTORE_PREPARE:
  508. rc = wil_can_suspend(wil, false);
  509. if (rc)
  510. break;
  511. evt = WIL_PLATFORM_EVT_PRE_SUSPEND;
  512. if (wil->platform_ops.notify)
  513. rc = wil->platform_ops.notify(wil->platform_handle,
  514. evt);
  515. break;
  516. case PM_POST_SUSPEND:
  517. case PM_POST_HIBERNATION:
  518. case PM_POST_RESTORE:
  519. evt = WIL_PLATFORM_EVT_POST_SUSPEND;
  520. if (wil->platform_ops.notify)
  521. rc = wil->platform_ops.notify(wil->platform_handle,
  522. evt);
  523. break;
  524. default:
  525. wil_dbg_pm(wil, "unhandled notify mode %ld\n", mode);
  526. break;
  527. }
  528. wil_dbg_pm(wil, "notification mode %ld: rc (%d)\n", mode, rc);
  529. return rc;
  530. }
  531. static int __maybe_unused wil6210_pm_suspend(struct device *dev)
  532. {
  533. return wil6210_suspend(dev, false);
  534. }
  535. static int __maybe_unused wil6210_pm_resume(struct device *dev)
  536. {
  537. return wil6210_resume(dev, false);
  538. }
  539. static int __maybe_unused wil6210_pm_runtime_idle(struct device *dev)
  540. {
  541. struct pci_dev *pdev = to_pci_dev(dev);
  542. struct wil6210_priv *wil = pci_get_drvdata(pdev);
  543. wil_dbg_pm(wil, "Runtime idle\n");
  544. return wil_can_suspend(wil, true);
  545. }
  546. static int __maybe_unused wil6210_pm_runtime_resume(struct device *dev)
  547. {
  548. return wil6210_resume(dev, true);
  549. }
  550. static int __maybe_unused wil6210_pm_runtime_suspend(struct device *dev)
  551. {
  552. struct pci_dev *pdev = to_pci_dev(dev);
  553. struct wil6210_priv *wil = pci_get_drvdata(pdev);
  554. if (test_bit(wil_status_suspended, wil->status)) {
  555. wil_dbg_pm(wil, "trying to suspend while suspended\n");
  556. return 1;
  557. }
  558. return wil6210_suspend(dev, true);
  559. }
  560. static const struct dev_pm_ops wil6210_pm_ops = {
  561. SET_SYSTEM_SLEEP_PM_OPS(wil6210_pm_suspend, wil6210_pm_resume)
  562. SET_RUNTIME_PM_OPS(wil6210_pm_runtime_suspend,
  563. wil6210_pm_runtime_resume,
  564. wil6210_pm_runtime_idle)
  565. };
  566. static struct pci_driver wil6210_driver = {
  567. .probe = wil_pcie_probe,
  568. .remove = wil_pcie_remove,
  569. .id_table = wil6210_pcie_ids,
  570. .name = WIL_NAME,
  571. .driver = {
  572. .pm = &wil6210_pm_ops,
  573. },
  574. };
  575. static int __init wil6210_driver_init(void)
  576. {
  577. int rc;
  578. rc = wil_platform_modinit();
  579. if (rc)
  580. return rc;
  581. rc = pci_register_driver(&wil6210_driver);
  582. if (rc)
  583. wil_platform_modexit();
  584. return rc;
  585. }
  586. module_init(wil6210_driver_init);
  587. static void __exit wil6210_driver_exit(void)
  588. {
  589. pci_unregister_driver(&wil6210_driver);
  590. wil_platform_modexit();
  591. }
  592. module_exit(wil6210_driver_exit);
  593. MODULE_LICENSE("Dual BSD/GPL");
  594. MODULE_AUTHOR("Qualcomm Atheros <wil6210@qca.qualcomm.com>");
  595. MODULE_DESCRIPTION("Driver for 60g WiFi WIL6210 card");