core.c 22 KB

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  1. /*
  2. * Silicon Labs C2 port core Linux support
  3. *
  4. * Copyright (c) 2007 Rodolfo Giometti <giometti@linux.it>
  5. * Copyright (c) 2007 Eurotech S.p.A. <info@eurotech.it>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/errno.h>
  15. #include <linux/err.h>
  16. #include <linux/kernel.h>
  17. #include <linux/ctype.h>
  18. #include <linux/delay.h>
  19. #include <linux/idr.h>
  20. #include <linux/sched.h>
  21. #include <linux/slab.h>
  22. #include <linux/c2port.h>
  23. #define DRIVER_NAME "c2port"
  24. #define DRIVER_VERSION "0.51.0"
  25. static DEFINE_SPINLOCK(c2port_idr_lock);
  26. static DEFINE_IDR(c2port_idr);
  27. /*
  28. * Local variables
  29. */
  30. static struct class *c2port_class;
  31. /*
  32. * C2 registers & commands defines
  33. */
  34. /* C2 registers */
  35. #define C2PORT_DEVICEID 0x00
  36. #define C2PORT_REVID 0x01
  37. #define C2PORT_FPCTL 0x02
  38. #define C2PORT_FPDAT 0xB4
  39. /* C2 interface commands */
  40. #define C2PORT_GET_VERSION 0x01
  41. #define C2PORT_DEVICE_ERASE 0x03
  42. #define C2PORT_BLOCK_READ 0x06
  43. #define C2PORT_BLOCK_WRITE 0x07
  44. #define C2PORT_PAGE_ERASE 0x08
  45. /* C2 status return codes */
  46. #define C2PORT_INVALID_COMMAND 0x00
  47. #define C2PORT_COMMAND_FAILED 0x02
  48. #define C2PORT_COMMAND_OK 0x0d
  49. /*
  50. * C2 port low level signal managements
  51. */
  52. static void c2port_reset(struct c2port_device *dev)
  53. {
  54. struct c2port_ops *ops = dev->ops;
  55. /* To reset the device we have to keep clock line low for at least
  56. * 20us.
  57. */
  58. local_irq_disable();
  59. ops->c2ck_set(dev, 0);
  60. udelay(25);
  61. ops->c2ck_set(dev, 1);
  62. local_irq_enable();
  63. udelay(1);
  64. }
  65. static void c2port_strobe_ck(struct c2port_device *dev)
  66. {
  67. struct c2port_ops *ops = dev->ops;
  68. /* During hi-low-hi transition we disable local IRQs to avoid
  69. * interructions since C2 port specification says that it must be
  70. * shorter than 5us, otherwise the microcontroller may consider
  71. * it as a reset signal!
  72. */
  73. local_irq_disable();
  74. ops->c2ck_set(dev, 0);
  75. udelay(1);
  76. ops->c2ck_set(dev, 1);
  77. local_irq_enable();
  78. udelay(1);
  79. }
  80. /*
  81. * C2 port basic functions
  82. */
  83. static void c2port_write_ar(struct c2port_device *dev, u8 addr)
  84. {
  85. struct c2port_ops *ops = dev->ops;
  86. int i;
  87. /* START field */
  88. c2port_strobe_ck(dev);
  89. /* INS field (11b, LSB first) */
  90. ops->c2d_dir(dev, 0);
  91. ops->c2d_set(dev, 1);
  92. c2port_strobe_ck(dev);
  93. ops->c2d_set(dev, 1);
  94. c2port_strobe_ck(dev);
  95. /* ADDRESS field */
  96. for (i = 0; i < 8; i++) {
  97. ops->c2d_set(dev, addr & 0x01);
  98. c2port_strobe_ck(dev);
  99. addr >>= 1;
  100. }
  101. /* STOP field */
  102. ops->c2d_dir(dev, 1);
  103. c2port_strobe_ck(dev);
  104. }
  105. static int c2port_read_ar(struct c2port_device *dev, u8 *addr)
  106. {
  107. struct c2port_ops *ops = dev->ops;
  108. int i;
  109. /* START field */
  110. c2port_strobe_ck(dev);
  111. /* INS field (10b, LSB first) */
  112. ops->c2d_dir(dev, 0);
  113. ops->c2d_set(dev, 0);
  114. c2port_strobe_ck(dev);
  115. ops->c2d_set(dev, 1);
  116. c2port_strobe_ck(dev);
  117. /* ADDRESS field */
  118. ops->c2d_dir(dev, 1);
  119. *addr = 0;
  120. for (i = 0; i < 8; i++) {
  121. *addr >>= 1; /* shift in 8-bit ADDRESS field LSB first */
  122. c2port_strobe_ck(dev);
  123. if (ops->c2d_get(dev))
  124. *addr |= 0x80;
  125. }
  126. /* STOP field */
  127. c2port_strobe_ck(dev);
  128. return 0;
  129. }
  130. static int c2port_write_dr(struct c2port_device *dev, u8 data)
  131. {
  132. struct c2port_ops *ops = dev->ops;
  133. int timeout, i;
  134. /* START field */
  135. c2port_strobe_ck(dev);
  136. /* INS field (01b, LSB first) */
  137. ops->c2d_dir(dev, 0);
  138. ops->c2d_set(dev, 1);
  139. c2port_strobe_ck(dev);
  140. ops->c2d_set(dev, 0);
  141. c2port_strobe_ck(dev);
  142. /* LENGTH field (00b, LSB first -> 1 byte) */
  143. ops->c2d_set(dev, 0);
  144. c2port_strobe_ck(dev);
  145. ops->c2d_set(dev, 0);
  146. c2port_strobe_ck(dev);
  147. /* DATA field */
  148. for (i = 0; i < 8; i++) {
  149. ops->c2d_set(dev, data & 0x01);
  150. c2port_strobe_ck(dev);
  151. data >>= 1;
  152. }
  153. /* WAIT field */
  154. ops->c2d_dir(dev, 1);
  155. timeout = 20;
  156. do {
  157. c2port_strobe_ck(dev);
  158. if (ops->c2d_get(dev))
  159. break;
  160. udelay(1);
  161. } while (--timeout > 0);
  162. if (timeout == 0)
  163. return -EIO;
  164. /* STOP field */
  165. c2port_strobe_ck(dev);
  166. return 0;
  167. }
  168. static int c2port_read_dr(struct c2port_device *dev, u8 *data)
  169. {
  170. struct c2port_ops *ops = dev->ops;
  171. int timeout, i;
  172. /* START field */
  173. c2port_strobe_ck(dev);
  174. /* INS field (00b, LSB first) */
  175. ops->c2d_dir(dev, 0);
  176. ops->c2d_set(dev, 0);
  177. c2port_strobe_ck(dev);
  178. ops->c2d_set(dev, 0);
  179. c2port_strobe_ck(dev);
  180. /* LENGTH field (00b, LSB first -> 1 byte) */
  181. ops->c2d_set(dev, 0);
  182. c2port_strobe_ck(dev);
  183. ops->c2d_set(dev, 0);
  184. c2port_strobe_ck(dev);
  185. /* WAIT field */
  186. ops->c2d_dir(dev, 1);
  187. timeout = 20;
  188. do {
  189. c2port_strobe_ck(dev);
  190. if (ops->c2d_get(dev))
  191. break;
  192. udelay(1);
  193. } while (--timeout > 0);
  194. if (timeout == 0)
  195. return -EIO;
  196. /* DATA field */
  197. *data = 0;
  198. for (i = 0; i < 8; i++) {
  199. *data >>= 1; /* shift in 8-bit DATA field LSB first */
  200. c2port_strobe_ck(dev);
  201. if (ops->c2d_get(dev))
  202. *data |= 0x80;
  203. }
  204. /* STOP field */
  205. c2port_strobe_ck(dev);
  206. return 0;
  207. }
  208. static int c2port_poll_in_busy(struct c2port_device *dev)
  209. {
  210. u8 addr;
  211. int ret, timeout = 20;
  212. do {
  213. ret = (c2port_read_ar(dev, &addr));
  214. if (ret < 0)
  215. return -EIO;
  216. if (!(addr & 0x02))
  217. break;
  218. udelay(1);
  219. } while (--timeout > 0);
  220. if (timeout == 0)
  221. return -EIO;
  222. return 0;
  223. }
  224. static int c2port_poll_out_ready(struct c2port_device *dev)
  225. {
  226. u8 addr;
  227. int ret, timeout = 10000; /* erase flash needs long time... */
  228. do {
  229. ret = (c2port_read_ar(dev, &addr));
  230. if (ret < 0)
  231. return -EIO;
  232. if (addr & 0x01)
  233. break;
  234. udelay(1);
  235. } while (--timeout > 0);
  236. if (timeout == 0)
  237. return -EIO;
  238. return 0;
  239. }
  240. /*
  241. * sysfs methods
  242. */
  243. static ssize_t c2port_show_name(struct device *dev,
  244. struct device_attribute *attr, char *buf)
  245. {
  246. struct c2port_device *c2dev = dev_get_drvdata(dev);
  247. return sprintf(buf, "%s\n", c2dev->name);
  248. }
  249. static DEVICE_ATTR(name, 0444, c2port_show_name, NULL);
  250. static ssize_t c2port_show_flash_blocks_num(struct device *dev,
  251. struct device_attribute *attr, char *buf)
  252. {
  253. struct c2port_device *c2dev = dev_get_drvdata(dev);
  254. struct c2port_ops *ops = c2dev->ops;
  255. return sprintf(buf, "%d\n", ops->blocks_num);
  256. }
  257. static DEVICE_ATTR(flash_blocks_num, 0444, c2port_show_flash_blocks_num, NULL);
  258. static ssize_t c2port_show_flash_block_size(struct device *dev,
  259. struct device_attribute *attr, char *buf)
  260. {
  261. struct c2port_device *c2dev = dev_get_drvdata(dev);
  262. struct c2port_ops *ops = c2dev->ops;
  263. return sprintf(buf, "%d\n", ops->block_size);
  264. }
  265. static DEVICE_ATTR(flash_block_size, 0444, c2port_show_flash_block_size, NULL);
  266. static ssize_t c2port_show_flash_size(struct device *dev,
  267. struct device_attribute *attr, char *buf)
  268. {
  269. struct c2port_device *c2dev = dev_get_drvdata(dev);
  270. struct c2port_ops *ops = c2dev->ops;
  271. return sprintf(buf, "%d\n", ops->blocks_num * ops->block_size);
  272. }
  273. static DEVICE_ATTR(flash_size, 0444, c2port_show_flash_size, NULL);
  274. static ssize_t access_show(struct device *dev, struct device_attribute *attr,
  275. char *buf)
  276. {
  277. struct c2port_device *c2dev = dev_get_drvdata(dev);
  278. return sprintf(buf, "%d\n", c2dev->access);
  279. }
  280. static ssize_t access_store(struct device *dev, struct device_attribute *attr,
  281. const char *buf, size_t count)
  282. {
  283. struct c2port_device *c2dev = dev_get_drvdata(dev);
  284. struct c2port_ops *ops = c2dev->ops;
  285. int status, ret;
  286. ret = sscanf(buf, "%d", &status);
  287. if (ret != 1)
  288. return -EINVAL;
  289. mutex_lock(&c2dev->mutex);
  290. c2dev->access = !!status;
  291. /* If access is "on" clock should be HIGH _before_ setting the line
  292. * as output and data line should be set as INPUT anyway */
  293. if (c2dev->access)
  294. ops->c2ck_set(c2dev, 1);
  295. ops->access(c2dev, c2dev->access);
  296. if (c2dev->access)
  297. ops->c2d_dir(c2dev, 1);
  298. mutex_unlock(&c2dev->mutex);
  299. return count;
  300. }
  301. static DEVICE_ATTR_RW(access);
  302. static ssize_t c2port_store_reset(struct device *dev,
  303. struct device_attribute *attr,
  304. const char *buf, size_t count)
  305. {
  306. struct c2port_device *c2dev = dev_get_drvdata(dev);
  307. /* Check the device access status */
  308. if (!c2dev->access)
  309. return -EBUSY;
  310. mutex_lock(&c2dev->mutex);
  311. c2port_reset(c2dev);
  312. c2dev->flash_access = 0;
  313. mutex_unlock(&c2dev->mutex);
  314. return count;
  315. }
  316. static DEVICE_ATTR(reset, 0200, NULL, c2port_store_reset);
  317. static ssize_t __c2port_show_dev_id(struct c2port_device *dev, char *buf)
  318. {
  319. u8 data;
  320. int ret;
  321. /* Select DEVICEID register for C2 data register accesses */
  322. c2port_write_ar(dev, C2PORT_DEVICEID);
  323. /* Read and return the device ID register */
  324. ret = c2port_read_dr(dev, &data);
  325. if (ret < 0)
  326. return ret;
  327. return sprintf(buf, "%d\n", data);
  328. }
  329. static ssize_t c2port_show_dev_id(struct device *dev,
  330. struct device_attribute *attr, char *buf)
  331. {
  332. struct c2port_device *c2dev = dev_get_drvdata(dev);
  333. ssize_t ret;
  334. /* Check the device access status */
  335. if (!c2dev->access)
  336. return -EBUSY;
  337. mutex_lock(&c2dev->mutex);
  338. ret = __c2port_show_dev_id(c2dev, buf);
  339. mutex_unlock(&c2dev->mutex);
  340. if (ret < 0)
  341. dev_err(dev, "cannot read from %s\n", c2dev->name);
  342. return ret;
  343. }
  344. static DEVICE_ATTR(dev_id, 0444, c2port_show_dev_id, NULL);
  345. static ssize_t __c2port_show_rev_id(struct c2port_device *dev, char *buf)
  346. {
  347. u8 data;
  348. int ret;
  349. /* Select REVID register for C2 data register accesses */
  350. c2port_write_ar(dev, C2PORT_REVID);
  351. /* Read and return the revision ID register */
  352. ret = c2port_read_dr(dev, &data);
  353. if (ret < 0)
  354. return ret;
  355. return sprintf(buf, "%d\n", data);
  356. }
  357. static ssize_t c2port_show_rev_id(struct device *dev,
  358. struct device_attribute *attr, char *buf)
  359. {
  360. struct c2port_device *c2dev = dev_get_drvdata(dev);
  361. ssize_t ret;
  362. /* Check the device access status */
  363. if (!c2dev->access)
  364. return -EBUSY;
  365. mutex_lock(&c2dev->mutex);
  366. ret = __c2port_show_rev_id(c2dev, buf);
  367. mutex_unlock(&c2dev->mutex);
  368. if (ret < 0)
  369. dev_err(c2dev->dev, "cannot read from %s\n", c2dev->name);
  370. return ret;
  371. }
  372. static DEVICE_ATTR(rev_id, 0444, c2port_show_rev_id, NULL);
  373. static ssize_t c2port_show_flash_access(struct device *dev,
  374. struct device_attribute *attr, char *buf)
  375. {
  376. struct c2port_device *c2dev = dev_get_drvdata(dev);
  377. return sprintf(buf, "%d\n", c2dev->flash_access);
  378. }
  379. static ssize_t __c2port_store_flash_access(struct c2port_device *dev,
  380. int status)
  381. {
  382. int ret;
  383. /* Check the device access status */
  384. if (!dev->access)
  385. return -EBUSY;
  386. dev->flash_access = !!status;
  387. /* If flash_access is off we have nothing to do... */
  388. if (dev->flash_access == 0)
  389. return 0;
  390. /* Target the C2 flash programming control register for C2 data
  391. * register access */
  392. c2port_write_ar(dev, C2PORT_FPCTL);
  393. /* Write the first keycode to enable C2 Flash programming */
  394. ret = c2port_write_dr(dev, 0x02);
  395. if (ret < 0)
  396. return ret;
  397. /* Write the second keycode to enable C2 Flash programming */
  398. ret = c2port_write_dr(dev, 0x01);
  399. if (ret < 0)
  400. return ret;
  401. /* Delay for at least 20ms to ensure the target is ready for
  402. * C2 flash programming */
  403. mdelay(25);
  404. return 0;
  405. }
  406. static ssize_t c2port_store_flash_access(struct device *dev,
  407. struct device_attribute *attr,
  408. const char *buf, size_t count)
  409. {
  410. struct c2port_device *c2dev = dev_get_drvdata(dev);
  411. int status;
  412. ssize_t ret;
  413. ret = sscanf(buf, "%d", &status);
  414. if (ret != 1)
  415. return -EINVAL;
  416. mutex_lock(&c2dev->mutex);
  417. ret = __c2port_store_flash_access(c2dev, status);
  418. mutex_unlock(&c2dev->mutex);
  419. if (ret < 0) {
  420. dev_err(c2dev->dev, "cannot enable %s flash programming\n",
  421. c2dev->name);
  422. return ret;
  423. }
  424. return count;
  425. }
  426. static DEVICE_ATTR(flash_access, 0644, c2port_show_flash_access,
  427. c2port_store_flash_access);
  428. static ssize_t __c2port_write_flash_erase(struct c2port_device *dev)
  429. {
  430. u8 status;
  431. int ret;
  432. /* Target the C2 flash programming data register for C2 data register
  433. * access.
  434. */
  435. c2port_write_ar(dev, C2PORT_FPDAT);
  436. /* Send device erase command */
  437. c2port_write_dr(dev, C2PORT_DEVICE_ERASE);
  438. /* Wait for input acknowledge */
  439. ret = c2port_poll_in_busy(dev);
  440. if (ret < 0)
  441. return ret;
  442. /* Should check status before starting FLASH access sequence */
  443. /* Wait for status information */
  444. ret = c2port_poll_out_ready(dev);
  445. if (ret < 0)
  446. return ret;
  447. /* Read flash programming interface status */
  448. ret = c2port_read_dr(dev, &status);
  449. if (ret < 0)
  450. return ret;
  451. if (status != C2PORT_COMMAND_OK)
  452. return -EBUSY;
  453. /* Send a three-byte arming sequence to enable the device erase.
  454. * If the sequence is not received correctly, the command will be
  455. * ignored.
  456. * Sequence is: 0xde, 0xad, 0xa5.
  457. */
  458. c2port_write_dr(dev, 0xde);
  459. ret = c2port_poll_in_busy(dev);
  460. if (ret < 0)
  461. return ret;
  462. c2port_write_dr(dev, 0xad);
  463. ret = c2port_poll_in_busy(dev);
  464. if (ret < 0)
  465. return ret;
  466. c2port_write_dr(dev, 0xa5);
  467. ret = c2port_poll_in_busy(dev);
  468. if (ret < 0)
  469. return ret;
  470. ret = c2port_poll_out_ready(dev);
  471. if (ret < 0)
  472. return ret;
  473. return 0;
  474. }
  475. static ssize_t c2port_store_flash_erase(struct device *dev,
  476. struct device_attribute *attr,
  477. const char *buf, size_t count)
  478. {
  479. struct c2port_device *c2dev = dev_get_drvdata(dev);
  480. int ret;
  481. /* Check the device and flash access status */
  482. if (!c2dev->access || !c2dev->flash_access)
  483. return -EBUSY;
  484. mutex_lock(&c2dev->mutex);
  485. ret = __c2port_write_flash_erase(c2dev);
  486. mutex_unlock(&c2dev->mutex);
  487. if (ret < 0) {
  488. dev_err(c2dev->dev, "cannot erase %s flash\n", c2dev->name);
  489. return ret;
  490. }
  491. return count;
  492. }
  493. static DEVICE_ATTR(flash_erase, 0200, NULL, c2port_store_flash_erase);
  494. static ssize_t __c2port_read_flash_data(struct c2port_device *dev,
  495. char *buffer, loff_t offset, size_t count)
  496. {
  497. struct c2port_ops *ops = dev->ops;
  498. u8 status, nread = 128;
  499. int i, ret;
  500. /* Check for flash end */
  501. if (offset >= ops->block_size * ops->blocks_num)
  502. return 0;
  503. if (ops->block_size * ops->blocks_num - offset < nread)
  504. nread = ops->block_size * ops->blocks_num - offset;
  505. if (count < nread)
  506. nread = count;
  507. if (nread == 0)
  508. return nread;
  509. /* Target the C2 flash programming data register for C2 data register
  510. * access */
  511. c2port_write_ar(dev, C2PORT_FPDAT);
  512. /* Send flash block read command */
  513. c2port_write_dr(dev, C2PORT_BLOCK_READ);
  514. /* Wait for input acknowledge */
  515. ret = c2port_poll_in_busy(dev);
  516. if (ret < 0)
  517. return ret;
  518. /* Should check status before starting FLASH access sequence */
  519. /* Wait for status information */
  520. ret = c2port_poll_out_ready(dev);
  521. if (ret < 0)
  522. return ret;
  523. /* Read flash programming interface status */
  524. ret = c2port_read_dr(dev, &status);
  525. if (ret < 0)
  526. return ret;
  527. if (status != C2PORT_COMMAND_OK)
  528. return -EBUSY;
  529. /* Send address high byte */
  530. c2port_write_dr(dev, offset >> 8);
  531. ret = c2port_poll_in_busy(dev);
  532. if (ret < 0)
  533. return ret;
  534. /* Send address low byte */
  535. c2port_write_dr(dev, offset & 0x00ff);
  536. ret = c2port_poll_in_busy(dev);
  537. if (ret < 0)
  538. return ret;
  539. /* Send address block size */
  540. c2port_write_dr(dev, nread);
  541. ret = c2port_poll_in_busy(dev);
  542. if (ret < 0)
  543. return ret;
  544. /* Should check status before reading FLASH block */
  545. /* Wait for status information */
  546. ret = c2port_poll_out_ready(dev);
  547. if (ret < 0)
  548. return ret;
  549. /* Read flash programming interface status */
  550. ret = c2port_read_dr(dev, &status);
  551. if (ret < 0)
  552. return ret;
  553. if (status != C2PORT_COMMAND_OK)
  554. return -EBUSY;
  555. /* Read flash block */
  556. for (i = 0; i < nread; i++) {
  557. ret = c2port_poll_out_ready(dev);
  558. if (ret < 0)
  559. return ret;
  560. ret = c2port_read_dr(dev, buffer+i);
  561. if (ret < 0)
  562. return ret;
  563. }
  564. return nread;
  565. }
  566. static ssize_t c2port_read_flash_data(struct file *filp, struct kobject *kobj,
  567. struct bin_attribute *attr,
  568. char *buffer, loff_t offset, size_t count)
  569. {
  570. struct c2port_device *c2dev = dev_get_drvdata(kobj_to_dev(kobj));
  571. ssize_t ret;
  572. /* Check the device and flash access status */
  573. if (!c2dev->access || !c2dev->flash_access)
  574. return -EBUSY;
  575. mutex_lock(&c2dev->mutex);
  576. ret = __c2port_read_flash_data(c2dev, buffer, offset, count);
  577. mutex_unlock(&c2dev->mutex);
  578. if (ret < 0)
  579. dev_err(c2dev->dev, "cannot read %s flash\n", c2dev->name);
  580. return ret;
  581. }
  582. static ssize_t __c2port_write_flash_data(struct c2port_device *dev,
  583. char *buffer, loff_t offset, size_t count)
  584. {
  585. struct c2port_ops *ops = dev->ops;
  586. u8 status, nwrite = 128;
  587. int i, ret;
  588. if (nwrite > count)
  589. nwrite = count;
  590. if (ops->block_size * ops->blocks_num - offset < nwrite)
  591. nwrite = ops->block_size * ops->blocks_num - offset;
  592. /* Check for flash end */
  593. if (offset >= ops->block_size * ops->blocks_num)
  594. return -EINVAL;
  595. /* Target the C2 flash programming data register for C2 data register
  596. * access */
  597. c2port_write_ar(dev, C2PORT_FPDAT);
  598. /* Send flash block write command */
  599. c2port_write_dr(dev, C2PORT_BLOCK_WRITE);
  600. /* Wait for input acknowledge */
  601. ret = c2port_poll_in_busy(dev);
  602. if (ret < 0)
  603. return ret;
  604. /* Should check status before starting FLASH access sequence */
  605. /* Wait for status information */
  606. ret = c2port_poll_out_ready(dev);
  607. if (ret < 0)
  608. return ret;
  609. /* Read flash programming interface status */
  610. ret = c2port_read_dr(dev, &status);
  611. if (ret < 0)
  612. return ret;
  613. if (status != C2PORT_COMMAND_OK)
  614. return -EBUSY;
  615. /* Send address high byte */
  616. c2port_write_dr(dev, offset >> 8);
  617. ret = c2port_poll_in_busy(dev);
  618. if (ret < 0)
  619. return ret;
  620. /* Send address low byte */
  621. c2port_write_dr(dev, offset & 0x00ff);
  622. ret = c2port_poll_in_busy(dev);
  623. if (ret < 0)
  624. return ret;
  625. /* Send address block size */
  626. c2port_write_dr(dev, nwrite);
  627. ret = c2port_poll_in_busy(dev);
  628. if (ret < 0)
  629. return ret;
  630. /* Should check status before writing FLASH block */
  631. /* Wait for status information */
  632. ret = c2port_poll_out_ready(dev);
  633. if (ret < 0)
  634. return ret;
  635. /* Read flash programming interface status */
  636. ret = c2port_read_dr(dev, &status);
  637. if (ret < 0)
  638. return ret;
  639. if (status != C2PORT_COMMAND_OK)
  640. return -EBUSY;
  641. /* Write flash block */
  642. for (i = 0; i < nwrite; i++) {
  643. ret = c2port_write_dr(dev, *(buffer+i));
  644. if (ret < 0)
  645. return ret;
  646. ret = c2port_poll_in_busy(dev);
  647. if (ret < 0)
  648. return ret;
  649. }
  650. /* Wait for last flash write to complete */
  651. ret = c2port_poll_out_ready(dev);
  652. if (ret < 0)
  653. return ret;
  654. return nwrite;
  655. }
  656. static ssize_t c2port_write_flash_data(struct file *filp, struct kobject *kobj,
  657. struct bin_attribute *attr,
  658. char *buffer, loff_t offset, size_t count)
  659. {
  660. struct c2port_device *c2dev = dev_get_drvdata(kobj_to_dev(kobj));
  661. int ret;
  662. /* Check the device access status */
  663. if (!c2dev->access || !c2dev->flash_access)
  664. return -EBUSY;
  665. mutex_lock(&c2dev->mutex);
  666. ret = __c2port_write_flash_data(c2dev, buffer, offset, count);
  667. mutex_unlock(&c2dev->mutex);
  668. if (ret < 0)
  669. dev_err(c2dev->dev, "cannot write %s flash\n", c2dev->name);
  670. return ret;
  671. }
  672. /* size is computed at run-time */
  673. static BIN_ATTR(flash_data, 0644, c2port_read_flash_data,
  674. c2port_write_flash_data, 0);
  675. /*
  676. * Class attributes
  677. */
  678. static struct attribute *c2port_attrs[] = {
  679. &dev_attr_name.attr,
  680. &dev_attr_flash_blocks_num.attr,
  681. &dev_attr_flash_block_size.attr,
  682. &dev_attr_flash_size.attr,
  683. &dev_attr_access.attr,
  684. &dev_attr_reset.attr,
  685. &dev_attr_dev_id.attr,
  686. &dev_attr_rev_id.attr,
  687. &dev_attr_flash_access.attr,
  688. &dev_attr_flash_erase.attr,
  689. NULL,
  690. };
  691. static struct bin_attribute *c2port_bin_attrs[] = {
  692. &bin_attr_flash_data,
  693. NULL,
  694. };
  695. static const struct attribute_group c2port_group = {
  696. .attrs = c2port_attrs,
  697. .bin_attrs = c2port_bin_attrs,
  698. };
  699. static const struct attribute_group *c2port_groups[] = {
  700. &c2port_group,
  701. NULL,
  702. };
  703. /*
  704. * Exported functions
  705. */
  706. struct c2port_device *c2port_device_register(char *name,
  707. struct c2port_ops *ops, void *devdata)
  708. {
  709. struct c2port_device *c2dev;
  710. int ret;
  711. if (unlikely(!ops) || unlikely(!ops->access) || \
  712. unlikely(!ops->c2d_dir) || unlikely(!ops->c2ck_set) || \
  713. unlikely(!ops->c2d_get) || unlikely(!ops->c2d_set))
  714. return ERR_PTR(-EINVAL);
  715. c2dev = kmalloc(sizeof(struct c2port_device), GFP_KERNEL);
  716. if (unlikely(!c2dev))
  717. return ERR_PTR(-ENOMEM);
  718. idr_preload(GFP_KERNEL);
  719. spin_lock_irq(&c2port_idr_lock);
  720. ret = idr_alloc(&c2port_idr, c2dev, 0, 0, GFP_NOWAIT);
  721. spin_unlock_irq(&c2port_idr_lock);
  722. idr_preload_end();
  723. if (ret < 0)
  724. goto error_idr_alloc;
  725. c2dev->id = ret;
  726. bin_attr_flash_data.size = ops->blocks_num * ops->block_size;
  727. c2dev->dev = device_create(c2port_class, NULL, 0, c2dev,
  728. "c2port%d", c2dev->id);
  729. if (IS_ERR(c2dev->dev)) {
  730. ret = PTR_ERR(c2dev->dev);
  731. goto error_device_create;
  732. }
  733. dev_set_drvdata(c2dev->dev, c2dev);
  734. strncpy(c2dev->name, name, C2PORT_NAME_LEN);
  735. c2dev->ops = ops;
  736. mutex_init(&c2dev->mutex);
  737. /* By default C2 port access is off */
  738. c2dev->access = c2dev->flash_access = 0;
  739. ops->access(c2dev, 0);
  740. dev_info(c2dev->dev, "C2 port %s added\n", name);
  741. dev_info(c2dev->dev, "%s flash has %d blocks x %d bytes "
  742. "(%d bytes total)\n",
  743. name, ops->blocks_num, ops->block_size,
  744. ops->blocks_num * ops->block_size);
  745. return c2dev;
  746. error_device_create:
  747. spin_lock_irq(&c2port_idr_lock);
  748. idr_remove(&c2port_idr, c2dev->id);
  749. spin_unlock_irq(&c2port_idr_lock);
  750. error_idr_alloc:
  751. kfree(c2dev);
  752. return ERR_PTR(ret);
  753. }
  754. EXPORT_SYMBOL(c2port_device_register);
  755. void c2port_device_unregister(struct c2port_device *c2dev)
  756. {
  757. if (!c2dev)
  758. return;
  759. dev_info(c2dev->dev, "C2 port %s removed\n", c2dev->name);
  760. spin_lock_irq(&c2port_idr_lock);
  761. idr_remove(&c2port_idr, c2dev->id);
  762. spin_unlock_irq(&c2port_idr_lock);
  763. device_destroy(c2port_class, c2dev->id);
  764. kfree(c2dev);
  765. }
  766. EXPORT_SYMBOL(c2port_device_unregister);
  767. /*
  768. * Module stuff
  769. */
  770. static int __init c2port_init(void)
  771. {
  772. printk(KERN_INFO "Silicon Labs C2 port support v. " DRIVER_VERSION
  773. " - (C) 2007 Rodolfo Giometti\n");
  774. c2port_class = class_create(THIS_MODULE, "c2port");
  775. if (IS_ERR(c2port_class)) {
  776. printk(KERN_ERR "c2port: failed to allocate class\n");
  777. return PTR_ERR(c2port_class);
  778. }
  779. c2port_class->dev_groups = c2port_groups;
  780. return 0;
  781. }
  782. static void __exit c2port_exit(void)
  783. {
  784. class_destroy(c2port_class);
  785. }
  786. module_init(c2port_init);
  787. module_exit(c2port_exit);
  788. MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
  789. MODULE_DESCRIPTION("Silicon Labs C2 port support v. " DRIVER_VERSION);
  790. MODULE_LICENSE("GPL");