wm97xx-core.c 9.2 KB

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  1. /*
  2. * Wolfson WM97xx -- Core device
  3. *
  4. * Copyright (C) 2017 Robert Jarzmik
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * Features:
  12. * - an AC97 audio codec
  13. * - a touchscreen driver
  14. * - a GPIO block
  15. */
  16. #include <linux/device.h>
  17. #include <linux/mfd/core.h>
  18. #include <linux/mfd/wm97xx.h>
  19. #include <linux/module.h>
  20. #include <linux/regmap.h>
  21. #include <linux/slab.h>
  22. #include <linux/wm97xx.h>
  23. #include <sound/ac97/codec.h>
  24. #include <sound/ac97/compat.h>
  25. #define WM9705_VENDOR_ID 0x574d4c05
  26. #define WM9712_VENDOR_ID 0x574d4c12
  27. #define WM9713_VENDOR_ID 0x574d4c13
  28. #define WM97xx_VENDOR_ID_MASK 0xffffffff
  29. struct wm97xx_priv {
  30. struct regmap *regmap;
  31. struct snd_ac97 *ac97;
  32. struct device *dev;
  33. struct wm97xx_platform_data codec_pdata;
  34. };
  35. static bool wm97xx_readable_reg(struct device *dev, unsigned int reg)
  36. {
  37. switch (reg) {
  38. case AC97_RESET ... AC97_PCM_SURR_DAC_RATE:
  39. case AC97_PCM_LR_ADC_RATE:
  40. case AC97_CENTER_LFE_MASTER:
  41. case AC97_SPDIF ... AC97_LINE1_LEVEL:
  42. case AC97_GPIO_CFG ... 0x5c:
  43. case AC97_CODEC_CLASS_REV ... AC97_PCI_SID:
  44. case 0x74 ... AC97_VENDOR_ID2:
  45. return true;
  46. default:
  47. return false;
  48. }
  49. }
  50. static bool wm97xx_writeable_reg(struct device *dev, unsigned int reg)
  51. {
  52. switch (reg) {
  53. case AC97_VENDOR_ID1:
  54. case AC97_VENDOR_ID2:
  55. return false;
  56. default:
  57. return wm97xx_readable_reg(dev, reg);
  58. }
  59. }
  60. static const struct reg_default wm9705_reg_defaults[] = {
  61. { 0x02, 0x8000 },
  62. { 0x04, 0x8000 },
  63. { 0x06, 0x8000 },
  64. { 0x0a, 0x8000 },
  65. { 0x0c, 0x8008 },
  66. { 0x0e, 0x8008 },
  67. { 0x10, 0x8808 },
  68. { 0x12, 0x8808 },
  69. { 0x14, 0x8808 },
  70. { 0x16, 0x8808 },
  71. { 0x18, 0x8808 },
  72. { 0x1a, 0x0000 },
  73. { 0x1c, 0x8000 },
  74. { 0x20, 0x0000 },
  75. { 0x22, 0x0000 },
  76. { 0x26, 0x000f },
  77. { 0x28, 0x0605 },
  78. { 0x2a, 0x0000 },
  79. { 0x2c, 0xbb80 },
  80. { 0x32, 0xbb80 },
  81. { 0x34, 0x2000 },
  82. { 0x5a, 0x0000 },
  83. { 0x5c, 0x0000 },
  84. { 0x72, 0x0808 },
  85. { 0x74, 0x0000 },
  86. { 0x76, 0x0006 },
  87. { 0x78, 0x0000 },
  88. { 0x7a, 0x0000 },
  89. };
  90. static const struct regmap_config wm9705_regmap_config = {
  91. .reg_bits = 16,
  92. .reg_stride = 2,
  93. .val_bits = 16,
  94. .max_register = 0x7e,
  95. .cache_type = REGCACHE_RBTREE,
  96. .reg_defaults = wm9705_reg_defaults,
  97. .num_reg_defaults = ARRAY_SIZE(wm9705_reg_defaults),
  98. .volatile_reg = regmap_ac97_default_volatile,
  99. .readable_reg = wm97xx_readable_reg,
  100. .writeable_reg = wm97xx_writeable_reg,
  101. };
  102. static struct mfd_cell wm9705_cells[] = {
  103. { .name = "wm9705-codec", },
  104. { .name = "wm97xx-ts", },
  105. };
  106. static bool wm9712_volatile_reg(struct device *dev, unsigned int reg)
  107. {
  108. switch (reg) {
  109. case AC97_REC_GAIN:
  110. return true;
  111. default:
  112. return regmap_ac97_default_volatile(dev, reg);
  113. }
  114. }
  115. static const struct reg_default wm9712_reg_defaults[] = {
  116. { 0x02, 0x8000 },
  117. { 0x04, 0x8000 },
  118. { 0x06, 0x8000 },
  119. { 0x08, 0x0f0f },
  120. { 0x0a, 0xaaa0 },
  121. { 0x0c, 0xc008 },
  122. { 0x0e, 0x6808 },
  123. { 0x10, 0xe808 },
  124. { 0x12, 0xaaa0 },
  125. { 0x14, 0xad00 },
  126. { 0x16, 0x8000 },
  127. { 0x18, 0xe808 },
  128. { 0x1a, 0x3000 },
  129. { 0x1c, 0x8000 },
  130. { 0x20, 0x0000 },
  131. { 0x22, 0x0000 },
  132. { 0x26, 0x000f },
  133. { 0x28, 0x0605 },
  134. { 0x2a, 0x0410 },
  135. { 0x2c, 0xbb80 },
  136. { 0x2e, 0xbb80 },
  137. { 0x32, 0xbb80 },
  138. { 0x34, 0x2000 },
  139. { 0x4c, 0xf83e },
  140. { 0x4e, 0xffff },
  141. { 0x50, 0x0000 },
  142. { 0x52, 0x0000 },
  143. { 0x56, 0xf83e },
  144. { 0x58, 0x0008 },
  145. { 0x5c, 0x0000 },
  146. { 0x60, 0xb032 },
  147. { 0x62, 0x3e00 },
  148. { 0x64, 0x0000 },
  149. { 0x76, 0x0006 },
  150. { 0x78, 0x0001 },
  151. { 0x7a, 0x0000 },
  152. };
  153. static const struct regmap_config wm9712_regmap_config = {
  154. .reg_bits = 16,
  155. .reg_stride = 2,
  156. .val_bits = 16,
  157. .max_register = 0x7e,
  158. .cache_type = REGCACHE_RBTREE,
  159. .reg_defaults = wm9712_reg_defaults,
  160. .num_reg_defaults = ARRAY_SIZE(wm9712_reg_defaults),
  161. .volatile_reg = wm9712_volatile_reg,
  162. .readable_reg = wm97xx_readable_reg,
  163. .writeable_reg = wm97xx_writeable_reg,
  164. };
  165. static struct mfd_cell wm9712_cells[] = {
  166. { .name = "wm9712-codec", },
  167. { .name = "wm97xx-ts", },
  168. };
  169. static const struct reg_default wm9713_reg_defaults[] = {
  170. { 0x02, 0x8080 }, /* Speaker Output Volume */
  171. { 0x04, 0x8080 }, /* Headphone Output Volume */
  172. { 0x06, 0x8080 }, /* Out3/OUT4 Volume */
  173. { 0x08, 0xc880 }, /* Mono Volume */
  174. { 0x0a, 0xe808 }, /* LINEIN Volume */
  175. { 0x0c, 0xe808 }, /* DAC PGA Volume */
  176. { 0x0e, 0x0808 }, /* MIC PGA Volume */
  177. { 0x10, 0x00da }, /* MIC Routing Control */
  178. { 0x12, 0x8000 }, /* Record PGA Volume */
  179. { 0x14, 0xd600 }, /* Record Routing */
  180. { 0x16, 0xaaa0 }, /* PCBEEP Volume */
  181. { 0x18, 0xaaa0 }, /* VxDAC Volume */
  182. { 0x1a, 0xaaa0 }, /* AUXDAC Volume */
  183. { 0x1c, 0x0000 }, /* Output PGA Mux */
  184. { 0x1e, 0x0000 }, /* DAC 3D control */
  185. { 0x20, 0x0f0f }, /* DAC Tone Control*/
  186. { 0x22, 0x0040 }, /* MIC Input Select & Bias */
  187. { 0x24, 0x0000 }, /* Output Volume Mapping & Jack */
  188. { 0x26, 0x7f00 }, /* Powerdown Ctrl/Stat*/
  189. { 0x28, 0x0405 }, /* Extended Audio ID */
  190. { 0x2a, 0x0410 }, /* Extended Audio Start/Ctrl */
  191. { 0x2c, 0xbb80 }, /* Audio DACs Sample Rate */
  192. { 0x2e, 0xbb80 }, /* AUXDAC Sample Rate */
  193. { 0x32, 0xbb80 }, /* Audio ADCs Sample Rate */
  194. { 0x36, 0x4523 }, /* PCM codec control */
  195. { 0x3a, 0x2000 }, /* SPDIF control */
  196. { 0x3c, 0xfdff }, /* Powerdown 1 */
  197. { 0x3e, 0xffff }, /* Powerdown 2 */
  198. { 0x40, 0x0000 }, /* General Purpose */
  199. { 0x42, 0x0000 }, /* Fast Power-Up Control */
  200. { 0x44, 0x0080 }, /* MCLK/PLL Control */
  201. { 0x46, 0x0000 }, /* MCLK/PLL Control */
  202. { 0x4c, 0xfffe }, /* GPIO Pin Configuration */
  203. { 0x4e, 0xffff }, /* GPIO Pin Polarity / Type */
  204. { 0x50, 0x0000 }, /* GPIO Pin Sticky */
  205. { 0x52, 0x0000 }, /* GPIO Pin Wake-Up */
  206. /* GPIO Pin Status */
  207. { 0x56, 0xfffe }, /* GPIO Pin Sharing */
  208. { 0x58, 0x4000 }, /* GPIO PullUp/PullDown */
  209. { 0x5a, 0x0000 }, /* Additional Functions 1 */
  210. { 0x5c, 0x0000 }, /* Additional Functions 2 */
  211. { 0x60, 0xb032 }, /* ALC Control */
  212. { 0x62, 0x3e00 }, /* ALC / Noise Gate Control */
  213. { 0x64, 0x0000 }, /* AUXDAC input control */
  214. { 0x74, 0x0000 }, /* Digitiser Reg 1 */
  215. { 0x76, 0x0006 }, /* Digitiser Reg 2 */
  216. { 0x78, 0x0001 }, /* Digitiser Reg 3 */
  217. { 0x7a, 0x0000 }, /* Digitiser Read Back */
  218. };
  219. static const struct regmap_config wm9713_regmap_config = {
  220. .reg_bits = 16,
  221. .reg_stride = 2,
  222. .val_bits = 16,
  223. .max_register = 0x7e,
  224. .cache_type = REGCACHE_RBTREE,
  225. .reg_defaults = wm9713_reg_defaults,
  226. .num_reg_defaults = ARRAY_SIZE(wm9713_reg_defaults),
  227. .volatile_reg = regmap_ac97_default_volatile,
  228. .readable_reg = wm97xx_readable_reg,
  229. .writeable_reg = wm97xx_writeable_reg,
  230. };
  231. static struct mfd_cell wm9713_cells[] = {
  232. { .name = "wm9713-codec", },
  233. { .name = "wm97xx-ts", },
  234. };
  235. static int wm97xx_ac97_probe(struct ac97_codec_device *adev)
  236. {
  237. struct wm97xx_priv *wm97xx;
  238. const struct regmap_config *config;
  239. struct wm97xx_platform_data *codec_pdata;
  240. struct mfd_cell *cells;
  241. int ret = -ENODEV, nb_cells, i;
  242. struct wm97xx_pdata *pdata = snd_ac97_codec_get_platdata(adev);
  243. wm97xx = devm_kzalloc(ac97_codec_dev2dev(adev),
  244. sizeof(*wm97xx), GFP_KERNEL);
  245. if (!wm97xx)
  246. return -ENOMEM;
  247. wm97xx->dev = ac97_codec_dev2dev(adev);
  248. wm97xx->ac97 = snd_ac97_compat_alloc(adev);
  249. if (IS_ERR(wm97xx->ac97))
  250. return PTR_ERR(wm97xx->ac97);
  251. ac97_set_drvdata(adev, wm97xx);
  252. dev_info(wm97xx->dev, "wm97xx core found, id=0x%x\n",
  253. adev->vendor_id);
  254. codec_pdata = &wm97xx->codec_pdata;
  255. codec_pdata->ac97 = wm97xx->ac97;
  256. codec_pdata->batt_pdata = pdata ? pdata->batt_pdata : NULL;
  257. switch (adev->vendor_id) {
  258. case WM9705_VENDOR_ID:
  259. config = &wm9705_regmap_config;
  260. cells = wm9705_cells;
  261. nb_cells = ARRAY_SIZE(wm9705_cells);
  262. break;
  263. case WM9712_VENDOR_ID:
  264. config = &wm9712_regmap_config;
  265. cells = wm9712_cells;
  266. nb_cells = ARRAY_SIZE(wm9712_cells);
  267. break;
  268. case WM9713_VENDOR_ID:
  269. config = &wm9713_regmap_config;
  270. cells = wm9713_cells;
  271. nb_cells = ARRAY_SIZE(wm9713_cells);
  272. break;
  273. default:
  274. goto err_free_compat;
  275. }
  276. for (i = 0; i < nb_cells; i++) {
  277. cells[i].platform_data = codec_pdata;
  278. cells[i].pdata_size = sizeof(*codec_pdata);
  279. }
  280. codec_pdata->regmap = devm_regmap_init_ac97(wm97xx->ac97, config);
  281. if (IS_ERR(codec_pdata->regmap)) {
  282. ret = PTR_ERR(codec_pdata->regmap);
  283. goto err_free_compat;
  284. }
  285. ret = devm_mfd_add_devices(wm97xx->dev, PLATFORM_DEVID_NONE,
  286. cells, nb_cells, NULL, 0, NULL);
  287. if (ret)
  288. goto err_free_compat;
  289. return ret;
  290. err_free_compat:
  291. snd_ac97_compat_release(wm97xx->ac97);
  292. return ret;
  293. }
  294. static int wm97xx_ac97_remove(struct ac97_codec_device *adev)
  295. {
  296. struct wm97xx_priv *wm97xx = ac97_get_drvdata(adev);
  297. snd_ac97_compat_release(wm97xx->ac97);
  298. return 0;
  299. }
  300. static const struct ac97_id wm97xx_ac97_ids[] = {
  301. { .id = WM9705_VENDOR_ID, .mask = WM97xx_VENDOR_ID_MASK },
  302. { .id = WM9712_VENDOR_ID, .mask = WM97xx_VENDOR_ID_MASK },
  303. { .id = WM9713_VENDOR_ID, .mask = WM97xx_VENDOR_ID_MASK },
  304. { }
  305. };
  306. static struct ac97_codec_driver wm97xx_ac97_driver = {
  307. .driver = {
  308. .name = "wm97xx-core",
  309. },
  310. .probe = wm97xx_ac97_probe,
  311. .remove = wm97xx_ac97_remove,
  312. .id_table = wm97xx_ac97_ids,
  313. };
  314. static int __init wm97xx_module_init(void)
  315. {
  316. return snd_ac97_codec_driver_register(&wm97xx_ac97_driver);
  317. }
  318. module_init(wm97xx_module_init);
  319. static void __exit wm97xx_module_exit(void)
  320. {
  321. snd_ac97_codec_driver_unregister(&wm97xx_ac97_driver);
  322. }
  323. module_exit(wm97xx_module_exit);
  324. MODULE_DESCRIPTION("WM9712, WM9713 core driver");
  325. MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>");
  326. MODULE_LICENSE("GPL");