twl6040.c 21 KB

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  1. /*
  2. * MFD driver for TWL6040 audio device
  3. *
  4. * Authors: Misael Lopez Cruz <misael.lopez@ti.com>
  5. * Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
  6. * Peter Ujfalusi <peter.ujfalusi@ti.com>
  7. *
  8. * Copyright: (C) 2011 Texas Instruments, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  22. * 02110-1301 USA
  23. *
  24. */
  25. #include <linux/module.h>
  26. #include <linux/types.h>
  27. #include <linux/slab.h>
  28. #include <linux/kernel.h>
  29. #include <linux/err.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/of.h>
  32. #include <linux/of_irq.h>
  33. #include <linux/of_gpio.h>
  34. #include <linux/of_platform.h>
  35. #include <linux/gpio.h>
  36. #include <linux/delay.h>
  37. #include <linux/i2c.h>
  38. #include <linux/regmap.h>
  39. #include <linux/mfd/core.h>
  40. #include <linux/mfd/twl6040.h>
  41. #include <linux/regulator/consumer.h>
  42. #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)
  43. #define TWL6040_NUM_SUPPLIES (2)
  44. static const struct reg_default twl6040_defaults[] = {
  45. { 0x01, 0x4B }, /* REG_ASICID (ro) */
  46. { 0x02, 0x00 }, /* REG_ASICREV (ro) */
  47. { 0x03, 0x00 }, /* REG_INTID */
  48. { 0x04, 0x00 }, /* REG_INTMR */
  49. { 0x05, 0x00 }, /* REG_NCPCTRL */
  50. { 0x06, 0x00 }, /* REG_LDOCTL */
  51. { 0x07, 0x60 }, /* REG_HPPLLCTL */
  52. { 0x08, 0x00 }, /* REG_LPPLLCTL */
  53. { 0x09, 0x4A }, /* REG_LPPLLDIV */
  54. { 0x0A, 0x00 }, /* REG_AMICBCTL */
  55. { 0x0B, 0x00 }, /* REG_DMICBCTL */
  56. { 0x0C, 0x00 }, /* REG_MICLCTL */
  57. { 0x0D, 0x00 }, /* REG_MICRCTL */
  58. { 0x0E, 0x00 }, /* REG_MICGAIN */
  59. { 0x0F, 0x1B }, /* REG_LINEGAIN */
  60. { 0x10, 0x00 }, /* REG_HSLCTL */
  61. { 0x11, 0x00 }, /* REG_HSRCTL */
  62. { 0x12, 0x00 }, /* REG_HSGAIN */
  63. { 0x13, 0x00 }, /* REG_EARCTL */
  64. { 0x14, 0x00 }, /* REG_HFLCTL */
  65. { 0x15, 0x00 }, /* REG_HFLGAIN */
  66. { 0x16, 0x00 }, /* REG_HFRCTL */
  67. { 0x17, 0x00 }, /* REG_HFRGAIN */
  68. { 0x18, 0x00 }, /* REG_VIBCTLL */
  69. { 0x19, 0x00 }, /* REG_VIBDATL */
  70. { 0x1A, 0x00 }, /* REG_VIBCTLR */
  71. { 0x1B, 0x00 }, /* REG_VIBDATR */
  72. { 0x1C, 0x00 }, /* REG_HKCTL1 */
  73. { 0x1D, 0x00 }, /* REG_HKCTL2 */
  74. { 0x1E, 0x00 }, /* REG_GPOCTL */
  75. { 0x1F, 0x00 }, /* REG_ALB */
  76. { 0x20, 0x00 }, /* REG_DLB */
  77. /* 0x28, REG_TRIM1 */
  78. /* 0x29, REG_TRIM2 */
  79. /* 0x2A, REG_TRIM3 */
  80. /* 0x2B, REG_HSOTRIM */
  81. /* 0x2C, REG_HFOTRIM */
  82. { 0x2D, 0x08 }, /* REG_ACCCTL */
  83. { 0x2E, 0x00 }, /* REG_STATUS (ro) */
  84. };
  85. static struct reg_sequence twl6040_patch[] = {
  86. /*
  87. * Select I2C bus access to dual access registers
  88. * Interrupt register is cleared on read
  89. * Select fast mode for i2c (400KHz)
  90. */
  91. { TWL6040_REG_ACCCTL,
  92. TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) },
  93. };
  94. static bool twl6040_has_vibra(struct device_node *parent)
  95. {
  96. struct device_node *node;
  97. node = of_get_child_by_name(parent, "vibra");
  98. if (node) {
  99. of_node_put(node);
  100. return true;
  101. }
  102. return false;
  103. }
  104. int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg)
  105. {
  106. int ret;
  107. unsigned int val;
  108. ret = regmap_read(twl6040->regmap, reg, &val);
  109. if (ret < 0)
  110. return ret;
  111. return val;
  112. }
  113. EXPORT_SYMBOL(twl6040_reg_read);
  114. int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val)
  115. {
  116. int ret;
  117. ret = regmap_write(twl6040->regmap, reg, val);
  118. return ret;
  119. }
  120. EXPORT_SYMBOL(twl6040_reg_write);
  121. int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
  122. {
  123. return regmap_update_bits(twl6040->regmap, reg, mask, mask);
  124. }
  125. EXPORT_SYMBOL(twl6040_set_bits);
  126. int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
  127. {
  128. return regmap_update_bits(twl6040->regmap, reg, mask, 0);
  129. }
  130. EXPORT_SYMBOL(twl6040_clear_bits);
  131. /* twl6040 codec manual power-up sequence */
  132. static int twl6040_power_up_manual(struct twl6040 *twl6040)
  133. {
  134. u8 ldoctl, ncpctl, lppllctl;
  135. int ret;
  136. /* enable high-side LDO, reference system and internal oscillator */
  137. ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA;
  138. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  139. if (ret)
  140. return ret;
  141. usleep_range(10000, 10500);
  142. /* enable negative charge pump */
  143. ncpctl = TWL6040_NCPENA;
  144. ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  145. if (ret)
  146. goto ncp_err;
  147. usleep_range(1000, 1500);
  148. /* enable low-side LDO */
  149. ldoctl |= TWL6040_LSLDOENA;
  150. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  151. if (ret)
  152. goto lsldo_err;
  153. usleep_range(1000, 1500);
  154. /* enable low-power PLL */
  155. lppllctl = TWL6040_LPLLENA;
  156. ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  157. if (ret)
  158. goto lppll_err;
  159. usleep_range(5000, 5500);
  160. /* disable internal oscillator */
  161. ldoctl &= ~TWL6040_OSCENA;
  162. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  163. if (ret)
  164. goto osc_err;
  165. return 0;
  166. osc_err:
  167. lppllctl &= ~TWL6040_LPLLENA;
  168. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  169. lppll_err:
  170. ldoctl &= ~TWL6040_LSLDOENA;
  171. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  172. lsldo_err:
  173. ncpctl &= ~TWL6040_NCPENA;
  174. twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  175. ncp_err:
  176. ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
  177. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  178. dev_err(twl6040->dev, "manual power-up failed\n");
  179. return ret;
  180. }
  181. /* twl6040 manual power-down sequence */
  182. static void twl6040_power_down_manual(struct twl6040 *twl6040)
  183. {
  184. u8 ncpctl, ldoctl, lppllctl;
  185. ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL);
  186. ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL);
  187. lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
  188. /* enable internal oscillator */
  189. ldoctl |= TWL6040_OSCENA;
  190. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  191. usleep_range(1000, 1500);
  192. /* disable low-power PLL */
  193. lppllctl &= ~TWL6040_LPLLENA;
  194. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  195. /* disable low-side LDO */
  196. ldoctl &= ~TWL6040_LSLDOENA;
  197. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  198. /* disable negative charge pump */
  199. ncpctl &= ~TWL6040_NCPENA;
  200. twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  201. /* disable high-side LDO, reference system and internal oscillator */
  202. ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
  203. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  204. }
  205. static irqreturn_t twl6040_readyint_handler(int irq, void *data)
  206. {
  207. struct twl6040 *twl6040 = data;
  208. complete(&twl6040->ready);
  209. return IRQ_HANDLED;
  210. }
  211. static irqreturn_t twl6040_thint_handler(int irq, void *data)
  212. {
  213. struct twl6040 *twl6040 = data;
  214. u8 status;
  215. status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
  216. if (status & TWL6040_TSHUTDET) {
  217. dev_warn(twl6040->dev, "Thermal shutdown, powering-off");
  218. twl6040_power(twl6040, 0);
  219. } else {
  220. dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on");
  221. twl6040_power(twl6040, 1);
  222. }
  223. return IRQ_HANDLED;
  224. }
  225. static int twl6040_power_up_automatic(struct twl6040 *twl6040)
  226. {
  227. int time_left;
  228. gpio_set_value(twl6040->audpwron, 1);
  229. time_left = wait_for_completion_timeout(&twl6040->ready,
  230. msecs_to_jiffies(144));
  231. if (!time_left) {
  232. u8 intid;
  233. dev_warn(twl6040->dev, "timeout waiting for READYINT\n");
  234. intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
  235. if (!(intid & TWL6040_READYINT)) {
  236. dev_err(twl6040->dev, "automatic power-up failed\n");
  237. gpio_set_value(twl6040->audpwron, 0);
  238. return -ETIMEDOUT;
  239. }
  240. }
  241. return 0;
  242. }
  243. int twl6040_power(struct twl6040 *twl6040, int on)
  244. {
  245. int ret = 0;
  246. mutex_lock(&twl6040->mutex);
  247. if (on) {
  248. /* already powered-up */
  249. if (twl6040->power_count++)
  250. goto out;
  251. ret = clk_prepare_enable(twl6040->clk32k);
  252. if (ret) {
  253. twl6040->power_count = 0;
  254. goto out;
  255. }
  256. /* Allow writes to the chip */
  257. regcache_cache_only(twl6040->regmap, false);
  258. if (gpio_is_valid(twl6040->audpwron)) {
  259. /* use automatic power-up sequence */
  260. ret = twl6040_power_up_automatic(twl6040);
  261. if (ret) {
  262. clk_disable_unprepare(twl6040->clk32k);
  263. twl6040->power_count = 0;
  264. goto out;
  265. }
  266. } else {
  267. /* use manual power-up sequence */
  268. ret = twl6040_power_up_manual(twl6040);
  269. if (ret) {
  270. clk_disable_unprepare(twl6040->clk32k);
  271. twl6040->power_count = 0;
  272. goto out;
  273. }
  274. }
  275. /*
  276. * Register access can produce errors after power-up unless we
  277. * wait at least 8ms based on measurements on duovero.
  278. */
  279. usleep_range(10000, 12000);
  280. /* Sync with the HW */
  281. ret = regcache_sync(twl6040->regmap);
  282. if (ret) {
  283. dev_err(twl6040->dev, "Failed to sync with the HW: %i\n",
  284. ret);
  285. goto out;
  286. }
  287. /* Default PLL configuration after power up */
  288. twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL;
  289. twl6040->sysclk_rate = 19200000;
  290. } else {
  291. /* already powered-down */
  292. if (!twl6040->power_count) {
  293. dev_err(twl6040->dev,
  294. "device is already powered-off\n");
  295. ret = -EPERM;
  296. goto out;
  297. }
  298. if (--twl6040->power_count)
  299. goto out;
  300. if (gpio_is_valid(twl6040->audpwron)) {
  301. /* use AUDPWRON line */
  302. gpio_set_value(twl6040->audpwron, 0);
  303. /* power-down sequence latency */
  304. usleep_range(500, 700);
  305. } else {
  306. /* use manual power-down sequence */
  307. twl6040_power_down_manual(twl6040);
  308. }
  309. /* Set regmap to cache only and mark it as dirty */
  310. regcache_cache_only(twl6040->regmap, true);
  311. regcache_mark_dirty(twl6040->regmap);
  312. twl6040->sysclk_rate = 0;
  313. if (twl6040->pll == TWL6040_SYSCLK_SEL_HPPLL) {
  314. clk_disable_unprepare(twl6040->mclk);
  315. twl6040->mclk_rate = 0;
  316. }
  317. clk_disable_unprepare(twl6040->clk32k);
  318. }
  319. out:
  320. mutex_unlock(&twl6040->mutex);
  321. return ret;
  322. }
  323. EXPORT_SYMBOL(twl6040_power);
  324. int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
  325. unsigned int freq_in, unsigned int freq_out)
  326. {
  327. u8 hppllctl, lppllctl;
  328. int ret = 0;
  329. mutex_lock(&twl6040->mutex);
  330. hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL);
  331. lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
  332. /* Force full reconfiguration when switching between PLL */
  333. if (pll_id != twl6040->pll) {
  334. twl6040->sysclk_rate = 0;
  335. twl6040->mclk_rate = 0;
  336. }
  337. switch (pll_id) {
  338. case TWL6040_SYSCLK_SEL_LPPLL:
  339. /* low-power PLL divider */
  340. /* Change the sysclk configuration only if it has been canged */
  341. if (twl6040->sysclk_rate != freq_out) {
  342. switch (freq_out) {
  343. case 17640000:
  344. lppllctl |= TWL6040_LPLLFIN;
  345. break;
  346. case 19200000:
  347. lppllctl &= ~TWL6040_LPLLFIN;
  348. break;
  349. default:
  350. dev_err(twl6040->dev,
  351. "freq_out %d not supported\n",
  352. freq_out);
  353. ret = -EINVAL;
  354. goto pll_out;
  355. }
  356. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  357. lppllctl);
  358. }
  359. /* The PLL in use has not been change, we can exit */
  360. if (twl6040->pll == pll_id)
  361. break;
  362. switch (freq_in) {
  363. case 32768:
  364. lppllctl |= TWL6040_LPLLENA;
  365. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  366. lppllctl);
  367. mdelay(5);
  368. lppllctl &= ~TWL6040_HPLLSEL;
  369. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  370. lppllctl);
  371. hppllctl &= ~TWL6040_HPLLENA;
  372. twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
  373. hppllctl);
  374. break;
  375. default:
  376. dev_err(twl6040->dev,
  377. "freq_in %d not supported\n", freq_in);
  378. ret = -EINVAL;
  379. goto pll_out;
  380. }
  381. clk_disable_unprepare(twl6040->mclk);
  382. break;
  383. case TWL6040_SYSCLK_SEL_HPPLL:
  384. /* high-performance PLL can provide only 19.2 MHz */
  385. if (freq_out != 19200000) {
  386. dev_err(twl6040->dev,
  387. "freq_out %d not supported\n", freq_out);
  388. ret = -EINVAL;
  389. goto pll_out;
  390. }
  391. if (twl6040->mclk_rate != freq_in) {
  392. hppllctl &= ~TWL6040_MCLK_MSK;
  393. switch (freq_in) {
  394. case 12000000:
  395. /* PLL enabled, active mode */
  396. hppllctl |= TWL6040_MCLK_12000KHZ |
  397. TWL6040_HPLLENA;
  398. break;
  399. case 19200000:
  400. /* PLL enabled, bypass mode */
  401. hppllctl |= TWL6040_MCLK_19200KHZ |
  402. TWL6040_HPLLBP | TWL6040_HPLLENA;
  403. break;
  404. case 26000000:
  405. /* PLL enabled, active mode */
  406. hppllctl |= TWL6040_MCLK_26000KHZ |
  407. TWL6040_HPLLENA;
  408. break;
  409. case 38400000:
  410. /* PLL enabled, bypass mode */
  411. hppllctl |= TWL6040_MCLK_38400KHZ |
  412. TWL6040_HPLLBP | TWL6040_HPLLENA;
  413. break;
  414. default:
  415. dev_err(twl6040->dev,
  416. "freq_in %d not supported\n", freq_in);
  417. ret = -EINVAL;
  418. goto pll_out;
  419. }
  420. /* When switching to HPPLL, enable the mclk first */
  421. if (pll_id != twl6040->pll)
  422. clk_prepare_enable(twl6040->mclk);
  423. /*
  424. * enable clock slicer to ensure input waveform is
  425. * square
  426. */
  427. hppllctl |= TWL6040_HPLLSQRENA;
  428. twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
  429. hppllctl);
  430. usleep_range(500, 700);
  431. lppllctl |= TWL6040_HPLLSEL;
  432. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  433. lppllctl);
  434. lppllctl &= ~TWL6040_LPLLENA;
  435. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  436. lppllctl);
  437. twl6040->mclk_rate = freq_in;
  438. }
  439. break;
  440. default:
  441. dev_err(twl6040->dev, "unknown pll id %d\n", pll_id);
  442. ret = -EINVAL;
  443. goto pll_out;
  444. }
  445. twl6040->sysclk_rate = freq_out;
  446. twl6040->pll = pll_id;
  447. pll_out:
  448. mutex_unlock(&twl6040->mutex);
  449. return ret;
  450. }
  451. EXPORT_SYMBOL(twl6040_set_pll);
  452. int twl6040_get_pll(struct twl6040 *twl6040)
  453. {
  454. if (twl6040->power_count)
  455. return twl6040->pll;
  456. else
  457. return -ENODEV;
  458. }
  459. EXPORT_SYMBOL(twl6040_get_pll);
  460. unsigned int twl6040_get_sysclk(struct twl6040 *twl6040)
  461. {
  462. return twl6040->sysclk_rate;
  463. }
  464. EXPORT_SYMBOL(twl6040_get_sysclk);
  465. /* Get the combined status of the vibra control register */
  466. int twl6040_get_vibralr_status(struct twl6040 *twl6040)
  467. {
  468. unsigned int reg;
  469. int ret;
  470. u8 status;
  471. ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLL, &reg);
  472. if (ret != 0)
  473. return ret;
  474. status = reg;
  475. ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLR, &reg);
  476. if (ret != 0)
  477. return ret;
  478. status |= reg;
  479. status &= (TWL6040_VIBENA | TWL6040_VIBSEL);
  480. return status;
  481. }
  482. EXPORT_SYMBOL(twl6040_get_vibralr_status);
  483. static struct resource twl6040_vibra_rsrc[] = {
  484. {
  485. .flags = IORESOURCE_IRQ,
  486. },
  487. };
  488. static struct resource twl6040_codec_rsrc[] = {
  489. {
  490. .flags = IORESOURCE_IRQ,
  491. },
  492. };
  493. static bool twl6040_readable_reg(struct device *dev, unsigned int reg)
  494. {
  495. /* Register 0 is not readable */
  496. if (!reg)
  497. return false;
  498. return true;
  499. }
  500. static bool twl6040_volatile_reg(struct device *dev, unsigned int reg)
  501. {
  502. switch (reg) {
  503. case TWL6040_REG_ASICID:
  504. case TWL6040_REG_ASICREV:
  505. case TWL6040_REG_INTID:
  506. case TWL6040_REG_LPPLLCTL:
  507. case TWL6040_REG_HPPLLCTL:
  508. case TWL6040_REG_STATUS:
  509. return true;
  510. default:
  511. return false;
  512. }
  513. }
  514. static bool twl6040_writeable_reg(struct device *dev, unsigned int reg)
  515. {
  516. switch (reg) {
  517. case TWL6040_REG_ASICID:
  518. case TWL6040_REG_ASICREV:
  519. case TWL6040_REG_STATUS:
  520. return false;
  521. default:
  522. return true;
  523. }
  524. }
  525. static const struct regmap_config twl6040_regmap_config = {
  526. .reg_bits = 8,
  527. .val_bits = 8,
  528. .reg_defaults = twl6040_defaults,
  529. .num_reg_defaults = ARRAY_SIZE(twl6040_defaults),
  530. .max_register = TWL6040_REG_STATUS, /* 0x2e */
  531. .readable_reg = twl6040_readable_reg,
  532. .volatile_reg = twl6040_volatile_reg,
  533. .writeable_reg = twl6040_writeable_reg,
  534. .cache_type = REGCACHE_RBTREE,
  535. .use_single_rw = true,
  536. };
  537. static const struct regmap_irq twl6040_irqs[] = {
  538. { .reg_offset = 0, .mask = TWL6040_THINT, },
  539. { .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, },
  540. { .reg_offset = 0, .mask = TWL6040_HOOKINT, },
  541. { .reg_offset = 0, .mask = TWL6040_HFINT, },
  542. { .reg_offset = 0, .mask = TWL6040_VIBINT, },
  543. { .reg_offset = 0, .mask = TWL6040_READYINT, },
  544. };
  545. static struct regmap_irq_chip twl6040_irq_chip = {
  546. .name = "twl6040",
  547. .irqs = twl6040_irqs,
  548. .num_irqs = ARRAY_SIZE(twl6040_irqs),
  549. .num_regs = 1,
  550. .status_base = TWL6040_REG_INTID,
  551. .mask_base = TWL6040_REG_INTMR,
  552. };
  553. static int twl6040_probe(struct i2c_client *client,
  554. const struct i2c_device_id *id)
  555. {
  556. struct device_node *node = client->dev.of_node;
  557. struct twl6040 *twl6040;
  558. struct mfd_cell *cell = NULL;
  559. int irq, ret, children = 0;
  560. if (!node) {
  561. dev_err(&client->dev, "of node is missing\n");
  562. return -EINVAL;
  563. }
  564. /* In order to operate correctly we need valid interrupt config */
  565. if (!client->irq) {
  566. dev_err(&client->dev, "Invalid IRQ configuration\n");
  567. return -EINVAL;
  568. }
  569. twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040),
  570. GFP_KERNEL);
  571. if (!twl6040)
  572. return -ENOMEM;
  573. twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config);
  574. if (IS_ERR(twl6040->regmap))
  575. return PTR_ERR(twl6040->regmap);
  576. i2c_set_clientdata(client, twl6040);
  577. twl6040->clk32k = devm_clk_get(&client->dev, "clk32k");
  578. if (IS_ERR(twl6040->clk32k)) {
  579. if (PTR_ERR(twl6040->clk32k) == -EPROBE_DEFER)
  580. return -EPROBE_DEFER;
  581. dev_dbg(&client->dev, "clk32k is not handled\n");
  582. twl6040->clk32k = NULL;
  583. }
  584. twl6040->mclk = devm_clk_get(&client->dev, "mclk");
  585. if (IS_ERR(twl6040->mclk)) {
  586. if (PTR_ERR(twl6040->mclk) == -EPROBE_DEFER)
  587. return -EPROBE_DEFER;
  588. dev_dbg(&client->dev, "mclk is not handled\n");
  589. twl6040->mclk = NULL;
  590. }
  591. twl6040->supplies[0].supply = "vio";
  592. twl6040->supplies[1].supply = "v2v1";
  593. ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES,
  594. twl6040->supplies);
  595. if (ret != 0) {
  596. dev_err(&client->dev, "Failed to get supplies: %d\n", ret);
  597. return ret;
  598. }
  599. ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
  600. if (ret != 0) {
  601. dev_err(&client->dev, "Failed to enable supplies: %d\n", ret);
  602. return ret;
  603. }
  604. twl6040->dev = &client->dev;
  605. twl6040->irq = client->irq;
  606. mutex_init(&twl6040->mutex);
  607. init_completion(&twl6040->ready);
  608. regmap_register_patch(twl6040->regmap, twl6040_patch,
  609. ARRAY_SIZE(twl6040_patch));
  610. twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV);
  611. if (twl6040->rev < 0) {
  612. dev_err(&client->dev, "Failed to read revision register: %d\n",
  613. twl6040->rev);
  614. ret = twl6040->rev;
  615. goto gpio_err;
  616. }
  617. /* ERRATA: Automatic power-up is not possible in ES1.0 */
  618. if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0)
  619. twl6040->audpwron = of_get_named_gpio(node,
  620. "ti,audpwron-gpio", 0);
  621. else
  622. twl6040->audpwron = -EINVAL;
  623. if (gpio_is_valid(twl6040->audpwron)) {
  624. ret = devm_gpio_request_one(&client->dev, twl6040->audpwron,
  625. GPIOF_OUT_INIT_LOW, "audpwron");
  626. if (ret)
  627. goto gpio_err;
  628. /* Clear any pending interrupt */
  629. twl6040_reg_read(twl6040, TWL6040_REG_INTID);
  630. }
  631. ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq, IRQF_ONESHOT,
  632. 0, &twl6040_irq_chip, &twl6040->irq_data);
  633. if (ret < 0)
  634. goto gpio_err;
  635. twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data,
  636. TWL6040_IRQ_READY);
  637. twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data,
  638. TWL6040_IRQ_TH);
  639. ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL,
  640. twl6040_readyint_handler, IRQF_ONESHOT,
  641. "twl6040_irq_ready", twl6040);
  642. if (ret) {
  643. dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret);
  644. goto readyirq_err;
  645. }
  646. ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL,
  647. twl6040_thint_handler, IRQF_ONESHOT,
  648. "twl6040_irq_th", twl6040);
  649. if (ret) {
  650. dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret);
  651. goto readyirq_err;
  652. }
  653. /*
  654. * The main functionality of twl6040 to provide audio on OMAP4+ systems.
  655. * We can add the ASoC codec child whenever this driver has been loaded.
  656. */
  657. irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG);
  658. cell = &twl6040->cells[children];
  659. cell->name = "twl6040-codec";
  660. twl6040_codec_rsrc[0].start = irq;
  661. twl6040_codec_rsrc[0].end = irq;
  662. cell->resources = twl6040_codec_rsrc;
  663. cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc);
  664. children++;
  665. /* Vibra input driver support */
  666. if (twl6040_has_vibra(node)) {
  667. irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB);
  668. cell = &twl6040->cells[children];
  669. cell->name = "twl6040-vibra";
  670. twl6040_vibra_rsrc[0].start = irq;
  671. twl6040_vibra_rsrc[0].end = irq;
  672. cell->resources = twl6040_vibra_rsrc;
  673. cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc);
  674. children++;
  675. }
  676. /* GPO support */
  677. cell = &twl6040->cells[children];
  678. cell->name = "twl6040-gpo";
  679. children++;
  680. /* PDM clock support */
  681. cell = &twl6040->cells[children];
  682. cell->name = "twl6040-pdmclk";
  683. children++;
  684. /* The chip is powered down so mark regmap to cache only and dirty */
  685. regcache_cache_only(twl6040->regmap, true);
  686. regcache_mark_dirty(twl6040->regmap);
  687. ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children,
  688. NULL, 0, NULL);
  689. if (ret)
  690. goto readyirq_err;
  691. return 0;
  692. readyirq_err:
  693. regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
  694. gpio_err:
  695. regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
  696. return ret;
  697. }
  698. static int twl6040_remove(struct i2c_client *client)
  699. {
  700. struct twl6040 *twl6040 = i2c_get_clientdata(client);
  701. if (twl6040->power_count)
  702. twl6040_power(twl6040, 0);
  703. regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
  704. mfd_remove_devices(&client->dev);
  705. regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
  706. return 0;
  707. }
  708. static const struct i2c_device_id twl6040_i2c_id[] = {
  709. { "twl6040", 0, },
  710. { "twl6041", 0, },
  711. { },
  712. };
  713. MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id);
  714. static struct i2c_driver twl6040_driver = {
  715. .driver = {
  716. .name = "twl6040",
  717. },
  718. .probe = twl6040_probe,
  719. .remove = twl6040_remove,
  720. .id_table = twl6040_i2c_id,
  721. };
  722. module_i2c_driver(twl6040_driver);
  723. MODULE_DESCRIPTION("TWL6040 MFD");
  724. MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
  725. MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
  726. MODULE_LICENSE("GPL");