ti_am335x_tscadc.c 9.5 KB

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  1. /*
  2. * TI Touch Screen / ADC MFD driver
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation version 2.
  9. *
  10. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11. * kind, whether express or implied; without even the implied warranty
  12. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/module.h>
  16. #include <linux/slab.h>
  17. #include <linux/err.h>
  18. #include <linux/io.h>
  19. #include <linux/clk.h>
  20. #include <linux/regmap.h>
  21. #include <linux/mfd/core.h>
  22. #include <linux/pm_runtime.h>
  23. #include <linux/of.h>
  24. #include <linux/of_device.h>
  25. #include <linux/sched.h>
  26. #include <linux/mfd/ti_am335x_tscadc.h>
  27. static const struct regmap_config tscadc_regmap_config = {
  28. .name = "ti_tscadc",
  29. .reg_bits = 32,
  30. .reg_stride = 4,
  31. .val_bits = 32,
  32. };
  33. void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val)
  34. {
  35. unsigned long flags;
  36. spin_lock_irqsave(&tscadc->reg_lock, flags);
  37. tscadc->reg_se_cache |= val;
  38. if (tscadc->adc_waiting)
  39. wake_up(&tscadc->reg_se_wait);
  40. else if (!tscadc->adc_in_use)
  41. regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
  42. spin_unlock_irqrestore(&tscadc->reg_lock, flags);
  43. }
  44. EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache);
  45. static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc)
  46. {
  47. DEFINE_WAIT(wait);
  48. u32 reg;
  49. regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
  50. if (reg & SEQ_STATUS) {
  51. tscadc->adc_waiting = true;
  52. prepare_to_wait(&tscadc->reg_se_wait, &wait,
  53. TASK_UNINTERRUPTIBLE);
  54. spin_unlock_irq(&tscadc->reg_lock);
  55. schedule();
  56. spin_lock_irq(&tscadc->reg_lock);
  57. finish_wait(&tscadc->reg_se_wait, &wait);
  58. /*
  59. * Sequencer should either be idle or
  60. * busy applying the charge step.
  61. */
  62. regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
  63. WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP));
  64. tscadc->adc_waiting = false;
  65. }
  66. tscadc->adc_in_use = true;
  67. }
  68. void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val)
  69. {
  70. spin_lock_irq(&tscadc->reg_lock);
  71. am335x_tscadc_need_adc(tscadc);
  72. regmap_write(tscadc->regmap, REG_SE, val);
  73. spin_unlock_irq(&tscadc->reg_lock);
  74. }
  75. EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once);
  76. void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc)
  77. {
  78. unsigned long flags;
  79. spin_lock_irqsave(&tscadc->reg_lock, flags);
  80. tscadc->adc_in_use = false;
  81. regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
  82. spin_unlock_irqrestore(&tscadc->reg_lock, flags);
  83. }
  84. EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done);
  85. void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val)
  86. {
  87. unsigned long flags;
  88. spin_lock_irqsave(&tscadc->reg_lock, flags);
  89. tscadc->reg_se_cache &= ~val;
  90. regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
  91. spin_unlock_irqrestore(&tscadc->reg_lock, flags);
  92. }
  93. EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
  94. static void tscadc_idle_config(struct ti_tscadc_dev *tscadc)
  95. {
  96. unsigned int idleconfig;
  97. idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
  98. STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;
  99. regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig);
  100. }
  101. static int ti_tscadc_probe(struct platform_device *pdev)
  102. {
  103. struct ti_tscadc_dev *tscadc;
  104. struct resource *res;
  105. struct clk *clk;
  106. struct device_node *node;
  107. struct mfd_cell *cell;
  108. struct property *prop;
  109. const __be32 *cur;
  110. u32 val;
  111. int err, ctrl;
  112. int clock_rate;
  113. int tsc_wires = 0, adc_channels = 0, total_channels;
  114. int readouts = 0;
  115. if (!pdev->dev.of_node) {
  116. dev_err(&pdev->dev, "Could not find valid DT data.\n");
  117. return -EINVAL;
  118. }
  119. node = of_get_child_by_name(pdev->dev.of_node, "tsc");
  120. of_property_read_u32(node, "ti,wires", &tsc_wires);
  121. of_property_read_u32(node, "ti,coordiante-readouts", &readouts);
  122. node = of_get_child_by_name(pdev->dev.of_node, "adc");
  123. of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
  124. adc_channels++;
  125. if (val > 7) {
  126. dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n",
  127. val);
  128. return -EINVAL;
  129. }
  130. }
  131. total_channels = tsc_wires + adc_channels;
  132. if (total_channels > 8) {
  133. dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
  134. return -EINVAL;
  135. }
  136. if (total_channels == 0) {
  137. dev_err(&pdev->dev, "Need atleast one channel.\n");
  138. return -EINVAL;
  139. }
  140. if (readouts * 2 + 2 + adc_channels > 16) {
  141. dev_err(&pdev->dev, "Too many step configurations requested\n");
  142. return -EINVAL;
  143. }
  144. /* Allocate memory for device */
  145. tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL);
  146. if (!tscadc)
  147. return -ENOMEM;
  148. tscadc->dev = &pdev->dev;
  149. err = platform_get_irq(pdev, 0);
  150. if (err < 0) {
  151. dev_err(&pdev->dev, "no irq ID is specified.\n");
  152. goto ret;
  153. } else
  154. tscadc->irq = err;
  155. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  156. tscadc->tscadc_phys_base = res->start;
  157. tscadc->tscadc_base = devm_ioremap_resource(&pdev->dev, res);
  158. if (IS_ERR(tscadc->tscadc_base))
  159. return PTR_ERR(tscadc->tscadc_base);
  160. tscadc->regmap = devm_regmap_init_mmio(&pdev->dev,
  161. tscadc->tscadc_base, &tscadc_regmap_config);
  162. if (IS_ERR(tscadc->regmap)) {
  163. dev_err(&pdev->dev, "regmap init failed\n");
  164. err = PTR_ERR(tscadc->regmap);
  165. goto ret;
  166. }
  167. spin_lock_init(&tscadc->reg_lock);
  168. init_waitqueue_head(&tscadc->reg_se_wait);
  169. pm_runtime_enable(&pdev->dev);
  170. pm_runtime_get_sync(&pdev->dev);
  171. /*
  172. * The TSC_ADC_Subsystem has 2 clock domains
  173. * OCP_CLK and ADC_CLK.
  174. * The ADC clock is expected to run at target of 3MHz,
  175. * and expected to capture 12-bit data at a rate of 200 KSPS.
  176. * The TSC_ADC_SS controller design assumes the OCP clock is
  177. * at least 6x faster than the ADC clock.
  178. */
  179. clk = devm_clk_get(&pdev->dev, "adc_tsc_fck");
  180. if (IS_ERR(clk)) {
  181. dev_err(&pdev->dev, "failed to get TSC fck\n");
  182. err = PTR_ERR(clk);
  183. goto err_disable_clk;
  184. }
  185. clock_rate = clk_get_rate(clk);
  186. tscadc->clk_div = clock_rate / ADC_CLK;
  187. /* TSCADC_CLKDIV needs to be configured to the value minus 1 */
  188. tscadc->clk_div--;
  189. regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
  190. /* Set the control register bits */
  191. ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
  192. regmap_write(tscadc->regmap, REG_CTRL, ctrl);
  193. /* Set register bits for Idle Config Mode */
  194. if (tsc_wires > 0) {
  195. tscadc->tsc_wires = tsc_wires;
  196. if (tsc_wires == 5)
  197. ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
  198. else
  199. ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
  200. tscadc_idle_config(tscadc);
  201. }
  202. /* Enable the TSC module enable bit */
  203. ctrl |= CNTRLREG_TSCSSENB;
  204. regmap_write(tscadc->regmap, REG_CTRL, ctrl);
  205. tscadc->used_cells = 0;
  206. tscadc->tsc_cell = -1;
  207. tscadc->adc_cell = -1;
  208. /* TSC Cell */
  209. if (tsc_wires > 0) {
  210. tscadc->tsc_cell = tscadc->used_cells;
  211. cell = &tscadc->cells[tscadc->used_cells++];
  212. cell->name = "TI-am335x-tsc";
  213. cell->of_compatible = "ti,am3359-tsc";
  214. cell->platform_data = &tscadc;
  215. cell->pdata_size = sizeof(tscadc);
  216. }
  217. /* ADC Cell */
  218. if (adc_channels > 0) {
  219. tscadc->adc_cell = tscadc->used_cells;
  220. cell = &tscadc->cells[tscadc->used_cells++];
  221. cell->name = "TI-am335x-adc";
  222. cell->of_compatible = "ti,am3359-adc";
  223. cell->platform_data = &tscadc;
  224. cell->pdata_size = sizeof(tscadc);
  225. }
  226. err = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO,
  227. tscadc->cells, tscadc->used_cells, NULL,
  228. 0, NULL);
  229. if (err < 0)
  230. goto err_disable_clk;
  231. device_init_wakeup(&pdev->dev, true);
  232. platform_set_drvdata(pdev, tscadc);
  233. return 0;
  234. err_disable_clk:
  235. pm_runtime_put_sync(&pdev->dev);
  236. pm_runtime_disable(&pdev->dev);
  237. ret:
  238. return err;
  239. }
  240. static int ti_tscadc_remove(struct platform_device *pdev)
  241. {
  242. struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
  243. regmap_write(tscadc->regmap, REG_SE, 0x00);
  244. pm_runtime_put_sync(&pdev->dev);
  245. pm_runtime_disable(&pdev->dev);
  246. mfd_remove_devices(tscadc->dev);
  247. return 0;
  248. }
  249. static int __maybe_unused ti_tscadc_can_wakeup(struct device *dev, void *data)
  250. {
  251. return device_may_wakeup(dev);
  252. }
  253. static int __maybe_unused tscadc_suspend(struct device *dev)
  254. {
  255. struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
  256. regmap_write(tscadc->regmap, REG_SE, 0x00);
  257. if (device_for_each_child(dev, NULL, ti_tscadc_can_wakeup)) {
  258. u32 ctrl;
  259. regmap_read(tscadc->regmap, REG_CTRL, &ctrl);
  260. ctrl &= ~(CNTRLREG_POWERDOWN);
  261. ctrl |= CNTRLREG_TSCSSENB;
  262. regmap_write(tscadc->regmap, REG_CTRL, ctrl);
  263. }
  264. pm_runtime_put_sync(dev);
  265. return 0;
  266. }
  267. static int __maybe_unused tscadc_resume(struct device *dev)
  268. {
  269. struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
  270. u32 ctrl;
  271. pm_runtime_get_sync(dev);
  272. /* context restore */
  273. ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
  274. regmap_write(tscadc->regmap, REG_CTRL, ctrl);
  275. if (tscadc->tsc_cell != -1) {
  276. if (tscadc->tsc_wires == 5)
  277. ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
  278. else
  279. ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
  280. tscadc_idle_config(tscadc);
  281. }
  282. ctrl |= CNTRLREG_TSCSSENB;
  283. regmap_write(tscadc->regmap, REG_CTRL, ctrl);
  284. regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
  285. return 0;
  286. }
  287. static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume);
  288. static const struct of_device_id ti_tscadc_dt_ids[] = {
  289. { .compatible = "ti,am3359-tscadc", },
  290. { }
  291. };
  292. MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
  293. static struct platform_driver ti_tscadc_driver = {
  294. .driver = {
  295. .name = "ti_am3359-tscadc",
  296. .pm = &tscadc_pm_ops,
  297. .of_match_table = ti_tscadc_dt_ids,
  298. },
  299. .probe = ti_tscadc_probe,
  300. .remove = ti_tscadc_remove,
  301. };
  302. module_platform_driver(ti_tscadc_driver);
  303. MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
  304. MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
  305. MODULE_LICENSE("GPL");