mc13xxx-core.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517
  1. /*
  2. * Copyright 2009-2010 Pengutronix
  3. * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
  4. *
  5. * loosely based on an earlier driver that has
  6. * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it under
  9. * the terms of the GNU General Public License version 2 as published by the
  10. * Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/of.h>
  14. #include <linux/of_device.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/mfd/core.h>
  17. #include "mc13xxx.h"
  18. #define MC13XXX_IRQSTAT0 0
  19. #define MC13XXX_IRQMASK0 1
  20. #define MC13XXX_IRQSTAT1 3
  21. #define MC13XXX_IRQMASK1 4
  22. #define MC13XXX_REVISION 7
  23. #define MC13XXX_REVISION_REVMETAL (0x07 << 0)
  24. #define MC13XXX_REVISION_REVFULL (0x03 << 3)
  25. #define MC13XXX_REVISION_ICID (0x07 << 6)
  26. #define MC13XXX_REVISION_FIN (0x03 << 9)
  27. #define MC13XXX_REVISION_FAB (0x03 << 11)
  28. #define MC13XXX_REVISION_ICIDCODE (0x3f << 13)
  29. #define MC34708_REVISION_REVMETAL (0x07 << 0)
  30. #define MC34708_REVISION_REVFULL (0x07 << 3)
  31. #define MC34708_REVISION_FIN (0x07 << 6)
  32. #define MC34708_REVISION_FAB (0x07 << 9)
  33. #define MC13XXX_PWRCTRL 15
  34. #define MC13XXX_PWRCTRL_WDIRESET (1 << 12)
  35. #define MC13XXX_ADC1 44
  36. #define MC13XXX_ADC1_ADEN (1 << 0)
  37. #define MC13XXX_ADC1_RAND (1 << 1)
  38. #define MC13XXX_ADC1_ADSEL (1 << 3)
  39. #define MC13XXX_ADC1_ASC (1 << 20)
  40. #define MC13XXX_ADC1_ADTRIGIGN (1 << 21)
  41. #define MC13XXX_ADC2 45
  42. void mc13xxx_lock(struct mc13xxx *mc13xxx)
  43. {
  44. if (!mutex_trylock(&mc13xxx->lock)) {
  45. dev_dbg(mc13xxx->dev, "wait for %s from %ps\n",
  46. __func__, __builtin_return_address(0));
  47. mutex_lock(&mc13xxx->lock);
  48. }
  49. dev_dbg(mc13xxx->dev, "%s from %ps\n",
  50. __func__, __builtin_return_address(0));
  51. }
  52. EXPORT_SYMBOL(mc13xxx_lock);
  53. void mc13xxx_unlock(struct mc13xxx *mc13xxx)
  54. {
  55. dev_dbg(mc13xxx->dev, "%s from %ps\n",
  56. __func__, __builtin_return_address(0));
  57. mutex_unlock(&mc13xxx->lock);
  58. }
  59. EXPORT_SYMBOL(mc13xxx_unlock);
  60. int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val)
  61. {
  62. int ret;
  63. ret = regmap_read(mc13xxx->regmap, offset, val);
  64. dev_vdbg(mc13xxx->dev, "[0x%02x] -> 0x%06x\n", offset, *val);
  65. return ret;
  66. }
  67. EXPORT_SYMBOL(mc13xxx_reg_read);
  68. int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val)
  69. {
  70. dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x\n", offset, val);
  71. if (val >= BIT(24))
  72. return -EINVAL;
  73. return regmap_write(mc13xxx->regmap, offset, val);
  74. }
  75. EXPORT_SYMBOL(mc13xxx_reg_write);
  76. int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset,
  77. u32 mask, u32 val)
  78. {
  79. BUG_ON(val & ~mask);
  80. dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x (mask: 0x%06x)\n",
  81. offset, val, mask);
  82. return regmap_update_bits(mc13xxx->regmap, offset, mask, val);
  83. }
  84. EXPORT_SYMBOL(mc13xxx_reg_rmw);
  85. int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq)
  86. {
  87. int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
  88. disable_irq_nosync(virq);
  89. return 0;
  90. }
  91. EXPORT_SYMBOL(mc13xxx_irq_mask);
  92. int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq)
  93. {
  94. int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
  95. enable_irq(virq);
  96. return 0;
  97. }
  98. EXPORT_SYMBOL(mc13xxx_irq_unmask);
  99. int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq,
  100. int *enabled, int *pending)
  101. {
  102. int ret;
  103. unsigned int offmask = irq < 24 ? MC13XXX_IRQMASK0 : MC13XXX_IRQMASK1;
  104. unsigned int offstat = irq < 24 ? MC13XXX_IRQSTAT0 : MC13XXX_IRQSTAT1;
  105. u32 irqbit = 1 << (irq < 24 ? irq : irq - 24);
  106. if (irq < 0 || irq >= ARRAY_SIZE(mc13xxx->irqs))
  107. return -EINVAL;
  108. if (enabled) {
  109. u32 mask;
  110. ret = mc13xxx_reg_read(mc13xxx, offmask, &mask);
  111. if (ret)
  112. return ret;
  113. *enabled = mask & irqbit;
  114. }
  115. if (pending) {
  116. u32 stat;
  117. ret = mc13xxx_reg_read(mc13xxx, offstat, &stat);
  118. if (ret)
  119. return ret;
  120. *pending = stat & irqbit;
  121. }
  122. return 0;
  123. }
  124. EXPORT_SYMBOL(mc13xxx_irq_status);
  125. int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq,
  126. irq_handler_t handler, const char *name, void *dev)
  127. {
  128. int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
  129. return devm_request_threaded_irq(mc13xxx->dev, virq, NULL, handler,
  130. IRQF_ONESHOT, name, dev);
  131. }
  132. EXPORT_SYMBOL(mc13xxx_irq_request);
  133. int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev)
  134. {
  135. int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
  136. devm_free_irq(mc13xxx->dev, virq, dev);
  137. return 0;
  138. }
  139. EXPORT_SYMBOL(mc13xxx_irq_free);
  140. #define maskval(reg, mask) (((reg) & (mask)) >> __ffs(mask))
  141. static void mc13xxx_print_revision(struct mc13xxx *mc13xxx, u32 revision)
  142. {
  143. dev_info(mc13xxx->dev, "%s: rev: %d.%d, "
  144. "fin: %d, fab: %d, icid: %d/%d\n",
  145. mc13xxx->variant->name,
  146. maskval(revision, MC13XXX_REVISION_REVFULL),
  147. maskval(revision, MC13XXX_REVISION_REVMETAL),
  148. maskval(revision, MC13XXX_REVISION_FIN),
  149. maskval(revision, MC13XXX_REVISION_FAB),
  150. maskval(revision, MC13XXX_REVISION_ICID),
  151. maskval(revision, MC13XXX_REVISION_ICIDCODE));
  152. }
  153. static void mc34708_print_revision(struct mc13xxx *mc13xxx, u32 revision)
  154. {
  155. dev_info(mc13xxx->dev, "%s: rev %d.%d, fin: %d, fab: %d\n",
  156. mc13xxx->variant->name,
  157. maskval(revision, MC34708_REVISION_REVFULL),
  158. maskval(revision, MC34708_REVISION_REVMETAL),
  159. maskval(revision, MC34708_REVISION_FIN),
  160. maskval(revision, MC34708_REVISION_FAB));
  161. }
  162. /* These are only exported for mc13xxx-i2c and mc13xxx-spi */
  163. struct mc13xxx_variant mc13xxx_variant_mc13783 = {
  164. .name = "mc13783",
  165. .print_revision = mc13xxx_print_revision,
  166. };
  167. EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13783);
  168. struct mc13xxx_variant mc13xxx_variant_mc13892 = {
  169. .name = "mc13892",
  170. .print_revision = mc13xxx_print_revision,
  171. };
  172. EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13892);
  173. struct mc13xxx_variant mc13xxx_variant_mc34708 = {
  174. .name = "mc34708",
  175. .print_revision = mc34708_print_revision,
  176. };
  177. EXPORT_SYMBOL_GPL(mc13xxx_variant_mc34708);
  178. static const char *mc13xxx_get_chipname(struct mc13xxx *mc13xxx)
  179. {
  180. return mc13xxx->variant->name;
  181. }
  182. int mc13xxx_get_flags(struct mc13xxx *mc13xxx)
  183. {
  184. return mc13xxx->flags;
  185. }
  186. EXPORT_SYMBOL(mc13xxx_get_flags);
  187. #define MC13XXX_ADC1_CHAN0_SHIFT 5
  188. #define MC13XXX_ADC1_CHAN1_SHIFT 8
  189. #define MC13783_ADC1_ATO_SHIFT 11
  190. #define MC13783_ADC1_ATOX (1 << 19)
  191. struct mc13xxx_adcdone_data {
  192. struct mc13xxx *mc13xxx;
  193. struct completion done;
  194. };
  195. static irqreturn_t mc13xxx_handler_adcdone(int irq, void *data)
  196. {
  197. struct mc13xxx_adcdone_data *adcdone_data = data;
  198. complete_all(&adcdone_data->done);
  199. return IRQ_HANDLED;
  200. }
  201. #define MC13XXX_ADC_WORKING (1 << 0)
  202. int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode,
  203. unsigned int channel, u8 ato, bool atox,
  204. unsigned int *sample)
  205. {
  206. u32 adc0, adc1, old_adc0;
  207. int i, ret;
  208. struct mc13xxx_adcdone_data adcdone_data = {
  209. .mc13xxx = mc13xxx,
  210. };
  211. init_completion(&adcdone_data.done);
  212. dev_dbg(mc13xxx->dev, "%s\n", __func__);
  213. mc13xxx_lock(mc13xxx);
  214. if (mc13xxx->adcflags & MC13XXX_ADC_WORKING) {
  215. ret = -EBUSY;
  216. goto out;
  217. }
  218. mc13xxx->adcflags |= MC13XXX_ADC_WORKING;
  219. ret = mc13xxx_reg_read(mc13xxx, MC13XXX_ADC0, &old_adc0);
  220. if (ret)
  221. goto out;
  222. adc0 = MC13XXX_ADC0_ADINC1 | MC13XXX_ADC0_ADINC2 |
  223. MC13XXX_ADC0_CHRGRAWDIV;
  224. adc1 = MC13XXX_ADC1_ADEN | MC13XXX_ADC1_ADTRIGIGN | MC13XXX_ADC1_ASC;
  225. /*
  226. * Channels mapped through ADIN7:
  227. * 7 - General purpose ADIN7
  228. * 16 - UID
  229. * 17 - Die temperature
  230. */
  231. if (channel > 7 && channel < 16) {
  232. adc1 |= MC13XXX_ADC1_ADSEL;
  233. } else if (channel == 16) {
  234. adc0 |= MC13XXX_ADC0_ADIN7SEL_UID;
  235. channel = 7;
  236. } else if (channel == 17) {
  237. adc0 |= MC13XXX_ADC0_ADIN7SEL_DIE;
  238. channel = 7;
  239. }
  240. switch (mode) {
  241. case MC13XXX_ADC_MODE_TS:
  242. adc0 |= MC13XXX_ADC0_ADREFEN | MC13XXX_ADC0_TSMOD0 |
  243. MC13XXX_ADC0_TSMOD1;
  244. adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
  245. break;
  246. case MC13XXX_ADC_MODE_SINGLE_CHAN:
  247. adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK;
  248. adc1 |= (channel & 0x7) << MC13XXX_ADC1_CHAN0_SHIFT;
  249. adc1 |= MC13XXX_ADC1_RAND;
  250. break;
  251. case MC13XXX_ADC_MODE_MULT_CHAN:
  252. adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK;
  253. adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
  254. break;
  255. default:
  256. mc13xxx_unlock(mc13xxx);
  257. return -EINVAL;
  258. }
  259. adc1 |= ato << MC13783_ADC1_ATO_SHIFT;
  260. if (atox)
  261. adc1 |= MC13783_ADC1_ATOX;
  262. dev_dbg(mc13xxx->dev, "%s: request irq\n", __func__);
  263. mc13xxx_irq_request(mc13xxx, MC13XXX_IRQ_ADCDONE,
  264. mc13xxx_handler_adcdone, __func__, &adcdone_data);
  265. mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, adc0);
  266. mc13xxx_reg_write(mc13xxx, MC13XXX_ADC1, adc1);
  267. mc13xxx_unlock(mc13xxx);
  268. ret = wait_for_completion_interruptible_timeout(&adcdone_data.done, HZ);
  269. if (!ret)
  270. ret = -ETIMEDOUT;
  271. mc13xxx_lock(mc13xxx);
  272. mc13xxx_irq_free(mc13xxx, MC13XXX_IRQ_ADCDONE, &adcdone_data);
  273. if (ret > 0)
  274. for (i = 0; i < 4; ++i) {
  275. ret = mc13xxx_reg_read(mc13xxx,
  276. MC13XXX_ADC2, &sample[i]);
  277. if (ret)
  278. break;
  279. }
  280. if (mode == MC13XXX_ADC_MODE_TS)
  281. /* restore TSMOD */
  282. mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, old_adc0);
  283. mc13xxx->adcflags &= ~MC13XXX_ADC_WORKING;
  284. out:
  285. mc13xxx_unlock(mc13xxx);
  286. return ret;
  287. }
  288. EXPORT_SYMBOL_GPL(mc13xxx_adc_do_conversion);
  289. static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx,
  290. const char *format, void *pdata, size_t pdata_size)
  291. {
  292. char buf[30];
  293. const char *name = mc13xxx_get_chipname(mc13xxx);
  294. struct mfd_cell cell = {
  295. .platform_data = pdata,
  296. .pdata_size = pdata_size,
  297. };
  298. /* there is no asnprintf in the kernel :-( */
  299. if (snprintf(buf, sizeof(buf), format, name) > sizeof(buf))
  300. return -E2BIG;
  301. cell.name = kmemdup(buf, strlen(buf) + 1, GFP_KERNEL);
  302. if (!cell.name)
  303. return -ENOMEM;
  304. return mfd_add_devices(mc13xxx->dev, -1, &cell, 1, NULL, 0,
  305. regmap_irq_get_domain(mc13xxx->irq_data));
  306. }
  307. static int mc13xxx_add_subdevice(struct mc13xxx *mc13xxx, const char *format)
  308. {
  309. return mc13xxx_add_subdevice_pdata(mc13xxx, format, NULL, 0);
  310. }
  311. #ifdef CONFIG_OF
  312. static int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx)
  313. {
  314. struct device_node *np = mc13xxx->dev->of_node;
  315. if (!np)
  316. return -ENODEV;
  317. if (of_property_read_bool(np, "fsl,mc13xxx-uses-adc"))
  318. mc13xxx->flags |= MC13XXX_USE_ADC;
  319. if (of_property_read_bool(np, "fsl,mc13xxx-uses-codec"))
  320. mc13xxx->flags |= MC13XXX_USE_CODEC;
  321. if (of_property_read_bool(np, "fsl,mc13xxx-uses-rtc"))
  322. mc13xxx->flags |= MC13XXX_USE_RTC;
  323. if (of_property_read_bool(np, "fsl,mc13xxx-uses-touch"))
  324. mc13xxx->flags |= MC13XXX_USE_TOUCHSCREEN;
  325. return 0;
  326. }
  327. #else
  328. static inline int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx)
  329. {
  330. return -ENODEV;
  331. }
  332. #endif
  333. int mc13xxx_common_init(struct device *dev)
  334. {
  335. struct mc13xxx_platform_data *pdata = dev_get_platdata(dev);
  336. struct mc13xxx *mc13xxx = dev_get_drvdata(dev);
  337. u32 revision;
  338. int i, ret;
  339. mc13xxx->dev = dev;
  340. ret = mc13xxx_reg_read(mc13xxx, MC13XXX_REVISION, &revision);
  341. if (ret)
  342. return ret;
  343. mc13xxx->variant->print_revision(mc13xxx, revision);
  344. ret = mc13xxx_reg_rmw(mc13xxx, MC13XXX_PWRCTRL,
  345. MC13XXX_PWRCTRL_WDIRESET, MC13XXX_PWRCTRL_WDIRESET);
  346. if (ret)
  347. return ret;
  348. for (i = 0; i < ARRAY_SIZE(mc13xxx->irqs); i++) {
  349. mc13xxx->irqs[i].reg_offset = i / MC13XXX_IRQ_PER_REG;
  350. mc13xxx->irqs[i].mask = BIT(i % MC13XXX_IRQ_PER_REG);
  351. }
  352. mc13xxx->irq_chip.name = dev_name(dev);
  353. mc13xxx->irq_chip.status_base = MC13XXX_IRQSTAT0;
  354. mc13xxx->irq_chip.mask_base = MC13XXX_IRQMASK0;
  355. mc13xxx->irq_chip.ack_base = MC13XXX_IRQSTAT0;
  356. mc13xxx->irq_chip.irq_reg_stride = MC13XXX_IRQSTAT1 - MC13XXX_IRQSTAT0;
  357. mc13xxx->irq_chip.init_ack_masked = true;
  358. mc13xxx->irq_chip.use_ack = true;
  359. mc13xxx->irq_chip.num_regs = MC13XXX_IRQ_REG_CNT;
  360. mc13xxx->irq_chip.irqs = mc13xxx->irqs;
  361. mc13xxx->irq_chip.num_irqs = ARRAY_SIZE(mc13xxx->irqs);
  362. ret = regmap_add_irq_chip(mc13xxx->regmap, mc13xxx->irq, IRQF_ONESHOT,
  363. 0, &mc13xxx->irq_chip, &mc13xxx->irq_data);
  364. if (ret)
  365. return ret;
  366. mutex_init(&mc13xxx->lock);
  367. if (mc13xxx_probe_flags_dt(mc13xxx) < 0 && pdata)
  368. mc13xxx->flags = pdata->flags;
  369. if (pdata) {
  370. mc13xxx_add_subdevice_pdata(mc13xxx, "%s-regulator",
  371. &pdata->regulators, sizeof(pdata->regulators));
  372. mc13xxx_add_subdevice_pdata(mc13xxx, "%s-led",
  373. pdata->leds, sizeof(*pdata->leds));
  374. mc13xxx_add_subdevice_pdata(mc13xxx, "%s-pwrbutton",
  375. pdata->buttons, sizeof(*pdata->buttons));
  376. if (mc13xxx->flags & MC13XXX_USE_CODEC)
  377. mc13xxx_add_subdevice_pdata(mc13xxx, "%s-codec",
  378. pdata->codec, sizeof(*pdata->codec));
  379. if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN)
  380. mc13xxx_add_subdevice_pdata(mc13xxx, "%s-ts",
  381. &pdata->touch, sizeof(pdata->touch));
  382. } else {
  383. mc13xxx_add_subdevice(mc13xxx, "%s-regulator");
  384. mc13xxx_add_subdevice(mc13xxx, "%s-led");
  385. mc13xxx_add_subdevice(mc13xxx, "%s-pwrbutton");
  386. if (mc13xxx->flags & MC13XXX_USE_CODEC)
  387. mc13xxx_add_subdevice(mc13xxx, "%s-codec");
  388. if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN)
  389. mc13xxx_add_subdevice(mc13xxx, "%s-ts");
  390. }
  391. if (mc13xxx->flags & MC13XXX_USE_ADC)
  392. mc13xxx_add_subdevice(mc13xxx, "%s-adc");
  393. if (mc13xxx->flags & MC13XXX_USE_RTC)
  394. mc13xxx_add_subdevice(mc13xxx, "%s-rtc");
  395. return 0;
  396. }
  397. EXPORT_SYMBOL_GPL(mc13xxx_common_init);
  398. int mc13xxx_common_exit(struct device *dev)
  399. {
  400. struct mc13xxx *mc13xxx = dev_get_drvdata(dev);
  401. mfd_remove_devices(dev);
  402. regmap_del_irq_chip(mc13xxx->irq, mc13xxx->irq_data);
  403. mutex_destroy(&mc13xxx->lock);
  404. return 0;
  405. }
  406. EXPORT_SYMBOL_GPL(mc13xxx_common_exit);
  407. MODULE_DESCRIPTION("Core driver for Freescale MC13XXX PMIC");
  408. MODULE_AUTHOR("Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>");
  409. MODULE_LICENSE("GPL v2");