intel-lpss-pci.c 12 KB

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  1. /*
  2. * Intel LPSS PCI support.
  3. *
  4. * Copyright (C) 2015, Intel Corporation
  5. *
  6. * Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
  7. * Mika Westerberg <mika.westerberg@linux.intel.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/ioport.h>
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/pci.h>
  17. #include <linux/pm.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/property.h>
  20. #include "intel-lpss.h"
  21. static int intel_lpss_pci_probe(struct pci_dev *pdev,
  22. const struct pci_device_id *id)
  23. {
  24. struct intel_lpss_platform_info *info;
  25. int ret;
  26. ret = pcim_enable_device(pdev);
  27. if (ret)
  28. return ret;
  29. info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info),
  30. GFP_KERNEL);
  31. if (!info)
  32. return -ENOMEM;
  33. info->mem = &pdev->resource[0];
  34. info->irq = pdev->irq;
  35. pdev->d3cold_delay = 0;
  36. /* Probably it is enough to set this for iDMA capable devices only */
  37. pci_set_master(pdev);
  38. pci_try_set_mwi(pdev);
  39. ret = intel_lpss_probe(&pdev->dev, info);
  40. if (ret)
  41. return ret;
  42. pm_runtime_put(&pdev->dev);
  43. pm_runtime_allow(&pdev->dev);
  44. return 0;
  45. }
  46. static void intel_lpss_pci_remove(struct pci_dev *pdev)
  47. {
  48. pm_runtime_forbid(&pdev->dev);
  49. pm_runtime_get_sync(&pdev->dev);
  50. intel_lpss_remove(&pdev->dev);
  51. }
  52. static INTEL_LPSS_PM_OPS(intel_lpss_pci_pm_ops);
  53. static const struct intel_lpss_platform_info spt_info = {
  54. .clk_rate = 120000000,
  55. };
  56. static struct property_entry spt_i2c_properties[] = {
  57. PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230),
  58. { },
  59. };
  60. static const struct intel_lpss_platform_info spt_i2c_info = {
  61. .clk_rate = 120000000,
  62. .properties = spt_i2c_properties,
  63. };
  64. static struct property_entry uart_properties[] = {
  65. PROPERTY_ENTRY_U32("reg-io-width", 4),
  66. PROPERTY_ENTRY_U32("reg-shift", 2),
  67. PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
  68. { },
  69. };
  70. static const struct intel_lpss_platform_info spt_uart_info = {
  71. .clk_rate = 120000000,
  72. .clk_con_id = "baudclk",
  73. .properties = uart_properties,
  74. };
  75. static const struct intel_lpss_platform_info bxt_info = {
  76. .clk_rate = 100000000,
  77. };
  78. static const struct intel_lpss_platform_info bxt_uart_info = {
  79. .clk_rate = 100000000,
  80. .clk_con_id = "baudclk",
  81. .properties = uart_properties,
  82. };
  83. static struct property_entry bxt_i2c_properties[] = {
  84. PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 42),
  85. PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
  86. PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
  87. { },
  88. };
  89. static const struct intel_lpss_platform_info bxt_i2c_info = {
  90. .clk_rate = 133000000,
  91. .properties = bxt_i2c_properties,
  92. };
  93. static struct property_entry apl_i2c_properties[] = {
  94. PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 207),
  95. PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
  96. PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
  97. { },
  98. };
  99. static const struct intel_lpss_platform_info apl_i2c_info = {
  100. .clk_rate = 133000000,
  101. .properties = apl_i2c_properties,
  102. };
  103. static struct property_entry glk_i2c_properties[] = {
  104. PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 313),
  105. PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
  106. PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 290),
  107. { },
  108. };
  109. static const struct intel_lpss_platform_info glk_i2c_info = {
  110. .clk_rate = 133000000,
  111. .properties = glk_i2c_properties,
  112. };
  113. static const struct intel_lpss_platform_info cnl_i2c_info = {
  114. .clk_rate = 216000000,
  115. .properties = spt_i2c_properties,
  116. };
  117. static const struct pci_device_id intel_lpss_pci_ids[] = {
  118. /* BXT A-Step */
  119. { PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info },
  120. { PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)&bxt_i2c_info },
  121. { PCI_VDEVICE(INTEL, 0x0ab0), (kernel_ulong_t)&bxt_i2c_info },
  122. { PCI_VDEVICE(INTEL, 0x0ab2), (kernel_ulong_t)&bxt_i2c_info },
  123. { PCI_VDEVICE(INTEL, 0x0ab4), (kernel_ulong_t)&bxt_i2c_info },
  124. { PCI_VDEVICE(INTEL, 0x0ab6), (kernel_ulong_t)&bxt_i2c_info },
  125. { PCI_VDEVICE(INTEL, 0x0ab8), (kernel_ulong_t)&bxt_i2c_info },
  126. { PCI_VDEVICE(INTEL, 0x0aba), (kernel_ulong_t)&bxt_i2c_info },
  127. { PCI_VDEVICE(INTEL, 0x0abc), (kernel_ulong_t)&bxt_uart_info },
  128. { PCI_VDEVICE(INTEL, 0x0abe), (kernel_ulong_t)&bxt_uart_info },
  129. { PCI_VDEVICE(INTEL, 0x0ac0), (kernel_ulong_t)&bxt_uart_info },
  130. { PCI_VDEVICE(INTEL, 0x0ac2), (kernel_ulong_t)&bxt_info },
  131. { PCI_VDEVICE(INTEL, 0x0ac4), (kernel_ulong_t)&bxt_info },
  132. { PCI_VDEVICE(INTEL, 0x0ac6), (kernel_ulong_t)&bxt_info },
  133. { PCI_VDEVICE(INTEL, 0x0aee), (kernel_ulong_t)&bxt_uart_info },
  134. /* BXT B-Step */
  135. { PCI_VDEVICE(INTEL, 0x1aac), (kernel_ulong_t)&bxt_i2c_info },
  136. { PCI_VDEVICE(INTEL, 0x1aae), (kernel_ulong_t)&bxt_i2c_info },
  137. { PCI_VDEVICE(INTEL, 0x1ab0), (kernel_ulong_t)&bxt_i2c_info },
  138. { PCI_VDEVICE(INTEL, 0x1ab2), (kernel_ulong_t)&bxt_i2c_info },
  139. { PCI_VDEVICE(INTEL, 0x1ab4), (kernel_ulong_t)&bxt_i2c_info },
  140. { PCI_VDEVICE(INTEL, 0x1ab6), (kernel_ulong_t)&bxt_i2c_info },
  141. { PCI_VDEVICE(INTEL, 0x1ab8), (kernel_ulong_t)&bxt_i2c_info },
  142. { PCI_VDEVICE(INTEL, 0x1aba), (kernel_ulong_t)&bxt_i2c_info },
  143. { PCI_VDEVICE(INTEL, 0x1abc), (kernel_ulong_t)&bxt_uart_info },
  144. { PCI_VDEVICE(INTEL, 0x1abe), (kernel_ulong_t)&bxt_uart_info },
  145. { PCI_VDEVICE(INTEL, 0x1ac0), (kernel_ulong_t)&bxt_uart_info },
  146. { PCI_VDEVICE(INTEL, 0x1ac2), (kernel_ulong_t)&bxt_info },
  147. { PCI_VDEVICE(INTEL, 0x1ac4), (kernel_ulong_t)&bxt_info },
  148. { PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info },
  149. { PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info },
  150. /* GLK */
  151. { PCI_VDEVICE(INTEL, 0x31ac), (kernel_ulong_t)&glk_i2c_info },
  152. { PCI_VDEVICE(INTEL, 0x31ae), (kernel_ulong_t)&glk_i2c_info },
  153. { PCI_VDEVICE(INTEL, 0x31b0), (kernel_ulong_t)&glk_i2c_info },
  154. { PCI_VDEVICE(INTEL, 0x31b2), (kernel_ulong_t)&glk_i2c_info },
  155. { PCI_VDEVICE(INTEL, 0x31b4), (kernel_ulong_t)&glk_i2c_info },
  156. { PCI_VDEVICE(INTEL, 0x31b6), (kernel_ulong_t)&glk_i2c_info },
  157. { PCI_VDEVICE(INTEL, 0x31b8), (kernel_ulong_t)&glk_i2c_info },
  158. { PCI_VDEVICE(INTEL, 0x31ba), (kernel_ulong_t)&glk_i2c_info },
  159. { PCI_VDEVICE(INTEL, 0x31bc), (kernel_ulong_t)&bxt_uart_info },
  160. { PCI_VDEVICE(INTEL, 0x31be), (kernel_ulong_t)&bxt_uart_info },
  161. { PCI_VDEVICE(INTEL, 0x31c0), (kernel_ulong_t)&bxt_uart_info },
  162. { PCI_VDEVICE(INTEL, 0x31ee), (kernel_ulong_t)&bxt_uart_info },
  163. { PCI_VDEVICE(INTEL, 0x31c2), (kernel_ulong_t)&bxt_info },
  164. { PCI_VDEVICE(INTEL, 0x31c4), (kernel_ulong_t)&bxt_info },
  165. { PCI_VDEVICE(INTEL, 0x31c6), (kernel_ulong_t)&bxt_info },
  166. /* ICL-LP */
  167. { PCI_VDEVICE(INTEL, 0x34a8), (kernel_ulong_t)&spt_uart_info },
  168. { PCI_VDEVICE(INTEL, 0x34a9), (kernel_ulong_t)&spt_uart_info },
  169. { PCI_VDEVICE(INTEL, 0x34aa), (kernel_ulong_t)&spt_info },
  170. { PCI_VDEVICE(INTEL, 0x34ab), (kernel_ulong_t)&spt_info },
  171. { PCI_VDEVICE(INTEL, 0x34c5), (kernel_ulong_t)&bxt_i2c_info },
  172. { PCI_VDEVICE(INTEL, 0x34c6), (kernel_ulong_t)&bxt_i2c_info },
  173. { PCI_VDEVICE(INTEL, 0x34c7), (kernel_ulong_t)&spt_uart_info },
  174. { PCI_VDEVICE(INTEL, 0x34e8), (kernel_ulong_t)&bxt_i2c_info },
  175. { PCI_VDEVICE(INTEL, 0x34e9), (kernel_ulong_t)&bxt_i2c_info },
  176. { PCI_VDEVICE(INTEL, 0x34ea), (kernel_ulong_t)&bxt_i2c_info },
  177. { PCI_VDEVICE(INTEL, 0x34eb), (kernel_ulong_t)&bxt_i2c_info },
  178. { PCI_VDEVICE(INTEL, 0x34fb), (kernel_ulong_t)&spt_info },
  179. /* APL */
  180. { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&apl_i2c_info },
  181. { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&apl_i2c_info },
  182. { PCI_VDEVICE(INTEL, 0x5ab0), (kernel_ulong_t)&apl_i2c_info },
  183. { PCI_VDEVICE(INTEL, 0x5ab2), (kernel_ulong_t)&apl_i2c_info },
  184. { PCI_VDEVICE(INTEL, 0x5ab4), (kernel_ulong_t)&apl_i2c_info },
  185. { PCI_VDEVICE(INTEL, 0x5ab6), (kernel_ulong_t)&apl_i2c_info },
  186. { PCI_VDEVICE(INTEL, 0x5ab8), (kernel_ulong_t)&apl_i2c_info },
  187. { PCI_VDEVICE(INTEL, 0x5aba), (kernel_ulong_t)&apl_i2c_info },
  188. { PCI_VDEVICE(INTEL, 0x5abc), (kernel_ulong_t)&bxt_uart_info },
  189. { PCI_VDEVICE(INTEL, 0x5abe), (kernel_ulong_t)&bxt_uart_info },
  190. { PCI_VDEVICE(INTEL, 0x5ac0), (kernel_ulong_t)&bxt_uart_info },
  191. { PCI_VDEVICE(INTEL, 0x5ac2), (kernel_ulong_t)&bxt_info },
  192. { PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_info },
  193. { PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_info },
  194. { PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info },
  195. /* SPT-LP */
  196. { PCI_VDEVICE(INTEL, 0x9d27), (kernel_ulong_t)&spt_uart_info },
  197. { PCI_VDEVICE(INTEL, 0x9d28), (kernel_ulong_t)&spt_uart_info },
  198. { PCI_VDEVICE(INTEL, 0x9d29), (kernel_ulong_t)&spt_info },
  199. { PCI_VDEVICE(INTEL, 0x9d2a), (kernel_ulong_t)&spt_info },
  200. { PCI_VDEVICE(INTEL, 0x9d60), (kernel_ulong_t)&spt_i2c_info },
  201. { PCI_VDEVICE(INTEL, 0x9d61), (kernel_ulong_t)&spt_i2c_info },
  202. { PCI_VDEVICE(INTEL, 0x9d62), (kernel_ulong_t)&spt_i2c_info },
  203. { PCI_VDEVICE(INTEL, 0x9d63), (kernel_ulong_t)&spt_i2c_info },
  204. { PCI_VDEVICE(INTEL, 0x9d64), (kernel_ulong_t)&spt_i2c_info },
  205. { PCI_VDEVICE(INTEL, 0x9d65), (kernel_ulong_t)&spt_i2c_info },
  206. { PCI_VDEVICE(INTEL, 0x9d66), (kernel_ulong_t)&spt_uart_info },
  207. /* CNL-LP */
  208. { PCI_VDEVICE(INTEL, 0x9da8), (kernel_ulong_t)&spt_uart_info },
  209. { PCI_VDEVICE(INTEL, 0x9da9), (kernel_ulong_t)&spt_uart_info },
  210. { PCI_VDEVICE(INTEL, 0x9daa), (kernel_ulong_t)&spt_info },
  211. { PCI_VDEVICE(INTEL, 0x9dab), (kernel_ulong_t)&spt_info },
  212. { PCI_VDEVICE(INTEL, 0x9dfb), (kernel_ulong_t)&spt_info },
  213. { PCI_VDEVICE(INTEL, 0x9dc5), (kernel_ulong_t)&cnl_i2c_info },
  214. { PCI_VDEVICE(INTEL, 0x9dc6), (kernel_ulong_t)&cnl_i2c_info },
  215. { PCI_VDEVICE(INTEL, 0x9dc7), (kernel_ulong_t)&spt_uart_info },
  216. { PCI_VDEVICE(INTEL, 0x9de8), (kernel_ulong_t)&cnl_i2c_info },
  217. { PCI_VDEVICE(INTEL, 0x9de9), (kernel_ulong_t)&cnl_i2c_info },
  218. { PCI_VDEVICE(INTEL, 0x9dea), (kernel_ulong_t)&cnl_i2c_info },
  219. { PCI_VDEVICE(INTEL, 0x9deb), (kernel_ulong_t)&cnl_i2c_info },
  220. /* SPT-H */
  221. { PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info },
  222. { PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info },
  223. { PCI_VDEVICE(INTEL, 0xa129), (kernel_ulong_t)&spt_info },
  224. { PCI_VDEVICE(INTEL, 0xa12a), (kernel_ulong_t)&spt_info },
  225. { PCI_VDEVICE(INTEL, 0xa160), (kernel_ulong_t)&spt_i2c_info },
  226. { PCI_VDEVICE(INTEL, 0xa161), (kernel_ulong_t)&spt_i2c_info },
  227. { PCI_VDEVICE(INTEL, 0xa162), (kernel_ulong_t)&spt_i2c_info },
  228. { PCI_VDEVICE(INTEL, 0xa166), (kernel_ulong_t)&spt_uart_info },
  229. /* KBL-H */
  230. { PCI_VDEVICE(INTEL, 0xa2a7), (kernel_ulong_t)&spt_uart_info },
  231. { PCI_VDEVICE(INTEL, 0xa2a8), (kernel_ulong_t)&spt_uart_info },
  232. { PCI_VDEVICE(INTEL, 0xa2a9), (kernel_ulong_t)&spt_info },
  233. { PCI_VDEVICE(INTEL, 0xa2aa), (kernel_ulong_t)&spt_info },
  234. { PCI_VDEVICE(INTEL, 0xa2e0), (kernel_ulong_t)&spt_i2c_info },
  235. { PCI_VDEVICE(INTEL, 0xa2e1), (kernel_ulong_t)&spt_i2c_info },
  236. { PCI_VDEVICE(INTEL, 0xa2e2), (kernel_ulong_t)&spt_i2c_info },
  237. { PCI_VDEVICE(INTEL, 0xa2e3), (kernel_ulong_t)&spt_i2c_info },
  238. { PCI_VDEVICE(INTEL, 0xa2e6), (kernel_ulong_t)&spt_uart_info },
  239. /* CNL-H */
  240. { PCI_VDEVICE(INTEL, 0xa328), (kernel_ulong_t)&spt_uart_info },
  241. { PCI_VDEVICE(INTEL, 0xa329), (kernel_ulong_t)&spt_uart_info },
  242. { PCI_VDEVICE(INTEL, 0xa32a), (kernel_ulong_t)&spt_info },
  243. { PCI_VDEVICE(INTEL, 0xa32b), (kernel_ulong_t)&spt_info },
  244. { PCI_VDEVICE(INTEL, 0xa37b), (kernel_ulong_t)&spt_info },
  245. { PCI_VDEVICE(INTEL, 0xa347), (kernel_ulong_t)&spt_uart_info },
  246. { PCI_VDEVICE(INTEL, 0xa368), (kernel_ulong_t)&cnl_i2c_info },
  247. { PCI_VDEVICE(INTEL, 0xa369), (kernel_ulong_t)&cnl_i2c_info },
  248. { PCI_VDEVICE(INTEL, 0xa36a), (kernel_ulong_t)&cnl_i2c_info },
  249. { PCI_VDEVICE(INTEL, 0xa36b), (kernel_ulong_t)&cnl_i2c_info },
  250. { }
  251. };
  252. MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids);
  253. static struct pci_driver intel_lpss_pci_driver = {
  254. .name = "intel-lpss",
  255. .id_table = intel_lpss_pci_ids,
  256. .probe = intel_lpss_pci_probe,
  257. .remove = intel_lpss_pci_remove,
  258. .driver = {
  259. .pm = &intel_lpss_pci_pm_ops,
  260. },
  261. };
  262. module_pci_driver(intel_lpss_pci_driver);
  263. MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
  264. MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
  265. MODULE_DESCRIPTION("Intel LPSS PCI driver");
  266. MODULE_LICENSE("GPL v2");