da9052-core.c 16 KB

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  1. /*
  2. * Device access for Dialog DA9052 PMICs.
  3. *
  4. * Copyright(c) 2011 Dialog Semiconductor Ltd.
  5. *
  6. * Author: David Dajun Chen <dchen@diasemi.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/device.h>
  14. #include <linux/delay.h>
  15. #include <linux/input.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/mfd/core.h>
  18. #include <linux/slab.h>
  19. #include <linux/module.h>
  20. #include <linux/property.h>
  21. #include <linux/mfd/da9052/da9052.h>
  22. #include <linux/mfd/da9052/pdata.h>
  23. #include <linux/mfd/da9052/reg.h>
  24. static bool da9052_reg_readable(struct device *dev, unsigned int reg)
  25. {
  26. switch (reg) {
  27. case DA9052_PAGE0_CON_REG:
  28. case DA9052_STATUS_A_REG:
  29. case DA9052_STATUS_B_REG:
  30. case DA9052_STATUS_C_REG:
  31. case DA9052_STATUS_D_REG:
  32. case DA9052_EVENT_A_REG:
  33. case DA9052_EVENT_B_REG:
  34. case DA9052_EVENT_C_REG:
  35. case DA9052_EVENT_D_REG:
  36. case DA9052_FAULTLOG_REG:
  37. case DA9052_IRQ_MASK_A_REG:
  38. case DA9052_IRQ_MASK_B_REG:
  39. case DA9052_IRQ_MASK_C_REG:
  40. case DA9052_IRQ_MASK_D_REG:
  41. case DA9052_CONTROL_A_REG:
  42. case DA9052_CONTROL_B_REG:
  43. case DA9052_CONTROL_C_REG:
  44. case DA9052_CONTROL_D_REG:
  45. case DA9052_PDDIS_REG:
  46. case DA9052_INTERFACE_REG:
  47. case DA9052_RESET_REG:
  48. case DA9052_GPIO_0_1_REG:
  49. case DA9052_GPIO_2_3_REG:
  50. case DA9052_GPIO_4_5_REG:
  51. case DA9052_GPIO_6_7_REG:
  52. case DA9052_GPIO_8_9_REG:
  53. case DA9052_GPIO_10_11_REG:
  54. case DA9052_GPIO_12_13_REG:
  55. case DA9052_GPIO_14_15_REG:
  56. case DA9052_ID_0_1_REG:
  57. case DA9052_ID_2_3_REG:
  58. case DA9052_ID_4_5_REG:
  59. case DA9052_ID_6_7_REG:
  60. case DA9052_ID_8_9_REG:
  61. case DA9052_ID_10_11_REG:
  62. case DA9052_ID_12_13_REG:
  63. case DA9052_ID_14_15_REG:
  64. case DA9052_ID_16_17_REG:
  65. case DA9052_ID_18_19_REG:
  66. case DA9052_ID_20_21_REG:
  67. case DA9052_SEQ_STATUS_REG:
  68. case DA9052_SEQ_A_REG:
  69. case DA9052_SEQ_B_REG:
  70. case DA9052_SEQ_TIMER_REG:
  71. case DA9052_BUCKA_REG:
  72. case DA9052_BUCKB_REG:
  73. case DA9052_BUCKCORE_REG:
  74. case DA9052_BUCKPRO_REG:
  75. case DA9052_BUCKMEM_REG:
  76. case DA9052_BUCKPERI_REG:
  77. case DA9052_LDO1_REG:
  78. case DA9052_LDO2_REG:
  79. case DA9052_LDO3_REG:
  80. case DA9052_LDO4_REG:
  81. case DA9052_LDO5_REG:
  82. case DA9052_LDO6_REG:
  83. case DA9052_LDO7_REG:
  84. case DA9052_LDO8_REG:
  85. case DA9052_LDO9_REG:
  86. case DA9052_LDO10_REG:
  87. case DA9052_SUPPLY_REG:
  88. case DA9052_PULLDOWN_REG:
  89. case DA9052_CHGBUCK_REG:
  90. case DA9052_WAITCONT_REG:
  91. case DA9052_ISET_REG:
  92. case DA9052_BATCHG_REG:
  93. case DA9052_CHG_CONT_REG:
  94. case DA9052_INPUT_CONT_REG:
  95. case DA9052_CHG_TIME_REG:
  96. case DA9052_BBAT_CONT_REG:
  97. case DA9052_BOOST_REG:
  98. case DA9052_LED_CONT_REG:
  99. case DA9052_LEDMIN123_REG:
  100. case DA9052_LED1_CONF_REG:
  101. case DA9052_LED2_CONF_REG:
  102. case DA9052_LED3_CONF_REG:
  103. case DA9052_LED1CONT_REG:
  104. case DA9052_LED2CONT_REG:
  105. case DA9052_LED3CONT_REG:
  106. case DA9052_LED_CONT_4_REG:
  107. case DA9052_LED_CONT_5_REG:
  108. case DA9052_ADC_MAN_REG:
  109. case DA9052_ADC_CONT_REG:
  110. case DA9052_ADC_RES_L_REG:
  111. case DA9052_ADC_RES_H_REG:
  112. case DA9052_VDD_RES_REG:
  113. case DA9052_VDD_MON_REG:
  114. case DA9052_ICHG_AV_REG:
  115. case DA9052_ICHG_THD_REG:
  116. case DA9052_ICHG_END_REG:
  117. case DA9052_TBAT_RES_REG:
  118. case DA9052_TBAT_HIGHP_REG:
  119. case DA9052_TBAT_HIGHN_REG:
  120. case DA9052_TBAT_LOW_REG:
  121. case DA9052_T_OFFSET_REG:
  122. case DA9052_ADCIN4_RES_REG:
  123. case DA9052_AUTO4_HIGH_REG:
  124. case DA9052_AUTO4_LOW_REG:
  125. case DA9052_ADCIN5_RES_REG:
  126. case DA9052_AUTO5_HIGH_REG:
  127. case DA9052_AUTO5_LOW_REG:
  128. case DA9052_ADCIN6_RES_REG:
  129. case DA9052_AUTO6_HIGH_REG:
  130. case DA9052_AUTO6_LOW_REG:
  131. case DA9052_TJUNC_RES_REG:
  132. case DA9052_TSI_CONT_A_REG:
  133. case DA9052_TSI_CONT_B_REG:
  134. case DA9052_TSI_X_MSB_REG:
  135. case DA9052_TSI_Y_MSB_REG:
  136. case DA9052_TSI_LSB_REG:
  137. case DA9052_TSI_Z_MSB_REG:
  138. case DA9052_COUNT_S_REG:
  139. case DA9052_COUNT_MI_REG:
  140. case DA9052_COUNT_H_REG:
  141. case DA9052_COUNT_D_REG:
  142. case DA9052_COUNT_MO_REG:
  143. case DA9052_COUNT_Y_REG:
  144. case DA9052_ALARM_MI_REG:
  145. case DA9052_ALARM_H_REG:
  146. case DA9052_ALARM_D_REG:
  147. case DA9052_ALARM_MO_REG:
  148. case DA9052_ALARM_Y_REG:
  149. case DA9052_SECOND_A_REG:
  150. case DA9052_SECOND_B_REG:
  151. case DA9052_SECOND_C_REG:
  152. case DA9052_SECOND_D_REG:
  153. case DA9052_PAGE1_CON_REG:
  154. return true;
  155. default:
  156. return false;
  157. }
  158. }
  159. static bool da9052_reg_writeable(struct device *dev, unsigned int reg)
  160. {
  161. switch (reg) {
  162. case DA9052_PAGE0_CON_REG:
  163. case DA9052_EVENT_A_REG:
  164. case DA9052_EVENT_B_REG:
  165. case DA9052_EVENT_C_REG:
  166. case DA9052_EVENT_D_REG:
  167. case DA9052_FAULTLOG_REG:
  168. case DA9052_IRQ_MASK_A_REG:
  169. case DA9052_IRQ_MASK_B_REG:
  170. case DA9052_IRQ_MASK_C_REG:
  171. case DA9052_IRQ_MASK_D_REG:
  172. case DA9052_CONTROL_A_REG:
  173. case DA9052_CONTROL_B_REG:
  174. case DA9052_CONTROL_C_REG:
  175. case DA9052_CONTROL_D_REG:
  176. case DA9052_PDDIS_REG:
  177. case DA9052_RESET_REG:
  178. case DA9052_GPIO_0_1_REG:
  179. case DA9052_GPIO_2_3_REG:
  180. case DA9052_GPIO_4_5_REG:
  181. case DA9052_GPIO_6_7_REG:
  182. case DA9052_GPIO_8_9_REG:
  183. case DA9052_GPIO_10_11_REG:
  184. case DA9052_GPIO_12_13_REG:
  185. case DA9052_GPIO_14_15_REG:
  186. case DA9052_ID_0_1_REG:
  187. case DA9052_ID_2_3_REG:
  188. case DA9052_ID_4_5_REG:
  189. case DA9052_ID_6_7_REG:
  190. case DA9052_ID_8_9_REG:
  191. case DA9052_ID_10_11_REG:
  192. case DA9052_ID_12_13_REG:
  193. case DA9052_ID_14_15_REG:
  194. case DA9052_ID_16_17_REG:
  195. case DA9052_ID_18_19_REG:
  196. case DA9052_ID_20_21_REG:
  197. case DA9052_SEQ_STATUS_REG:
  198. case DA9052_SEQ_A_REG:
  199. case DA9052_SEQ_B_REG:
  200. case DA9052_SEQ_TIMER_REG:
  201. case DA9052_BUCKA_REG:
  202. case DA9052_BUCKB_REG:
  203. case DA9052_BUCKCORE_REG:
  204. case DA9052_BUCKPRO_REG:
  205. case DA9052_BUCKMEM_REG:
  206. case DA9052_BUCKPERI_REG:
  207. case DA9052_LDO1_REG:
  208. case DA9052_LDO2_REG:
  209. case DA9052_LDO3_REG:
  210. case DA9052_LDO4_REG:
  211. case DA9052_LDO5_REG:
  212. case DA9052_LDO6_REG:
  213. case DA9052_LDO7_REG:
  214. case DA9052_LDO8_REG:
  215. case DA9052_LDO9_REG:
  216. case DA9052_LDO10_REG:
  217. case DA9052_SUPPLY_REG:
  218. case DA9052_PULLDOWN_REG:
  219. case DA9052_CHGBUCK_REG:
  220. case DA9052_WAITCONT_REG:
  221. case DA9052_ISET_REG:
  222. case DA9052_BATCHG_REG:
  223. case DA9052_CHG_CONT_REG:
  224. case DA9052_INPUT_CONT_REG:
  225. case DA9052_BBAT_CONT_REG:
  226. case DA9052_BOOST_REG:
  227. case DA9052_LED_CONT_REG:
  228. case DA9052_LEDMIN123_REG:
  229. case DA9052_LED1_CONF_REG:
  230. case DA9052_LED2_CONF_REG:
  231. case DA9052_LED3_CONF_REG:
  232. case DA9052_LED1CONT_REG:
  233. case DA9052_LED2CONT_REG:
  234. case DA9052_LED3CONT_REG:
  235. case DA9052_LED_CONT_4_REG:
  236. case DA9052_LED_CONT_5_REG:
  237. case DA9052_ADC_MAN_REG:
  238. case DA9052_ADC_CONT_REG:
  239. case DA9052_ADC_RES_L_REG:
  240. case DA9052_ADC_RES_H_REG:
  241. case DA9052_VDD_RES_REG:
  242. case DA9052_VDD_MON_REG:
  243. case DA9052_ICHG_THD_REG:
  244. case DA9052_ICHG_END_REG:
  245. case DA9052_TBAT_HIGHP_REG:
  246. case DA9052_TBAT_HIGHN_REG:
  247. case DA9052_TBAT_LOW_REG:
  248. case DA9052_T_OFFSET_REG:
  249. case DA9052_AUTO4_HIGH_REG:
  250. case DA9052_AUTO4_LOW_REG:
  251. case DA9052_AUTO5_HIGH_REG:
  252. case DA9052_AUTO5_LOW_REG:
  253. case DA9052_AUTO6_HIGH_REG:
  254. case DA9052_AUTO6_LOW_REG:
  255. case DA9052_TSI_CONT_A_REG:
  256. case DA9052_TSI_CONT_B_REG:
  257. case DA9052_COUNT_S_REG:
  258. case DA9052_COUNT_MI_REG:
  259. case DA9052_COUNT_H_REG:
  260. case DA9052_COUNT_D_REG:
  261. case DA9052_COUNT_MO_REG:
  262. case DA9052_COUNT_Y_REG:
  263. case DA9052_ALARM_MI_REG:
  264. case DA9052_ALARM_H_REG:
  265. case DA9052_ALARM_D_REG:
  266. case DA9052_ALARM_MO_REG:
  267. case DA9052_ALARM_Y_REG:
  268. case DA9052_PAGE1_CON_REG:
  269. return true;
  270. default:
  271. return false;
  272. }
  273. }
  274. static bool da9052_reg_volatile(struct device *dev, unsigned int reg)
  275. {
  276. switch (reg) {
  277. case DA9052_STATUS_A_REG:
  278. case DA9052_STATUS_B_REG:
  279. case DA9052_STATUS_C_REG:
  280. case DA9052_STATUS_D_REG:
  281. case DA9052_EVENT_A_REG:
  282. case DA9052_EVENT_B_REG:
  283. case DA9052_EVENT_C_REG:
  284. case DA9052_EVENT_D_REG:
  285. case DA9052_CONTROL_B_REG:
  286. case DA9052_CONTROL_D_REG:
  287. case DA9052_SUPPLY_REG:
  288. case DA9052_FAULTLOG_REG:
  289. case DA9052_CHG_TIME_REG:
  290. case DA9052_ADC_RES_L_REG:
  291. case DA9052_ADC_RES_H_REG:
  292. case DA9052_VDD_RES_REG:
  293. case DA9052_ICHG_AV_REG:
  294. case DA9052_TBAT_RES_REG:
  295. case DA9052_ADCIN4_RES_REG:
  296. case DA9052_ADCIN5_RES_REG:
  297. case DA9052_ADCIN6_RES_REG:
  298. case DA9052_TJUNC_RES_REG:
  299. case DA9052_TSI_X_MSB_REG:
  300. case DA9052_TSI_Y_MSB_REG:
  301. case DA9052_TSI_LSB_REG:
  302. case DA9052_TSI_Z_MSB_REG:
  303. case DA9052_COUNT_S_REG:
  304. case DA9052_COUNT_MI_REG:
  305. case DA9052_COUNT_H_REG:
  306. case DA9052_COUNT_D_REG:
  307. case DA9052_COUNT_MO_REG:
  308. case DA9052_COUNT_Y_REG:
  309. case DA9052_ALARM_MI_REG:
  310. return true;
  311. default:
  312. return false;
  313. }
  314. }
  315. /*
  316. * TBAT look-up table is computed from the R90 reg (8 bit register)
  317. * reading as below. The battery temperature is in milliCentigrade
  318. * TBAT = (1/(t1+1/298) - 273) * 1000 mC
  319. * where t1 = (1/B)* ln(( ADCval * 2.5)/(R25*ITBAT*255))
  320. * Default values are R25 = 10e3, B = 3380, ITBAT = 50e-6
  321. * Example:
  322. * R25=10E3, B=3380, ITBAT=50e-6, ADCVAL=62d calculates
  323. * TBAT = 20015 mili degrees Centrigrade
  324. *
  325. */
  326. static const int32_t tbat_lookup[255] = {
  327. 183258, 144221, 124334, 111336, 101826, 94397, 88343, 83257,
  328. 78889, 75071, 71688, 68656, 65914, 63414, 61120, 59001,
  329. 570366, 55204, 53490, 51881, 50364, 48931, 47574, 46285,
  330. 45059, 43889, 42772, 41703, 40678, 39694, 38748, 37838,
  331. 36961, 36115, 35297, 34507, 33743, 33002, 32284, 31588,
  332. 30911, 30254, 29615, 28994, 28389, 27799, 27225, 26664,
  333. 26117, 25584, 25062, 24553, 24054, 23567, 23091, 22624,
  334. 22167, 21719, 21281, 20851, 20429, 20015, 19610, 19211,
  335. 18820, 18436, 18058, 17688, 17323, 16965, 16612, 16266,
  336. 15925, 15589, 15259, 14933, 14613, 14298, 13987, 13681,
  337. 13379, 13082, 12788, 12499, 12214, 11933, 11655, 11382,
  338. 11112, 10845, 10582, 10322, 10066, 9812, 9562, 9315,
  339. 9071, 8830, 8591, 8356, 8123, 7893, 7665, 7440,
  340. 7218, 6998, 6780, 6565, 6352, 6141, 5933, 5726,
  341. 5522, 5320, 5120, 4922, 4726, 4532, 4340, 4149,
  342. 3961, 3774, 3589, 3406, 3225, 3045, 2867, 2690,
  343. 2516, 2342, 2170, 2000, 1831, 1664, 1498, 1334,
  344. 1171, 1009, 849, 690, 532, 376, 221, 67,
  345. -84, -236, -386, -535, -683, -830, -975, -1119,
  346. -1263, -1405, -1546, -1686, -1825, -1964, -2101, -2237,
  347. -2372, -2506, -2639, -2771, -2902, -3033, -3162, -3291,
  348. -3418, -3545, -3671, -3796, -3920, -4044, -4166, -4288,
  349. -4409, -4529, -4649, -4767, -4885, -5002, -5119, -5235,
  350. -5349, -5464, -5577, -5690, -5802, -5913, -6024, -6134,
  351. -6244, -6352, -6461, -6568, -6675, -6781, -6887, -6992,
  352. -7096, -7200, -7303, -7406, -7508, -7609, -7710, -7810,
  353. -7910, -8009, -8108, -8206, -8304, -8401, -8497, -8593,
  354. -8689, -8784, -8878, -8972, -9066, -9159, -9251, -9343,
  355. -9435, -9526, -9617, -9707, -9796, -9886, -9975, -10063,
  356. -10151, -10238, -10325, -10412, -10839, -10923, -11007, -11090,
  357. -11173, -11256, -11338, -11420, -11501, -11583, -11663, -11744,
  358. -11823, -11903, -11982
  359. };
  360. static const u8 chan_mux[DA9052_ADC_VBBAT + 1] = {
  361. [DA9052_ADC_VDDOUT] = DA9052_ADC_MAN_MUXSEL_VDDOUT,
  362. [DA9052_ADC_ICH] = DA9052_ADC_MAN_MUXSEL_ICH,
  363. [DA9052_ADC_TBAT] = DA9052_ADC_MAN_MUXSEL_TBAT,
  364. [DA9052_ADC_VBAT] = DA9052_ADC_MAN_MUXSEL_VBAT,
  365. [DA9052_ADC_IN4] = DA9052_ADC_MAN_MUXSEL_AD4,
  366. [DA9052_ADC_IN5] = DA9052_ADC_MAN_MUXSEL_AD5,
  367. [DA9052_ADC_IN6] = DA9052_ADC_MAN_MUXSEL_AD6,
  368. [DA9052_ADC_VBBAT] = DA9052_ADC_MAN_MUXSEL_VBBAT
  369. };
  370. int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel)
  371. {
  372. int ret;
  373. unsigned short calc_data;
  374. unsigned short data;
  375. unsigned char mux_sel;
  376. if (channel > DA9052_ADC_VBBAT)
  377. return -EINVAL;
  378. mutex_lock(&da9052->auxadc_lock);
  379. reinit_completion(&da9052->done);
  380. /* Channel gets activated on enabling the Conversion bit */
  381. mux_sel = chan_mux[channel] | DA9052_ADC_MAN_MAN_CONV;
  382. ret = da9052_reg_write(da9052, DA9052_ADC_MAN_REG, mux_sel);
  383. if (ret < 0)
  384. goto err;
  385. /* Wait for an interrupt */
  386. if (!wait_for_completion_timeout(&da9052->done,
  387. msecs_to_jiffies(500))) {
  388. dev_err(da9052->dev,
  389. "timeout waiting for ADC conversion interrupt\n");
  390. ret = -ETIMEDOUT;
  391. goto err;
  392. }
  393. ret = da9052_reg_read(da9052, DA9052_ADC_RES_H_REG);
  394. if (ret < 0)
  395. goto err;
  396. calc_data = (unsigned short)ret;
  397. data = calc_data << 2;
  398. ret = da9052_reg_read(da9052, DA9052_ADC_RES_L_REG);
  399. if (ret < 0)
  400. goto err;
  401. calc_data = (unsigned short)(ret & DA9052_ADC_RES_LSB);
  402. data |= calc_data;
  403. ret = data;
  404. err:
  405. mutex_unlock(&da9052->auxadc_lock);
  406. return ret;
  407. }
  408. EXPORT_SYMBOL_GPL(da9052_adc_manual_read);
  409. int da9052_adc_read_temp(struct da9052 *da9052)
  410. {
  411. int tbat;
  412. tbat = da9052_reg_read(da9052, DA9052_TBAT_RES_REG);
  413. if (tbat <= 0)
  414. return tbat;
  415. /* ARRAY_SIZE check is not needed since TBAT is a 8-bit register */
  416. return tbat_lookup[tbat - 1];
  417. }
  418. EXPORT_SYMBOL_GPL(da9052_adc_read_temp);
  419. static const struct mfd_cell da9052_subdev_info[] = {
  420. {
  421. .name = "da9052-regulator",
  422. .id = 0,
  423. },
  424. {
  425. .name = "da9052-regulator",
  426. .id = 1,
  427. },
  428. {
  429. .name = "da9052-regulator",
  430. .id = 2,
  431. },
  432. {
  433. .name = "da9052-regulator",
  434. .id = 3,
  435. },
  436. {
  437. .name = "da9052-regulator",
  438. .id = 4,
  439. },
  440. {
  441. .name = "da9052-regulator",
  442. .id = 5,
  443. },
  444. {
  445. .name = "da9052-regulator",
  446. .id = 6,
  447. },
  448. {
  449. .name = "da9052-regulator",
  450. .id = 7,
  451. },
  452. {
  453. .name = "da9052-regulator",
  454. .id = 8,
  455. },
  456. {
  457. .name = "da9052-regulator",
  458. .id = 9,
  459. },
  460. {
  461. .name = "da9052-regulator",
  462. .id = 10,
  463. },
  464. {
  465. .name = "da9052-regulator",
  466. .id = 11,
  467. },
  468. {
  469. .name = "da9052-regulator",
  470. .id = 12,
  471. },
  472. {
  473. .name = "da9052-regulator",
  474. .id = 13,
  475. },
  476. {
  477. .name = "da9052-onkey",
  478. },
  479. {
  480. .name = "da9052-rtc",
  481. },
  482. {
  483. .name = "da9052-gpio",
  484. },
  485. {
  486. .name = "da9052-hwmon",
  487. },
  488. {
  489. .name = "da9052-leds",
  490. },
  491. {
  492. .name = "da9052-wled1",
  493. },
  494. {
  495. .name = "da9052-wled2",
  496. },
  497. {
  498. .name = "da9052-wled3",
  499. },
  500. {
  501. .name = "da9052-bat",
  502. },
  503. {
  504. .name = "da9052-watchdog",
  505. },
  506. };
  507. static const struct mfd_cell da9052_tsi_subdev_info[] = {
  508. { .name = "da9052-tsi" },
  509. };
  510. const struct regmap_config da9052_regmap_config = {
  511. .reg_bits = 8,
  512. .val_bits = 8,
  513. .cache_type = REGCACHE_RBTREE,
  514. .max_register = DA9052_PAGE1_CON_REG,
  515. .readable_reg = da9052_reg_readable,
  516. .writeable_reg = da9052_reg_writeable,
  517. .volatile_reg = da9052_reg_volatile,
  518. };
  519. EXPORT_SYMBOL_GPL(da9052_regmap_config);
  520. static int da9052_clear_fault_log(struct da9052 *da9052)
  521. {
  522. int ret = 0;
  523. int fault_log = 0;
  524. fault_log = da9052_reg_read(da9052, DA9052_FAULTLOG_REG);
  525. if (fault_log < 0) {
  526. dev_err(da9052->dev,
  527. "Cannot read FAULT_LOG %d\n", fault_log);
  528. return fault_log;
  529. }
  530. if (fault_log) {
  531. if (fault_log & DA9052_FAULTLOG_TWDERROR)
  532. dev_dbg(da9052->dev,
  533. "Fault log entry detected: TWD_ERROR\n");
  534. if (fault_log & DA9052_FAULTLOG_VDDFAULT)
  535. dev_dbg(da9052->dev,
  536. "Fault log entry detected: VDD_FAULT\n");
  537. if (fault_log & DA9052_FAULTLOG_VDDSTART)
  538. dev_dbg(da9052->dev,
  539. "Fault log entry detected: VDD_START\n");
  540. if (fault_log & DA9052_FAULTLOG_TEMPOVER)
  541. dev_dbg(da9052->dev,
  542. "Fault log entry detected: TEMP_OVER\n");
  543. if (fault_log & DA9052_FAULTLOG_KEYSHUT)
  544. dev_dbg(da9052->dev,
  545. "Fault log entry detected: KEY_SHUT\n");
  546. if (fault_log & DA9052_FAULTLOG_NSDSET)
  547. dev_dbg(da9052->dev,
  548. "Fault log entry detected: nSD_SHUT\n");
  549. if (fault_log & DA9052_FAULTLOG_WAITSET)
  550. dev_dbg(da9052->dev,
  551. "Fault log entry detected: WAIT_SHUT\n");
  552. ret = da9052_reg_write(da9052,
  553. DA9052_FAULTLOG_REG,
  554. 0xFF);
  555. if (ret < 0)
  556. dev_err(da9052->dev,
  557. "Cannot reset FAULT_LOG values %d\n", ret);
  558. }
  559. return ret;
  560. }
  561. int da9052_device_init(struct da9052 *da9052, u8 chip_id)
  562. {
  563. struct da9052_pdata *pdata = dev_get_platdata(da9052->dev);
  564. int ret;
  565. mutex_init(&da9052->auxadc_lock);
  566. init_completion(&da9052->done);
  567. ret = da9052_clear_fault_log(da9052);
  568. if (ret < 0)
  569. dev_warn(da9052->dev, "Cannot clear FAULT_LOG\n");
  570. if (pdata && pdata->init != NULL)
  571. pdata->init(da9052);
  572. da9052->chip_id = chip_id;
  573. ret = da9052_irq_init(da9052);
  574. if (ret != 0) {
  575. dev_err(da9052->dev, "da9052_irq_init failed: %d\n", ret);
  576. return ret;
  577. }
  578. ret = mfd_add_devices(da9052->dev, PLATFORM_DEVID_AUTO,
  579. da9052_subdev_info,
  580. ARRAY_SIZE(da9052_subdev_info), NULL, 0, NULL);
  581. if (ret) {
  582. dev_err(da9052->dev, "mfd_add_devices failed: %d\n", ret);
  583. goto err;
  584. }
  585. /*
  586. * Check if touchscreen pins are used are analogue input instead
  587. * of having a touchscreen connected to them. The analogue input
  588. * functionality will be provided by hwmon driver (if enabled).
  589. */
  590. if (!device_property_read_bool(da9052->dev, "dlg,tsi-as-adc")) {
  591. ret = mfd_add_devices(da9052->dev, PLATFORM_DEVID_AUTO,
  592. da9052_tsi_subdev_info,
  593. ARRAY_SIZE(da9052_tsi_subdev_info),
  594. NULL, 0, NULL);
  595. if (ret) {
  596. dev_err(da9052->dev, "failed to add TSI subdev: %d\n",
  597. ret);
  598. goto err;
  599. }
  600. }
  601. return 0;
  602. err:
  603. mfd_remove_devices(da9052->dev);
  604. da9052_irq_exit(da9052);
  605. return ret;
  606. }
  607. void da9052_device_exit(struct da9052 *da9052)
  608. {
  609. mfd_remove_devices(da9052->dev);
  610. da9052_irq_exit(da9052);
  611. }
  612. MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
  613. MODULE_DESCRIPTION("DA9052 MFD Core");
  614. MODULE_LICENSE("GPL");