bd9571mwv.c 6.9 KB

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  1. /*
  2. * ROHM BD9571MWV-M MFD driver
  3. *
  4. * Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11. * kind, whether expressed or implied; without even the implied warranty
  12. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License version 2 for more details.
  14. *
  15. * Based on the TPS65086 driver
  16. */
  17. #include <linux/i2c.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/mfd/core.h>
  20. #include <linux/module.h>
  21. #include <linux/mfd/bd9571mwv.h>
  22. static const struct mfd_cell bd9571mwv_cells[] = {
  23. { .name = "bd9571mwv-regulator", },
  24. { .name = "bd9571mwv-gpio", },
  25. };
  26. static const struct regmap_range bd9571mwv_readable_yes_ranges[] = {
  27. regmap_reg_range(BD9571MWV_VENDOR_CODE, BD9571MWV_PRODUCT_REVISION),
  28. regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT),
  29. regmap_reg_range(BD9571MWV_AVS_SET_MONI, BD9571MWV_AVS_DVFS_VID(3)),
  30. regmap_reg_range(BD9571MWV_VD18_VID, BD9571MWV_VD33_VID),
  31. regmap_reg_range(BD9571MWV_DVFS_VINIT, BD9571MWV_DVFS_VINIT),
  32. regmap_reg_range(BD9571MWV_DVFS_SETVMAX, BD9571MWV_DVFS_MONIVDAC),
  33. regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN),
  34. regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INTMASK),
  35. regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK),
  36. };
  37. static const struct regmap_access_table bd9571mwv_readable_table = {
  38. .yes_ranges = bd9571mwv_readable_yes_ranges,
  39. .n_yes_ranges = ARRAY_SIZE(bd9571mwv_readable_yes_ranges),
  40. };
  41. static const struct regmap_range bd9571mwv_writable_yes_ranges[] = {
  42. regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT),
  43. regmap_reg_range(BD9571MWV_AVS_VD09_VID(0), BD9571MWV_AVS_VD09_VID(3)),
  44. regmap_reg_range(BD9571MWV_DVFS_SETVID, BD9571MWV_DVFS_SETVID),
  45. regmap_reg_range(BD9571MWV_GPIO_DIR, BD9571MWV_GPIO_OUT),
  46. regmap_reg_range(BD9571MWV_GPIO_INT_SET, BD9571MWV_GPIO_INTMASK),
  47. regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK),
  48. };
  49. static const struct regmap_access_table bd9571mwv_writable_table = {
  50. .yes_ranges = bd9571mwv_writable_yes_ranges,
  51. .n_yes_ranges = ARRAY_SIZE(bd9571mwv_writable_yes_ranges),
  52. };
  53. static const struct regmap_range bd9571mwv_volatile_yes_ranges[] = {
  54. regmap_reg_range(BD9571MWV_DVFS_MONIVDAC, BD9571MWV_DVFS_MONIVDAC),
  55. regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN),
  56. regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INT),
  57. regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTREQ),
  58. };
  59. static const struct regmap_access_table bd9571mwv_volatile_table = {
  60. .yes_ranges = bd9571mwv_volatile_yes_ranges,
  61. .n_yes_ranges = ARRAY_SIZE(bd9571mwv_volatile_yes_ranges),
  62. };
  63. static const struct regmap_config bd9571mwv_regmap_config = {
  64. .reg_bits = 8,
  65. .val_bits = 8,
  66. .cache_type = REGCACHE_RBTREE,
  67. .rd_table = &bd9571mwv_readable_table,
  68. .wr_table = &bd9571mwv_writable_table,
  69. .volatile_table = &bd9571mwv_volatile_table,
  70. .max_register = 0xff,
  71. };
  72. static const struct regmap_irq bd9571mwv_irqs[] = {
  73. REGMAP_IRQ_REG(BD9571MWV_IRQ_MD1, 0,
  74. BD9571MWV_INT_INTREQ_MD1_INT),
  75. REGMAP_IRQ_REG(BD9571MWV_IRQ_MD2_E1, 0,
  76. BD9571MWV_INT_INTREQ_MD2_E1_INT),
  77. REGMAP_IRQ_REG(BD9571MWV_IRQ_MD2_E2, 0,
  78. BD9571MWV_INT_INTREQ_MD2_E2_INT),
  79. REGMAP_IRQ_REG(BD9571MWV_IRQ_PROT_ERR, 0,
  80. BD9571MWV_INT_INTREQ_PROT_ERR_INT),
  81. REGMAP_IRQ_REG(BD9571MWV_IRQ_GP, 0,
  82. BD9571MWV_INT_INTREQ_GP_INT),
  83. REGMAP_IRQ_REG(BD9571MWV_IRQ_128H_OF, 0,
  84. BD9571MWV_INT_INTREQ_128H_OF_INT),
  85. REGMAP_IRQ_REG(BD9571MWV_IRQ_WDT_OF, 0,
  86. BD9571MWV_INT_INTREQ_WDT_OF_INT),
  87. REGMAP_IRQ_REG(BD9571MWV_IRQ_BKUP_TRG, 0,
  88. BD9571MWV_INT_INTREQ_BKUP_TRG_INT),
  89. };
  90. static struct regmap_irq_chip bd9571mwv_irq_chip = {
  91. .name = "bd9571mwv",
  92. .status_base = BD9571MWV_INT_INTREQ,
  93. .mask_base = BD9571MWV_INT_INTMASK,
  94. .ack_base = BD9571MWV_INT_INTREQ,
  95. .init_ack_masked = true,
  96. .num_regs = 1,
  97. .irqs = bd9571mwv_irqs,
  98. .num_irqs = ARRAY_SIZE(bd9571mwv_irqs),
  99. };
  100. static int bd9571mwv_identify(struct bd9571mwv *bd)
  101. {
  102. struct device *dev = bd->dev;
  103. unsigned int value;
  104. int ret;
  105. ret = regmap_read(bd->regmap, BD9571MWV_VENDOR_CODE, &value);
  106. if (ret) {
  107. dev_err(dev, "Failed to read vendor code register (ret=%i)\n",
  108. ret);
  109. return ret;
  110. }
  111. if (value != BD9571MWV_VENDOR_CODE_VAL) {
  112. dev_err(dev, "Invalid vendor code ID %02x (expected %02x)\n",
  113. value, BD9571MWV_VENDOR_CODE_VAL);
  114. return -EINVAL;
  115. }
  116. ret = regmap_read(bd->regmap, BD9571MWV_PRODUCT_CODE, &value);
  117. if (ret) {
  118. dev_err(dev, "Failed to read product code register (ret=%i)\n",
  119. ret);
  120. return ret;
  121. }
  122. if (value != BD9571MWV_PRODUCT_CODE_VAL) {
  123. dev_err(dev, "Invalid product code ID %02x (expected %02x)\n",
  124. value, BD9571MWV_PRODUCT_CODE_VAL);
  125. return -EINVAL;
  126. }
  127. ret = regmap_read(bd->regmap, BD9571MWV_PRODUCT_REVISION, &value);
  128. if (ret) {
  129. dev_err(dev, "Failed to read revision register (ret=%i)\n",
  130. ret);
  131. return ret;
  132. }
  133. dev_info(dev, "Device: BD9571MWV rev. %d\n", value & 0xff);
  134. return 0;
  135. }
  136. static int bd9571mwv_probe(struct i2c_client *client,
  137. const struct i2c_device_id *ids)
  138. {
  139. struct bd9571mwv *bd;
  140. int ret;
  141. bd = devm_kzalloc(&client->dev, sizeof(*bd), GFP_KERNEL);
  142. if (!bd)
  143. return -ENOMEM;
  144. i2c_set_clientdata(client, bd);
  145. bd->dev = &client->dev;
  146. bd->irq = client->irq;
  147. bd->regmap = devm_regmap_init_i2c(client, &bd9571mwv_regmap_config);
  148. if (IS_ERR(bd->regmap)) {
  149. dev_err(bd->dev, "Failed to initialize register map\n");
  150. return PTR_ERR(bd->regmap);
  151. }
  152. ret = bd9571mwv_identify(bd);
  153. if (ret)
  154. return ret;
  155. ret = regmap_add_irq_chip(bd->regmap, bd->irq, IRQF_ONESHOT, 0,
  156. &bd9571mwv_irq_chip, &bd->irq_data);
  157. if (ret) {
  158. dev_err(bd->dev, "Failed to register IRQ chip\n");
  159. return ret;
  160. }
  161. ret = mfd_add_devices(bd->dev, PLATFORM_DEVID_AUTO, bd9571mwv_cells,
  162. ARRAY_SIZE(bd9571mwv_cells), NULL, 0,
  163. regmap_irq_get_domain(bd->irq_data));
  164. if (ret) {
  165. regmap_del_irq_chip(bd->irq, bd->irq_data);
  166. return ret;
  167. }
  168. return 0;
  169. }
  170. static int bd9571mwv_remove(struct i2c_client *client)
  171. {
  172. struct bd9571mwv *bd = i2c_get_clientdata(client);
  173. regmap_del_irq_chip(bd->irq, bd->irq_data);
  174. return 0;
  175. }
  176. static const struct of_device_id bd9571mwv_of_match_table[] = {
  177. { .compatible = "rohm,bd9571mwv", },
  178. { /* sentinel */ }
  179. };
  180. MODULE_DEVICE_TABLE(of, bd9571mwv_of_match_table);
  181. static const struct i2c_device_id bd9571mwv_id_table[] = {
  182. { "bd9571mwv", 0 },
  183. { /* sentinel */ }
  184. };
  185. MODULE_DEVICE_TABLE(i2c, bd9571mwv_id_table);
  186. static struct i2c_driver bd9571mwv_driver = {
  187. .driver = {
  188. .name = "bd9571mwv",
  189. .of_match_table = bd9571mwv_of_match_table,
  190. },
  191. .probe = bd9571mwv_probe,
  192. .remove = bd9571mwv_remove,
  193. .id_table = bd9571mwv_id_table,
  194. };
  195. module_i2c_driver(bd9571mwv_driver);
  196. MODULE_AUTHOR("Marek Vasut <marek.vasut+renesas@gmail.com>");
  197. MODULE_DESCRIPTION("BD9571MWV PMIC Driver");
  198. MODULE_LICENSE("GPL v2");