axp20x.c 33 KB

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  1. /*
  2. * MFD core driver for the X-Powers' Power Management ICs
  3. *
  4. * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
  5. * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
  6. * as well as configurable GPIOs.
  7. *
  8. * This file contains the interface independent core functions.
  9. *
  10. * Copyright (C) 2014 Carlo Caione
  11. *
  12. * Author: Carlo Caione <carlo@caione.org>
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License version 2 as
  16. * published by the Free Software Foundation.
  17. */
  18. #include <linux/err.h>
  19. #include <linux/delay.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/regmap.h>
  25. #include <linux/regulator/consumer.h>
  26. #include <linux/mfd/axp20x.h>
  27. #include <linux/mfd/core.h>
  28. #include <linux/of_device.h>
  29. #include <linux/acpi.h>
  30. #define AXP20X_OFF 0x80
  31. #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0
  32. #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4)
  33. static const char * const axp20x_model_names[] = {
  34. "AXP152",
  35. "AXP202",
  36. "AXP209",
  37. "AXP221",
  38. "AXP223",
  39. "AXP288",
  40. "AXP803",
  41. "AXP806",
  42. "AXP809",
  43. "AXP813",
  44. };
  45. static const struct regmap_range axp152_writeable_ranges[] = {
  46. regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
  47. regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
  48. };
  49. static const struct regmap_range axp152_volatile_ranges[] = {
  50. regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
  51. regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
  52. regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
  53. };
  54. static const struct regmap_access_table axp152_writeable_table = {
  55. .yes_ranges = axp152_writeable_ranges,
  56. .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges),
  57. };
  58. static const struct regmap_access_table axp152_volatile_table = {
  59. .yes_ranges = axp152_volatile_ranges,
  60. .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges),
  61. };
  62. static const struct regmap_range axp20x_writeable_ranges[] = {
  63. regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
  64. regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
  65. regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
  66. regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
  67. };
  68. static const struct regmap_range axp20x_volatile_ranges[] = {
  69. regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
  70. regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
  71. regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
  72. regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
  73. regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
  74. regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
  75. };
  76. static const struct regmap_access_table axp20x_writeable_table = {
  77. .yes_ranges = axp20x_writeable_ranges,
  78. .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges),
  79. };
  80. static const struct regmap_access_table axp20x_volatile_table = {
  81. .yes_ranges = axp20x_volatile_ranges,
  82. .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
  83. };
  84. /* AXP22x ranges are shared with the AXP809, as they cover the same range */
  85. static const struct regmap_range axp22x_writeable_ranges[] = {
  86. regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
  87. regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3),
  88. regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
  89. };
  90. static const struct regmap_range axp22x_volatile_ranges[] = {
  91. regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE),
  92. regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
  93. regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
  94. regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L),
  95. regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES),
  96. };
  97. static const struct regmap_access_table axp22x_writeable_table = {
  98. .yes_ranges = axp22x_writeable_ranges,
  99. .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges),
  100. };
  101. static const struct regmap_access_table axp22x_volatile_table = {
  102. .yes_ranges = axp22x_volatile_ranges,
  103. .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges),
  104. };
  105. /* AXP288 ranges are shared with the AXP803, as they cover the same range */
  106. static const struct regmap_range axp288_writeable_ranges[] = {
  107. regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
  108. regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
  109. };
  110. static const struct regmap_range axp288_volatile_ranges[] = {
  111. regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON),
  112. regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL),
  113. regmap_reg_range(AXP288_BC_DET_STAT, AXP20X_VBUS_IPSOUT_MGMT),
  114. regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL),
  115. regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
  116. regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
  117. regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
  118. regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L),
  119. regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG),
  120. };
  121. static const struct regmap_access_table axp288_writeable_table = {
  122. .yes_ranges = axp288_writeable_ranges,
  123. .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges),
  124. };
  125. static const struct regmap_access_table axp288_volatile_table = {
  126. .yes_ranges = axp288_volatile_ranges,
  127. .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
  128. };
  129. static const struct regmap_range axp806_writeable_ranges[] = {
  130. regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)),
  131. regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL),
  132. regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN),
  133. regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
  134. regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
  135. };
  136. static const struct regmap_range axp806_volatile_ranges[] = {
  137. regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
  138. };
  139. static const struct regmap_access_table axp806_writeable_table = {
  140. .yes_ranges = axp806_writeable_ranges,
  141. .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges),
  142. };
  143. static const struct regmap_access_table axp806_volatile_table = {
  144. .yes_ranges = axp806_volatile_ranges,
  145. .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges),
  146. };
  147. static const struct resource axp152_pek_resources[] = {
  148. DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
  149. DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
  150. };
  151. static const struct resource axp20x_ac_power_supply_resources[] = {
  152. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
  153. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
  154. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
  155. };
  156. static const struct resource axp20x_pek_resources[] = {
  157. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
  158. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
  159. };
  160. static const struct resource axp20x_usb_power_supply_resources[] = {
  161. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
  162. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
  163. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
  164. DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
  165. };
  166. static const struct resource axp22x_usb_power_supply_resources[] = {
  167. DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
  168. DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
  169. };
  170. static const struct resource axp22x_pek_resources[] = {
  171. DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
  172. DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
  173. };
  174. static const struct resource axp288_power_button_resources[] = {
  175. DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"),
  176. DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"),
  177. };
  178. static const struct resource axp288_fuel_gauge_resources[] = {
  179. DEFINE_RES_IRQ(AXP288_IRQ_QWBTU),
  180. DEFINE_RES_IRQ(AXP288_IRQ_WBTU),
  181. DEFINE_RES_IRQ(AXP288_IRQ_QWBTO),
  182. DEFINE_RES_IRQ(AXP288_IRQ_WBTO),
  183. DEFINE_RES_IRQ(AXP288_IRQ_WL2),
  184. DEFINE_RES_IRQ(AXP288_IRQ_WL1),
  185. };
  186. static const struct resource axp803_pek_resources[] = {
  187. DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
  188. DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
  189. };
  190. static const struct resource axp806_pek_resources[] = {
  191. DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"),
  192. DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"),
  193. };
  194. static const struct resource axp809_pek_resources[] = {
  195. DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
  196. DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
  197. };
  198. static const struct regmap_config axp152_regmap_config = {
  199. .reg_bits = 8,
  200. .val_bits = 8,
  201. .wr_table = &axp152_writeable_table,
  202. .volatile_table = &axp152_volatile_table,
  203. .max_register = AXP152_PWM1_DUTY_CYCLE,
  204. .cache_type = REGCACHE_RBTREE,
  205. };
  206. static const struct regmap_config axp20x_regmap_config = {
  207. .reg_bits = 8,
  208. .val_bits = 8,
  209. .wr_table = &axp20x_writeable_table,
  210. .volatile_table = &axp20x_volatile_table,
  211. .max_register = AXP20X_OCV(AXP20X_OCV_MAX),
  212. .cache_type = REGCACHE_RBTREE,
  213. };
  214. static const struct regmap_config axp22x_regmap_config = {
  215. .reg_bits = 8,
  216. .val_bits = 8,
  217. .wr_table = &axp22x_writeable_table,
  218. .volatile_table = &axp22x_volatile_table,
  219. .max_register = AXP22X_BATLOW_THRES1,
  220. .cache_type = REGCACHE_RBTREE,
  221. };
  222. static const struct regmap_config axp288_regmap_config = {
  223. .reg_bits = 8,
  224. .val_bits = 8,
  225. .wr_table = &axp288_writeable_table,
  226. .volatile_table = &axp288_volatile_table,
  227. .max_register = AXP288_FG_TUNE5,
  228. .cache_type = REGCACHE_RBTREE,
  229. };
  230. static const struct regmap_config axp806_regmap_config = {
  231. .reg_bits = 8,
  232. .val_bits = 8,
  233. .wr_table = &axp806_writeable_table,
  234. .volatile_table = &axp806_volatile_table,
  235. .max_register = AXP806_REG_ADDR_EXT,
  236. .cache_type = REGCACHE_RBTREE,
  237. };
  238. #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
  239. [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
  240. static const struct regmap_irq axp152_regmap_irqs[] = {
  241. INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6),
  242. INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5),
  243. INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3),
  244. INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2),
  245. INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5),
  246. INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4),
  247. INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3),
  248. INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2),
  249. INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1),
  250. INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0),
  251. INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7),
  252. INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6),
  253. INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5),
  254. INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3),
  255. INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2),
  256. INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1),
  257. INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
  258. };
  259. static const struct regmap_irq axp20x_regmap_irqs[] = {
  260. INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
  261. INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
  262. INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5),
  263. INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4),
  264. INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3),
  265. INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2),
  266. INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1),
  267. INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7),
  268. INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6),
  269. INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5),
  270. INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4),
  271. INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3),
  272. INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2),
  273. INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1),
  274. INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0),
  275. INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7),
  276. INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6),
  277. INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5),
  278. INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4),
  279. INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3),
  280. INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1),
  281. INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0),
  282. INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7),
  283. INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6),
  284. INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5),
  285. INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4),
  286. INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3),
  287. INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2),
  288. INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1),
  289. INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0),
  290. INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7),
  291. INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6),
  292. INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5),
  293. INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3),
  294. INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2),
  295. INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1),
  296. INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0),
  297. };
  298. static const struct regmap_irq axp22x_regmap_irqs[] = {
  299. INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7),
  300. INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6),
  301. INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5),
  302. INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4),
  303. INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3),
  304. INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2),
  305. INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1),
  306. INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7),
  307. INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6),
  308. INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5),
  309. INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4),
  310. INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3),
  311. INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2),
  312. INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1),
  313. INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0),
  314. INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7),
  315. INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1),
  316. INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0),
  317. INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1),
  318. INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0),
  319. INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7),
  320. INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6),
  321. INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5),
  322. INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1),
  323. INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0),
  324. };
  325. /* some IRQs are compatible with axp20x models */
  326. static const struct regmap_irq axp288_regmap_irqs[] = {
  327. INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
  328. INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3),
  329. INIT_REGMAP_IRQ(AXP288, OV, 0, 4),
  330. INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5),
  331. INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6),
  332. INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7),
  333. INIT_REGMAP_IRQ(AXP288, DONE, 1, 2),
  334. INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3),
  335. INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4),
  336. INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5),
  337. INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6),
  338. INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7),
  339. INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0),
  340. INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1),
  341. INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2),
  342. INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3),
  343. INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4),
  344. INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5),
  345. INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6),
  346. INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7),
  347. INIT_REGMAP_IRQ(AXP288, WL2, 3, 0),
  348. INIT_REGMAP_IRQ(AXP288, WL1, 3, 1),
  349. INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2),
  350. INIT_REGMAP_IRQ(AXP288, OT, 3, 7),
  351. INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0),
  352. INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1),
  353. INIT_REGMAP_IRQ(AXP288, POKO, 4, 2),
  354. INIT_REGMAP_IRQ(AXP288, POKL, 4, 3),
  355. INIT_REGMAP_IRQ(AXP288, POKS, 4, 4),
  356. INIT_REGMAP_IRQ(AXP288, POKN, 4, 5),
  357. INIT_REGMAP_IRQ(AXP288, POKP, 4, 6),
  358. INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7),
  359. INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0),
  360. INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
  361. };
  362. static const struct regmap_irq axp803_regmap_irqs[] = {
  363. INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7),
  364. INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6),
  365. INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5),
  366. INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4),
  367. INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3),
  368. INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2),
  369. INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7),
  370. INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6),
  371. INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5),
  372. INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4),
  373. INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3),
  374. INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2),
  375. INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7),
  376. INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6),
  377. INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5),
  378. INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4),
  379. INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3),
  380. INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2),
  381. INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1),
  382. INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0),
  383. INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7),
  384. INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2),
  385. INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1),
  386. INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0),
  387. INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7),
  388. INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6),
  389. INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5),
  390. INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4),
  391. INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3),
  392. INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2),
  393. INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1),
  394. INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0),
  395. INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1),
  396. INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0),
  397. };
  398. static const struct regmap_irq axp806_regmap_irqs[] = {
  399. INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0),
  400. INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1),
  401. INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3),
  402. INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4),
  403. INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5),
  404. INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6),
  405. INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7),
  406. INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0),
  407. INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1),
  408. INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4),
  409. INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5),
  410. INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6),
  411. };
  412. static const struct regmap_irq axp809_regmap_irqs[] = {
  413. INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7),
  414. INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6),
  415. INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5),
  416. INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4),
  417. INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3),
  418. INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2),
  419. INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1),
  420. INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7),
  421. INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6),
  422. INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5),
  423. INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4),
  424. INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3),
  425. INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2),
  426. INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7),
  427. INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6),
  428. INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5),
  429. INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4),
  430. INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3),
  431. INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2),
  432. INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1),
  433. INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0),
  434. INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7),
  435. INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1),
  436. INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0),
  437. INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7),
  438. INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6),
  439. INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5),
  440. INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4),
  441. INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3),
  442. INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2),
  443. INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1),
  444. INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0),
  445. };
  446. static const struct regmap_irq_chip axp152_regmap_irq_chip = {
  447. .name = "axp152_irq_chip",
  448. .status_base = AXP152_IRQ1_STATE,
  449. .ack_base = AXP152_IRQ1_STATE,
  450. .mask_base = AXP152_IRQ1_EN,
  451. .mask_invert = true,
  452. .init_ack_masked = true,
  453. .irqs = axp152_regmap_irqs,
  454. .num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
  455. .num_regs = 3,
  456. };
  457. static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
  458. .name = "axp20x_irq_chip",
  459. .status_base = AXP20X_IRQ1_STATE,
  460. .ack_base = AXP20X_IRQ1_STATE,
  461. .mask_base = AXP20X_IRQ1_EN,
  462. .mask_invert = true,
  463. .init_ack_masked = true,
  464. .irqs = axp20x_regmap_irqs,
  465. .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs),
  466. .num_regs = 5,
  467. };
  468. static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
  469. .name = "axp22x_irq_chip",
  470. .status_base = AXP20X_IRQ1_STATE,
  471. .ack_base = AXP20X_IRQ1_STATE,
  472. .mask_base = AXP20X_IRQ1_EN,
  473. .mask_invert = true,
  474. .init_ack_masked = true,
  475. .irqs = axp22x_regmap_irqs,
  476. .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
  477. .num_regs = 5,
  478. };
  479. static const struct regmap_irq_chip axp288_regmap_irq_chip = {
  480. .name = "axp288_irq_chip",
  481. .status_base = AXP20X_IRQ1_STATE,
  482. .ack_base = AXP20X_IRQ1_STATE,
  483. .mask_base = AXP20X_IRQ1_EN,
  484. .mask_invert = true,
  485. .init_ack_masked = true,
  486. .irqs = axp288_regmap_irqs,
  487. .num_irqs = ARRAY_SIZE(axp288_regmap_irqs),
  488. .num_regs = 6,
  489. };
  490. static const struct regmap_irq_chip axp803_regmap_irq_chip = {
  491. .name = "axp803",
  492. .status_base = AXP20X_IRQ1_STATE,
  493. .ack_base = AXP20X_IRQ1_STATE,
  494. .mask_base = AXP20X_IRQ1_EN,
  495. .mask_invert = true,
  496. .init_ack_masked = true,
  497. .irqs = axp803_regmap_irqs,
  498. .num_irqs = ARRAY_SIZE(axp803_regmap_irqs),
  499. .num_regs = 6,
  500. };
  501. static const struct regmap_irq_chip axp806_regmap_irq_chip = {
  502. .name = "axp806",
  503. .status_base = AXP20X_IRQ1_STATE,
  504. .ack_base = AXP20X_IRQ1_STATE,
  505. .mask_base = AXP20X_IRQ1_EN,
  506. .mask_invert = true,
  507. .init_ack_masked = true,
  508. .irqs = axp806_regmap_irqs,
  509. .num_irqs = ARRAY_SIZE(axp806_regmap_irqs),
  510. .num_regs = 2,
  511. };
  512. static const struct regmap_irq_chip axp809_regmap_irq_chip = {
  513. .name = "axp809",
  514. .status_base = AXP20X_IRQ1_STATE,
  515. .ack_base = AXP20X_IRQ1_STATE,
  516. .mask_base = AXP20X_IRQ1_EN,
  517. .mask_invert = true,
  518. .init_ack_masked = true,
  519. .irqs = axp809_regmap_irqs,
  520. .num_irqs = ARRAY_SIZE(axp809_regmap_irqs),
  521. .num_regs = 5,
  522. };
  523. static const struct mfd_cell axp20x_cells[] = {
  524. {
  525. .name = "axp20x-gpio",
  526. .of_compatible = "x-powers,axp209-gpio",
  527. }, {
  528. .name = "axp20x-pek",
  529. .num_resources = ARRAY_SIZE(axp20x_pek_resources),
  530. .resources = axp20x_pek_resources,
  531. }, {
  532. .name = "axp20x-regulator",
  533. }, {
  534. .name = "axp20x-adc",
  535. .of_compatible = "x-powers,axp209-adc",
  536. }, {
  537. .name = "axp20x-battery-power-supply",
  538. .of_compatible = "x-powers,axp209-battery-power-supply",
  539. }, {
  540. .name = "axp20x-ac-power-supply",
  541. .of_compatible = "x-powers,axp202-ac-power-supply",
  542. .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
  543. .resources = axp20x_ac_power_supply_resources,
  544. }, {
  545. .name = "axp20x-usb-power-supply",
  546. .of_compatible = "x-powers,axp202-usb-power-supply",
  547. .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources),
  548. .resources = axp20x_usb_power_supply_resources,
  549. },
  550. };
  551. static const struct mfd_cell axp221_cells[] = {
  552. {
  553. .name = "axp221-pek",
  554. .num_resources = ARRAY_SIZE(axp22x_pek_resources),
  555. .resources = axp22x_pek_resources,
  556. }, {
  557. .name = "axp20x-regulator",
  558. }, {
  559. .name = "axp22x-adc",
  560. .of_compatible = "x-powers,axp221-adc",
  561. }, {
  562. .name = "axp20x-ac-power-supply",
  563. .of_compatible = "x-powers,axp221-ac-power-supply",
  564. .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
  565. .resources = axp20x_ac_power_supply_resources,
  566. }, {
  567. .name = "axp20x-battery-power-supply",
  568. .of_compatible = "x-powers,axp221-battery-power-supply",
  569. }, {
  570. .name = "axp20x-usb-power-supply",
  571. .of_compatible = "x-powers,axp221-usb-power-supply",
  572. .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
  573. .resources = axp22x_usb_power_supply_resources,
  574. },
  575. };
  576. static const struct mfd_cell axp223_cells[] = {
  577. {
  578. .name = "axp221-pek",
  579. .num_resources = ARRAY_SIZE(axp22x_pek_resources),
  580. .resources = axp22x_pek_resources,
  581. }, {
  582. .name = "axp22x-adc",
  583. .of_compatible = "x-powers,axp221-adc",
  584. }, {
  585. .name = "axp20x-battery-power-supply",
  586. .of_compatible = "x-powers,axp221-battery-power-supply",
  587. }, {
  588. .name = "axp20x-regulator",
  589. }, {
  590. .name = "axp20x-ac-power-supply",
  591. .of_compatible = "x-powers,axp221-ac-power-supply",
  592. .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
  593. .resources = axp20x_ac_power_supply_resources,
  594. }, {
  595. .name = "axp20x-usb-power-supply",
  596. .of_compatible = "x-powers,axp223-usb-power-supply",
  597. .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
  598. .resources = axp22x_usb_power_supply_resources,
  599. },
  600. };
  601. static const struct mfd_cell axp152_cells[] = {
  602. {
  603. .name = "axp20x-pek",
  604. .num_resources = ARRAY_SIZE(axp152_pek_resources),
  605. .resources = axp152_pek_resources,
  606. },
  607. };
  608. static const struct resource axp288_adc_resources[] = {
  609. DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
  610. };
  611. static const struct resource axp288_extcon_resources[] = {
  612. DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL),
  613. DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE),
  614. DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG),
  615. DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG),
  616. };
  617. static const struct resource axp288_charger_resources[] = {
  618. DEFINE_RES_IRQ(AXP288_IRQ_OV),
  619. DEFINE_RES_IRQ(AXP288_IRQ_DONE),
  620. DEFINE_RES_IRQ(AXP288_IRQ_CHARGING),
  621. DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT),
  622. DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER),
  623. DEFINE_RES_IRQ(AXP288_IRQ_QCBTU),
  624. DEFINE_RES_IRQ(AXP288_IRQ_CBTU),
  625. DEFINE_RES_IRQ(AXP288_IRQ_QCBTO),
  626. DEFINE_RES_IRQ(AXP288_IRQ_CBTO),
  627. };
  628. static const struct mfd_cell axp288_cells[] = {
  629. {
  630. .name = "axp288_adc",
  631. .num_resources = ARRAY_SIZE(axp288_adc_resources),
  632. .resources = axp288_adc_resources,
  633. }, {
  634. .name = "axp288_extcon",
  635. .num_resources = ARRAY_SIZE(axp288_extcon_resources),
  636. .resources = axp288_extcon_resources,
  637. }, {
  638. .name = "axp288_charger",
  639. .num_resources = ARRAY_SIZE(axp288_charger_resources),
  640. .resources = axp288_charger_resources,
  641. }, {
  642. .name = "axp288_fuel_gauge",
  643. .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
  644. .resources = axp288_fuel_gauge_resources,
  645. }, {
  646. .name = "axp221-pek",
  647. .num_resources = ARRAY_SIZE(axp288_power_button_resources),
  648. .resources = axp288_power_button_resources,
  649. }, {
  650. .name = "axp288_pmic_acpi",
  651. },
  652. };
  653. static const struct mfd_cell axp803_cells[] = {
  654. {
  655. .name = "axp221-pek",
  656. .num_resources = ARRAY_SIZE(axp803_pek_resources),
  657. .resources = axp803_pek_resources,
  658. }, {
  659. .name = "axp20x-gpio",
  660. .of_compatible = "x-powers,axp813-gpio",
  661. }, {
  662. .name = "axp813-adc",
  663. .of_compatible = "x-powers,axp813-adc",
  664. }, {
  665. .name = "axp20x-battery-power-supply",
  666. .of_compatible = "x-powers,axp813-battery-power-supply",
  667. }, {
  668. .name = "axp20x-ac-power-supply",
  669. .of_compatible = "x-powers,axp813-ac-power-supply",
  670. .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
  671. .resources = axp20x_ac_power_supply_resources,
  672. },
  673. { .name = "axp20x-regulator" },
  674. };
  675. static const struct mfd_cell axp806_self_working_cells[] = {
  676. {
  677. .name = "axp221-pek",
  678. .num_resources = ARRAY_SIZE(axp806_pek_resources),
  679. .resources = axp806_pek_resources,
  680. },
  681. { .name = "axp20x-regulator" },
  682. };
  683. static const struct mfd_cell axp806_cells[] = {
  684. {
  685. .id = 2,
  686. .name = "axp20x-regulator",
  687. },
  688. };
  689. static const struct mfd_cell axp809_cells[] = {
  690. {
  691. .name = "axp221-pek",
  692. .num_resources = ARRAY_SIZE(axp809_pek_resources),
  693. .resources = axp809_pek_resources,
  694. }, {
  695. .id = 1,
  696. .name = "axp20x-regulator",
  697. },
  698. };
  699. static const struct mfd_cell axp813_cells[] = {
  700. {
  701. .name = "axp221-pek",
  702. .num_resources = ARRAY_SIZE(axp803_pek_resources),
  703. .resources = axp803_pek_resources,
  704. }, {
  705. .name = "axp20x-regulator",
  706. }, {
  707. .name = "axp20x-gpio",
  708. .of_compatible = "x-powers,axp813-gpio",
  709. }, {
  710. .name = "axp813-adc",
  711. .of_compatible = "x-powers,axp813-adc",
  712. }, {
  713. .name = "axp20x-battery-power-supply",
  714. .of_compatible = "x-powers,axp813-battery-power-supply",
  715. }, {
  716. .name = "axp20x-ac-power-supply",
  717. .of_compatible = "x-powers,axp813-ac-power-supply",
  718. .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
  719. .resources = axp20x_ac_power_supply_resources,
  720. },
  721. };
  722. static struct axp20x_dev *axp20x_pm_power_off;
  723. static void axp20x_power_off(void)
  724. {
  725. if (axp20x_pm_power_off->variant == AXP288_ID)
  726. return;
  727. regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL,
  728. AXP20X_OFF);
  729. /* Give capacitors etc. time to drain to avoid kernel panic msg. */
  730. msleep(500);
  731. }
  732. int axp20x_match_device(struct axp20x_dev *axp20x)
  733. {
  734. struct device *dev = axp20x->dev;
  735. const struct acpi_device_id *acpi_id;
  736. const struct of_device_id *of_id;
  737. if (dev->of_node) {
  738. of_id = of_match_device(dev->driver->of_match_table, dev);
  739. if (!of_id) {
  740. dev_err(dev, "Unable to match OF ID\n");
  741. return -ENODEV;
  742. }
  743. axp20x->variant = (long)of_id->data;
  744. } else {
  745. acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
  746. if (!acpi_id || !acpi_id->driver_data) {
  747. dev_err(dev, "Unable to match ACPI ID and data\n");
  748. return -ENODEV;
  749. }
  750. axp20x->variant = (long)acpi_id->driver_data;
  751. }
  752. switch (axp20x->variant) {
  753. case AXP152_ID:
  754. axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
  755. axp20x->cells = axp152_cells;
  756. axp20x->regmap_cfg = &axp152_regmap_config;
  757. axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
  758. break;
  759. case AXP202_ID:
  760. case AXP209_ID:
  761. axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
  762. axp20x->cells = axp20x_cells;
  763. axp20x->regmap_cfg = &axp20x_regmap_config;
  764. axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
  765. break;
  766. case AXP221_ID:
  767. axp20x->nr_cells = ARRAY_SIZE(axp221_cells);
  768. axp20x->cells = axp221_cells;
  769. axp20x->regmap_cfg = &axp22x_regmap_config;
  770. axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
  771. break;
  772. case AXP223_ID:
  773. axp20x->nr_cells = ARRAY_SIZE(axp223_cells);
  774. axp20x->cells = axp223_cells;
  775. axp20x->regmap_cfg = &axp22x_regmap_config;
  776. axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
  777. break;
  778. case AXP288_ID:
  779. axp20x->cells = axp288_cells;
  780. axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
  781. axp20x->regmap_cfg = &axp288_regmap_config;
  782. axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
  783. axp20x->irq_flags = IRQF_TRIGGER_LOW;
  784. break;
  785. case AXP803_ID:
  786. axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
  787. axp20x->cells = axp803_cells;
  788. axp20x->regmap_cfg = &axp288_regmap_config;
  789. axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
  790. break;
  791. case AXP806_ID:
  792. if (of_property_read_bool(axp20x->dev->of_node,
  793. "x-powers,self-working-mode")) {
  794. axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells);
  795. axp20x->cells = axp806_self_working_cells;
  796. } else {
  797. axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
  798. axp20x->cells = axp806_cells;
  799. }
  800. axp20x->regmap_cfg = &axp806_regmap_config;
  801. axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
  802. break;
  803. case AXP809_ID:
  804. axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
  805. axp20x->cells = axp809_cells;
  806. axp20x->regmap_cfg = &axp22x_regmap_config;
  807. axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
  808. break;
  809. case AXP813_ID:
  810. axp20x->nr_cells = ARRAY_SIZE(axp813_cells);
  811. axp20x->cells = axp813_cells;
  812. axp20x->regmap_cfg = &axp288_regmap_config;
  813. /*
  814. * The IRQ table given in the datasheet is incorrect.
  815. * In IRQ enable/status registers 1, there are separate
  816. * IRQs for ACIN and VBUS, instead of bits [7:5] being
  817. * the same as bits [4:2]. So it shares the same IRQs
  818. * as the AXP803, rather than the AXP288.
  819. */
  820. axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
  821. break;
  822. default:
  823. dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
  824. return -EINVAL;
  825. }
  826. dev_info(dev, "AXP20x variant %s found\n",
  827. axp20x_model_names[axp20x->variant]);
  828. return 0;
  829. }
  830. EXPORT_SYMBOL(axp20x_match_device);
  831. int axp20x_device_probe(struct axp20x_dev *axp20x)
  832. {
  833. int ret;
  834. /*
  835. * The AXP806 supports either master/standalone or slave mode.
  836. * Slave mode allows sharing the serial bus, even with multiple
  837. * AXP806 which all have the same hardware address.
  838. *
  839. * This is done with extra "serial interface address extension",
  840. * or AXP806_BUS_ADDR_EXT, and "register address extension", or
  841. * AXP806_REG_ADDR_EXT, registers. The former is read-only, with
  842. * 1 bit customizable at the factory, and 1 bit depending on the
  843. * state of an external pin. The latter is writable. The device
  844. * will only respond to operations to its other registers when
  845. * the these device addressing bits (in the upper 4 bits of the
  846. * registers) match.
  847. *
  848. * By default we support an AXP806 chained to an AXP809 in slave
  849. * mode. Boards which use an AXP806 in master mode can set the
  850. * property "x-powers,master-mode" to override the default.
  851. */
  852. if (axp20x->variant == AXP806_ID) {
  853. if (of_property_read_bool(axp20x->dev->of_node,
  854. "x-powers,master-mode") ||
  855. of_property_read_bool(axp20x->dev->of_node,
  856. "x-powers,self-working-mode"))
  857. regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
  858. AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE);
  859. else
  860. regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
  861. AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE);
  862. }
  863. ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
  864. IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags,
  865. -1, axp20x->regmap_irq_chip, &axp20x->regmap_irqc);
  866. if (ret) {
  867. dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret);
  868. return ret;
  869. }
  870. ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,
  871. axp20x->nr_cells, NULL, 0, NULL);
  872. if (ret) {
  873. dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
  874. regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
  875. return ret;
  876. }
  877. if (!pm_power_off) {
  878. axp20x_pm_power_off = axp20x;
  879. pm_power_off = axp20x_power_off;
  880. }
  881. dev_info(axp20x->dev, "AXP20X driver loaded\n");
  882. return 0;
  883. }
  884. EXPORT_SYMBOL(axp20x_device_probe);
  885. int axp20x_device_remove(struct axp20x_dev *axp20x)
  886. {
  887. if (axp20x == axp20x_pm_power_off) {
  888. axp20x_pm_power_off = NULL;
  889. pm_power_off = NULL;
  890. }
  891. mfd_remove_devices(axp20x->dev);
  892. regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
  893. return 0;
  894. }
  895. EXPORT_SYMBOL(axp20x_device_remove);
  896. MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
  897. MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
  898. MODULE_LICENSE("GPL");