altera-a10sr.c 4.1 KB

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  1. /*
  2. * Altera Arria10 DevKit System Resource MFD Driver
  3. *
  4. * Author: Thor Thayer <tthayer@opensource.altera.com>
  5. *
  6. * Copyright Intel Corporation (C) 2014-2016. All Rights Reserved
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms and conditions of the GNU General Public License,
  10. * version 2, as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program. If not, see <http://www.gnu.org/licenses/>.
  19. *
  20. * SPI access for Altera Arria10 MAX5 System Resource Chip
  21. *
  22. * Adapted from DA9052
  23. */
  24. #include <linux/mfd/altera-a10sr.h>
  25. #include <linux/mfd/core.h>
  26. #include <linux/init.h>
  27. #include <linux/of.h>
  28. #include <linux/spi/spi.h>
  29. static const struct mfd_cell altr_a10sr_subdev_info[] = {
  30. {
  31. .name = "altr_a10sr_gpio",
  32. .of_compatible = "altr,a10sr-gpio",
  33. },
  34. {
  35. .name = "altr_a10sr_reset",
  36. .of_compatible = "altr,a10sr-reset",
  37. },
  38. };
  39. static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)
  40. {
  41. switch (reg) {
  42. case ALTR_A10SR_VERSION_READ:
  43. case ALTR_A10SR_LED_REG:
  44. case ALTR_A10SR_PBDSW_REG:
  45. case ALTR_A10SR_PBDSW_IRQ_REG:
  46. case ALTR_A10SR_PWR_GOOD1_REG:
  47. case ALTR_A10SR_PWR_GOOD2_REG:
  48. case ALTR_A10SR_PWR_GOOD3_REG:
  49. case ALTR_A10SR_FMCAB_REG:
  50. case ALTR_A10SR_HPS_RST_REG:
  51. case ALTR_A10SR_USB_QSPI_REG:
  52. case ALTR_A10SR_SFPA_REG:
  53. case ALTR_A10SR_SFPB_REG:
  54. case ALTR_A10SR_I2C_M_REG:
  55. case ALTR_A10SR_WARM_RST_REG:
  56. case ALTR_A10SR_WR_KEY_REG:
  57. case ALTR_A10SR_PMBUS_REG:
  58. return true;
  59. default:
  60. return false;
  61. }
  62. }
  63. static bool altr_a10sr_reg_writeable(struct device *dev, unsigned int reg)
  64. {
  65. switch (reg) {
  66. case ALTR_A10SR_LED_REG:
  67. case ALTR_A10SR_PBDSW_IRQ_REG:
  68. case ALTR_A10SR_FMCAB_REG:
  69. case ALTR_A10SR_HPS_RST_REG:
  70. case ALTR_A10SR_USB_QSPI_REG:
  71. case ALTR_A10SR_SFPA_REG:
  72. case ALTR_A10SR_SFPB_REG:
  73. case ALTR_A10SR_WARM_RST_REG:
  74. case ALTR_A10SR_WR_KEY_REG:
  75. case ALTR_A10SR_PMBUS_REG:
  76. return true;
  77. default:
  78. return false;
  79. }
  80. }
  81. static bool altr_a10sr_reg_volatile(struct device *dev, unsigned int reg)
  82. {
  83. switch (reg) {
  84. case ALTR_A10SR_PBDSW_REG:
  85. case ALTR_A10SR_PBDSW_IRQ_REG:
  86. case ALTR_A10SR_PWR_GOOD1_REG:
  87. case ALTR_A10SR_PWR_GOOD2_REG:
  88. case ALTR_A10SR_PWR_GOOD3_REG:
  89. case ALTR_A10SR_HPS_RST_REG:
  90. case ALTR_A10SR_I2C_M_REG:
  91. case ALTR_A10SR_WARM_RST_REG:
  92. case ALTR_A10SR_WR_KEY_REG:
  93. case ALTR_A10SR_PMBUS_REG:
  94. return true;
  95. default:
  96. return false;
  97. }
  98. }
  99. static const struct regmap_config altr_a10sr_regmap_config = {
  100. .reg_bits = 8,
  101. .val_bits = 8,
  102. .cache_type = REGCACHE_NONE,
  103. .use_single_rw = true,
  104. .read_flag_mask = 1,
  105. .write_flag_mask = 0,
  106. .max_register = ALTR_A10SR_WR_KEY_REG,
  107. .readable_reg = altr_a10sr_reg_readable,
  108. .writeable_reg = altr_a10sr_reg_writeable,
  109. .volatile_reg = altr_a10sr_reg_volatile,
  110. };
  111. static int altr_a10sr_spi_probe(struct spi_device *spi)
  112. {
  113. int ret;
  114. struct altr_a10sr *a10sr;
  115. a10sr = devm_kzalloc(&spi->dev, sizeof(*a10sr),
  116. GFP_KERNEL);
  117. if (!a10sr)
  118. return -ENOMEM;
  119. spi->mode = SPI_MODE_3;
  120. spi->bits_per_word = 8;
  121. spi_setup(spi);
  122. a10sr->dev = &spi->dev;
  123. spi_set_drvdata(spi, a10sr);
  124. a10sr->regmap = devm_regmap_init_spi(spi, &altr_a10sr_regmap_config);
  125. if (IS_ERR(a10sr->regmap)) {
  126. ret = PTR_ERR(a10sr->regmap);
  127. dev_err(&spi->dev, "Failed to allocate register map: %d\n",
  128. ret);
  129. return ret;
  130. }
  131. ret = devm_mfd_add_devices(a10sr->dev, PLATFORM_DEVID_AUTO,
  132. altr_a10sr_subdev_info,
  133. ARRAY_SIZE(altr_a10sr_subdev_info),
  134. NULL, 0, NULL);
  135. if (ret)
  136. dev_err(a10sr->dev, "Failed to register sub-devices: %d\n",
  137. ret);
  138. return ret;
  139. }
  140. static const struct of_device_id altr_a10sr_spi_of_match[] = {
  141. { .compatible = "altr,a10sr" },
  142. { },
  143. };
  144. static struct spi_driver altr_a10sr_spi_driver = {
  145. .probe = altr_a10sr_spi_probe,
  146. .driver = {
  147. .name = "altr_a10sr",
  148. .of_match_table = of_match_ptr(altr_a10sr_spi_of_match),
  149. },
  150. };
  151. builtin_driver(altr_a10sr_spi_driver, spi_register_driver)