pvrusb2-encoder.c 14 KB

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  1. /*
  2. *
  3. *
  4. * Copyright (C) 2005 Mike Isely <isely@pobox.com>
  5. * Copyright (C) 2004 Aurelien Alleaume <slts@free.fr>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. */
  17. #include <linux/device.h> // for linux/firmware.h
  18. #include <linux/firmware.h>
  19. #include "pvrusb2-util.h"
  20. #include "pvrusb2-encoder.h"
  21. #include "pvrusb2-hdw-internal.h"
  22. #include "pvrusb2-debug.h"
  23. #include "pvrusb2-fx2-cmd.h"
  24. /* Firmware mailbox flags - definitions found from ivtv */
  25. #define IVTV_MBOX_FIRMWARE_DONE 0x00000004
  26. #define IVTV_MBOX_DRIVER_DONE 0x00000002
  27. #define IVTV_MBOX_DRIVER_BUSY 0x00000001
  28. #define MBOX_BASE 0x44
  29. static int pvr2_encoder_write_words(struct pvr2_hdw *hdw,
  30. unsigned int offs,
  31. const u32 *data, unsigned int dlen)
  32. {
  33. unsigned int idx,addr;
  34. unsigned int bAddr;
  35. int ret;
  36. unsigned int chunkCnt;
  37. /*
  38. Format: First byte must be 0x01. Remaining 32 bit words are
  39. spread out into chunks of 7 bytes each, with the first 4 bytes
  40. being the data word (little endian), and the next 3 bytes
  41. being the address where that data word is to be written (big
  42. endian). Repeat request for additional words, with offset
  43. adjusted accordingly.
  44. */
  45. while (dlen) {
  46. chunkCnt = 8;
  47. if (chunkCnt > dlen) chunkCnt = dlen;
  48. memset(hdw->cmd_buffer,0,sizeof(hdw->cmd_buffer));
  49. bAddr = 0;
  50. hdw->cmd_buffer[bAddr++] = FX2CMD_MEM_WRITE_DWORD;
  51. for (idx = 0; idx < chunkCnt; idx++) {
  52. addr = idx + offs;
  53. hdw->cmd_buffer[bAddr+6] = (addr & 0xffu);
  54. hdw->cmd_buffer[bAddr+5] = ((addr>>8) & 0xffu);
  55. hdw->cmd_buffer[bAddr+4] = ((addr>>16) & 0xffu);
  56. PVR2_DECOMPOSE_LE(hdw->cmd_buffer, bAddr,data[idx]);
  57. bAddr += 7;
  58. }
  59. ret = pvr2_send_request(hdw,
  60. hdw->cmd_buffer,1+(chunkCnt*7),
  61. NULL,0);
  62. if (ret) return ret;
  63. data += chunkCnt;
  64. dlen -= chunkCnt;
  65. offs += chunkCnt;
  66. }
  67. return 0;
  68. }
  69. static int pvr2_encoder_read_words(struct pvr2_hdw *hdw,
  70. unsigned int offs,
  71. u32 *data, unsigned int dlen)
  72. {
  73. unsigned int idx;
  74. int ret;
  75. unsigned int chunkCnt;
  76. /*
  77. Format: First byte must be 0x02 (status check) or 0x28 (read
  78. back block of 32 bit words). Next 6 bytes must be zero,
  79. followed by a single byte of MBOX_BASE+offset for portion to
  80. be read. Returned data is packed set of 32 bits words that
  81. were read.
  82. */
  83. while (dlen) {
  84. chunkCnt = 16;
  85. if (chunkCnt > dlen) chunkCnt = dlen;
  86. if (chunkCnt < 16) chunkCnt = 1;
  87. hdw->cmd_buffer[0] =
  88. ((chunkCnt == 1) ?
  89. FX2CMD_MEM_READ_DWORD : FX2CMD_MEM_READ_64BYTES);
  90. hdw->cmd_buffer[1] = 0;
  91. hdw->cmd_buffer[2] = 0;
  92. hdw->cmd_buffer[3] = 0;
  93. hdw->cmd_buffer[4] = 0;
  94. hdw->cmd_buffer[5] = ((offs>>16) & 0xffu);
  95. hdw->cmd_buffer[6] = ((offs>>8) & 0xffu);
  96. hdw->cmd_buffer[7] = (offs & 0xffu);
  97. ret = pvr2_send_request(hdw,
  98. hdw->cmd_buffer,8,
  99. hdw->cmd_buffer,
  100. (chunkCnt == 1 ? 4 : 16 * 4));
  101. if (ret) return ret;
  102. for (idx = 0; idx < chunkCnt; idx++) {
  103. data[idx] = PVR2_COMPOSE_LE(hdw->cmd_buffer,idx*4);
  104. }
  105. data += chunkCnt;
  106. dlen -= chunkCnt;
  107. offs += chunkCnt;
  108. }
  109. return 0;
  110. }
  111. /* This prototype is set up to be compatible with the
  112. cx2341x_mbox_func prototype in cx2341x.h, which should be in
  113. kernels 2.6.18 or later. We do this so that we can enable
  114. cx2341x.ko to write to our encoder (by handing it a pointer to this
  115. function). For earlier kernels this doesn't really matter. */
  116. static int pvr2_encoder_cmd(void *ctxt,
  117. u32 cmd,
  118. int arg_cnt_send,
  119. int arg_cnt_recv,
  120. u32 *argp)
  121. {
  122. unsigned int poll_count;
  123. unsigned int try_count = 0;
  124. int retry_flag;
  125. int ret = 0;
  126. unsigned int idx;
  127. /* These sizes look to be limited by the FX2 firmware implementation */
  128. u32 wrData[16];
  129. u32 rdData[16];
  130. struct pvr2_hdw *hdw = (struct pvr2_hdw *)ctxt;
  131. /*
  132. The encoder seems to speak entirely using blocks 32 bit words.
  133. In ivtv driver terms, this is a mailbox at MBOX_BASE which we
  134. populate with data and watch what the hardware does with it.
  135. The first word is a set of flags used to control the
  136. transaction, the second word is the command to execute, the
  137. third byte is zero (ivtv driver suggests that this is some
  138. kind of return value), and the fourth byte is a specified
  139. timeout (windows driver always uses 0x00060000 except for one
  140. case when it is zero). All successive words are the argument
  141. words for the command.
  142. First, write out the entire set of words, with the first word
  143. being zero.
  144. Next, write out just the first word again, but set it to
  145. IVTV_MBOX_DRIVER_DONE | IVTV_DRIVER_BUSY this time (which
  146. probably means "go").
  147. Next, read back the return count words. Check the first word,
  148. which should have IVTV_MBOX_FIRMWARE_DONE set. If however
  149. that bit is not set, then the command isn't done so repeat the
  150. read until it is set.
  151. Finally, write out just the first word again, but set it to
  152. 0x0 this time (which probably means "idle").
  153. */
  154. if (arg_cnt_send > (ARRAY_SIZE(wrData) - 4)) {
  155. pvr2_trace(
  156. PVR2_TRACE_ERROR_LEGS,
  157. "Failed to write cx23416 command - too many input arguments (was given %u limit %lu)",
  158. arg_cnt_send, (long unsigned) ARRAY_SIZE(wrData) - 4);
  159. return -EINVAL;
  160. }
  161. if (arg_cnt_recv > (ARRAY_SIZE(rdData) - 4)) {
  162. pvr2_trace(
  163. PVR2_TRACE_ERROR_LEGS,
  164. "Failed to write cx23416 command - too many return arguments (was given %u limit %lu)",
  165. arg_cnt_recv, (long unsigned) ARRAY_SIZE(rdData) - 4);
  166. return -EINVAL;
  167. }
  168. LOCK_TAKE(hdw->ctl_lock); while (1) {
  169. if (!hdw->state_encoder_ok) {
  170. ret = -EIO;
  171. break;
  172. }
  173. retry_flag = 0;
  174. try_count++;
  175. ret = 0;
  176. wrData[0] = 0;
  177. wrData[1] = cmd;
  178. wrData[2] = 0;
  179. wrData[3] = 0x00060000;
  180. for (idx = 0; idx < arg_cnt_send; idx++) {
  181. wrData[idx+4] = argp[idx];
  182. }
  183. for (; idx < ARRAY_SIZE(wrData) - 4; idx++) {
  184. wrData[idx+4] = 0;
  185. }
  186. ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,idx);
  187. if (ret) break;
  188. wrData[0] = IVTV_MBOX_DRIVER_DONE|IVTV_MBOX_DRIVER_BUSY;
  189. ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,1);
  190. if (ret) break;
  191. poll_count = 0;
  192. while (1) {
  193. poll_count++;
  194. ret = pvr2_encoder_read_words(hdw,MBOX_BASE,rdData,
  195. arg_cnt_recv+4);
  196. if (ret) {
  197. break;
  198. }
  199. if (rdData[0] & IVTV_MBOX_FIRMWARE_DONE) {
  200. break;
  201. }
  202. if (rdData[0] && (poll_count < 1000)) continue;
  203. if (!rdData[0]) {
  204. retry_flag = !0;
  205. pvr2_trace(
  206. PVR2_TRACE_ERROR_LEGS,
  207. "Encoder timed out waiting for us; arranging to retry");
  208. } else {
  209. pvr2_trace(
  210. PVR2_TRACE_ERROR_LEGS,
  211. "***WARNING*** device's encoder appears to be stuck (status=0x%08x)",
  212. rdData[0]);
  213. }
  214. pvr2_trace(
  215. PVR2_TRACE_ERROR_LEGS,
  216. "Encoder command: 0x%02x",cmd);
  217. for (idx = 4; idx < arg_cnt_send; idx++) {
  218. pvr2_trace(
  219. PVR2_TRACE_ERROR_LEGS,
  220. "Encoder arg%d: 0x%08x",
  221. idx-3,wrData[idx]);
  222. }
  223. ret = -EBUSY;
  224. break;
  225. }
  226. if (retry_flag) {
  227. if (try_count < 20) continue;
  228. pvr2_trace(
  229. PVR2_TRACE_ERROR_LEGS,
  230. "Too many retries...");
  231. ret = -EBUSY;
  232. }
  233. if (ret) {
  234. del_timer_sync(&hdw->encoder_run_timer);
  235. hdw->state_encoder_ok = 0;
  236. pvr2_trace(PVR2_TRACE_STBITS,
  237. "State bit %s <-- %s",
  238. "state_encoder_ok",
  239. (hdw->state_encoder_ok ? "true" : "false"));
  240. if (hdw->state_encoder_runok) {
  241. hdw->state_encoder_runok = 0;
  242. pvr2_trace(PVR2_TRACE_STBITS,
  243. "State bit %s <-- %s",
  244. "state_encoder_runok",
  245. (hdw->state_encoder_runok ?
  246. "true" : "false"));
  247. }
  248. pvr2_trace(
  249. PVR2_TRACE_ERROR_LEGS,
  250. "Giving up on command. This is normally recovered via a firmware reload and re-initialization; concern is only warranted if this happens repeatedly and rapidly.");
  251. break;
  252. }
  253. wrData[0] = 0x7;
  254. for (idx = 0; idx < arg_cnt_recv; idx++) {
  255. argp[idx] = rdData[idx+4];
  256. }
  257. wrData[0] = 0x0;
  258. ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,1);
  259. break;
  260. }; LOCK_GIVE(hdw->ctl_lock);
  261. return ret;
  262. }
  263. static int pvr2_encoder_vcmd(struct pvr2_hdw *hdw, int cmd,
  264. int args, ...)
  265. {
  266. va_list vl;
  267. unsigned int idx;
  268. u32 data[12];
  269. if (args > ARRAY_SIZE(data)) {
  270. pvr2_trace(
  271. PVR2_TRACE_ERROR_LEGS,
  272. "Failed to write cx23416 command - too many arguments (was given %u limit %lu)",
  273. args, (long unsigned) ARRAY_SIZE(data));
  274. return -EINVAL;
  275. }
  276. va_start(vl, args);
  277. for (idx = 0; idx < args; idx++) {
  278. data[idx] = va_arg(vl, u32);
  279. }
  280. va_end(vl);
  281. return pvr2_encoder_cmd(hdw,cmd,args,0,data);
  282. }
  283. /* This implements some extra setup for the encoder that seems to be
  284. specific to the PVR USB2 hardware. */
  285. static int pvr2_encoder_prep_config(struct pvr2_hdw *hdw)
  286. {
  287. int ret = 0;
  288. int encMisc3Arg = 0;
  289. #if 0
  290. /* This inexplicable bit happens in the Hauppauge windows
  291. driver (for both 24xxx and 29xxx devices). However I
  292. currently see no difference in behavior with or without
  293. this stuff. Leave this here as a note of its existence,
  294. but don't use it. */
  295. LOCK_TAKE(hdw->ctl_lock); do {
  296. u32 dat[1];
  297. dat[0] = 0x80000640;
  298. pvr2_encoder_write_words(hdw,0x01fe,dat,1);
  299. pvr2_encoder_write_words(hdw,0x023e,dat,1);
  300. } while(0); LOCK_GIVE(hdw->ctl_lock);
  301. #endif
  302. /* Mike Isely <isely@pobox.com> 26-Jan-2006 The windows driver
  303. sends the following list of ENC_MISC commands (for both
  304. 24xxx and 29xxx devices). Meanings are not entirely clear,
  305. however without the ENC_MISC(3,1) command then we risk
  306. random perpetual video corruption whenever the video input
  307. breaks up for a moment (like when switching channels). */
  308. #if 0
  309. /* This ENC_MISC(5,0) command seems to hurt 29xxx sync
  310. performance on channel changes, but is not a problem on
  311. 24xxx devices. */
  312. ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 5,0,0,0);
  313. #endif
  314. /* This ENC_MISC(3,encMisc3Arg) command is critical - without
  315. it there will eventually be video corruption. Also, the
  316. saa7115 case is strange - the Windows driver is passing 1
  317. regardless of device type but if we have 1 for saa7115
  318. devices the video turns sluggish. */
  319. if (hdw->hdw_desc->flag_has_cx25840) {
  320. encMisc3Arg = 1;
  321. } else {
  322. encMisc3Arg = 0;
  323. }
  324. ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 3,
  325. encMisc3Arg,0,0);
  326. ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 8,0,0,0);
  327. #if 0
  328. /* This ENC_MISC(4,1) command is poisonous, so it is commented
  329. out. But I'm leaving it here anyway to document its
  330. existence in the Windows driver. The effect of this
  331. command is that apps displaying the stream become sluggish
  332. with stuttering video. */
  333. ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 4,1,0,0);
  334. #endif
  335. ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 0,3,0,0);
  336. ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4,15,0,0,0);
  337. /* prevent the PTSs from slowly drifting away in the generated
  338. MPEG stream */
  339. ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC, 2, 4, 1);
  340. return ret;
  341. }
  342. int pvr2_encoder_adjust(struct pvr2_hdw *hdw)
  343. {
  344. int ret;
  345. ret = cx2341x_update(hdw,pvr2_encoder_cmd,
  346. (hdw->enc_cur_valid ? &hdw->enc_cur_state : NULL),
  347. &hdw->enc_ctl_state);
  348. if (ret) {
  349. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  350. "Error from cx2341x module code=%d",ret);
  351. } else {
  352. hdw->enc_cur_state = hdw->enc_ctl_state;
  353. hdw->enc_cur_valid = !0;
  354. }
  355. return ret;
  356. }
  357. int pvr2_encoder_configure(struct pvr2_hdw *hdw)
  358. {
  359. int ret;
  360. int val;
  361. pvr2_trace(PVR2_TRACE_ENCODER, "pvr2_encoder_configure (cx2341x module)");
  362. hdw->enc_ctl_state.port = CX2341X_PORT_STREAMING;
  363. hdw->enc_ctl_state.width = hdw->res_hor_val;
  364. hdw->enc_ctl_state.height = hdw->res_ver_val;
  365. hdw->enc_ctl_state.is_50hz = ((hdw->std_mask_cur & V4L2_STD_525_60) ?
  366. 0 : 1);
  367. ret = 0;
  368. ret |= pvr2_encoder_prep_config(hdw);
  369. /* saa7115: 0xf0 */
  370. val = 0xf0;
  371. if (hdw->hdw_desc->flag_has_cx25840) {
  372. /* ivtv cx25840: 0x140 */
  373. val = 0x140;
  374. }
  375. if (!ret) ret = pvr2_encoder_vcmd(
  376. hdw,CX2341X_ENC_SET_NUM_VSYNC_LINES, 2,
  377. val, val);
  378. /* setup firmware to notify us about some events (don't know why...) */
  379. if (!ret) ret = pvr2_encoder_vcmd(
  380. hdw,CX2341X_ENC_SET_EVENT_NOTIFICATION, 4,
  381. 0, 0, 0x10000000, 0xffffffff);
  382. if (!ret) ret = pvr2_encoder_vcmd(
  383. hdw,CX2341X_ENC_SET_VBI_LINE, 5,
  384. 0xffffffff,0,0,0,0);
  385. if (ret) {
  386. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  387. "Failed to configure cx23416");
  388. return ret;
  389. }
  390. ret = pvr2_encoder_adjust(hdw);
  391. if (ret) return ret;
  392. ret = pvr2_encoder_vcmd(
  393. hdw, CX2341X_ENC_INITIALIZE_INPUT, 0);
  394. if (ret) {
  395. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  396. "Failed to initialize cx23416 video input");
  397. return ret;
  398. }
  399. return 0;
  400. }
  401. int pvr2_encoder_start(struct pvr2_hdw *hdw)
  402. {
  403. int status;
  404. /* unmask some interrupts */
  405. pvr2_write_register(hdw, 0x0048, 0xbfffffff);
  406. pvr2_encoder_vcmd(hdw,CX2341X_ENC_MUTE_VIDEO,1,
  407. hdw->input_val == PVR2_CVAL_INPUT_RADIO ? 1 : 0);
  408. switch (hdw->active_stream_type) {
  409. case pvr2_config_vbi:
  410. status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
  411. 0x01,0x14);
  412. break;
  413. case pvr2_config_mpeg:
  414. status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
  415. 0,0x13);
  416. break;
  417. default: /* Unhandled cases for now */
  418. status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
  419. 0,0x13);
  420. break;
  421. }
  422. return status;
  423. }
  424. int pvr2_encoder_stop(struct pvr2_hdw *hdw)
  425. {
  426. int status;
  427. /* mask all interrupts */
  428. pvr2_write_register(hdw, 0x0048, 0xffffffff);
  429. switch (hdw->active_stream_type) {
  430. case pvr2_config_vbi:
  431. status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
  432. 0x01,0x01,0x14);
  433. break;
  434. case pvr2_config_mpeg:
  435. status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
  436. 0x01,0,0x13);
  437. break;
  438. default: /* Unhandled cases for now */
  439. status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
  440. 0x01,0,0x13);
  441. break;
  442. }
  443. return status;
  444. }