m5602_ov9650.c 20 KB

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  1. /*
  2. * Driver for the ov9650 sensor
  3. *
  4. * Copyright (C) 2008 Erik Andrén
  5. * Copyright (C) 2007 Ilyes Gouta. Based on the m5603x Linux Driver Project.
  6. * Copyright (C) 2005 m5603x Linux Driver Project <m5602@x3ng.com.br>
  7. *
  8. * Portions of code to USB interface and ALi driver software,
  9. * Copyright (c) 2006 Willem Duinker
  10. * v4l2 interface modeled after the V4L2 driver
  11. * for SN9C10x PC Camera Controllers
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation, version 2.
  16. *
  17. */
  18. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  19. #include "m5602_ov9650.h"
  20. static int ov9650_s_ctrl(struct v4l2_ctrl *ctrl);
  21. static void ov9650_dump_registers(struct sd *sd);
  22. static const unsigned char preinit_ov9650[][3] = {
  23. /* [INITCAM] */
  24. {BRIDGE, M5602_XB_MCU_CLK_DIV, 0x02},
  25. {BRIDGE, M5602_XB_MCU_CLK_CTRL, 0xb0},
  26. {BRIDGE, M5602_XB_SEN_CLK_DIV, 0x00},
  27. {BRIDGE, M5602_XB_SEN_CLK_CTRL, 0xb0},
  28. {BRIDGE, M5602_XB_ADC_CTRL, 0xc0},
  29. {BRIDGE, M5602_XB_SENSOR_CTRL, 0x00},
  30. {BRIDGE, M5602_XB_SENSOR_TYPE, 0x08},
  31. {BRIDGE, M5602_XB_GPIO_DIR, 0x05},
  32. {BRIDGE, M5602_XB_GPIO_DAT, 0x04},
  33. {BRIDGE, M5602_XB_GPIO_EN_H, 0x06},
  34. {BRIDGE, M5602_XB_GPIO_DIR_H, 0x06},
  35. {BRIDGE, M5602_XB_GPIO_DAT_H, 0x00},
  36. {BRIDGE, M5602_XB_GPIO_DAT, 0x00},
  37. {BRIDGE, M5602_XB_I2C_CLK_DIV, 0x0a},
  38. /* Reset chip */
  39. {SENSOR, OV9650_COM7, OV9650_REGISTER_RESET},
  40. /* Enable double clock */
  41. {SENSOR, OV9650_CLKRC, 0x80},
  42. /* Do something out of spec with the power */
  43. {SENSOR, OV9650_OFON, 0x40}
  44. };
  45. static const unsigned char init_ov9650[][3] = {
  46. /* [INITCAM] */
  47. {BRIDGE, M5602_XB_MCU_CLK_DIV, 0x02},
  48. {BRIDGE, M5602_XB_MCU_CLK_CTRL, 0xb0},
  49. {BRIDGE, M5602_XB_SEN_CLK_DIV, 0x00},
  50. {BRIDGE, M5602_XB_SEN_CLK_CTRL, 0xb0},
  51. {BRIDGE, M5602_XB_ADC_CTRL, 0xc0},
  52. {BRIDGE, M5602_XB_SENSOR_CTRL, 0x00},
  53. {BRIDGE, M5602_XB_SENSOR_TYPE, 0x08},
  54. {BRIDGE, M5602_XB_GPIO_DIR, 0x05},
  55. {BRIDGE, M5602_XB_GPIO_DAT, 0x04},
  56. {BRIDGE, M5602_XB_GPIO_EN_H, 0x06},
  57. {BRIDGE, M5602_XB_GPIO_DIR_H, 0x06},
  58. {BRIDGE, M5602_XB_GPIO_DAT_H, 0x00},
  59. {BRIDGE, M5602_XB_GPIO_DAT, 0x00},
  60. {BRIDGE, M5602_XB_I2C_CLK_DIV, 0x0a},
  61. /* Reset chip */
  62. {SENSOR, OV9650_COM7, OV9650_REGISTER_RESET},
  63. /* One extra reset is needed in order to make the sensor behave
  64. properly when resuming from ram, could be a timing issue */
  65. {SENSOR, OV9650_COM7, OV9650_REGISTER_RESET},
  66. /* Enable double clock */
  67. {SENSOR, OV9650_CLKRC, 0x80},
  68. /* Do something out of spec with the power */
  69. {SENSOR, OV9650_OFON, 0x40},
  70. /* Set fast AGC/AEC algorithm with unlimited step size */
  71. {SENSOR, OV9650_COM8, OV9650_FAST_AGC_AEC |
  72. OV9650_AEC_UNLIM_STEP_SIZE},
  73. {SENSOR, OV9650_CHLF, 0x10},
  74. {SENSOR, OV9650_ARBLM, 0xbf},
  75. {SENSOR, OV9650_ACOM38, 0x81},
  76. /* Turn off color matrix coefficient double option */
  77. {SENSOR, OV9650_COM16, 0x00},
  78. /* Enable color matrix for RGB/YUV, Delay Y channel,
  79. set output Y/UV delay to 1 */
  80. {SENSOR, OV9650_COM13, 0x19},
  81. /* Enable digital BLC, Set output mode to U Y V Y */
  82. {SENSOR, OV9650_TSLB, 0x0c},
  83. /* Limit the AGC/AEC stable upper region */
  84. {SENSOR, OV9650_COM24, 0x00},
  85. /* Enable HREF and some out of spec things */
  86. {SENSOR, OV9650_COM12, 0x73},
  87. /* Set all DBLC offset signs to positive and
  88. do some out of spec stuff */
  89. {SENSOR, OV9650_DBLC1, 0xdf},
  90. {SENSOR, OV9650_COM21, 0x06},
  91. {SENSOR, OV9650_RSVD35, 0x91},
  92. /* Necessary, no camera stream without it */
  93. {SENSOR, OV9650_RSVD16, 0x06},
  94. {SENSOR, OV9650_RSVD94, 0x99},
  95. {SENSOR, OV9650_RSVD95, 0x99},
  96. {SENSOR, OV9650_RSVD96, 0x04},
  97. /* Enable full range output */
  98. {SENSOR, OV9650_COM15, 0x0},
  99. /* Enable HREF at optical black, enable ADBLC bias,
  100. enable ADBLC, reset timings at format change */
  101. {SENSOR, OV9650_COM6, 0x4b},
  102. /* Subtract 32 from the B channel bias */
  103. {SENSOR, OV9650_BBIAS, 0xa0},
  104. /* Subtract 32 from the Gb channel bias */
  105. {SENSOR, OV9650_GbBIAS, 0xa0},
  106. /* Do not bypass the analog BLC and to some out of spec stuff */
  107. {SENSOR, OV9650_Gr_COM, 0x00},
  108. /* Subtract 32 from the R channel bias */
  109. {SENSOR, OV9650_RBIAS, 0xa0},
  110. /* Subtract 32 from the R channel bias */
  111. {SENSOR, OV9650_RBIAS, 0x0},
  112. {SENSOR, OV9650_COM26, 0x80},
  113. {SENSOR, OV9650_ACOMA9, 0x98},
  114. /* Set the AGC/AEC stable region upper limit */
  115. {SENSOR, OV9650_AEW, 0x68},
  116. /* Set the AGC/AEC stable region lower limit */
  117. {SENSOR, OV9650_AEB, 0x5c},
  118. /* Set the high and low limit nibbles to 3 */
  119. {SENSOR, OV9650_VPT, 0xc3},
  120. /* Set the Automatic Gain Ceiling (AGC) to 128x,
  121. drop VSYNC at frame drop,
  122. limit exposure timing,
  123. drop frame when the AEC step is larger than the exposure gap */
  124. {SENSOR, OV9650_COM9, 0x6e},
  125. /* Set VSYNC negative, Set RESET to SLHS (slave mode horizontal sync)
  126. and set PWDN to SLVS (slave mode vertical sync) */
  127. {SENSOR, OV9650_COM10, 0x42},
  128. /* Set horizontal column start high to default value */
  129. {SENSOR, OV9650_HSTART, 0x1a}, /* 210 */
  130. /* Set horizontal column end */
  131. {SENSOR, OV9650_HSTOP, 0xbf}, /* 1534 */
  132. /* Complementing register to the two writes above */
  133. {SENSOR, OV9650_HREF, 0xb2},
  134. /* Set vertical row start high bits */
  135. {SENSOR, OV9650_VSTRT, 0x02},
  136. /* Set vertical row end low bits */
  137. {SENSOR, OV9650_VSTOP, 0x7e},
  138. /* Set complementing vertical frame control */
  139. {SENSOR, OV9650_VREF, 0x10},
  140. {SENSOR, OV9650_ADC, 0x04},
  141. {SENSOR, OV9650_HV, 0x40},
  142. /* Enable denoise, and white-pixel erase */
  143. {SENSOR, OV9650_COM22, OV9650_DENOISE_ENABLE |
  144. OV9650_WHITE_PIXEL_ENABLE |
  145. OV9650_WHITE_PIXEL_OPTION},
  146. /* Enable VARIOPIXEL */
  147. {SENSOR, OV9650_COM3, OV9650_VARIOPIXEL},
  148. {SENSOR, OV9650_COM4, OV9650_QVGA_VARIOPIXEL},
  149. /* Put the sensor in soft sleep mode */
  150. {SENSOR, OV9650_COM2, OV9650_SOFT_SLEEP | OV9650_OUTPUT_DRIVE_2X},
  151. };
  152. static const unsigned char res_init_ov9650[][3] = {
  153. {SENSOR, OV9650_COM2, OV9650_OUTPUT_DRIVE_2X},
  154. {BRIDGE, M5602_XB_LINE_OF_FRAME_H, 0x82},
  155. {BRIDGE, M5602_XB_LINE_OF_FRAME_L, 0x00},
  156. {BRIDGE, M5602_XB_PIX_OF_LINE_H, 0x82},
  157. {BRIDGE, M5602_XB_PIX_OF_LINE_L, 0x00},
  158. {BRIDGE, M5602_XB_SIG_INI, 0x01}
  159. };
  160. /* Vertically and horizontally flips the image if matched, needed for machines
  161. where the sensor is mounted upside down */
  162. static
  163. const
  164. struct dmi_system_id ov9650_flip_dmi_table[] = {
  165. {
  166. .ident = "ASUS A6Ja",
  167. .matches = {
  168. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
  169. DMI_MATCH(DMI_PRODUCT_NAME, "A6J")
  170. }
  171. },
  172. {
  173. .ident = "ASUS A6JC",
  174. .matches = {
  175. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
  176. DMI_MATCH(DMI_PRODUCT_NAME, "A6JC")
  177. }
  178. },
  179. {
  180. .ident = "ASUS A6K",
  181. .matches = {
  182. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
  183. DMI_MATCH(DMI_PRODUCT_NAME, "A6K")
  184. }
  185. },
  186. {
  187. .ident = "ASUS A6Kt",
  188. .matches = {
  189. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
  190. DMI_MATCH(DMI_PRODUCT_NAME, "A6Kt")
  191. }
  192. },
  193. {
  194. .ident = "ASUS A6VA",
  195. .matches = {
  196. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
  197. DMI_MATCH(DMI_PRODUCT_NAME, "A6VA")
  198. }
  199. },
  200. {
  201. .ident = "ASUS A6VC",
  202. .matches = {
  203. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
  204. DMI_MATCH(DMI_PRODUCT_NAME, "A6VC")
  205. }
  206. },
  207. {
  208. .ident = "ASUS A6VM",
  209. .matches = {
  210. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
  211. DMI_MATCH(DMI_PRODUCT_NAME, "A6VM")
  212. }
  213. },
  214. {
  215. .ident = "ASUS A7V",
  216. .matches = {
  217. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
  218. DMI_MATCH(DMI_PRODUCT_NAME, "A7V")
  219. }
  220. },
  221. {
  222. .ident = "Alienware Aurora m9700",
  223. .matches = {
  224. DMI_MATCH(DMI_SYS_VENDOR, "alienware"),
  225. DMI_MATCH(DMI_PRODUCT_NAME, "Aurora m9700")
  226. }
  227. },
  228. {}
  229. };
  230. static struct v4l2_pix_format ov9650_modes[] = {
  231. {
  232. 176,
  233. 144,
  234. V4L2_PIX_FMT_SBGGR8,
  235. V4L2_FIELD_NONE,
  236. .sizeimage =
  237. 176 * 144,
  238. .bytesperline = 176,
  239. .colorspace = V4L2_COLORSPACE_SRGB,
  240. .priv = 9
  241. }, {
  242. 320,
  243. 240,
  244. V4L2_PIX_FMT_SBGGR8,
  245. V4L2_FIELD_NONE,
  246. .sizeimage =
  247. 320 * 240,
  248. .bytesperline = 320,
  249. .colorspace = V4L2_COLORSPACE_SRGB,
  250. .priv = 8
  251. }, {
  252. 352,
  253. 288,
  254. V4L2_PIX_FMT_SBGGR8,
  255. V4L2_FIELD_NONE,
  256. .sizeimage =
  257. 352 * 288,
  258. .bytesperline = 352,
  259. .colorspace = V4L2_COLORSPACE_SRGB,
  260. .priv = 9
  261. }, {
  262. 640,
  263. 480,
  264. V4L2_PIX_FMT_SBGGR8,
  265. V4L2_FIELD_NONE,
  266. .sizeimage =
  267. 640 * 480,
  268. .bytesperline = 640,
  269. .colorspace = V4L2_COLORSPACE_SRGB,
  270. .priv = 9
  271. }
  272. };
  273. static const struct v4l2_ctrl_ops ov9650_ctrl_ops = {
  274. .s_ctrl = ov9650_s_ctrl,
  275. };
  276. int ov9650_probe(struct sd *sd)
  277. {
  278. int err = 0;
  279. u8 prod_id = 0, ver_id = 0, i;
  280. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  281. if (force_sensor) {
  282. if (force_sensor == OV9650_SENSOR) {
  283. pr_info("Forcing an %s sensor\n", ov9650.name);
  284. goto sensor_found;
  285. }
  286. /* If we want to force another sensor,
  287. don't try to probe this one */
  288. return -ENODEV;
  289. }
  290. gspca_dbg(gspca_dev, D_PROBE, "Probing for an ov9650 sensor\n");
  291. /* Run the pre-init before probing the sensor */
  292. for (i = 0; i < ARRAY_SIZE(preinit_ov9650) && !err; i++) {
  293. u8 data = preinit_ov9650[i][2];
  294. if (preinit_ov9650[i][0] == SENSOR)
  295. err = m5602_write_sensor(sd,
  296. preinit_ov9650[i][1], &data, 1);
  297. else
  298. err = m5602_write_bridge(sd,
  299. preinit_ov9650[i][1], data);
  300. }
  301. if (err < 0)
  302. return err;
  303. if (m5602_read_sensor(sd, OV9650_PID, &prod_id, 1))
  304. return -ENODEV;
  305. if (m5602_read_sensor(sd, OV9650_VER, &ver_id, 1))
  306. return -ENODEV;
  307. if ((prod_id == 0x96) && (ver_id == 0x52)) {
  308. pr_info("Detected an ov9650 sensor\n");
  309. goto sensor_found;
  310. }
  311. return -ENODEV;
  312. sensor_found:
  313. sd->gspca_dev.cam.cam_mode = ov9650_modes;
  314. sd->gspca_dev.cam.nmodes = ARRAY_SIZE(ov9650_modes);
  315. return 0;
  316. }
  317. int ov9650_init(struct sd *sd)
  318. {
  319. int i, err = 0;
  320. u8 data;
  321. if (dump_sensor)
  322. ov9650_dump_registers(sd);
  323. for (i = 0; i < ARRAY_SIZE(init_ov9650) && !err; i++) {
  324. data = init_ov9650[i][2];
  325. if (init_ov9650[i][0] == SENSOR)
  326. err = m5602_write_sensor(sd, init_ov9650[i][1],
  327. &data, 1);
  328. else
  329. err = m5602_write_bridge(sd, init_ov9650[i][1], data);
  330. }
  331. return 0;
  332. }
  333. int ov9650_init_controls(struct sd *sd)
  334. {
  335. struct v4l2_ctrl_handler *hdl = &sd->gspca_dev.ctrl_handler;
  336. sd->gspca_dev.vdev.ctrl_handler = hdl;
  337. v4l2_ctrl_handler_init(hdl, 9);
  338. sd->auto_white_bal = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops,
  339. V4L2_CID_AUTO_WHITE_BALANCE,
  340. 0, 1, 1, 1);
  341. sd->red_bal = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops,
  342. V4L2_CID_RED_BALANCE, 0, 255, 1,
  343. RED_GAIN_DEFAULT);
  344. sd->blue_bal = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops,
  345. V4L2_CID_BLUE_BALANCE, 0, 255, 1,
  346. BLUE_GAIN_DEFAULT);
  347. sd->autoexpo = v4l2_ctrl_new_std_menu(hdl, &ov9650_ctrl_ops,
  348. V4L2_CID_EXPOSURE_AUTO, 1, 0, V4L2_EXPOSURE_AUTO);
  349. sd->expo = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops, V4L2_CID_EXPOSURE,
  350. 0, 0x1ff, 4, EXPOSURE_DEFAULT);
  351. sd->autogain = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops,
  352. V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
  353. sd->gain = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops, V4L2_CID_GAIN, 0,
  354. 0x3ff, 1, GAIN_DEFAULT);
  355. sd->hflip = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops, V4L2_CID_HFLIP,
  356. 0, 1, 1, 0);
  357. sd->vflip = v4l2_ctrl_new_std(hdl, &ov9650_ctrl_ops, V4L2_CID_VFLIP,
  358. 0, 1, 1, 0);
  359. if (hdl->error) {
  360. pr_err("Could not initialize controls\n");
  361. return hdl->error;
  362. }
  363. v4l2_ctrl_auto_cluster(3, &sd->auto_white_bal, 0, false);
  364. v4l2_ctrl_auto_cluster(2, &sd->autoexpo, 0, false);
  365. v4l2_ctrl_auto_cluster(2, &sd->autogain, 0, false);
  366. v4l2_ctrl_cluster(2, &sd->hflip);
  367. return 0;
  368. }
  369. int ov9650_start(struct sd *sd)
  370. {
  371. u8 data;
  372. int i, err = 0;
  373. struct cam *cam = &sd->gspca_dev.cam;
  374. int width = cam->cam_mode[sd->gspca_dev.curr_mode].width;
  375. int height = cam->cam_mode[sd->gspca_dev.curr_mode].height;
  376. int ver_offs = cam->cam_mode[sd->gspca_dev.curr_mode].priv;
  377. int hor_offs = OV9650_LEFT_OFFSET;
  378. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  379. if ((!dmi_check_system(ov9650_flip_dmi_table) &&
  380. sd->vflip->val) ||
  381. (dmi_check_system(ov9650_flip_dmi_table) &&
  382. !sd->vflip->val))
  383. ver_offs--;
  384. if (width <= 320)
  385. hor_offs /= 2;
  386. /* Synthesize the vsync/hsync setup */
  387. for (i = 0; i < ARRAY_SIZE(res_init_ov9650) && !err; i++) {
  388. if (res_init_ov9650[i][0] == BRIDGE)
  389. err = m5602_write_bridge(sd, res_init_ov9650[i][1],
  390. res_init_ov9650[i][2]);
  391. else if (res_init_ov9650[i][0] == SENSOR) {
  392. data = res_init_ov9650[i][2];
  393. err = m5602_write_sensor(sd,
  394. res_init_ov9650[i][1], &data, 1);
  395. }
  396. }
  397. if (err < 0)
  398. return err;
  399. err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA,
  400. ((ver_offs >> 8) & 0xff));
  401. if (err < 0)
  402. return err;
  403. err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, (ver_offs & 0xff));
  404. if (err < 0)
  405. return err;
  406. err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, 0);
  407. if (err < 0)
  408. return err;
  409. err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, (height >> 8) & 0xff);
  410. if (err < 0)
  411. return err;
  412. err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, (height & 0xff));
  413. if (err < 0)
  414. return err;
  415. for (i = 0; i < 2 && !err; i++)
  416. err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, 0);
  417. if (err < 0)
  418. return err;
  419. err = m5602_write_bridge(sd, M5602_XB_SIG_INI, 0);
  420. if (err < 0)
  421. return err;
  422. err = m5602_write_bridge(sd, M5602_XB_SIG_INI, 2);
  423. if (err < 0)
  424. return err;
  425. err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA,
  426. (hor_offs >> 8) & 0xff);
  427. if (err < 0)
  428. return err;
  429. err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA, hor_offs & 0xff);
  430. if (err < 0)
  431. return err;
  432. err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA,
  433. ((width + hor_offs) >> 8) & 0xff);
  434. if (err < 0)
  435. return err;
  436. err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA,
  437. ((width + hor_offs) & 0xff));
  438. if (err < 0)
  439. return err;
  440. err = m5602_write_bridge(sd, M5602_XB_SIG_INI, 0);
  441. if (err < 0)
  442. return err;
  443. switch (width) {
  444. case 640:
  445. gspca_dbg(gspca_dev, D_CONF, "Configuring camera for VGA mode\n");
  446. data = OV9650_VGA_SELECT | OV9650_RGB_SELECT |
  447. OV9650_RAW_RGB_SELECT;
  448. err = m5602_write_sensor(sd, OV9650_COM7, &data, 1);
  449. break;
  450. case 352:
  451. gspca_dbg(gspca_dev, D_CONF, "Configuring camera for CIF mode\n");
  452. data = OV9650_CIF_SELECT | OV9650_RGB_SELECT |
  453. OV9650_RAW_RGB_SELECT;
  454. err = m5602_write_sensor(sd, OV9650_COM7, &data, 1);
  455. break;
  456. case 320:
  457. gspca_dbg(gspca_dev, D_CONF, "Configuring camera for QVGA mode\n");
  458. data = OV9650_QVGA_SELECT | OV9650_RGB_SELECT |
  459. OV9650_RAW_RGB_SELECT;
  460. err = m5602_write_sensor(sd, OV9650_COM7, &data, 1);
  461. break;
  462. case 176:
  463. gspca_dbg(gspca_dev, D_CONF, "Configuring camera for QCIF mode\n");
  464. data = OV9650_QCIF_SELECT | OV9650_RGB_SELECT |
  465. OV9650_RAW_RGB_SELECT;
  466. err = m5602_write_sensor(sd, OV9650_COM7, &data, 1);
  467. break;
  468. }
  469. return err;
  470. }
  471. int ov9650_stop(struct sd *sd)
  472. {
  473. u8 data = OV9650_SOFT_SLEEP | OV9650_OUTPUT_DRIVE_2X;
  474. return m5602_write_sensor(sd, OV9650_COM2, &data, 1);
  475. }
  476. void ov9650_disconnect(struct sd *sd)
  477. {
  478. ov9650_stop(sd);
  479. sd->sensor = NULL;
  480. }
  481. static int ov9650_set_exposure(struct gspca_dev *gspca_dev, __s32 val)
  482. {
  483. struct sd *sd = (struct sd *) gspca_dev;
  484. u8 i2c_data;
  485. int err;
  486. gspca_dbg(gspca_dev, D_CONF, "Set exposure to %d\n", val);
  487. /* The 6 MSBs */
  488. i2c_data = (val >> 10) & 0x3f;
  489. err = m5602_write_sensor(sd, OV9650_AECHM,
  490. &i2c_data, 1);
  491. if (err < 0)
  492. return err;
  493. /* The 8 middle bits */
  494. i2c_data = (val >> 2) & 0xff;
  495. err = m5602_write_sensor(sd, OV9650_AECH,
  496. &i2c_data, 1);
  497. if (err < 0)
  498. return err;
  499. /* The 2 LSBs */
  500. i2c_data = val & 0x03;
  501. err = m5602_write_sensor(sd, OV9650_COM1, &i2c_data, 1);
  502. return err;
  503. }
  504. static int ov9650_set_gain(struct gspca_dev *gspca_dev, __s32 val)
  505. {
  506. int err;
  507. u8 i2c_data;
  508. struct sd *sd = (struct sd *) gspca_dev;
  509. gspca_dbg(gspca_dev, D_CONF, "Setting gain to %d\n", val);
  510. /* The 2 MSB */
  511. /* Read the OV9650_VREF register first to avoid
  512. corrupting the VREF high and low bits */
  513. err = m5602_read_sensor(sd, OV9650_VREF, &i2c_data, 1);
  514. if (err < 0)
  515. return err;
  516. /* Mask away all uninteresting bits */
  517. i2c_data = ((val & 0x0300) >> 2) |
  518. (i2c_data & 0x3f);
  519. err = m5602_write_sensor(sd, OV9650_VREF, &i2c_data, 1);
  520. if (err < 0)
  521. return err;
  522. /* The 8 LSBs */
  523. i2c_data = val & 0xff;
  524. err = m5602_write_sensor(sd, OV9650_GAIN, &i2c_data, 1);
  525. return err;
  526. }
  527. static int ov9650_set_red_balance(struct gspca_dev *gspca_dev, __s32 val)
  528. {
  529. int err;
  530. u8 i2c_data;
  531. struct sd *sd = (struct sd *) gspca_dev;
  532. gspca_dbg(gspca_dev, D_CONF, "Set red gain to %d\n", val);
  533. i2c_data = val & 0xff;
  534. err = m5602_write_sensor(sd, OV9650_RED, &i2c_data, 1);
  535. return err;
  536. }
  537. static int ov9650_set_blue_balance(struct gspca_dev *gspca_dev, __s32 val)
  538. {
  539. int err;
  540. u8 i2c_data;
  541. struct sd *sd = (struct sd *) gspca_dev;
  542. gspca_dbg(gspca_dev, D_CONF, "Set blue gain to %d\n", val);
  543. i2c_data = val & 0xff;
  544. err = m5602_write_sensor(sd, OV9650_BLUE, &i2c_data, 1);
  545. return err;
  546. }
  547. static int ov9650_set_hvflip(struct gspca_dev *gspca_dev)
  548. {
  549. int err;
  550. u8 i2c_data;
  551. struct sd *sd = (struct sd *) gspca_dev;
  552. int hflip = sd->hflip->val;
  553. int vflip = sd->vflip->val;
  554. gspca_dbg(gspca_dev, D_CONF, "Set hvflip to %d %d\n", hflip, vflip);
  555. if (dmi_check_system(ov9650_flip_dmi_table))
  556. vflip = !vflip;
  557. i2c_data = (hflip << 5) | (vflip << 4);
  558. err = m5602_write_sensor(sd, OV9650_MVFP, &i2c_data, 1);
  559. if (err < 0)
  560. return err;
  561. /* When vflip is toggled we need to readjust the bridge hsync/vsync */
  562. if (gspca_dev->streaming)
  563. err = ov9650_start(sd);
  564. return err;
  565. }
  566. static int ov9650_set_auto_exposure(struct gspca_dev *gspca_dev,
  567. __s32 val)
  568. {
  569. int err;
  570. u8 i2c_data;
  571. struct sd *sd = (struct sd *) gspca_dev;
  572. gspca_dbg(gspca_dev, D_CONF, "Set auto exposure control to %d\n", val);
  573. err = m5602_read_sensor(sd, OV9650_COM8, &i2c_data, 1);
  574. if (err < 0)
  575. return err;
  576. val = (val == V4L2_EXPOSURE_AUTO);
  577. i2c_data = ((i2c_data & 0xfe) | ((val & 0x01) << 0));
  578. return m5602_write_sensor(sd, OV9650_COM8, &i2c_data, 1);
  579. }
  580. static int ov9650_set_auto_white_balance(struct gspca_dev *gspca_dev,
  581. __s32 val)
  582. {
  583. int err;
  584. u8 i2c_data;
  585. struct sd *sd = (struct sd *) gspca_dev;
  586. gspca_dbg(gspca_dev, D_CONF, "Set auto white balance to %d\n", val);
  587. err = m5602_read_sensor(sd, OV9650_COM8, &i2c_data, 1);
  588. if (err < 0)
  589. return err;
  590. i2c_data = ((i2c_data & 0xfd) | ((val & 0x01) << 1));
  591. err = m5602_write_sensor(sd, OV9650_COM8, &i2c_data, 1);
  592. return err;
  593. }
  594. static int ov9650_set_auto_gain(struct gspca_dev *gspca_dev, __s32 val)
  595. {
  596. int err;
  597. u8 i2c_data;
  598. struct sd *sd = (struct sd *) gspca_dev;
  599. gspca_dbg(gspca_dev, D_CONF, "Set auto gain control to %d\n", val);
  600. err = m5602_read_sensor(sd, OV9650_COM8, &i2c_data, 1);
  601. if (err < 0)
  602. return err;
  603. i2c_data = ((i2c_data & 0xfb) | ((val & 0x01) << 2));
  604. return m5602_write_sensor(sd, OV9650_COM8, &i2c_data, 1);
  605. }
  606. static int ov9650_s_ctrl(struct v4l2_ctrl *ctrl)
  607. {
  608. struct gspca_dev *gspca_dev =
  609. container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
  610. struct sd *sd = (struct sd *) gspca_dev;
  611. int err;
  612. if (!gspca_dev->streaming)
  613. return 0;
  614. switch (ctrl->id) {
  615. case V4L2_CID_AUTO_WHITE_BALANCE:
  616. err = ov9650_set_auto_white_balance(gspca_dev, ctrl->val);
  617. if (err || ctrl->val)
  618. return err;
  619. err = ov9650_set_red_balance(gspca_dev, sd->red_bal->val);
  620. if (err)
  621. return err;
  622. err = ov9650_set_blue_balance(gspca_dev, sd->blue_bal->val);
  623. break;
  624. case V4L2_CID_EXPOSURE_AUTO:
  625. err = ov9650_set_auto_exposure(gspca_dev, ctrl->val);
  626. if (err || ctrl->val == V4L2_EXPOSURE_AUTO)
  627. return err;
  628. err = ov9650_set_exposure(gspca_dev, sd->expo->val);
  629. break;
  630. case V4L2_CID_AUTOGAIN:
  631. err = ov9650_set_auto_gain(gspca_dev, ctrl->val);
  632. if (err || ctrl->val)
  633. return err;
  634. err = ov9650_set_gain(gspca_dev, sd->gain->val);
  635. break;
  636. case V4L2_CID_HFLIP:
  637. err = ov9650_set_hvflip(gspca_dev);
  638. break;
  639. default:
  640. return -EINVAL;
  641. }
  642. return err;
  643. }
  644. static void ov9650_dump_registers(struct sd *sd)
  645. {
  646. int address;
  647. pr_info("Dumping the ov9650 register state\n");
  648. for (address = 0; address < 0xa9; address++) {
  649. u8 value;
  650. m5602_read_sensor(sd, address, &value, 1);
  651. pr_info("register 0x%x contains 0x%x\n", address, value);
  652. }
  653. pr_info("ov9650 register state dump complete\n");
  654. pr_info("Probing for which registers that are read/write\n");
  655. for (address = 0; address < 0xff; address++) {
  656. u8 old_value, ctrl_value;
  657. u8 test_value[2] = {0xff, 0xff};
  658. m5602_read_sensor(sd, address, &old_value, 1);
  659. m5602_write_sensor(sd, address, test_value, 1);
  660. m5602_read_sensor(sd, address, &ctrl_value, 1);
  661. if (ctrl_value == test_value[0])
  662. pr_info("register 0x%x is writeable\n", address);
  663. else
  664. pr_info("register 0x%x is read only\n", address);
  665. /* Restore original value */
  666. m5602_write_sensor(sd, address, &old_value, 1);
  667. }
  668. }