av7110.c 79 KB

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  1. /*
  2. * driver for the SAA7146 based AV110 cards (like the Fujitsu-Siemens DVB)
  3. * av7110.c: initialization and demux stuff
  4. *
  5. * Copyright (C) 1999-2002 Ralph Metzler
  6. * & Marcus Metzler for convergence integrated media GmbH
  7. *
  8. * originally based on code by:
  9. * Copyright (C) 1998,1999 Christian Theiss <mistert@rz.fh-augsburg.de>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * To obtain the license, point your browser to
  23. * http://www.gnu.org/copyleft/gpl.html
  24. *
  25. *
  26. * the project's page is at https://linuxtv.org
  27. */
  28. #include <linux/module.h>
  29. #include <linux/kmod.h>
  30. #include <linux/delay.h>
  31. #include <linux/fs.h>
  32. #include <linux/timer.h>
  33. #include <linux/poll.h>
  34. #include <linux/kernel.h>
  35. #include <linux/sched.h>
  36. #include <linux/types.h>
  37. #include <linux/fcntl.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/string.h>
  40. #include <linux/pci.h>
  41. #include <linux/vmalloc.h>
  42. #include <linux/firmware.h>
  43. #include <linux/crc32.h>
  44. #include <linux/i2c.h>
  45. #include <linux/kthread.h>
  46. #include <linux/slab.h>
  47. #include <asm/unaligned.h>
  48. #include <asm/byteorder.h>
  49. #include <linux/dvb/frontend.h>
  50. #include <media/dvb_frontend.h>
  51. #include "ttpci-eeprom.h"
  52. #include "av7110.h"
  53. #include "av7110_hw.h"
  54. #include "av7110_av.h"
  55. #include "av7110_ca.h"
  56. #include "av7110_ipack.h"
  57. #include "bsbe1.h"
  58. #include "lnbp21.h"
  59. #include "bsru6.h"
  60. #define TS_WIDTH 376
  61. #define TS_HEIGHT 512
  62. #define TS_BUFLEN (TS_WIDTH*TS_HEIGHT)
  63. #define TS_MAX_PACKETS (TS_BUFLEN/TS_SIZE)
  64. int av7110_debug;
  65. static int vidmode = CVBS_RGB_OUT;
  66. static int pids_off;
  67. static int adac = DVB_ADAC_TI;
  68. static int hw_sections;
  69. static int rgb_on;
  70. static int volume = 255;
  71. static int budgetpatch;
  72. static int wss_cfg_4_3 = 0x4008;
  73. static int wss_cfg_16_9 = 0x0007;
  74. static int tv_standard;
  75. static int full_ts;
  76. module_param_named(debug, av7110_debug, int, 0644);
  77. MODULE_PARM_DESC(debug, "debug level (bitmask, default 0)");
  78. module_param(vidmode, int, 0444);
  79. MODULE_PARM_DESC(vidmode,"analog video out: 0 off, 1 CVBS+RGB (default), 2 CVBS+YC, 3 YC");
  80. module_param(pids_off, int, 0444);
  81. MODULE_PARM_DESC(pids_off,"clear video/audio/PCR PID filters when demux is closed");
  82. module_param(adac, int, 0444);
  83. MODULE_PARM_DESC(adac,"audio DAC type: 0 TI, 1 CRYSTAL, 2 MSP (use if autodetection fails)");
  84. module_param(hw_sections, int, 0444);
  85. MODULE_PARM_DESC(hw_sections, "0 use software section filter, 1 use hardware");
  86. module_param(rgb_on, int, 0444);
  87. MODULE_PARM_DESC(rgb_on, "For Siemens DVB-C cards only: Enable RGB control signal on SCART pin 16 to switch SCART video mode from CVBS to RGB");
  88. module_param(volume, int, 0444);
  89. MODULE_PARM_DESC(volume, "initial volume: default 255 (range 0-255)");
  90. module_param(budgetpatch, int, 0444);
  91. MODULE_PARM_DESC(budgetpatch, "use budget-patch hardware modification: default 0 (0 no, 1 autodetect, 2 always)");
  92. module_param(full_ts, int, 0444);
  93. MODULE_PARM_DESC(full_ts, "enable code for full-ts hardware modification: 0 disable (default), 1 enable");
  94. module_param(wss_cfg_4_3, int, 0444);
  95. MODULE_PARM_DESC(wss_cfg_4_3, "WSS 4:3 - default 0x4008 - bit 15: disable, 14: burst mode, 13..0: wss data");
  96. module_param(wss_cfg_16_9, int, 0444);
  97. MODULE_PARM_DESC(wss_cfg_16_9, "WSS 16:9 - default 0x0007 - bit 15: disable, 14: burst mode, 13..0: wss data");
  98. module_param(tv_standard, int, 0444);
  99. MODULE_PARM_DESC(tv_standard, "TV standard: 0 PAL (default), 1 NTSC");
  100. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  101. static void restart_feeds(struct av7110 *av7110);
  102. static int budget_start_feed(struct dvb_demux_feed *feed);
  103. static int budget_stop_feed(struct dvb_demux_feed *feed);
  104. static int av7110_num;
  105. #define FE_FUNC_OVERRIDE(fe_func, av7110_copy, av7110_func) \
  106. {\
  107. if (fe_func != NULL) { \
  108. av7110_copy = fe_func; \
  109. fe_func = av7110_func; \
  110. } \
  111. }
  112. static void init_av7110_av(struct av7110 *av7110)
  113. {
  114. int ret;
  115. struct saa7146_dev *dev = av7110->dev;
  116. /* set internal volume control to maximum */
  117. av7110->adac_type = DVB_ADAC_TI;
  118. ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
  119. if (ret < 0)
  120. printk("dvb-ttpci:cannot set internal volume to maximum:%d\n",ret);
  121. ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetMonitorType,
  122. 1, (u16) av7110->display_ar);
  123. if (ret < 0)
  124. printk("dvb-ttpci: unable to set aspect ratio\n");
  125. ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetPanScanType,
  126. 1, av7110->display_panscan);
  127. if (ret < 0)
  128. printk("dvb-ttpci: unable to set pan scan\n");
  129. ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetWSSConfig, 2, 2, wss_cfg_4_3);
  130. if (ret < 0)
  131. printk("dvb-ttpci: unable to configure 4:3 wss\n");
  132. ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetWSSConfig, 2, 3, wss_cfg_16_9);
  133. if (ret < 0)
  134. printk("dvb-ttpci: unable to configure 16:9 wss\n");
  135. ret = av7710_set_video_mode(av7110, vidmode);
  136. if (ret < 0)
  137. printk("dvb-ttpci:cannot set video mode:%d\n",ret);
  138. /* handle different card types */
  139. /* remaining inits according to card and frontend type */
  140. av7110->analog_tuner_flags = 0;
  141. av7110->current_input = 0;
  142. if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000a)
  143. av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 0); // SPDIF on
  144. if (i2c_writereg(av7110, 0x20, 0x00, 0x00) == 1) {
  145. printk ("dvb-ttpci: Crystal audio DAC @ card %d detected\n",
  146. av7110->dvb_adapter.num);
  147. av7110->adac_type = DVB_ADAC_CRYSTAL;
  148. i2c_writereg(av7110, 0x20, 0x01, 0xd2);
  149. i2c_writereg(av7110, 0x20, 0x02, 0x49);
  150. i2c_writereg(av7110, 0x20, 0x03, 0x00);
  151. i2c_writereg(av7110, 0x20, 0x04, 0x00);
  152. /**
  153. * some special handling for the Siemens DVB-C cards...
  154. */
  155. } else if (0 == av7110_init_analog_module(av7110)) {
  156. /* done. */
  157. }
  158. else if (dev->pci->subsystem_vendor == 0x110a) {
  159. printk("dvb-ttpci: DVB-C w/o analog module @ card %d detected\n",
  160. av7110->dvb_adapter.num);
  161. av7110->adac_type = DVB_ADAC_NONE;
  162. }
  163. else {
  164. av7110->adac_type = adac;
  165. printk("dvb-ttpci: adac type set to %d @ card %d\n",
  166. av7110->adac_type, av7110->dvb_adapter.num);
  167. }
  168. if (av7110->adac_type == DVB_ADAC_NONE || av7110->adac_type == DVB_ADAC_MSP34x0) {
  169. // switch DVB SCART on
  170. ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, MainSwitch, 1, 0);
  171. if (ret < 0)
  172. printk("dvb-ttpci:cannot switch on SCART(Main):%d\n",ret);
  173. ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 1);
  174. if (ret < 0)
  175. printk("dvb-ttpci:cannot switch on SCART(AD):%d\n",ret);
  176. if (rgb_on &&
  177. ((av7110->dev->pci->subsystem_vendor == 0x110a) ||
  178. (av7110->dev->pci->subsystem_vendor == 0x13c2)) &&
  179. (av7110->dev->pci->subsystem_device == 0x0000)) {
  180. saa7146_setgpio(dev, 1, SAA7146_GPIO_OUTHI); // RGB on, SCART pin 16
  181. //saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); // SCARTpin 8
  182. }
  183. }
  184. if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000e)
  185. av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, SpdifSwitch, 1, 0); // SPDIF on
  186. ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
  187. if (ret < 0)
  188. printk("dvb-ttpci:cannot set volume :%d\n",ret);
  189. }
  190. static void recover_arm(struct av7110 *av7110)
  191. {
  192. dprintk(4, "%p\n",av7110);
  193. av7110_bootarm(av7110);
  194. msleep(100);
  195. init_av7110_av(av7110);
  196. /* card-specific recovery */
  197. if (av7110->recover)
  198. av7110->recover(av7110);
  199. restart_feeds(av7110);
  200. #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
  201. av7110_check_ir_config(av7110, true);
  202. #endif
  203. }
  204. static void av7110_arm_sync(struct av7110 *av7110)
  205. {
  206. if (av7110->arm_thread)
  207. kthread_stop(av7110->arm_thread);
  208. av7110->arm_thread = NULL;
  209. }
  210. static int arm_thread(void *data)
  211. {
  212. struct av7110 *av7110 = data;
  213. u16 newloops = 0;
  214. int timeout;
  215. dprintk(4, "%p\n",av7110);
  216. for (;;) {
  217. timeout = wait_event_interruptible_timeout(av7110->arm_wait,
  218. kthread_should_stop(), 5 * HZ);
  219. if (-ERESTARTSYS == timeout || kthread_should_stop()) {
  220. /* got signal or told to quit*/
  221. break;
  222. }
  223. if (!av7110->arm_ready)
  224. continue;
  225. #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
  226. av7110_check_ir_config(av7110, false);
  227. #endif
  228. if (mutex_lock_interruptible(&av7110->dcomlock))
  229. break;
  230. newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2);
  231. mutex_unlock(&av7110->dcomlock);
  232. if (newloops == av7110->arm_loops || av7110->arm_errors > 3) {
  233. printk(KERN_ERR "dvb-ttpci: ARM crashed @ card %d\n",
  234. av7110->dvb_adapter.num);
  235. recover_arm(av7110);
  236. if (mutex_lock_interruptible(&av7110->dcomlock))
  237. break;
  238. newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2) - 1;
  239. mutex_unlock(&av7110->dcomlock);
  240. }
  241. av7110->arm_loops = newloops;
  242. av7110->arm_errors = 0;
  243. }
  244. return 0;
  245. }
  246. /****************************************************************************
  247. * IRQ handling
  248. ****************************************************************************/
  249. static int DvbDmxFilterCallback(u8 *buffer1, size_t buffer1_len,
  250. u8 *buffer2, size_t buffer2_len,
  251. struct dvb_demux_filter *dvbdmxfilter,
  252. struct av7110 *av7110)
  253. {
  254. if (!dvbdmxfilter->feed->demux->dmx.frontend)
  255. return 0;
  256. if (dvbdmxfilter->feed->demux->dmx.frontend->source == DMX_MEMORY_FE)
  257. return 0;
  258. switch (dvbdmxfilter->type) {
  259. case DMX_TYPE_SEC:
  260. if ((((buffer1[1] << 8) | buffer1[2]) & 0xfff) + 3 != buffer1_len)
  261. return 0;
  262. if (dvbdmxfilter->doneq) {
  263. struct dmx_section_filter *filter = &dvbdmxfilter->filter;
  264. int i;
  265. u8 xor, neq = 0;
  266. for (i = 0; i < DVB_DEMUX_MASK_MAX; i++) {
  267. xor = filter->filter_value[i] ^ buffer1[i];
  268. neq |= dvbdmxfilter->maskandnotmode[i] & xor;
  269. }
  270. if (!neq)
  271. return 0;
  272. }
  273. return dvbdmxfilter->feed->cb.sec(buffer1, buffer1_len,
  274. buffer2, buffer2_len,
  275. &dvbdmxfilter->filter, NULL);
  276. case DMX_TYPE_TS:
  277. if (!(dvbdmxfilter->feed->ts_type & TS_PACKET))
  278. return 0;
  279. if (dvbdmxfilter->feed->ts_type & TS_PAYLOAD_ONLY)
  280. return dvbdmxfilter->feed->cb.ts(buffer1, buffer1_len,
  281. buffer2, buffer2_len,
  282. &dvbdmxfilter->feed->feed.ts,
  283. NULL);
  284. else
  285. av7110_p2t_write(buffer1, buffer1_len,
  286. dvbdmxfilter->feed->pid,
  287. &av7110->p2t_filter[dvbdmxfilter->index]);
  288. return 0;
  289. default:
  290. return 0;
  291. }
  292. }
  293. //#define DEBUG_TIMING
  294. static inline void print_time(char *s)
  295. {
  296. #ifdef DEBUG_TIMING
  297. struct timespec64 ts;
  298. ktime_get_real_ts64(&ts);
  299. printk("%s: %lld.%09ld\n", s, (s64)ts.tv_sec, ts.tv_nsec);
  300. #endif
  301. }
  302. #define DEBI_READ 0
  303. #define DEBI_WRITE 1
  304. static inline void start_debi_dma(struct av7110 *av7110, int dir,
  305. unsigned long addr, unsigned int len)
  306. {
  307. dprintk(8, "%c %08lx %u\n", dir == DEBI_READ ? 'R' : 'W', addr, len);
  308. if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
  309. printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __func__);
  310. return;
  311. }
  312. SAA7146_ISR_CLEAR(av7110->dev, MASK_19); /* for good measure */
  313. SAA7146_IER_ENABLE(av7110->dev, MASK_19);
  314. if (len < 5)
  315. len = 5; /* we want a real DEBI DMA */
  316. if (dir == DEBI_WRITE)
  317. iwdebi(av7110, DEBISWAB, addr, 0, (len + 3) & ~3);
  318. else
  319. irdebi(av7110, DEBISWAB, addr, 0, len);
  320. }
  321. static void debiirq(unsigned long cookie)
  322. {
  323. struct av7110 *av7110 = (struct av7110 *)cookie;
  324. int type = av7110->debitype;
  325. int handle = (type >> 8) & 0x1f;
  326. unsigned int xfer = 0;
  327. print_time("debi");
  328. dprintk(4, "type 0x%04x\n", type);
  329. if (type == -1) {
  330. printk("DEBI irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
  331. jiffies, saa7146_read(av7110->dev, PSR),
  332. saa7146_read(av7110->dev, SSR));
  333. goto debi_done;
  334. }
  335. av7110->debitype = -1;
  336. switch (type & 0xff) {
  337. case DATA_TS_RECORD:
  338. dvb_dmx_swfilter_packets(&av7110->demux,
  339. (const u8 *) av7110->debi_virt,
  340. av7110->debilen / 188);
  341. xfer = RX_BUFF;
  342. break;
  343. case DATA_PES_RECORD:
  344. if (av7110->demux.recording)
  345. av7110_record_cb(&av7110->p2t[handle],
  346. (u8 *) av7110->debi_virt,
  347. av7110->debilen);
  348. xfer = RX_BUFF;
  349. break;
  350. case DATA_IPMPE:
  351. case DATA_FSECTION:
  352. case DATA_PIPING:
  353. if (av7110->handle2filter[handle])
  354. DvbDmxFilterCallback((u8 *)av7110->debi_virt,
  355. av7110->debilen, NULL, 0,
  356. av7110->handle2filter[handle],
  357. av7110);
  358. xfer = RX_BUFF;
  359. break;
  360. case DATA_CI_GET:
  361. {
  362. u8 *data = av7110->debi_virt;
  363. if ((data[0] < 2) && data[2] == 0xff) {
  364. int flags = 0;
  365. if (data[5] > 0)
  366. flags |= CA_CI_MODULE_PRESENT;
  367. if (data[5] > 5)
  368. flags |= CA_CI_MODULE_READY;
  369. av7110->ci_slot[data[0]].flags = flags;
  370. } else
  371. ci_get_data(&av7110->ci_rbuffer,
  372. av7110->debi_virt,
  373. av7110->debilen);
  374. xfer = RX_BUFF;
  375. break;
  376. }
  377. case DATA_COMMON_INTERFACE:
  378. CI_handle(av7110, (u8 *)av7110->debi_virt, av7110->debilen);
  379. xfer = RX_BUFF;
  380. break;
  381. case DATA_DEBUG_MESSAGE:
  382. ((s8*)av7110->debi_virt)[Reserved_SIZE - 1] = 0;
  383. printk("%s\n", (s8 *) av7110->debi_virt);
  384. xfer = RX_BUFF;
  385. break;
  386. case DATA_CI_PUT:
  387. dprintk(4, "debi DATA_CI_PUT\n");
  388. xfer = TX_BUFF;
  389. break;
  390. case DATA_MPEG_PLAY:
  391. dprintk(4, "debi DATA_MPEG_PLAY\n");
  392. xfer = TX_BUFF;
  393. break;
  394. case DATA_BMP_LOAD:
  395. dprintk(4, "debi DATA_BMP_LOAD\n");
  396. xfer = TX_BUFF;
  397. break;
  398. default:
  399. break;
  400. }
  401. debi_done:
  402. spin_lock(&av7110->debilock);
  403. if (xfer)
  404. iwdebi(av7110, DEBINOSWAP, xfer, 0, 2);
  405. ARM_ClearMailBox(av7110);
  406. spin_unlock(&av7110->debilock);
  407. }
  408. /* irq from av7110 firmware writing the mailbox register in the DPRAM */
  409. static void gpioirq(unsigned long cookie)
  410. {
  411. struct av7110 *av7110 = (struct av7110 *)cookie;
  412. u32 rxbuf, txbuf;
  413. int len;
  414. if (av7110->debitype != -1)
  415. /* we shouldn't get any irq while a debi xfer is running */
  416. printk("dvb-ttpci: GPIO0 irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
  417. jiffies, saa7146_read(av7110->dev, PSR),
  418. saa7146_read(av7110->dev, SSR));
  419. if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
  420. printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __func__);
  421. BUG(); /* maybe we should try resetting the debi? */
  422. }
  423. spin_lock(&av7110->debilock);
  424. ARM_ClearIrq(av7110);
  425. /* see what the av7110 wants */
  426. av7110->debitype = irdebi(av7110, DEBINOSWAP, IRQ_STATE, 0, 2);
  427. av7110->debilen = irdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  428. rxbuf = irdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  429. txbuf = irdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  430. len = (av7110->debilen + 3) & ~3;
  431. print_time("gpio");
  432. dprintk(8, "GPIO0 irq 0x%04x %d\n", av7110->debitype, av7110->debilen);
  433. switch (av7110->debitype & 0xff) {
  434. case DATA_TS_PLAY:
  435. case DATA_PES_PLAY:
  436. break;
  437. case DATA_MPEG_VIDEO_EVENT:
  438. {
  439. u32 h_ar;
  440. struct video_event event;
  441. av7110->video_size.w = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_WIDTH, 0, 2);
  442. h_ar = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_HEIGHT_AR, 0, 2);
  443. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  444. iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  445. av7110->video_size.h = h_ar & 0xfff;
  446. event.type = VIDEO_EVENT_SIZE_CHANGED;
  447. event.u.size.w = av7110->video_size.w;
  448. event.u.size.h = av7110->video_size.h;
  449. switch ((h_ar >> 12) & 0xf)
  450. {
  451. case 3:
  452. av7110->video_size.aspect_ratio = VIDEO_FORMAT_16_9;
  453. event.u.size.aspect_ratio = VIDEO_FORMAT_16_9;
  454. av7110->videostate.video_format = VIDEO_FORMAT_16_9;
  455. break;
  456. case 4:
  457. av7110->video_size.aspect_ratio = VIDEO_FORMAT_221_1;
  458. event.u.size.aspect_ratio = VIDEO_FORMAT_221_1;
  459. av7110->videostate.video_format = VIDEO_FORMAT_221_1;
  460. break;
  461. default:
  462. av7110->video_size.aspect_ratio = VIDEO_FORMAT_4_3;
  463. event.u.size.aspect_ratio = VIDEO_FORMAT_4_3;
  464. av7110->videostate.video_format = VIDEO_FORMAT_4_3;
  465. }
  466. dprintk(8, "GPIO0 irq: DATA_MPEG_VIDEO_EVENT: w/h/ar = %u/%u/%u\n",
  467. av7110->video_size.w, av7110->video_size.h,
  468. av7110->video_size.aspect_ratio);
  469. dvb_video_add_event(av7110, &event);
  470. break;
  471. }
  472. case DATA_CI_PUT:
  473. {
  474. int avail;
  475. struct dvb_ringbuffer *cibuf = &av7110->ci_wbuffer;
  476. avail = dvb_ringbuffer_avail(cibuf);
  477. if (avail <= 2) {
  478. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  479. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  480. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  481. break;
  482. }
  483. len = DVB_RINGBUFFER_PEEK(cibuf, 0) << 8;
  484. len |= DVB_RINGBUFFER_PEEK(cibuf, 1);
  485. if (avail < len + 2) {
  486. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  487. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  488. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  489. break;
  490. }
  491. DVB_RINGBUFFER_SKIP(cibuf, 2);
  492. dvb_ringbuffer_read(cibuf, av7110->debi_virt, len);
  493. iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
  494. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
  495. dprintk(8, "DMA: CI\n");
  496. start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
  497. spin_unlock(&av7110->debilock);
  498. wake_up(&cibuf->queue);
  499. return;
  500. }
  501. case DATA_MPEG_PLAY:
  502. if (!av7110->playing) {
  503. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  504. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  505. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  506. break;
  507. }
  508. len = 0;
  509. if (av7110->debitype & 0x100) {
  510. spin_lock(&av7110->aout.lock);
  511. len = av7110_pes_play(av7110->debi_virt, &av7110->aout, 2048);
  512. spin_unlock(&av7110->aout.lock);
  513. }
  514. if (len <= 0 && (av7110->debitype & 0x200)
  515. &&av7110->videostate.play_state != VIDEO_FREEZED) {
  516. spin_lock(&av7110->avout.lock);
  517. len = av7110_pes_play(av7110->debi_virt, &av7110->avout, 2048);
  518. spin_unlock(&av7110->avout.lock);
  519. }
  520. if (len <= 0) {
  521. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  522. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  523. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  524. break;
  525. }
  526. dprintk(8, "GPIO0 PES_PLAY len=%04x\n", len);
  527. iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
  528. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
  529. dprintk(8, "DMA: MPEG_PLAY\n");
  530. start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
  531. spin_unlock(&av7110->debilock);
  532. return;
  533. case DATA_BMP_LOAD:
  534. len = av7110->debilen;
  535. dprintk(8, "gpio DATA_BMP_LOAD len %d\n", len);
  536. if (!len) {
  537. av7110->bmp_state = BMP_LOADED;
  538. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  539. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  540. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  541. wake_up(&av7110->bmpq);
  542. dprintk(8, "gpio DATA_BMP_LOAD done\n");
  543. break;
  544. }
  545. if (len > av7110->bmplen)
  546. len = av7110->bmplen;
  547. if (len > 2 * 1024)
  548. len = 2 * 1024;
  549. iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
  550. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
  551. memcpy(av7110->debi_virt, av7110->bmpbuf+av7110->bmpp, len);
  552. av7110->bmpp += len;
  553. av7110->bmplen -= len;
  554. dprintk(8, "gpio DATA_BMP_LOAD DMA len %d\n", len);
  555. start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE+txbuf, len);
  556. spin_unlock(&av7110->debilock);
  557. return;
  558. case DATA_CI_GET:
  559. case DATA_COMMON_INTERFACE:
  560. case DATA_FSECTION:
  561. case DATA_IPMPE:
  562. case DATA_PIPING:
  563. if (!len || len > 4 * 1024) {
  564. iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  565. break;
  566. }
  567. /* fall through */
  568. case DATA_TS_RECORD:
  569. case DATA_PES_RECORD:
  570. dprintk(8, "DMA: TS_REC etc.\n");
  571. start_debi_dma(av7110, DEBI_READ, DPRAM_BASE+rxbuf, len);
  572. spin_unlock(&av7110->debilock);
  573. return;
  574. case DATA_DEBUG_MESSAGE:
  575. if (!len || len > 0xff) {
  576. iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  577. break;
  578. }
  579. start_debi_dma(av7110, DEBI_READ, Reserved, len);
  580. spin_unlock(&av7110->debilock);
  581. return;
  582. case DATA_IRCOMMAND:
  583. if (av7110->ir.ir_handler)
  584. av7110->ir.ir_handler(av7110,
  585. swahw32(irdebi(av7110, DEBINOSWAP, Reserved, 0, 4)));
  586. iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  587. break;
  588. default:
  589. printk("dvb-ttpci: gpioirq unknown type=%d len=%d\n",
  590. av7110->debitype, av7110->debilen);
  591. break;
  592. }
  593. av7110->debitype = -1;
  594. ARM_ClearMailBox(av7110);
  595. spin_unlock(&av7110->debilock);
  596. }
  597. #ifdef CONFIG_DVB_AV7110_OSD
  598. static int dvb_osd_ioctl(struct file *file,
  599. unsigned int cmd, void *parg)
  600. {
  601. struct dvb_device *dvbdev = file->private_data;
  602. struct av7110 *av7110 = dvbdev->priv;
  603. dprintk(4, "%p\n", av7110);
  604. if (cmd == OSD_SEND_CMD)
  605. return av7110_osd_cmd(av7110, (osd_cmd_t *) parg);
  606. if (cmd == OSD_GET_CAPABILITY)
  607. return av7110_osd_capability(av7110, (osd_cap_t *) parg);
  608. return -EINVAL;
  609. }
  610. static const struct file_operations dvb_osd_fops = {
  611. .owner = THIS_MODULE,
  612. .unlocked_ioctl = dvb_generic_ioctl,
  613. .open = dvb_generic_open,
  614. .release = dvb_generic_release,
  615. .llseek = noop_llseek,
  616. };
  617. static struct dvb_device dvbdev_osd = {
  618. .priv = NULL,
  619. .users = 1,
  620. .writers = 1,
  621. .fops = &dvb_osd_fops,
  622. .kernel_ioctl = dvb_osd_ioctl,
  623. };
  624. #endif /* CONFIG_DVB_AV7110_OSD */
  625. static inline int SetPIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
  626. u16 subpid, u16 pcrpid)
  627. {
  628. u16 aflags = 0;
  629. dprintk(4, "%p\n", av7110);
  630. if (vpid == 0x1fff || apid == 0x1fff ||
  631. ttpid == 0x1fff || subpid == 0x1fff || pcrpid == 0x1fff) {
  632. vpid = apid = ttpid = subpid = pcrpid = 0;
  633. av7110->pids[DMX_PES_VIDEO] = 0;
  634. av7110->pids[DMX_PES_AUDIO] = 0;
  635. av7110->pids[DMX_PES_TELETEXT] = 0;
  636. av7110->pids[DMX_PES_PCR] = 0;
  637. }
  638. if (av7110->audiostate.bypass_mode)
  639. aflags |= 0x8000;
  640. return av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, MultiPID, 6,
  641. pcrpid, vpid, apid, ttpid, subpid, aflags);
  642. }
  643. int ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
  644. u16 subpid, u16 pcrpid)
  645. {
  646. int ret = 0;
  647. dprintk(4, "%p\n", av7110);
  648. if (mutex_lock_interruptible(&av7110->pid_mutex))
  649. return -ERESTARTSYS;
  650. if (!(vpid & 0x8000))
  651. av7110->pids[DMX_PES_VIDEO] = vpid;
  652. if (!(apid & 0x8000))
  653. av7110->pids[DMX_PES_AUDIO] = apid;
  654. if (!(ttpid & 0x8000))
  655. av7110->pids[DMX_PES_TELETEXT] = ttpid;
  656. if (!(pcrpid & 0x8000))
  657. av7110->pids[DMX_PES_PCR] = pcrpid;
  658. av7110->pids[DMX_PES_SUBTITLE] = 0;
  659. if (av7110->fe_synced) {
  660. pcrpid = av7110->pids[DMX_PES_PCR];
  661. ret = SetPIDs(av7110, vpid, apid, ttpid, subpid, pcrpid);
  662. }
  663. mutex_unlock(&av7110->pid_mutex);
  664. return ret;
  665. }
  666. /******************************************************************************
  667. * hardware filter functions
  668. ******************************************************************************/
  669. static int StartHWFilter(struct dvb_demux_filter *dvbdmxfilter)
  670. {
  671. struct dvb_demux_feed *dvbdmxfeed = dvbdmxfilter->feed;
  672. struct av7110 *av7110 = dvbdmxfeed->demux->priv;
  673. u16 buf[20];
  674. int ret, i;
  675. u16 handle;
  676. // u16 mode = 0x0320;
  677. u16 mode = 0xb96a;
  678. dprintk(4, "%p\n", av7110);
  679. if (av7110->full_ts)
  680. return 0;
  681. if (dvbdmxfilter->type == DMX_TYPE_SEC) {
  682. if (hw_sections) {
  683. buf[4] = (dvbdmxfilter->filter.filter_value[0] << 8) |
  684. dvbdmxfilter->maskandmode[0];
  685. for (i = 3; i < 18; i++)
  686. buf[i + 4 - 2] =
  687. (dvbdmxfilter->filter.filter_value[i] << 8) |
  688. dvbdmxfilter->maskandmode[i];
  689. mode = 4;
  690. }
  691. } else if ((dvbdmxfeed->ts_type & TS_PACKET) &&
  692. !(dvbdmxfeed->ts_type & TS_PAYLOAD_ONLY)) {
  693. av7110_p2t_init(&av7110->p2t_filter[dvbdmxfilter->index], dvbdmxfeed);
  694. }
  695. buf[0] = (COMTYPE_PID_FILTER << 8) + AddPIDFilter;
  696. buf[1] = 16;
  697. buf[2] = dvbdmxfeed->pid;
  698. buf[3] = mode;
  699. ret = av7110_fw_request(av7110, buf, 20, &handle, 1);
  700. if (ret != 0 || handle >= 32) {
  701. printk(KERN_ERR "dvb-ttpci: %s error buf %04x %04x %04x %04x ret %d handle %04x\n",
  702. __func__, buf[0], buf[1], buf[2], buf[3],
  703. ret, handle);
  704. dvbdmxfilter->hw_handle = 0xffff;
  705. if (!ret)
  706. ret = -1;
  707. return ret;
  708. }
  709. av7110->handle2filter[handle] = dvbdmxfilter;
  710. dvbdmxfilter->hw_handle = handle;
  711. return ret;
  712. }
  713. static int StopHWFilter(struct dvb_demux_filter *dvbdmxfilter)
  714. {
  715. struct av7110 *av7110 = dvbdmxfilter->feed->demux->priv;
  716. u16 buf[3];
  717. u16 answ[2];
  718. int ret;
  719. u16 handle;
  720. dprintk(4, "%p\n", av7110);
  721. if (av7110->full_ts)
  722. return 0;
  723. handle = dvbdmxfilter->hw_handle;
  724. if (handle >= 32) {
  725. printk("%s tried to stop invalid filter %04x, filter type = %x\n",
  726. __func__, handle, dvbdmxfilter->type);
  727. return -EINVAL;
  728. }
  729. av7110->handle2filter[handle] = NULL;
  730. buf[0] = (COMTYPE_PID_FILTER << 8) + DelPIDFilter;
  731. buf[1] = 1;
  732. buf[2] = handle;
  733. ret = av7110_fw_request(av7110, buf, 3, answ, 2);
  734. if (ret != 0 || answ[1] != handle) {
  735. printk(KERN_ERR "dvb-ttpci: %s error cmd %04x %04x %04x ret %x resp %04x %04x pid %d\n",
  736. __func__, buf[0], buf[1], buf[2], ret,
  737. answ[0], answ[1], dvbdmxfilter->feed->pid);
  738. if (!ret)
  739. ret = -1;
  740. }
  741. return ret;
  742. }
  743. static int dvb_feed_start_pid(struct dvb_demux_feed *dvbdmxfeed)
  744. {
  745. struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
  746. struct av7110 *av7110 = dvbdmx->priv;
  747. u16 *pid = dvbdmx->pids, npids[5];
  748. int i;
  749. int ret = 0;
  750. dprintk(4, "%p\n", av7110);
  751. npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
  752. i = dvbdmxfeed->pes_type;
  753. npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
  754. if ((i == 2) && npids[i] && (dvbdmxfeed->ts_type & TS_PACKET)) {
  755. npids[i] = 0;
  756. ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
  757. if (!ret)
  758. ret = StartHWFilter(dvbdmxfeed->filter);
  759. return ret;
  760. }
  761. if (dvbdmxfeed->pes_type <= 2 || dvbdmxfeed->pes_type == 4) {
  762. ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
  763. if (ret)
  764. return ret;
  765. }
  766. if (dvbdmxfeed->pes_type < 2 && npids[0])
  767. if (av7110->fe_synced)
  768. {
  769. ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
  770. if (ret)
  771. return ret;
  772. }
  773. if ((dvbdmxfeed->ts_type & TS_PACKET) && !av7110->full_ts) {
  774. if (dvbdmxfeed->pes_type == 0 && !(dvbdmx->pids[0] & 0x8000))
  775. ret = av7110_av_start_record(av7110, RP_AUDIO, dvbdmxfeed);
  776. if (dvbdmxfeed->pes_type == 1 && !(dvbdmx->pids[1] & 0x8000))
  777. ret = av7110_av_start_record(av7110, RP_VIDEO, dvbdmxfeed);
  778. }
  779. return ret;
  780. }
  781. static int dvb_feed_stop_pid(struct dvb_demux_feed *dvbdmxfeed)
  782. {
  783. struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
  784. struct av7110 *av7110 = dvbdmx->priv;
  785. u16 *pid = dvbdmx->pids, npids[5];
  786. int i;
  787. int ret = 0;
  788. dprintk(4, "%p\n", av7110);
  789. if (dvbdmxfeed->pes_type <= 1) {
  790. ret = av7110_av_stop(av7110, dvbdmxfeed->pes_type ? RP_VIDEO : RP_AUDIO);
  791. if (ret)
  792. return ret;
  793. if (!av7110->rec_mode)
  794. dvbdmx->recording = 0;
  795. if (!av7110->playing)
  796. dvbdmx->playing = 0;
  797. }
  798. npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
  799. i = dvbdmxfeed->pes_type;
  800. switch (i) {
  801. case 2: //teletext
  802. if (dvbdmxfeed->ts_type & TS_PACKET)
  803. ret = StopHWFilter(dvbdmxfeed->filter);
  804. npids[2] = 0;
  805. break;
  806. case 0:
  807. case 1:
  808. case 4:
  809. if (!pids_off)
  810. return 0;
  811. npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
  812. break;
  813. }
  814. if (!ret)
  815. ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
  816. return ret;
  817. }
  818. static int av7110_start_feed(struct dvb_demux_feed *feed)
  819. {
  820. struct dvb_demux *demux = feed->demux;
  821. struct av7110 *av7110 = demux->priv;
  822. int ret = 0;
  823. dprintk(4, "%p\n", av7110);
  824. if (!demux->dmx.frontend)
  825. return -EINVAL;
  826. if (!av7110->full_ts && feed->pid > 0x1fff)
  827. return -EINVAL;
  828. if (feed->type == DMX_TYPE_TS) {
  829. if ((feed->ts_type & TS_DECODER) &&
  830. (feed->pes_type <= DMX_PES_PCR)) {
  831. switch (demux->dmx.frontend->source) {
  832. case DMX_MEMORY_FE:
  833. if (feed->ts_type & TS_DECODER)
  834. if (feed->pes_type < 2 &&
  835. !(demux->pids[0] & 0x8000) &&
  836. !(demux->pids[1] & 0x8000)) {
  837. dvb_ringbuffer_flush_spinlock_wakeup(&av7110->avout);
  838. dvb_ringbuffer_flush_spinlock_wakeup(&av7110->aout);
  839. ret = av7110_av_start_play(av7110,RP_AV);
  840. if (!ret)
  841. demux->playing = 1;
  842. }
  843. break;
  844. default:
  845. ret = dvb_feed_start_pid(feed);
  846. break;
  847. }
  848. } else if ((feed->ts_type & TS_PACKET) &&
  849. (demux->dmx.frontend->source != DMX_MEMORY_FE)) {
  850. ret = StartHWFilter(feed->filter);
  851. }
  852. }
  853. if (av7110->full_ts) {
  854. budget_start_feed(feed);
  855. return ret;
  856. }
  857. if (feed->type == DMX_TYPE_SEC) {
  858. int i;
  859. for (i = 0; i < demux->filternum; i++) {
  860. if (demux->filter[i].state != DMX_STATE_READY)
  861. continue;
  862. if (demux->filter[i].type != DMX_TYPE_SEC)
  863. continue;
  864. if (demux->filter[i].filter.parent != &feed->feed.sec)
  865. continue;
  866. demux->filter[i].state = DMX_STATE_GO;
  867. if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
  868. ret = StartHWFilter(&demux->filter[i]);
  869. if (ret)
  870. break;
  871. }
  872. }
  873. }
  874. return ret;
  875. }
  876. static int av7110_stop_feed(struct dvb_demux_feed *feed)
  877. {
  878. struct dvb_demux *demux = feed->demux;
  879. struct av7110 *av7110 = demux->priv;
  880. int i, rc, ret = 0;
  881. dprintk(4, "%p\n", av7110);
  882. if (feed->type == DMX_TYPE_TS) {
  883. if (feed->ts_type & TS_DECODER) {
  884. if (feed->pes_type >= DMX_PES_OTHER ||
  885. !demux->pesfilter[feed->pes_type])
  886. return -EINVAL;
  887. demux->pids[feed->pes_type] |= 0x8000;
  888. demux->pesfilter[feed->pes_type] = NULL;
  889. }
  890. if (feed->ts_type & TS_DECODER &&
  891. feed->pes_type < DMX_PES_OTHER) {
  892. ret = dvb_feed_stop_pid(feed);
  893. } else
  894. if ((feed->ts_type & TS_PACKET) &&
  895. (demux->dmx.frontend->source != DMX_MEMORY_FE))
  896. ret = StopHWFilter(feed->filter);
  897. }
  898. if (av7110->full_ts) {
  899. budget_stop_feed(feed);
  900. return ret;
  901. }
  902. if (feed->type == DMX_TYPE_SEC) {
  903. for (i = 0; i<demux->filternum; i++) {
  904. if (demux->filter[i].state == DMX_STATE_GO &&
  905. demux->filter[i].filter.parent == &feed->feed.sec) {
  906. demux->filter[i].state = DMX_STATE_READY;
  907. if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
  908. rc = StopHWFilter(&demux->filter[i]);
  909. if (!ret)
  910. ret = rc;
  911. /* keep going, stop as many filters as possible */
  912. }
  913. }
  914. }
  915. }
  916. return ret;
  917. }
  918. static void restart_feeds(struct av7110 *av7110)
  919. {
  920. struct dvb_demux *dvbdmx = &av7110->demux;
  921. struct dvb_demux_feed *feed;
  922. int mode;
  923. int feeding;
  924. int i, j;
  925. dprintk(4, "%p\n", av7110);
  926. mode = av7110->playing;
  927. av7110->playing = 0;
  928. av7110->rec_mode = 0;
  929. feeding = av7110->feeding1; /* full_ts mod */
  930. for (i = 0; i < dvbdmx->feednum; i++) {
  931. feed = &dvbdmx->feed[i];
  932. if (feed->state == DMX_STATE_GO) {
  933. if (feed->type == DMX_TYPE_SEC) {
  934. for (j = 0; j < dvbdmx->filternum; j++) {
  935. if (dvbdmx->filter[j].type != DMX_TYPE_SEC)
  936. continue;
  937. if (dvbdmx->filter[j].filter.parent != &feed->feed.sec)
  938. continue;
  939. if (dvbdmx->filter[j].state == DMX_STATE_GO)
  940. dvbdmx->filter[j].state = DMX_STATE_READY;
  941. }
  942. }
  943. av7110_start_feed(feed);
  944. }
  945. }
  946. av7110->feeding1 = feeding; /* full_ts mod */
  947. if (mode)
  948. av7110_av_start_play(av7110, mode);
  949. }
  950. static int dvb_get_stc(struct dmx_demux *demux, unsigned int num,
  951. uint64_t *stc, unsigned int *base)
  952. {
  953. int ret;
  954. u16 fwstc[4];
  955. u16 tag = ((COMTYPE_REQUEST << 8) + ReqSTC);
  956. struct dvb_demux *dvbdemux;
  957. struct av7110 *av7110;
  958. /* pointer casting paranoia... */
  959. BUG_ON(!demux);
  960. dvbdemux = demux->priv;
  961. BUG_ON(!dvbdemux);
  962. av7110 = dvbdemux->priv;
  963. dprintk(4, "%p\n", av7110);
  964. if (num != 0)
  965. return -EINVAL;
  966. ret = av7110_fw_request(av7110, &tag, 0, fwstc, 4);
  967. if (ret) {
  968. printk(KERN_ERR "%s: av7110_fw_request error\n", __func__);
  969. return ret;
  970. }
  971. dprintk(2, "fwstc = %04hx %04hx %04hx %04hx\n",
  972. fwstc[0], fwstc[1], fwstc[2], fwstc[3]);
  973. *stc = (((uint64_t) ((fwstc[3] & 0x8000) >> 15)) << 32) |
  974. (((uint64_t) fwstc[1]) << 16) | ((uint64_t) fwstc[0]);
  975. *base = 1;
  976. dprintk(4, "stc = %lu\n", (unsigned long)*stc);
  977. return 0;
  978. }
  979. /******************************************************************************
  980. * SEC device file operations
  981. ******************************************************************************/
  982. static int av7110_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
  983. {
  984. struct av7110* av7110 = fe->dvb->priv;
  985. switch (tone) {
  986. case SEC_TONE_ON:
  987. return Set22K(av7110, 1);
  988. case SEC_TONE_OFF:
  989. return Set22K(av7110, 0);
  990. default:
  991. return -EINVAL;
  992. }
  993. }
  994. static int av7110_diseqc_send_master_cmd(struct dvb_frontend* fe,
  995. struct dvb_diseqc_master_cmd* cmd)
  996. {
  997. struct av7110* av7110 = fe->dvb->priv;
  998. return av7110_diseqc_send(av7110, cmd->msg_len, cmd->msg, -1);
  999. }
  1000. static int av7110_diseqc_send_burst(struct dvb_frontend* fe,
  1001. enum fe_sec_mini_cmd minicmd)
  1002. {
  1003. struct av7110* av7110 = fe->dvb->priv;
  1004. return av7110_diseqc_send(av7110, 0, NULL, minicmd);
  1005. }
  1006. /* simplified code from budget-core.c */
  1007. static int stop_ts_capture(struct av7110 *budget)
  1008. {
  1009. dprintk(2, "budget: %p\n", budget);
  1010. if (--budget->feeding1)
  1011. return budget->feeding1;
  1012. saa7146_write(budget->dev, MC1, MASK_20); /* DMA3 off */
  1013. SAA7146_IER_DISABLE(budget->dev, MASK_10);
  1014. SAA7146_ISR_CLEAR(budget->dev, MASK_10);
  1015. return 0;
  1016. }
  1017. static int start_ts_capture(struct av7110 *budget)
  1018. {
  1019. unsigned y;
  1020. dprintk(2, "budget: %p\n", budget);
  1021. if (budget->feeding1)
  1022. return ++budget->feeding1;
  1023. for (y = 0; y < TS_HEIGHT; y++)
  1024. memset(budget->grabbing + y * TS_WIDTH, 0x00, TS_WIDTH);
  1025. budget->ttbp = 0;
  1026. SAA7146_ISR_CLEAR(budget->dev, MASK_10); /* VPE */
  1027. SAA7146_IER_ENABLE(budget->dev, MASK_10); /* VPE */
  1028. saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */
  1029. return ++budget->feeding1;
  1030. }
  1031. static int budget_start_feed(struct dvb_demux_feed *feed)
  1032. {
  1033. struct dvb_demux *demux = feed->demux;
  1034. struct av7110 *budget = demux->priv;
  1035. int status;
  1036. dprintk(2, "av7110: %p\n", budget);
  1037. spin_lock(&budget->feedlock1);
  1038. feed->pusi_seen = false; /* have a clean section start */
  1039. status = start_ts_capture(budget);
  1040. spin_unlock(&budget->feedlock1);
  1041. return status;
  1042. }
  1043. static int budget_stop_feed(struct dvb_demux_feed *feed)
  1044. {
  1045. struct dvb_demux *demux = feed->demux;
  1046. struct av7110 *budget = demux->priv;
  1047. int status;
  1048. dprintk(2, "budget: %p\n", budget);
  1049. spin_lock(&budget->feedlock1);
  1050. status = stop_ts_capture(budget);
  1051. spin_unlock(&budget->feedlock1);
  1052. return status;
  1053. }
  1054. static void vpeirq(unsigned long cookie)
  1055. {
  1056. struct av7110 *budget = (struct av7110 *)cookie;
  1057. u8 *mem = (u8 *) (budget->grabbing);
  1058. u32 olddma = budget->ttbp;
  1059. u32 newdma = saa7146_read(budget->dev, PCI_VDP3);
  1060. struct dvb_demux *demux = budget->full_ts ? &budget->demux : &budget->demux1;
  1061. /* nearest lower position divisible by 188 */
  1062. newdma -= newdma % 188;
  1063. if (newdma >= TS_BUFLEN)
  1064. return;
  1065. budget->ttbp = newdma;
  1066. if (!budget->feeding1 || (newdma == olddma))
  1067. return;
  1068. /* Ensure streamed PCI data is synced to CPU */
  1069. pci_dma_sync_sg_for_cpu(budget->dev->pci, budget->pt.slist, budget->pt.nents, PCI_DMA_FROMDEVICE);
  1070. #if 0
  1071. /* track rps1 activity */
  1072. printk("vpeirq: %02x Event Counter 1 0x%04x\n",
  1073. mem[olddma],
  1074. saa7146_read(budget->dev, EC1R) & 0x3fff);
  1075. #endif
  1076. if (newdma > olddma)
  1077. /* no wraparound, dump olddma..newdma */
  1078. dvb_dmx_swfilter_packets(demux, mem + olddma, (newdma - olddma) / 188);
  1079. else {
  1080. /* wraparound, dump olddma..buflen and 0..newdma */
  1081. dvb_dmx_swfilter_packets(demux, mem + olddma, (TS_BUFLEN - olddma) / 188);
  1082. dvb_dmx_swfilter_packets(demux, mem, newdma / 188);
  1083. }
  1084. }
  1085. static int av7110_register(struct av7110 *av7110)
  1086. {
  1087. int ret, i;
  1088. struct dvb_demux *dvbdemux = &av7110->demux;
  1089. struct dvb_demux *dvbdemux1 = &av7110->demux1;
  1090. dprintk(4, "%p\n", av7110);
  1091. if (av7110->registered)
  1092. return -1;
  1093. av7110->registered = 1;
  1094. dvbdemux->priv = (void *) av7110;
  1095. for (i = 0; i < 32; i++)
  1096. av7110->handle2filter[i] = NULL;
  1097. dvbdemux->filternum = (av7110->full_ts) ? 256 : 32;
  1098. dvbdemux->feednum = (av7110->full_ts) ? 256 : 32;
  1099. dvbdemux->start_feed = av7110_start_feed;
  1100. dvbdemux->stop_feed = av7110_stop_feed;
  1101. dvbdemux->write_to_decoder = av7110_write_to_decoder;
  1102. dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
  1103. DMX_MEMORY_BASED_FILTERING);
  1104. dvb_dmx_init(&av7110->demux);
  1105. av7110->demux.dmx.get_stc = dvb_get_stc;
  1106. av7110->dmxdev.filternum = (av7110->full_ts) ? 256 : 32;
  1107. av7110->dmxdev.demux = &dvbdemux->dmx;
  1108. av7110->dmxdev.capabilities = 0;
  1109. dvb_dmxdev_init(&av7110->dmxdev, &av7110->dvb_adapter);
  1110. av7110->hw_frontend.source = DMX_FRONTEND_0;
  1111. ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
  1112. if (ret < 0)
  1113. return ret;
  1114. av7110->mem_frontend.source = DMX_MEMORY_FE;
  1115. ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
  1116. if (ret < 0)
  1117. return ret;
  1118. ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx,
  1119. &av7110->hw_frontend);
  1120. if (ret < 0)
  1121. return ret;
  1122. av7110_av_register(av7110);
  1123. av7110_ca_register(av7110);
  1124. #ifdef CONFIG_DVB_AV7110_OSD
  1125. dvb_register_device(&av7110->dvb_adapter, &av7110->osd_dev,
  1126. &dvbdev_osd, av7110, DVB_DEVICE_OSD, 0);
  1127. #endif
  1128. dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net, &dvbdemux->dmx);
  1129. if (budgetpatch) {
  1130. /* initialize software demux1 without its own frontend
  1131. * demux1 hardware is connected to frontend0 of demux0
  1132. */
  1133. dvbdemux1->priv = (void *) av7110;
  1134. dvbdemux1->filternum = 256;
  1135. dvbdemux1->feednum = 256;
  1136. dvbdemux1->start_feed = budget_start_feed;
  1137. dvbdemux1->stop_feed = budget_stop_feed;
  1138. dvbdemux1->write_to_decoder = NULL;
  1139. dvbdemux1->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
  1140. DMX_MEMORY_BASED_FILTERING);
  1141. dvb_dmx_init(&av7110->demux1);
  1142. av7110->dmxdev1.filternum = 256;
  1143. av7110->dmxdev1.demux = &dvbdemux1->dmx;
  1144. av7110->dmxdev1.capabilities = 0;
  1145. dvb_dmxdev_init(&av7110->dmxdev1, &av7110->dvb_adapter);
  1146. dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net1, &dvbdemux1->dmx);
  1147. printk("dvb-ttpci: additional demux1 for budget-patch registered\n");
  1148. }
  1149. return 0;
  1150. }
  1151. static void dvb_unregister(struct av7110 *av7110)
  1152. {
  1153. struct dvb_demux *dvbdemux = &av7110->demux;
  1154. struct dvb_demux *dvbdemux1 = &av7110->demux1;
  1155. dprintk(4, "%p\n", av7110);
  1156. if (!av7110->registered)
  1157. return;
  1158. if (budgetpatch) {
  1159. dvb_net_release(&av7110->dvb_net1);
  1160. dvbdemux->dmx.close(&dvbdemux1->dmx);
  1161. dvb_dmxdev_release(&av7110->dmxdev1);
  1162. dvb_dmx_release(&av7110->demux1);
  1163. }
  1164. dvb_net_release(&av7110->dvb_net);
  1165. dvbdemux->dmx.close(&dvbdemux->dmx);
  1166. dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
  1167. dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
  1168. dvb_dmxdev_release(&av7110->dmxdev);
  1169. dvb_dmx_release(&av7110->demux);
  1170. if (av7110->fe != NULL) {
  1171. dvb_unregister_frontend(av7110->fe);
  1172. dvb_frontend_detach(av7110->fe);
  1173. }
  1174. dvb_unregister_device(av7110->osd_dev);
  1175. av7110_av_unregister(av7110);
  1176. av7110_ca_unregister(av7110);
  1177. }
  1178. /****************************************************************************
  1179. * I2C client commands
  1180. ****************************************************************************/
  1181. int i2c_writereg(struct av7110 *av7110, u8 id, u8 reg, u8 val)
  1182. {
  1183. u8 msg[2] = { reg, val };
  1184. struct i2c_msg msgs;
  1185. msgs.flags = 0;
  1186. msgs.addr = id / 2;
  1187. msgs.len = 2;
  1188. msgs.buf = msg;
  1189. return i2c_transfer(&av7110->i2c_adap, &msgs, 1);
  1190. }
  1191. u8 i2c_readreg(struct av7110 *av7110, u8 id, u8 reg)
  1192. {
  1193. u8 mm1[] = {0x00};
  1194. u8 mm2[] = {0x00};
  1195. struct i2c_msg msgs[2];
  1196. msgs[0].flags = 0;
  1197. msgs[1].flags = I2C_M_RD;
  1198. msgs[0].addr = msgs[1].addr = id / 2;
  1199. mm1[0] = reg;
  1200. msgs[0].len = 1; msgs[1].len = 1;
  1201. msgs[0].buf = mm1; msgs[1].buf = mm2;
  1202. i2c_transfer(&av7110->i2c_adap, msgs, 2);
  1203. return mm2[0];
  1204. }
  1205. /****************************************************************************
  1206. * INITIALIZATION
  1207. ****************************************************************************/
  1208. static int check_firmware(struct av7110* av7110)
  1209. {
  1210. u32 crc = 0, len = 0;
  1211. unsigned char *ptr;
  1212. /* check for firmware magic */
  1213. ptr = av7110->bin_fw;
  1214. if (ptr[0] != 'A' || ptr[1] != 'V' ||
  1215. ptr[2] != 'F' || ptr[3] != 'W') {
  1216. printk("dvb-ttpci: this is not an av7110 firmware\n");
  1217. return -EINVAL;
  1218. }
  1219. ptr += 4;
  1220. /* check dpram file */
  1221. crc = get_unaligned_be32(ptr);
  1222. ptr += 4;
  1223. len = get_unaligned_be32(ptr);
  1224. ptr += 4;
  1225. if (len >= 512) {
  1226. printk("dvb-ttpci: dpram file is way too big.\n");
  1227. return -EINVAL;
  1228. }
  1229. if (crc != crc32_le(0, ptr, len)) {
  1230. printk("dvb-ttpci: crc32 of dpram file does not match.\n");
  1231. return -EINVAL;
  1232. }
  1233. av7110->bin_dpram = ptr;
  1234. av7110->size_dpram = len;
  1235. ptr += len;
  1236. /* check root file */
  1237. crc = get_unaligned_be32(ptr);
  1238. ptr += 4;
  1239. len = get_unaligned_be32(ptr);
  1240. ptr += 4;
  1241. if (len <= 200000 || len >= 300000 ||
  1242. len > ((av7110->bin_fw + av7110->size_fw) - ptr)) {
  1243. printk("dvb-ttpci: root file has strange size (%d). aborting.\n", len);
  1244. return -EINVAL;
  1245. }
  1246. if( crc != crc32_le(0, ptr, len)) {
  1247. printk("dvb-ttpci: crc32 of root file does not match.\n");
  1248. return -EINVAL;
  1249. }
  1250. av7110->bin_root = ptr;
  1251. av7110->size_root = len;
  1252. return 0;
  1253. }
  1254. static void put_firmware(struct av7110* av7110)
  1255. {
  1256. vfree(av7110->bin_fw);
  1257. }
  1258. static int get_firmware(struct av7110* av7110)
  1259. {
  1260. int ret;
  1261. const struct firmware *fw;
  1262. /* request the av7110 firmware, this will block until someone uploads it */
  1263. ret = request_firmware(&fw, "dvb-ttpci-01.fw", &av7110->dev->pci->dev);
  1264. if (ret) {
  1265. if (ret == -ENOENT)
  1266. printk(KERN_ERR "dvb-ttpci: firmware can be downloaded from https://linuxtv.org/download/dvb/firmware/\n");
  1267. return -EINVAL;
  1268. }
  1269. if (fw->size <= 200000) {
  1270. printk("dvb-ttpci: this firmware is way too small.\n");
  1271. release_firmware(fw);
  1272. return -EINVAL;
  1273. }
  1274. /* check if the firmware is available */
  1275. av7110->bin_fw = vmalloc(fw->size);
  1276. if (NULL == av7110->bin_fw) {
  1277. dprintk(1, "out of memory\n");
  1278. release_firmware(fw);
  1279. return -ENOMEM;
  1280. }
  1281. memcpy(av7110->bin_fw, fw->data, fw->size);
  1282. av7110->size_fw = fw->size;
  1283. if ((ret = check_firmware(av7110)))
  1284. vfree(av7110->bin_fw);
  1285. release_firmware(fw);
  1286. return ret;
  1287. }
  1288. static int alps_bsrv2_tuner_set_params(struct dvb_frontend *fe)
  1289. {
  1290. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1291. struct av7110* av7110 = fe->dvb->priv;
  1292. u8 pwr = 0;
  1293. u8 buf[4];
  1294. struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
  1295. u32 div = (p->frequency + 479500) / 125;
  1296. if (p->frequency > 2000000)
  1297. pwr = 3;
  1298. else if (p->frequency > 1800000)
  1299. pwr = 2;
  1300. else if (p->frequency > 1600000)
  1301. pwr = 1;
  1302. else if (p->frequency > 1200000)
  1303. pwr = 0;
  1304. else if (p->frequency >= 1100000)
  1305. pwr = 1;
  1306. else
  1307. pwr = 2;
  1308. buf[0] = (div >> 8) & 0x7f;
  1309. buf[1] = div & 0xff;
  1310. buf[2] = ((div & 0x18000) >> 10) | 0x95;
  1311. buf[3] = (pwr << 6) | 0x30;
  1312. // NOTE: since we're using a prescaler of 2, we set the
  1313. // divisor frequency to 62.5kHz and divide by 125 above
  1314. if (fe->ops.i2c_gate_ctrl)
  1315. fe->ops.i2c_gate_ctrl(fe, 1);
  1316. if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1)
  1317. return -EIO;
  1318. return 0;
  1319. }
  1320. static struct ves1x93_config alps_bsrv2_config = {
  1321. .demod_address = 0x08,
  1322. .xin = 90100000UL,
  1323. .invert_pwm = 0,
  1324. };
  1325. static int alps_tdbe2_tuner_set_params(struct dvb_frontend *fe)
  1326. {
  1327. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1328. struct av7110* av7110 = fe->dvb->priv;
  1329. u32 div;
  1330. u8 data[4];
  1331. struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) };
  1332. div = (p->frequency + 35937500 + 31250) / 62500;
  1333. data[0] = (div >> 8) & 0x7f;
  1334. data[1] = div & 0xff;
  1335. data[2] = 0x85 | ((div >> 10) & 0x60);
  1336. data[3] = (p->frequency < 174000000 ? 0x88 : p->frequency < 470000000 ? 0x84 : 0x81);
  1337. if (fe->ops.i2c_gate_ctrl)
  1338. fe->ops.i2c_gate_ctrl(fe, 1);
  1339. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
  1340. return -EIO;
  1341. return 0;
  1342. }
  1343. static struct ves1820_config alps_tdbe2_config = {
  1344. .demod_address = 0x09,
  1345. .xin = 57840000UL,
  1346. .invert = 1,
  1347. .selagc = VES1820_SELAGC_SIGNAMPERR,
  1348. };
  1349. static int grundig_29504_451_tuner_set_params(struct dvb_frontend *fe)
  1350. {
  1351. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1352. struct av7110* av7110 = fe->dvb->priv;
  1353. u32 div;
  1354. u8 data[4];
  1355. struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
  1356. div = p->frequency / 125;
  1357. data[0] = (div >> 8) & 0x7f;
  1358. data[1] = div & 0xff;
  1359. data[2] = 0x8e;
  1360. data[3] = 0x00;
  1361. if (fe->ops.i2c_gate_ctrl)
  1362. fe->ops.i2c_gate_ctrl(fe, 1);
  1363. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
  1364. return -EIO;
  1365. return 0;
  1366. }
  1367. static struct tda8083_config grundig_29504_451_config = {
  1368. .demod_address = 0x68,
  1369. };
  1370. static int philips_cd1516_tuner_set_params(struct dvb_frontend *fe)
  1371. {
  1372. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1373. struct av7110* av7110 = fe->dvb->priv;
  1374. u32 div;
  1375. u32 f = p->frequency;
  1376. u8 data[4];
  1377. struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
  1378. div = (f + 36125000 + 31250) / 62500;
  1379. data[0] = (div >> 8) & 0x7f;
  1380. data[1] = div & 0xff;
  1381. data[2] = 0x8e;
  1382. data[3] = (f < 174000000 ? 0xa1 : f < 470000000 ? 0x92 : 0x34);
  1383. if (fe->ops.i2c_gate_ctrl)
  1384. fe->ops.i2c_gate_ctrl(fe, 1);
  1385. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
  1386. return -EIO;
  1387. return 0;
  1388. }
  1389. static struct ves1820_config philips_cd1516_config = {
  1390. .demod_address = 0x09,
  1391. .xin = 57840000UL,
  1392. .invert = 1,
  1393. .selagc = VES1820_SELAGC_SIGNAMPERR,
  1394. };
  1395. static int alps_tdlb7_tuner_set_params(struct dvb_frontend *fe)
  1396. {
  1397. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1398. struct av7110* av7110 = fe->dvb->priv;
  1399. u32 div, pwr;
  1400. u8 data[4];
  1401. struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) };
  1402. div = (p->frequency + 36200000) / 166666;
  1403. if (p->frequency <= 782000000)
  1404. pwr = 1;
  1405. else
  1406. pwr = 2;
  1407. data[0] = (div >> 8) & 0x7f;
  1408. data[1] = div & 0xff;
  1409. data[2] = 0x85;
  1410. data[3] = pwr << 6;
  1411. if (fe->ops.i2c_gate_ctrl)
  1412. fe->ops.i2c_gate_ctrl(fe, 1);
  1413. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
  1414. return -EIO;
  1415. return 0;
  1416. }
  1417. static int alps_tdlb7_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
  1418. {
  1419. #if IS_ENABLED(CONFIG_DVB_SP8870)
  1420. struct av7110* av7110 = fe->dvb->priv;
  1421. return request_firmware(fw, name, &av7110->dev->pci->dev);
  1422. #else
  1423. return -EINVAL;
  1424. #endif
  1425. }
  1426. static const struct sp8870_config alps_tdlb7_config = {
  1427. .demod_address = 0x71,
  1428. .request_firmware = alps_tdlb7_request_firmware,
  1429. };
  1430. static u8 nexusca_stv0297_inittab[] = {
  1431. 0x80, 0x01,
  1432. 0x80, 0x00,
  1433. 0x81, 0x01,
  1434. 0x81, 0x00,
  1435. 0x00, 0x09,
  1436. 0x01, 0x69,
  1437. 0x03, 0x00,
  1438. 0x04, 0x00,
  1439. 0x07, 0x00,
  1440. 0x08, 0x00,
  1441. 0x20, 0x00,
  1442. 0x21, 0x40,
  1443. 0x22, 0x00,
  1444. 0x23, 0x00,
  1445. 0x24, 0x40,
  1446. 0x25, 0x88,
  1447. 0x30, 0xff,
  1448. 0x31, 0x00,
  1449. 0x32, 0xff,
  1450. 0x33, 0x00,
  1451. 0x34, 0x50,
  1452. 0x35, 0x7f,
  1453. 0x36, 0x00,
  1454. 0x37, 0x20,
  1455. 0x38, 0x00,
  1456. 0x40, 0x1c,
  1457. 0x41, 0xff,
  1458. 0x42, 0x29,
  1459. 0x43, 0x00,
  1460. 0x44, 0xff,
  1461. 0x45, 0x00,
  1462. 0x46, 0x00,
  1463. 0x49, 0x04,
  1464. 0x4a, 0x00,
  1465. 0x4b, 0x7b,
  1466. 0x52, 0x30,
  1467. 0x55, 0xae,
  1468. 0x56, 0x47,
  1469. 0x57, 0xe1,
  1470. 0x58, 0x3a,
  1471. 0x5a, 0x1e,
  1472. 0x5b, 0x34,
  1473. 0x60, 0x00,
  1474. 0x63, 0x00,
  1475. 0x64, 0x00,
  1476. 0x65, 0x00,
  1477. 0x66, 0x00,
  1478. 0x67, 0x00,
  1479. 0x68, 0x00,
  1480. 0x69, 0x00,
  1481. 0x6a, 0x02,
  1482. 0x6b, 0x00,
  1483. 0x70, 0xff,
  1484. 0x71, 0x00,
  1485. 0x72, 0x00,
  1486. 0x73, 0x00,
  1487. 0x74, 0x0c,
  1488. 0x80, 0x00,
  1489. 0x81, 0x00,
  1490. 0x82, 0x00,
  1491. 0x83, 0x00,
  1492. 0x84, 0x04,
  1493. 0x85, 0x80,
  1494. 0x86, 0x24,
  1495. 0x87, 0x78,
  1496. 0x88, 0x10,
  1497. 0x89, 0x00,
  1498. 0x90, 0x01,
  1499. 0x91, 0x01,
  1500. 0xa0, 0x04,
  1501. 0xa1, 0x00,
  1502. 0xa2, 0x00,
  1503. 0xb0, 0x91,
  1504. 0xb1, 0x0b,
  1505. 0xc0, 0x53,
  1506. 0xc1, 0x70,
  1507. 0xc2, 0x12,
  1508. 0xd0, 0x00,
  1509. 0xd1, 0x00,
  1510. 0xd2, 0x00,
  1511. 0xd3, 0x00,
  1512. 0xd4, 0x00,
  1513. 0xd5, 0x00,
  1514. 0xde, 0x00,
  1515. 0xdf, 0x00,
  1516. 0x61, 0x49,
  1517. 0x62, 0x0b,
  1518. 0x53, 0x08,
  1519. 0x59, 0x08,
  1520. 0xff, 0xff,
  1521. };
  1522. static int nexusca_stv0297_tuner_set_params(struct dvb_frontend *fe)
  1523. {
  1524. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1525. struct av7110* av7110 = fe->dvb->priv;
  1526. u32 div;
  1527. u8 data[4];
  1528. struct i2c_msg msg = { .addr = 0x63, .flags = 0, .buf = data, .len = sizeof(data) };
  1529. struct i2c_msg readmsg = { .addr = 0x63, .flags = I2C_M_RD, .buf = data, .len = 1 };
  1530. int i;
  1531. div = (p->frequency + 36150000 + 31250) / 62500;
  1532. data[0] = (div >> 8) & 0x7f;
  1533. data[1] = div & 0xff;
  1534. data[2] = 0xce;
  1535. if (p->frequency < 45000000)
  1536. return -EINVAL;
  1537. else if (p->frequency < 137000000)
  1538. data[3] = 0x01;
  1539. else if (p->frequency < 403000000)
  1540. data[3] = 0x02;
  1541. else if (p->frequency < 860000000)
  1542. data[3] = 0x04;
  1543. else
  1544. return -EINVAL;
  1545. if (fe->ops.i2c_gate_ctrl)
  1546. fe->ops.i2c_gate_ctrl(fe, 1);
  1547. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1) {
  1548. printk("nexusca: pll transfer failed!\n");
  1549. return -EIO;
  1550. }
  1551. // wait for PLL lock
  1552. for(i = 0; i < 20; i++) {
  1553. if (fe->ops.i2c_gate_ctrl)
  1554. fe->ops.i2c_gate_ctrl(fe, 1);
  1555. if (i2c_transfer(&av7110->i2c_adap, &readmsg, 1) == 1)
  1556. if (data[0] & 0x40) break;
  1557. msleep(10);
  1558. }
  1559. return 0;
  1560. }
  1561. static struct stv0297_config nexusca_stv0297_config = {
  1562. .demod_address = 0x1C,
  1563. .inittab = nexusca_stv0297_inittab,
  1564. .invert = 1,
  1565. .stop_during_read = 1,
  1566. };
  1567. static int grundig_29504_401_tuner_set_params(struct dvb_frontend *fe)
  1568. {
  1569. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1570. struct av7110* av7110 = fe->dvb->priv;
  1571. u32 div;
  1572. u8 cfg, cpump, band_select;
  1573. u8 data[4];
  1574. struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
  1575. div = (36125000 + p->frequency) / 166666;
  1576. cfg = 0x88;
  1577. if (p->frequency < 175000000)
  1578. cpump = 2;
  1579. else if (p->frequency < 390000000)
  1580. cpump = 1;
  1581. else if (p->frequency < 470000000)
  1582. cpump = 2;
  1583. else if (p->frequency < 750000000)
  1584. cpump = 1;
  1585. else
  1586. cpump = 3;
  1587. if (p->frequency < 175000000)
  1588. band_select = 0x0e;
  1589. else if (p->frequency < 470000000)
  1590. band_select = 0x05;
  1591. else
  1592. band_select = 0x03;
  1593. data[0] = (div >> 8) & 0x7f;
  1594. data[1] = div & 0xff;
  1595. data[2] = ((div >> 10) & 0x60) | cfg;
  1596. data[3] = (cpump << 6) | band_select;
  1597. if (fe->ops.i2c_gate_ctrl)
  1598. fe->ops.i2c_gate_ctrl(fe, 1);
  1599. if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1) return -EIO;
  1600. return 0;
  1601. }
  1602. static struct l64781_config grundig_29504_401_config = {
  1603. .demod_address = 0x55,
  1604. };
  1605. static int av7110_fe_lock_fix(struct av7110 *av7110, enum fe_status status)
  1606. {
  1607. int ret = 0;
  1608. int synced = (status & FE_HAS_LOCK) ? 1 : 0;
  1609. av7110->fe_status = status;
  1610. if (av7110->fe_synced == synced)
  1611. return 0;
  1612. if (av7110->playing) {
  1613. av7110->fe_synced = synced;
  1614. return 0;
  1615. }
  1616. if (mutex_lock_interruptible(&av7110->pid_mutex))
  1617. return -ERESTARTSYS;
  1618. if (synced) {
  1619. ret = SetPIDs(av7110, av7110->pids[DMX_PES_VIDEO],
  1620. av7110->pids[DMX_PES_AUDIO],
  1621. av7110->pids[DMX_PES_TELETEXT], 0,
  1622. av7110->pids[DMX_PES_PCR]);
  1623. if (!ret)
  1624. ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
  1625. } else {
  1626. ret = SetPIDs(av7110, 0, 0, 0, 0, 0);
  1627. if (!ret) {
  1628. ret = av7110_fw_cmd(av7110, COMTYPE_PID_FILTER, FlushTSQueue, 0);
  1629. if (!ret)
  1630. ret = av7110_wait_msgstate(av7110, GPMQBusy);
  1631. }
  1632. }
  1633. if (!ret)
  1634. av7110->fe_synced = synced;
  1635. mutex_unlock(&av7110->pid_mutex);
  1636. return ret;
  1637. }
  1638. static int av7110_fe_set_frontend(struct dvb_frontend *fe)
  1639. {
  1640. struct av7110* av7110 = fe->dvb->priv;
  1641. int ret = av7110_fe_lock_fix(av7110, 0);
  1642. if (!ret)
  1643. ret = av7110->fe_set_frontend(fe);
  1644. return ret;
  1645. }
  1646. static int av7110_fe_init(struct dvb_frontend* fe)
  1647. {
  1648. struct av7110* av7110 = fe->dvb->priv;
  1649. int ret = av7110_fe_lock_fix(av7110, 0);
  1650. if (!ret)
  1651. ret = av7110->fe_init(fe);
  1652. return ret;
  1653. }
  1654. static int av7110_fe_read_status(struct dvb_frontend *fe,
  1655. enum fe_status *status)
  1656. {
  1657. struct av7110* av7110 = fe->dvb->priv;
  1658. /* call the real implementation */
  1659. int ret = av7110->fe_read_status(fe, status);
  1660. if (!ret)
  1661. if (((*status ^ av7110->fe_status) & FE_HAS_LOCK) && (*status & FE_HAS_LOCK))
  1662. ret = av7110_fe_lock_fix(av7110, *status);
  1663. return ret;
  1664. }
  1665. static int av7110_fe_diseqc_reset_overload(struct dvb_frontend* fe)
  1666. {
  1667. struct av7110* av7110 = fe->dvb->priv;
  1668. int ret = av7110_fe_lock_fix(av7110, 0);
  1669. if (!ret)
  1670. ret = av7110->fe_diseqc_reset_overload(fe);
  1671. return ret;
  1672. }
  1673. static int av7110_fe_diseqc_send_master_cmd(struct dvb_frontend* fe,
  1674. struct dvb_diseqc_master_cmd* cmd)
  1675. {
  1676. struct av7110* av7110 = fe->dvb->priv;
  1677. int ret = av7110_fe_lock_fix(av7110, 0);
  1678. if (!ret) {
  1679. av7110->saved_master_cmd = *cmd;
  1680. ret = av7110->fe_diseqc_send_master_cmd(fe, cmd);
  1681. }
  1682. return ret;
  1683. }
  1684. static int av7110_fe_diseqc_send_burst(struct dvb_frontend *fe,
  1685. enum fe_sec_mini_cmd minicmd)
  1686. {
  1687. struct av7110* av7110 = fe->dvb->priv;
  1688. int ret = av7110_fe_lock_fix(av7110, 0);
  1689. if (!ret) {
  1690. av7110->saved_minicmd = minicmd;
  1691. ret = av7110->fe_diseqc_send_burst(fe, minicmd);
  1692. }
  1693. return ret;
  1694. }
  1695. static int av7110_fe_set_tone(struct dvb_frontend *fe,
  1696. enum fe_sec_tone_mode tone)
  1697. {
  1698. struct av7110* av7110 = fe->dvb->priv;
  1699. int ret = av7110_fe_lock_fix(av7110, 0);
  1700. if (!ret) {
  1701. av7110->saved_tone = tone;
  1702. ret = av7110->fe_set_tone(fe, tone);
  1703. }
  1704. return ret;
  1705. }
  1706. static int av7110_fe_set_voltage(struct dvb_frontend *fe,
  1707. enum fe_sec_voltage voltage)
  1708. {
  1709. struct av7110* av7110 = fe->dvb->priv;
  1710. int ret = av7110_fe_lock_fix(av7110, 0);
  1711. if (!ret) {
  1712. av7110->saved_voltage = voltage;
  1713. ret = av7110->fe_set_voltage(fe, voltage);
  1714. }
  1715. return ret;
  1716. }
  1717. static int av7110_fe_dishnetwork_send_legacy_command(struct dvb_frontend* fe, unsigned long cmd)
  1718. {
  1719. struct av7110* av7110 = fe->dvb->priv;
  1720. int ret = av7110_fe_lock_fix(av7110, 0);
  1721. if (!ret)
  1722. ret = av7110->fe_dishnetwork_send_legacy_command(fe, cmd);
  1723. return ret;
  1724. }
  1725. static void dvb_s_recover(struct av7110* av7110)
  1726. {
  1727. av7110_fe_init(av7110->fe);
  1728. av7110_fe_set_voltage(av7110->fe, av7110->saved_voltage);
  1729. if (av7110->saved_master_cmd.msg_len) {
  1730. msleep(20);
  1731. av7110_fe_diseqc_send_master_cmd(av7110->fe, &av7110->saved_master_cmd);
  1732. }
  1733. msleep(20);
  1734. av7110_fe_diseqc_send_burst(av7110->fe, av7110->saved_minicmd);
  1735. msleep(20);
  1736. av7110_fe_set_tone(av7110->fe, av7110->saved_tone);
  1737. av7110_fe_set_frontend(av7110->fe);
  1738. }
  1739. static u8 read_pwm(struct av7110* av7110)
  1740. {
  1741. u8 b = 0xff;
  1742. u8 pwm;
  1743. struct i2c_msg msg[] = { { .addr = 0x50,.flags = 0,.buf = &b,.len = 1 },
  1744. { .addr = 0x50,.flags = I2C_M_RD,.buf = &pwm,.len = 1} };
  1745. if ((i2c_transfer(&av7110->i2c_adap, msg, 2) != 2) || (pwm == 0xff))
  1746. pwm = 0x48;
  1747. return pwm;
  1748. }
  1749. static int frontend_init(struct av7110 *av7110)
  1750. {
  1751. int ret;
  1752. if (av7110->dev->pci->subsystem_vendor == 0x110a) {
  1753. switch(av7110->dev->pci->subsystem_device) {
  1754. case 0x0000: // Fujitsu/Siemens DVB-Cable (ves1820/Philips CD1516(??))
  1755. av7110->fe = dvb_attach(ves1820_attach, &philips_cd1516_config,
  1756. &av7110->i2c_adap, read_pwm(av7110));
  1757. if (av7110->fe) {
  1758. av7110->fe->ops.tuner_ops.set_params = philips_cd1516_tuner_set_params;
  1759. }
  1760. break;
  1761. }
  1762. } else if (av7110->dev->pci->subsystem_vendor == 0x13c2) {
  1763. switch(av7110->dev->pci->subsystem_device) {
  1764. case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
  1765. case 0x0003: // Hauppauge/TT WinTV Nexus-S Rev 2.X
  1766. case 0x1002: // Hauppauge/TT WinTV DVB-S rev1.3SE
  1767. // try the ALPS BSRV2 first of all
  1768. av7110->fe = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &av7110->i2c_adap);
  1769. if (av7110->fe) {
  1770. av7110->fe->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params;
  1771. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1772. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1773. av7110->fe->ops.set_tone = av7110_set_tone;
  1774. av7110->recover = dvb_s_recover;
  1775. break;
  1776. }
  1777. // try the ALPS BSRU6 now
  1778. av7110->fe = dvb_attach(stv0299_attach, &alps_bsru6_config, &av7110->i2c_adap);
  1779. if (av7110->fe) {
  1780. av7110->fe->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
  1781. av7110->fe->tuner_priv = &av7110->i2c_adap;
  1782. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1783. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1784. av7110->fe->ops.set_tone = av7110_set_tone;
  1785. av7110->recover = dvb_s_recover;
  1786. break;
  1787. }
  1788. // Try the grundig 29504-451
  1789. av7110->fe = dvb_attach(tda8083_attach, &grundig_29504_451_config, &av7110->i2c_adap);
  1790. if (av7110->fe) {
  1791. av7110->fe->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params;
  1792. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1793. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1794. av7110->fe->ops.set_tone = av7110_set_tone;
  1795. av7110->recover = dvb_s_recover;
  1796. break;
  1797. }
  1798. /* Try DVB-C cards */
  1799. switch(av7110->dev->pci->subsystem_device) {
  1800. case 0x0000:
  1801. /* Siemens DVB-C (full-length card) VES1820/Philips CD1516 */
  1802. av7110->fe = dvb_attach(ves1820_attach, &philips_cd1516_config, &av7110->i2c_adap,
  1803. read_pwm(av7110));
  1804. if (av7110->fe) {
  1805. av7110->fe->ops.tuner_ops.set_params = philips_cd1516_tuner_set_params;
  1806. }
  1807. break;
  1808. case 0x0003:
  1809. /* Hauppauge DVB-C 2.1 VES1820/ALPS TDBE2 */
  1810. av7110->fe = dvb_attach(ves1820_attach, &alps_tdbe2_config, &av7110->i2c_adap,
  1811. read_pwm(av7110));
  1812. if (av7110->fe) {
  1813. av7110->fe->ops.tuner_ops.set_params = alps_tdbe2_tuner_set_params;
  1814. }
  1815. break;
  1816. }
  1817. break;
  1818. case 0x0001: // Hauppauge/TT Nexus-T premium rev1.X
  1819. {
  1820. struct dvb_frontend *fe;
  1821. // try ALPS TDLB7 first, then Grundig 29504-401
  1822. fe = dvb_attach(sp8870_attach, &alps_tdlb7_config, &av7110->i2c_adap);
  1823. if (fe) {
  1824. fe->ops.tuner_ops.set_params = alps_tdlb7_tuner_set_params;
  1825. av7110->fe = fe;
  1826. break;
  1827. }
  1828. }
  1829. /* fall-thru */
  1830. case 0x0008: // Hauppauge/TT DVB-T
  1831. // Grundig 29504-401
  1832. av7110->fe = dvb_attach(l64781_attach, &grundig_29504_401_config, &av7110->i2c_adap);
  1833. if (av7110->fe)
  1834. av7110->fe->ops.tuner_ops.set_params = grundig_29504_401_tuner_set_params;
  1835. break;
  1836. case 0x0002: // Hauppauge/TT DVB-C premium rev2.X
  1837. av7110->fe = dvb_attach(ves1820_attach, &alps_tdbe2_config, &av7110->i2c_adap, read_pwm(av7110));
  1838. if (av7110->fe) {
  1839. av7110->fe->ops.tuner_ops.set_params = alps_tdbe2_tuner_set_params;
  1840. }
  1841. break;
  1842. case 0x0004: // Galaxis DVB-S rev1.3
  1843. /* ALPS BSRV2 */
  1844. av7110->fe = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &av7110->i2c_adap);
  1845. if (av7110->fe) {
  1846. av7110->fe->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params;
  1847. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1848. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1849. av7110->fe->ops.set_tone = av7110_set_tone;
  1850. av7110->recover = dvb_s_recover;
  1851. }
  1852. break;
  1853. case 0x0006: /* Fujitsu-Siemens DVB-S rev 1.6 */
  1854. /* Grundig 29504-451 */
  1855. av7110->fe = dvb_attach(tda8083_attach, &grundig_29504_451_config, &av7110->i2c_adap);
  1856. if (av7110->fe) {
  1857. av7110->fe->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params;
  1858. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1859. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1860. av7110->fe->ops.set_tone = av7110_set_tone;
  1861. av7110->recover = dvb_s_recover;
  1862. }
  1863. break;
  1864. case 0x000A: // Hauppauge/TT Nexus-CA rev1.X
  1865. av7110->fe = dvb_attach(stv0297_attach, &nexusca_stv0297_config, &av7110->i2c_adap);
  1866. if (av7110->fe) {
  1867. av7110->fe->ops.tuner_ops.set_params = nexusca_stv0297_tuner_set_params;
  1868. /* set TDA9819 into DVB mode */
  1869. saa7146_setgpio(av7110->dev, 1, SAA7146_GPIO_OUTLO); // TDA9819 pin9(STD)
  1870. saa7146_setgpio(av7110->dev, 3, SAA7146_GPIO_OUTLO); // TDA9819 pin30(VIF)
  1871. /* tuner on this needs a slower i2c bus speed */
  1872. av7110->dev->i2c_bitrate = SAA7146_I2C_BUS_BIT_RATE_240;
  1873. break;
  1874. }
  1875. break;
  1876. case 0x000E: /* Hauppauge/TT Nexus-S rev 2.3 */
  1877. /* ALPS BSBE1 */
  1878. av7110->fe = dvb_attach(stv0299_attach, &alps_bsbe1_config, &av7110->i2c_adap);
  1879. if (av7110->fe) {
  1880. av7110->fe->ops.tuner_ops.set_params = alps_bsbe1_tuner_set_params;
  1881. av7110->fe->tuner_priv = &av7110->i2c_adap;
  1882. if (dvb_attach(lnbp21_attach, av7110->fe, &av7110->i2c_adap, 0, 0) == NULL) {
  1883. printk("dvb-ttpci: LNBP21 not found!\n");
  1884. if (av7110->fe->ops.release)
  1885. av7110->fe->ops.release(av7110->fe);
  1886. av7110->fe = NULL;
  1887. } else {
  1888. av7110->fe->ops.dishnetwork_send_legacy_command = NULL;
  1889. av7110->recover = dvb_s_recover;
  1890. }
  1891. }
  1892. break;
  1893. }
  1894. }
  1895. if (!av7110->fe) {
  1896. /* FIXME: propagate the failure code from the lower layers */
  1897. ret = -ENOMEM;
  1898. printk("dvb-ttpci: A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n",
  1899. av7110->dev->pci->vendor,
  1900. av7110->dev->pci->device,
  1901. av7110->dev->pci->subsystem_vendor,
  1902. av7110->dev->pci->subsystem_device);
  1903. } else {
  1904. FE_FUNC_OVERRIDE(av7110->fe->ops.init, av7110->fe_init, av7110_fe_init);
  1905. FE_FUNC_OVERRIDE(av7110->fe->ops.read_status, av7110->fe_read_status, av7110_fe_read_status);
  1906. FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_reset_overload, av7110->fe_diseqc_reset_overload, av7110_fe_diseqc_reset_overload);
  1907. FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_send_master_cmd, av7110->fe_diseqc_send_master_cmd, av7110_fe_diseqc_send_master_cmd);
  1908. FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_send_burst, av7110->fe_diseqc_send_burst, av7110_fe_diseqc_send_burst);
  1909. FE_FUNC_OVERRIDE(av7110->fe->ops.set_tone, av7110->fe_set_tone, av7110_fe_set_tone);
  1910. FE_FUNC_OVERRIDE(av7110->fe->ops.set_voltage, av7110->fe_set_voltage, av7110_fe_set_voltage);
  1911. FE_FUNC_OVERRIDE(av7110->fe->ops.dishnetwork_send_legacy_command, av7110->fe_dishnetwork_send_legacy_command, av7110_fe_dishnetwork_send_legacy_command);
  1912. FE_FUNC_OVERRIDE(av7110->fe->ops.set_frontend, av7110->fe_set_frontend, av7110_fe_set_frontend);
  1913. ret = dvb_register_frontend(&av7110->dvb_adapter, av7110->fe);
  1914. if (ret < 0) {
  1915. printk("av7110: Frontend registration failed!\n");
  1916. dvb_frontend_detach(av7110->fe);
  1917. av7110->fe = NULL;
  1918. }
  1919. }
  1920. return ret;
  1921. }
  1922. /* Budgetpatch note:
  1923. * Original hardware design by Roberto Deza:
  1924. * There is a DVB_Wiki at
  1925. * https://linuxtv.org
  1926. *
  1927. * New software triggering design by Emard that works on
  1928. * original Roberto Deza's hardware:
  1929. *
  1930. * rps1 code for budgetpatch will copy internal HS event to GPIO3 pin.
  1931. * GPIO3 is in budget-patch hardware connectd to port B VSYNC
  1932. * HS is an internal event of 7146, accessible with RPS
  1933. * and temporarily raised high every n lines
  1934. * (n in defined in the RPS_THRESH1 counter threshold)
  1935. * I think HS is raised high on the beginning of the n-th line
  1936. * and remains high until this n-th line that triggered
  1937. * it is completely received. When the receiption of n-th line
  1938. * ends, HS is lowered.
  1939. *
  1940. * To transmit data over DMA, 7146 needs changing state at
  1941. * port B VSYNC pin. Any changing of port B VSYNC will
  1942. * cause some DMA data transfer, with more or less packets loss.
  1943. * It depends on the phase and frequency of VSYNC and
  1944. * the way of 7146 is instructed to trigger on port B (defined
  1945. * in DD1_INIT register, 3rd nibble from the right valid
  1946. * numbers are 0-7, see datasheet)
  1947. *
  1948. * The correct triggering can minimize packet loss,
  1949. * dvbtraffic should give this stable bandwidths:
  1950. * 22k transponder = 33814 kbit/s
  1951. * 27.5k transponder = 38045 kbit/s
  1952. * by experiment it is found that the best results
  1953. * (stable bandwidths and almost no packet loss)
  1954. * are obtained using DD1_INIT triggering number 2
  1955. * (Va at rising edge of VS Fa = HS x VS-failing forced toggle)
  1956. * and a VSYNC phase that occurs in the middle of DMA transfer
  1957. * (about byte 188*512=96256 in the DMA window).
  1958. *
  1959. * Phase of HS is still not clear to me how to control,
  1960. * It just happens to be so. It can be seen if one enables
  1961. * RPS_IRQ and print Event Counter 1 in vpeirq(). Every
  1962. * time RPS_INTERRUPT is called, the Event Counter 1 will
  1963. * increment. That's how the 7146 is programmed to do event
  1964. * counting in this budget-patch.c
  1965. * I *think* HPS setting has something to do with the phase
  1966. * of HS but I can't be 100% sure in that.
  1967. *
  1968. * hardware debug note: a working budget card (including budget patch)
  1969. * with vpeirq() interrupt setup in mode "0x90" (every 64K) will
  1970. * generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
  1971. * and that means 3*25=75 Hz of interrupt freqency, as seen by
  1972. * watch cat /proc/interrupts
  1973. *
  1974. * If this frequency is 3x lower (and data received in the DMA
  1975. * buffer don't start with 0x47, but in the middle of packets,
  1976. * whose lengths appear to be like 188 292 188 104 etc.
  1977. * this means VSYNC line is not connected in the hardware.
  1978. * (check soldering pcb and pins)
  1979. * The same behaviour of missing VSYNC can be duplicated on budget
  1980. * cards, by seting DD1_INIT trigger mode 7 in 3rd nibble.
  1981. */
  1982. static int av7110_attach(struct saa7146_dev* dev,
  1983. struct saa7146_pci_extension_data *pci_ext)
  1984. {
  1985. const int length = TS_WIDTH * TS_HEIGHT;
  1986. struct pci_dev *pdev = dev->pci;
  1987. struct av7110 *av7110;
  1988. struct task_struct *thread;
  1989. int ret, count = 0;
  1990. dprintk(4, "dev: %p\n", dev);
  1991. /* Set RPS_IRQ to 1 to track rps1 activity.
  1992. * Enabling this won't send any interrupt to PC CPU.
  1993. */
  1994. #define RPS_IRQ 0
  1995. if (budgetpatch == 1) {
  1996. budgetpatch = 0;
  1997. /* autodetect the presence of budget patch
  1998. * this only works if saa7146 has been recently
  1999. * reset with with MASK_31 to MC1
  2000. *
  2001. * will wait for VBI_B event (vertical blank at port B)
  2002. * and will reset GPIO3 after VBI_B is detected.
  2003. * (GPIO3 should be raised high by CPU to
  2004. * test if GPIO3 will generate vertical blank signal
  2005. * in budget patch GPIO3 is connected to VSYNC_B
  2006. */
  2007. /* RESET SAA7146 */
  2008. saa7146_write(dev, MC1, MASK_31);
  2009. /* autodetection success seems to be time-dependend after reset */
  2010. /* Fix VSYNC level */
  2011. saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
  2012. /* set vsync_b triggering */
  2013. saa7146_write(dev, DD1_STREAM_B, 0);
  2014. /* port B VSYNC at rising edge */
  2015. saa7146_write(dev, DD1_INIT, 0x00000200);
  2016. saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI
  2017. saa7146_write(dev, MC2,
  2018. 1 * (MASK_08 | MASK_24) | // BRS control
  2019. 0 * (MASK_09 | MASK_25) | // a
  2020. 1 * (MASK_10 | MASK_26) | // b
  2021. 0 * (MASK_06 | MASK_22) | // HPS_CTRL1
  2022. 0 * (MASK_05 | MASK_21) | // HPS_CTRL2
  2023. 0 * (MASK_01 | MASK_15) // DEBI
  2024. );
  2025. /* start writing RPS1 code from beginning */
  2026. count = 0;
  2027. /* Disable RPS1 */
  2028. saa7146_write(dev, MC1, MASK_29);
  2029. /* RPS1 timeout disable */
  2030. saa7146_write(dev, RPS_TOV1, 0);
  2031. WRITE_RPS1(CMD_PAUSE | EVT_VBI_B);
  2032. WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
  2033. WRITE_RPS1(GPIO3_MSK);
  2034. WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
  2035. #if RPS_IRQ
  2036. /* issue RPS1 interrupt to increment counter */
  2037. WRITE_RPS1(CMD_INTERRUPT);
  2038. #endif
  2039. WRITE_RPS1(CMD_STOP);
  2040. /* Jump to begin of RPS program as safety measure (p37) */
  2041. WRITE_RPS1(CMD_JUMP);
  2042. WRITE_RPS1(dev->d_rps1.dma_handle);
  2043. #if RPS_IRQ
  2044. /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
  2045. * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
  2046. * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
  2047. */
  2048. saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
  2049. /* set event counter 1 threshold to maximum allowed value (rEC p55) */
  2050. saa7146_write(dev, ECT1R, 0x3fff );
  2051. #endif
  2052. /* Set RPS1 Address register to point to RPS code (r108 p42) */
  2053. saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
  2054. /* Enable RPS1, (rFC p33) */
  2055. saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
  2056. mdelay(10);
  2057. /* now send VSYNC_B to rps1 by rising GPIO3 */
  2058. saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
  2059. mdelay(10);
  2060. /* if rps1 responded by lowering the GPIO3,
  2061. * then we have budgetpatch hardware
  2062. */
  2063. if ((saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0) {
  2064. budgetpatch = 1;
  2065. printk("dvb-ttpci: BUDGET-PATCH DETECTED.\n");
  2066. }
  2067. /* Disable RPS1 */
  2068. saa7146_write(dev, MC1, ( MASK_29 ));
  2069. #if RPS_IRQ
  2070. printk("dvb-ttpci: Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
  2071. #endif
  2072. }
  2073. /* prepare the av7110 device struct */
  2074. av7110 = kzalloc(sizeof(struct av7110), GFP_KERNEL);
  2075. if (!av7110) {
  2076. dprintk(1, "out of memory\n");
  2077. return -ENOMEM;
  2078. }
  2079. av7110->card_name = (char*) pci_ext->ext_priv;
  2080. av7110->dev = dev;
  2081. dev->ext_priv = av7110;
  2082. ret = get_firmware(av7110);
  2083. if (ret < 0)
  2084. goto err_kfree_0;
  2085. ret = dvb_register_adapter(&av7110->dvb_adapter, av7110->card_name,
  2086. THIS_MODULE, &dev->pci->dev, adapter_nr);
  2087. if (ret < 0)
  2088. goto err_put_firmware_1;
  2089. /* the Siemens DVB needs this if you want to have the i2c chips
  2090. get recognized before the main driver is fully loaded */
  2091. saa7146_write(dev, GPIO_CTRL, 0x500000);
  2092. strlcpy(av7110->i2c_adap.name, pci_ext->ext_priv, sizeof(av7110->i2c_adap.name));
  2093. saa7146_i2c_adapter_prepare(dev, &av7110->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); /* 275 kHz */
  2094. ret = i2c_add_adapter(&av7110->i2c_adap);
  2095. if (ret < 0)
  2096. goto err_dvb_unregister_adapter_2;
  2097. ttpci_eeprom_parse_mac(&av7110->i2c_adap,
  2098. av7110->dvb_adapter.proposed_mac);
  2099. ret = -ENOMEM;
  2100. /* full-ts mod? */
  2101. if (full_ts)
  2102. av7110->full_ts = true;
  2103. /* check for full-ts flag in eeprom */
  2104. if (i2c_readreg(av7110, 0xaa, 0) == 0x4f && i2c_readreg(av7110, 0xaa, 1) == 0x45) {
  2105. u8 flags = i2c_readreg(av7110, 0xaa, 2);
  2106. if (flags != 0xff && (flags & 0x01))
  2107. av7110->full_ts = true;
  2108. }
  2109. if (av7110->full_ts) {
  2110. printk(KERN_INFO "dvb-ttpci: full-ts mode enabled for saa7146 port B\n");
  2111. spin_lock_init(&av7110->feedlock1);
  2112. av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length,
  2113. &av7110->pt);
  2114. if (!av7110->grabbing)
  2115. goto err_i2c_del_3;
  2116. saa7146_write(dev, DD1_STREAM_B, 0x00000000);
  2117. saa7146_write(dev, MC2, (MASK_10 | MASK_26));
  2118. saa7146_write(dev, DD1_INIT, 0x00000600);
  2119. saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
  2120. saa7146_write(dev, BRS_CTRL, 0x60000000);
  2121. saa7146_write(dev, MC2, MASK_08 | MASK_24);
  2122. /* dma3 */
  2123. saa7146_write(dev, PCI_BT_V1, 0x001c0000 | (saa7146_read(dev, PCI_BT_V1) & ~0x001f0000));
  2124. saa7146_write(dev, BASE_ODD3, 0);
  2125. saa7146_write(dev, BASE_EVEN3, 0);
  2126. saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT);
  2127. saa7146_write(dev, PITCH3, TS_WIDTH);
  2128. saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90);
  2129. saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH);
  2130. saa7146_write(dev, MC2, MASK_04 | MASK_20);
  2131. tasklet_init(&av7110->vpe_tasklet, vpeirq, (unsigned long) av7110);
  2132. } else if (budgetpatch) {
  2133. spin_lock_init(&av7110->feedlock1);
  2134. av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length,
  2135. &av7110->pt);
  2136. if (!av7110->grabbing)
  2137. goto err_i2c_del_3;
  2138. saa7146_write(dev, PCI_BT_V1, 0x1c1f101f);
  2139. saa7146_write(dev, BCS_CTRL, 0x80400040);
  2140. /* set dd1 stream a & b */
  2141. saa7146_write(dev, DD1_STREAM_B, 0x00000000);
  2142. saa7146_write(dev, DD1_INIT, 0x03000200);
  2143. saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
  2144. saa7146_write(dev, BRS_CTRL, 0x60000000);
  2145. saa7146_write(dev, BASE_ODD3, 0);
  2146. saa7146_write(dev, BASE_EVEN3, 0);
  2147. saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT);
  2148. saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90);
  2149. saa7146_write(dev, PITCH3, TS_WIDTH);
  2150. saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH);
  2151. /* upload all */
  2152. saa7146_write(dev, MC2, 0x077c077c);
  2153. saa7146_write(dev, GPIO_CTRL, 0x000000);
  2154. #if RPS_IRQ
  2155. /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
  2156. * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
  2157. * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
  2158. */
  2159. saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
  2160. /* set event counter 1 threshold to maximum allowed value (rEC p55) */
  2161. saa7146_write(dev, ECT1R, 0x3fff );
  2162. #endif
  2163. /* Setup BUDGETPATCH MAIN RPS1 "program" (p35) */
  2164. count = 0;
  2165. /* Wait Source Line Counter Threshold (p36) */
  2166. WRITE_RPS1(CMD_PAUSE | EVT_HS);
  2167. /* Set GPIO3=1 (p42) */
  2168. WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
  2169. WRITE_RPS1(GPIO3_MSK);
  2170. WRITE_RPS1(SAA7146_GPIO_OUTHI<<24);
  2171. #if RPS_IRQ
  2172. /* issue RPS1 interrupt */
  2173. WRITE_RPS1(CMD_INTERRUPT);
  2174. #endif
  2175. /* Wait reset Source Line Counter Threshold (p36) */
  2176. WRITE_RPS1(CMD_PAUSE | RPS_INV | EVT_HS);
  2177. /* Set GPIO3=0 (p42) */
  2178. WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
  2179. WRITE_RPS1(GPIO3_MSK);
  2180. WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
  2181. #if RPS_IRQ
  2182. /* issue RPS1 interrupt */
  2183. WRITE_RPS1(CMD_INTERRUPT);
  2184. #endif
  2185. /* Jump to begin of RPS program (p37) */
  2186. WRITE_RPS1(CMD_JUMP);
  2187. WRITE_RPS1(dev->d_rps1.dma_handle);
  2188. /* Fix VSYNC level */
  2189. saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
  2190. /* Set RPS1 Address register to point to RPS code (r108 p42) */
  2191. saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
  2192. /* Set Source Line Counter Threshold, using BRS (rCC p43)
  2193. * It generates HS event every TS_HEIGHT lines
  2194. * this is related to TS_WIDTH set in register
  2195. * NUM_LINE_BYTE3. If NUM_LINE_BYTE low 16 bits
  2196. * are set to TS_WIDTH bytes (TS_WIDTH=2*188),
  2197. * then RPS_THRESH1 should be set to trigger
  2198. * every TS_HEIGHT (512) lines.
  2199. */
  2200. saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 );
  2201. /* Enable RPS1 (rFC p33) */
  2202. saa7146_write(dev, MC1, (MASK_13 | MASK_29));
  2203. /* end of budgetpatch register initialization */
  2204. tasklet_init (&av7110->vpe_tasklet, vpeirq, (unsigned long) av7110);
  2205. } else {
  2206. saa7146_write(dev, PCI_BT_V1, 0x1c00101f);
  2207. saa7146_write(dev, BCS_CTRL, 0x80400040);
  2208. /* set dd1 stream a & b */
  2209. saa7146_write(dev, DD1_STREAM_B, 0x00000000);
  2210. saa7146_write(dev, DD1_INIT, 0x03000000);
  2211. saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
  2212. /* upload all */
  2213. saa7146_write(dev, MC2, 0x077c077c);
  2214. saa7146_write(dev, GPIO_CTRL, 0x000000);
  2215. }
  2216. tasklet_init (&av7110->debi_tasklet, debiirq, (unsigned long) av7110);
  2217. tasklet_init (&av7110->gpio_tasklet, gpioirq, (unsigned long) av7110);
  2218. mutex_init(&av7110->pid_mutex);
  2219. /* locks for data transfers from/to AV7110 */
  2220. spin_lock_init(&av7110->debilock);
  2221. mutex_init(&av7110->dcomlock);
  2222. av7110->debitype = -1;
  2223. /* default OSD window */
  2224. av7110->osdwin = 1;
  2225. mutex_init(&av7110->osd_mutex);
  2226. /* TV standard */
  2227. av7110->vidmode = tv_standard == 1 ? AV7110_VIDEO_MODE_NTSC
  2228. : AV7110_VIDEO_MODE_PAL;
  2229. /* ARM "watchdog" */
  2230. init_waitqueue_head(&av7110->arm_wait);
  2231. av7110->arm_thread = NULL;
  2232. /* allocate and init buffers */
  2233. av7110->debi_virt = pci_alloc_consistent(pdev, 8192, &av7110->debi_bus);
  2234. if (!av7110->debi_virt)
  2235. goto err_saa71466_vfree_4;
  2236. av7110->iobuf = vmalloc(AVOUTLEN+AOUTLEN+BMPLEN+4*IPACKS);
  2237. if (!av7110->iobuf)
  2238. goto err_pci_free_5;
  2239. ret = av7110_av_init(av7110);
  2240. if (ret < 0)
  2241. goto err_iobuf_vfree_6;
  2242. /* init BMP buffer */
  2243. av7110->bmpbuf = av7110->iobuf+AVOUTLEN+AOUTLEN;
  2244. init_waitqueue_head(&av7110->bmpq);
  2245. ret = av7110_ca_init(av7110);
  2246. if (ret < 0)
  2247. goto err_av7110_av_exit_7;
  2248. /* load firmware into AV7110 cards */
  2249. ret = av7110_bootarm(av7110);
  2250. if (ret < 0)
  2251. goto err_av7110_ca_exit_8;
  2252. ret = av7110_firmversion(av7110);
  2253. if (ret < 0)
  2254. goto err_stop_arm_9;
  2255. if (FW_VERSION(av7110->arm_app)<0x2501)
  2256. printk(KERN_WARNING
  2257. "dvb-ttpci: Warning, firmware version 0x%04x is too old. System might be unstable!\n",
  2258. FW_VERSION(av7110->arm_app));
  2259. thread = kthread_run(arm_thread, (void *) av7110, "arm_mon");
  2260. if (IS_ERR(thread)) {
  2261. ret = PTR_ERR(thread);
  2262. goto err_stop_arm_9;
  2263. }
  2264. av7110->arm_thread = thread;
  2265. /* set initial volume in mixer struct */
  2266. av7110->mixer.volume_left = volume;
  2267. av7110->mixer.volume_right = volume;
  2268. ret = av7110_register(av7110);
  2269. if (ret < 0)
  2270. goto err_arm_thread_stop_10;
  2271. init_av7110_av(av7110);
  2272. /* special case DVB-C: these cards have an analog tuner
  2273. plus need some special handling, so we have separate
  2274. saa7146_ext_vv data for these... */
  2275. ret = av7110_init_v4l(av7110);
  2276. if (ret < 0)
  2277. goto err_av7110_unregister_11;
  2278. av7110->dvb_adapter.priv = av7110;
  2279. ret = frontend_init(av7110);
  2280. if (ret < 0)
  2281. goto err_av7110_exit_v4l_12;
  2282. mutex_init(&av7110->ioctl_mutex);
  2283. #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
  2284. av7110_ir_init(av7110);
  2285. #endif
  2286. printk(KERN_INFO "dvb-ttpci: found av7110-%d.\n", av7110_num);
  2287. av7110_num++;
  2288. out:
  2289. return ret;
  2290. err_av7110_exit_v4l_12:
  2291. av7110_exit_v4l(av7110);
  2292. err_av7110_unregister_11:
  2293. dvb_unregister(av7110);
  2294. err_arm_thread_stop_10:
  2295. av7110_arm_sync(av7110);
  2296. err_stop_arm_9:
  2297. /* Nothing to do. Rejoice. */
  2298. err_av7110_ca_exit_8:
  2299. av7110_ca_exit(av7110);
  2300. err_av7110_av_exit_7:
  2301. av7110_av_exit(av7110);
  2302. err_iobuf_vfree_6:
  2303. vfree(av7110->iobuf);
  2304. err_pci_free_5:
  2305. pci_free_consistent(pdev, 8192, av7110->debi_virt, av7110->debi_bus);
  2306. err_saa71466_vfree_4:
  2307. if (av7110->grabbing)
  2308. saa7146_vfree_destroy_pgtable(pdev, av7110->grabbing, &av7110->pt);
  2309. err_i2c_del_3:
  2310. i2c_del_adapter(&av7110->i2c_adap);
  2311. err_dvb_unregister_adapter_2:
  2312. dvb_unregister_adapter(&av7110->dvb_adapter);
  2313. err_put_firmware_1:
  2314. put_firmware(av7110);
  2315. err_kfree_0:
  2316. kfree(av7110);
  2317. goto out;
  2318. }
  2319. static int av7110_detach(struct saa7146_dev* saa)
  2320. {
  2321. struct av7110 *av7110 = saa->ext_priv;
  2322. dprintk(4, "%p\n", av7110);
  2323. #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
  2324. av7110_ir_exit(av7110);
  2325. #endif
  2326. if (budgetpatch || av7110->full_ts) {
  2327. if (budgetpatch) {
  2328. /* Disable RPS1 */
  2329. saa7146_write(saa, MC1, MASK_29);
  2330. /* VSYNC LOW (inactive) */
  2331. saa7146_setgpio(saa, 3, SAA7146_GPIO_OUTLO);
  2332. }
  2333. saa7146_write(saa, MC1, MASK_20); /* DMA3 off */
  2334. SAA7146_IER_DISABLE(saa, MASK_10);
  2335. SAA7146_ISR_CLEAR(saa, MASK_10);
  2336. msleep(50);
  2337. tasklet_kill(&av7110->vpe_tasklet);
  2338. saa7146_vfree_destroy_pgtable(saa->pci, av7110->grabbing, &av7110->pt);
  2339. }
  2340. av7110_exit_v4l(av7110);
  2341. av7110_arm_sync(av7110);
  2342. tasklet_kill(&av7110->debi_tasklet);
  2343. tasklet_kill(&av7110->gpio_tasklet);
  2344. dvb_unregister(av7110);
  2345. SAA7146_IER_DISABLE(saa, MASK_19 | MASK_03);
  2346. SAA7146_ISR_CLEAR(saa, MASK_19 | MASK_03);
  2347. av7110_ca_exit(av7110);
  2348. av7110_av_exit(av7110);
  2349. vfree(av7110->iobuf);
  2350. pci_free_consistent(saa->pci, 8192, av7110->debi_virt,
  2351. av7110->debi_bus);
  2352. i2c_del_adapter(&av7110->i2c_adap);
  2353. dvb_unregister_adapter (&av7110->dvb_adapter);
  2354. av7110_num--;
  2355. put_firmware(av7110);
  2356. kfree(av7110);
  2357. saa->ext_priv = NULL;
  2358. return 0;
  2359. }
  2360. static void av7110_irq(struct saa7146_dev* dev, u32 *isr)
  2361. {
  2362. struct av7110 *av7110 = dev->ext_priv;
  2363. //print_time("av7110_irq");
  2364. /* Note: Don't try to handle the DEBI error irq (MASK_18), in
  2365. * intel mode the timeout is asserted all the time...
  2366. */
  2367. if (*isr & MASK_19) {
  2368. //printk("av7110_irq: DEBI\n");
  2369. /* Note 1: The DEBI irq is level triggered: We must enable it
  2370. * only after we started a DMA xfer, and disable it here
  2371. * immediately, or it will be signalled all the time while
  2372. * DEBI is idle.
  2373. * Note 2: You would think that an irq which is masked is
  2374. * not signalled by the hardware. Not so for the SAA7146:
  2375. * An irq is signalled as long as the corresponding bit
  2376. * in the ISR is set, and disabling irqs just prevents the
  2377. * hardware from setting the ISR bit. This means a) that we
  2378. * must clear the ISR *after* disabling the irq (which is why
  2379. * we must do it here even though saa7146_core did it already),
  2380. * and b) that if we were to disable an edge triggered irq
  2381. * (like the gpio irqs sadly are) temporarily we would likely
  2382. * loose some. This sucks :-(
  2383. */
  2384. SAA7146_IER_DISABLE(av7110->dev, MASK_19);
  2385. SAA7146_ISR_CLEAR(av7110->dev, MASK_19);
  2386. tasklet_schedule(&av7110->debi_tasklet);
  2387. }
  2388. if (*isr & MASK_03) {
  2389. //printk("av7110_irq: GPIO\n");
  2390. tasklet_schedule(&av7110->gpio_tasklet);
  2391. }
  2392. if (*isr & MASK_10)
  2393. tasklet_schedule(&av7110->vpe_tasklet);
  2394. }
  2395. static struct saa7146_extension av7110_extension_driver;
  2396. #define MAKE_AV7110_INFO(x_var,x_name) \
  2397. static struct saa7146_pci_extension_data x_var = { \
  2398. .ext_priv = x_name, \
  2399. .ext = &av7110_extension_driver }
  2400. MAKE_AV7110_INFO(tts_1_X_fsc,"Technotrend/Hauppauge WinTV DVB-S rev1.X or Fujitsu Siemens DVB-C");
  2401. MAKE_AV7110_INFO(ttt_1_X, "Technotrend/Hauppauge WinTV DVB-T rev1.X");
  2402. MAKE_AV7110_INFO(ttc_1_X, "Technotrend/Hauppauge WinTV Nexus-CA rev1.X");
  2403. MAKE_AV7110_INFO(ttc_2_X, "Technotrend/Hauppauge WinTV DVB-C rev2.X");
  2404. MAKE_AV7110_INFO(tts_2_X, "Technotrend/Hauppauge WinTV Nexus-S rev2.X");
  2405. MAKE_AV7110_INFO(tts_2_3, "Technotrend/Hauppauge WinTV Nexus-S rev2.3");
  2406. MAKE_AV7110_INFO(tts_1_3se, "Technotrend/Hauppauge WinTV DVB-S rev1.3 SE");
  2407. MAKE_AV7110_INFO(ttt, "Technotrend/Hauppauge DVB-T");
  2408. MAKE_AV7110_INFO(fsc, "Fujitsu Siemens DVB-C");
  2409. MAKE_AV7110_INFO(fss, "Fujitsu Siemens DVB-S rev1.6");
  2410. MAKE_AV7110_INFO(gxs_1_3, "Galaxis DVB-S rev1.3");
  2411. static const struct pci_device_id pci_tbl[] = {
  2412. MAKE_EXTENSION_PCI(fsc, 0x110a, 0x0000),
  2413. MAKE_EXTENSION_PCI(tts_1_X_fsc, 0x13c2, 0x0000),
  2414. MAKE_EXTENSION_PCI(ttt_1_X, 0x13c2, 0x0001),
  2415. MAKE_EXTENSION_PCI(ttc_2_X, 0x13c2, 0x0002),
  2416. MAKE_EXTENSION_PCI(tts_2_X, 0x13c2, 0x0003),
  2417. MAKE_EXTENSION_PCI(gxs_1_3, 0x13c2, 0x0004),
  2418. MAKE_EXTENSION_PCI(fss, 0x13c2, 0x0006),
  2419. MAKE_EXTENSION_PCI(ttt, 0x13c2, 0x0008),
  2420. MAKE_EXTENSION_PCI(ttc_1_X, 0x13c2, 0x000a),
  2421. MAKE_EXTENSION_PCI(tts_2_3, 0x13c2, 0x000e),
  2422. MAKE_EXTENSION_PCI(tts_1_3se, 0x13c2, 0x1002),
  2423. /* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0005), UNDEFINED CARD */ // Technisat SkyStar1
  2424. /* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0009), UNDEFINED CARD */ // TT/Hauppauge WinTV Nexus-CA v????
  2425. {
  2426. .vendor = 0,
  2427. }
  2428. };
  2429. MODULE_DEVICE_TABLE(pci, pci_tbl);
  2430. static struct saa7146_extension av7110_extension_driver = {
  2431. .name = "av7110",
  2432. .flags = SAA7146_USE_I2C_IRQ,
  2433. .module = THIS_MODULE,
  2434. .pci_tbl = &pci_tbl[0],
  2435. .attach = av7110_attach,
  2436. .detach = av7110_detach,
  2437. .irq_mask = MASK_19 | MASK_03 | MASK_10,
  2438. .irq_func = av7110_irq,
  2439. };
  2440. static int __init av7110_init(void)
  2441. {
  2442. return saa7146_register_extension(&av7110_extension_driver);
  2443. }
  2444. static void __exit av7110_exit(void)
  2445. {
  2446. saa7146_unregister_extension(&av7110_extension_driver);
  2447. }
  2448. module_init(av7110_init);
  2449. module_exit(av7110_exit);
  2450. MODULE_DESCRIPTION("driver for the SAA7146 based AV110 PCI DVB cards by Siemens, Technotrend, Hauppauge");
  2451. MODULE_AUTHOR("Ralph Metzler, Marcus Metzler, others");
  2452. MODULE_LICENSE("GPL");