solo6x10-core.c 18 KB

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  1. /*
  2. * Copyright (C) 2010-2013 Bluecherry, LLC <http://www.bluecherrydvr.com>
  3. *
  4. * Original author:
  5. * Ben Collins <bcollins@ubuntu.com>
  6. *
  7. * Additional work by:
  8. * John Brooks <john.brooks@bluecherry.net>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/videodev2.h>
  25. #include <linux/delay.h>
  26. #include <linux/sysfs.h>
  27. #include <linux/ktime.h>
  28. #include <linux/slab.h>
  29. #include "solo6x10.h"
  30. #include "solo6x10-tw28.h"
  31. MODULE_DESCRIPTION("Softlogic 6x10 MPEG4/H.264/G.723 CODEC V4L2/ALSA Driver");
  32. MODULE_AUTHOR("Bluecherry <maintainers@bluecherrydvr.com>");
  33. MODULE_VERSION(SOLO6X10_VERSION);
  34. MODULE_LICENSE("GPL");
  35. static unsigned video_nr = -1;
  36. module_param(video_nr, uint, 0644);
  37. MODULE_PARM_DESC(video_nr, "videoX start number, -1 is autodetect (default)");
  38. static int full_eeprom; /* default is only top 64B */
  39. module_param(full_eeprom, uint, 0644);
  40. MODULE_PARM_DESC(full_eeprom, "Allow access to full 128B EEPROM (dangerous)");
  41. static void solo_set_time(struct solo_dev *solo_dev)
  42. {
  43. struct timespec64 ts;
  44. ktime_get_ts64(&ts);
  45. /* no overflow because we use monotonic timestamps */
  46. solo_reg_write(solo_dev, SOLO_TIMER_SEC, (u32)ts.tv_sec);
  47. solo_reg_write(solo_dev, SOLO_TIMER_USEC, (u32)ts.tv_nsec / NSEC_PER_USEC);
  48. }
  49. static void solo_timer_sync(struct solo_dev *solo_dev)
  50. {
  51. u32 sec, usec;
  52. struct timespec64 ts;
  53. long diff;
  54. if (solo_dev->type != SOLO_DEV_6110)
  55. return;
  56. if (++solo_dev->time_sync < 60)
  57. return;
  58. solo_dev->time_sync = 0;
  59. sec = solo_reg_read(solo_dev, SOLO_TIMER_SEC);
  60. usec = solo_reg_read(solo_dev, SOLO_TIMER_USEC);
  61. ktime_get_ts64(&ts);
  62. diff = (s32)ts.tv_sec - (s32)sec;
  63. diff = (diff * 1000000)
  64. + ((s32)(ts.tv_nsec / NSEC_PER_USEC) - (s32)usec);
  65. if (diff > 1000 || diff < -1000) {
  66. solo_set_time(solo_dev);
  67. } else if (diff) {
  68. long usec_lsb = solo_dev->usec_lsb;
  69. usec_lsb -= diff / 4;
  70. if (usec_lsb < 0)
  71. usec_lsb = 0;
  72. else if (usec_lsb > 255)
  73. usec_lsb = 255;
  74. solo_dev->usec_lsb = usec_lsb;
  75. solo_reg_write(solo_dev, SOLO_TIMER_USEC_LSB,
  76. solo_dev->usec_lsb);
  77. }
  78. }
  79. static irqreturn_t solo_isr(int irq, void *data)
  80. {
  81. struct solo_dev *solo_dev = data;
  82. u32 status;
  83. int i;
  84. status = solo_reg_read(solo_dev, SOLO_IRQ_STAT);
  85. if (!status)
  86. return IRQ_NONE;
  87. /* Acknowledge all interrupts immediately */
  88. solo_reg_write(solo_dev, SOLO_IRQ_STAT, status);
  89. if (status & SOLO_IRQ_PCI_ERR)
  90. solo_p2m_error_isr(solo_dev);
  91. for (i = 0; i < SOLO_NR_P2M; i++)
  92. if (status & SOLO_IRQ_P2M(i))
  93. solo_p2m_isr(solo_dev, i);
  94. if (status & SOLO_IRQ_IIC)
  95. solo_i2c_isr(solo_dev);
  96. if (status & SOLO_IRQ_VIDEO_IN) {
  97. solo_video_in_isr(solo_dev);
  98. solo_timer_sync(solo_dev);
  99. }
  100. if (status & SOLO_IRQ_ENCODER)
  101. solo_enc_v4l2_isr(solo_dev);
  102. if (status & SOLO_IRQ_G723)
  103. solo_g723_isr(solo_dev);
  104. return IRQ_HANDLED;
  105. }
  106. static void free_solo_dev(struct solo_dev *solo_dev)
  107. {
  108. struct pci_dev *pdev = solo_dev->pdev;
  109. if (solo_dev->dev.parent)
  110. device_unregister(&solo_dev->dev);
  111. if (solo_dev->reg_base) {
  112. /* Bring down the sub-devices first */
  113. solo_g723_exit(solo_dev);
  114. solo_enc_v4l2_exit(solo_dev);
  115. solo_enc_exit(solo_dev);
  116. solo_v4l2_exit(solo_dev);
  117. solo_disp_exit(solo_dev);
  118. solo_gpio_exit(solo_dev);
  119. solo_p2m_exit(solo_dev);
  120. solo_i2c_exit(solo_dev);
  121. /* Now cleanup the PCI device */
  122. solo_irq_off(solo_dev, ~0);
  123. free_irq(pdev->irq, solo_dev);
  124. pci_iounmap(pdev, solo_dev->reg_base);
  125. }
  126. pci_release_regions(pdev);
  127. pci_disable_device(pdev);
  128. v4l2_device_unregister(&solo_dev->v4l2_dev);
  129. pci_set_drvdata(pdev, NULL);
  130. kfree(solo_dev);
  131. }
  132. static ssize_t eeprom_store(struct device *dev, struct device_attribute *attr,
  133. const char *buf, size_t count)
  134. {
  135. struct solo_dev *solo_dev =
  136. container_of(dev, struct solo_dev, dev);
  137. u16 *p = (u16 *)buf;
  138. int i;
  139. if (count & 0x1)
  140. dev_warn(dev, "EEPROM Write not aligned (truncating)\n");
  141. if (!full_eeprom && count > 64) {
  142. dev_warn(dev, "EEPROM Write truncated to 64 bytes\n");
  143. count = 64;
  144. } else if (full_eeprom && count > 128) {
  145. dev_warn(dev, "EEPROM Write truncated to 128 bytes\n");
  146. count = 128;
  147. }
  148. solo_eeprom_ewen(solo_dev, 1);
  149. for (i = full_eeprom ? 0 : 32; i < min((int)(full_eeprom ? 64 : 32),
  150. (int)(count / 2)); i++)
  151. solo_eeprom_write(solo_dev, i, cpu_to_be16(p[i]));
  152. solo_eeprom_ewen(solo_dev, 0);
  153. return count;
  154. }
  155. static ssize_t eeprom_show(struct device *dev, struct device_attribute *attr,
  156. char *buf)
  157. {
  158. struct solo_dev *solo_dev =
  159. container_of(dev, struct solo_dev, dev);
  160. u16 *p = (u16 *)buf;
  161. int count = (full_eeprom ? 128 : 64);
  162. int i;
  163. for (i = (full_eeprom ? 0 : 32); i < (count / 2); i++)
  164. p[i] = be16_to_cpu(solo_eeprom_read(solo_dev, i));
  165. return count;
  166. }
  167. static ssize_t p2m_timeouts_show(struct device *dev,
  168. struct device_attribute *attr,
  169. char *buf)
  170. {
  171. struct solo_dev *solo_dev =
  172. container_of(dev, struct solo_dev, dev);
  173. return sprintf(buf, "%d\n", solo_dev->p2m_timeouts);
  174. }
  175. static ssize_t sdram_size_show(struct device *dev,
  176. struct device_attribute *attr,
  177. char *buf)
  178. {
  179. struct solo_dev *solo_dev =
  180. container_of(dev, struct solo_dev, dev);
  181. return sprintf(buf, "%dMegs\n", solo_dev->sdram_size >> 20);
  182. }
  183. static ssize_t tw28xx_show(struct device *dev,
  184. struct device_attribute *attr,
  185. char *buf)
  186. {
  187. struct solo_dev *solo_dev =
  188. container_of(dev, struct solo_dev, dev);
  189. return sprintf(buf, "tw2815[%d] tw2864[%d] tw2865[%d]\n",
  190. hweight32(solo_dev->tw2815),
  191. hweight32(solo_dev->tw2864),
  192. hweight32(solo_dev->tw2865));
  193. }
  194. static ssize_t input_map_show(struct device *dev,
  195. struct device_attribute *attr,
  196. char *buf)
  197. {
  198. struct solo_dev *solo_dev =
  199. container_of(dev, struct solo_dev, dev);
  200. unsigned int val;
  201. char *out = buf;
  202. val = solo_reg_read(solo_dev, SOLO_VI_CH_SWITCH_0);
  203. out += sprintf(out, "Channel 0 => Input %d\n", val & 0x1f);
  204. out += sprintf(out, "Channel 1 => Input %d\n", (val >> 5) & 0x1f);
  205. out += sprintf(out, "Channel 2 => Input %d\n", (val >> 10) & 0x1f);
  206. out += sprintf(out, "Channel 3 => Input %d\n", (val >> 15) & 0x1f);
  207. out += sprintf(out, "Channel 4 => Input %d\n", (val >> 20) & 0x1f);
  208. out += sprintf(out, "Channel 5 => Input %d\n", (val >> 25) & 0x1f);
  209. val = solo_reg_read(solo_dev, SOLO_VI_CH_SWITCH_1);
  210. out += sprintf(out, "Channel 6 => Input %d\n", val & 0x1f);
  211. out += sprintf(out, "Channel 7 => Input %d\n", (val >> 5) & 0x1f);
  212. out += sprintf(out, "Channel 8 => Input %d\n", (val >> 10) & 0x1f);
  213. out += sprintf(out, "Channel 9 => Input %d\n", (val >> 15) & 0x1f);
  214. out += sprintf(out, "Channel 10 => Input %d\n", (val >> 20) & 0x1f);
  215. out += sprintf(out, "Channel 11 => Input %d\n", (val >> 25) & 0x1f);
  216. val = solo_reg_read(solo_dev, SOLO_VI_CH_SWITCH_2);
  217. out += sprintf(out, "Channel 12 => Input %d\n", val & 0x1f);
  218. out += sprintf(out, "Channel 13 => Input %d\n", (val >> 5) & 0x1f);
  219. out += sprintf(out, "Channel 14 => Input %d\n", (val >> 10) & 0x1f);
  220. out += sprintf(out, "Channel 15 => Input %d\n", (val >> 15) & 0x1f);
  221. out += sprintf(out, "Spot Output => Input %d\n", (val >> 20) & 0x1f);
  222. return out - buf;
  223. }
  224. static ssize_t p2m_timeout_store(struct device *dev,
  225. struct device_attribute *attr,
  226. const char *buf, size_t count)
  227. {
  228. struct solo_dev *solo_dev =
  229. container_of(dev, struct solo_dev, dev);
  230. unsigned long ms;
  231. int ret = kstrtoul(buf, 10, &ms);
  232. if (ret < 0 || ms > 200)
  233. return -EINVAL;
  234. solo_dev->p2m_jiffies = msecs_to_jiffies(ms);
  235. return count;
  236. }
  237. static ssize_t p2m_timeout_show(struct device *dev,
  238. struct device_attribute *attr,
  239. char *buf)
  240. {
  241. struct solo_dev *solo_dev =
  242. container_of(dev, struct solo_dev, dev);
  243. return sprintf(buf, "%ums\n", jiffies_to_msecs(solo_dev->p2m_jiffies));
  244. }
  245. static ssize_t intervals_show(struct device *dev,
  246. struct device_attribute *attr,
  247. char *buf)
  248. {
  249. struct solo_dev *solo_dev =
  250. container_of(dev, struct solo_dev, dev);
  251. char *out = buf;
  252. int fps = solo_dev->fps;
  253. int i;
  254. for (i = 0; i < solo_dev->nr_chans; i++) {
  255. out += sprintf(out, "Channel %d: %d/%d (0x%08x)\n",
  256. i, solo_dev->v4l2_enc[i]->interval, fps,
  257. solo_reg_read(solo_dev, SOLO_CAP_CH_INTV(i)));
  258. }
  259. return out - buf;
  260. }
  261. static ssize_t sdram_offsets_show(struct device *dev,
  262. struct device_attribute *attr,
  263. char *buf)
  264. {
  265. struct solo_dev *solo_dev =
  266. container_of(dev, struct solo_dev, dev);
  267. char *out = buf;
  268. out += sprintf(out, "DISP: 0x%08x @ 0x%08x\n",
  269. SOLO_DISP_EXT_ADDR,
  270. SOLO_DISP_EXT_SIZE);
  271. out += sprintf(out, "EOSD: 0x%08x @ 0x%08x (0x%08x * %d)\n",
  272. SOLO_EOSD_EXT_ADDR,
  273. SOLO_EOSD_EXT_AREA(solo_dev),
  274. SOLO_EOSD_EXT_SIZE(solo_dev),
  275. SOLO_EOSD_EXT_AREA(solo_dev) /
  276. SOLO_EOSD_EXT_SIZE(solo_dev));
  277. out += sprintf(out, "MOTI: 0x%08x @ 0x%08x\n",
  278. SOLO_MOTION_EXT_ADDR(solo_dev),
  279. SOLO_MOTION_EXT_SIZE);
  280. out += sprintf(out, "G723: 0x%08x @ 0x%08x\n",
  281. SOLO_G723_EXT_ADDR(solo_dev),
  282. SOLO_G723_EXT_SIZE);
  283. out += sprintf(out, "CAPT: 0x%08x @ 0x%08x (0x%08x * %d)\n",
  284. SOLO_CAP_EXT_ADDR(solo_dev),
  285. SOLO_CAP_EXT_SIZE(solo_dev),
  286. SOLO_CAP_PAGE_SIZE,
  287. SOLO_CAP_EXT_SIZE(solo_dev) / SOLO_CAP_PAGE_SIZE);
  288. out += sprintf(out, "EREF: 0x%08x @ 0x%08x (0x%08x * %d)\n",
  289. SOLO_EREF_EXT_ADDR(solo_dev),
  290. SOLO_EREF_EXT_AREA(solo_dev),
  291. SOLO_EREF_EXT_SIZE,
  292. SOLO_EREF_EXT_AREA(solo_dev) / SOLO_EREF_EXT_SIZE);
  293. out += sprintf(out, "MPEG: 0x%08x @ 0x%08x\n",
  294. SOLO_MP4E_EXT_ADDR(solo_dev),
  295. SOLO_MP4E_EXT_SIZE(solo_dev));
  296. out += sprintf(out, "JPEG: 0x%08x @ 0x%08x\n",
  297. SOLO_JPEG_EXT_ADDR(solo_dev),
  298. SOLO_JPEG_EXT_SIZE(solo_dev));
  299. return out - buf;
  300. }
  301. static ssize_t sdram_show(struct file *file, struct kobject *kobj,
  302. struct bin_attribute *a, char *buf,
  303. loff_t off, size_t count)
  304. {
  305. struct device *dev = container_of(kobj, struct device, kobj);
  306. struct solo_dev *solo_dev =
  307. container_of(dev, struct solo_dev, dev);
  308. const int size = solo_dev->sdram_size;
  309. if (off >= size)
  310. return 0;
  311. if (off + count > size)
  312. count = size - off;
  313. if (solo_p2m_dma(solo_dev, 0, buf, off, count, 0, 0))
  314. return -EIO;
  315. return count;
  316. }
  317. static const struct device_attribute solo_dev_attrs[] = {
  318. __ATTR(eeprom, 0640, eeprom_show, eeprom_store),
  319. __ATTR(p2m_timeout, 0644, p2m_timeout_show, p2m_timeout_store),
  320. __ATTR_RO(p2m_timeouts),
  321. __ATTR_RO(sdram_size),
  322. __ATTR_RO(tw28xx),
  323. __ATTR_RO(input_map),
  324. __ATTR_RO(intervals),
  325. __ATTR_RO(sdram_offsets),
  326. };
  327. static void solo_device_release(struct device *dev)
  328. {
  329. /* Do nothing */
  330. }
  331. static int solo_sysfs_init(struct solo_dev *solo_dev)
  332. {
  333. struct bin_attribute *sdram_attr = &solo_dev->sdram_attr;
  334. struct device *dev = &solo_dev->dev;
  335. const char *driver;
  336. int i;
  337. if (solo_dev->type == SOLO_DEV_6110)
  338. driver = "solo6110";
  339. else
  340. driver = "solo6010";
  341. dev->release = solo_device_release;
  342. dev->parent = &solo_dev->pdev->dev;
  343. set_dev_node(dev, dev_to_node(&solo_dev->pdev->dev));
  344. dev_set_name(dev, "%s-%d-%d", driver, solo_dev->vfd->num,
  345. solo_dev->nr_chans);
  346. if (device_register(dev)) {
  347. dev->parent = NULL;
  348. return -ENOMEM;
  349. }
  350. for (i = 0; i < ARRAY_SIZE(solo_dev_attrs); i++) {
  351. if (device_create_file(dev, &solo_dev_attrs[i])) {
  352. device_unregister(dev);
  353. return -ENOMEM;
  354. }
  355. }
  356. sysfs_attr_init(&sdram_attr->attr);
  357. sdram_attr->attr.name = "sdram";
  358. sdram_attr->attr.mode = 0440;
  359. sdram_attr->read = sdram_show;
  360. sdram_attr->size = solo_dev->sdram_size;
  361. if (device_create_bin_file(dev, sdram_attr)) {
  362. device_unregister(dev);
  363. return -ENOMEM;
  364. }
  365. return 0;
  366. }
  367. static int solo_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  368. {
  369. struct solo_dev *solo_dev;
  370. int ret;
  371. u8 chip_id;
  372. solo_dev = kzalloc(sizeof(*solo_dev), GFP_KERNEL);
  373. if (solo_dev == NULL)
  374. return -ENOMEM;
  375. if (id->driver_data == SOLO_DEV_6010)
  376. dev_info(&pdev->dev, "Probing Softlogic 6010\n");
  377. else
  378. dev_info(&pdev->dev, "Probing Softlogic 6110\n");
  379. solo_dev->type = id->driver_data;
  380. solo_dev->pdev = pdev;
  381. ret = v4l2_device_register(&pdev->dev, &solo_dev->v4l2_dev);
  382. if (ret)
  383. goto fail_probe;
  384. /* Only for during init */
  385. solo_dev->p2m_jiffies = msecs_to_jiffies(100);
  386. ret = pci_enable_device(pdev);
  387. if (ret)
  388. goto fail_probe;
  389. pci_set_master(pdev);
  390. /* RETRY/TRDY Timeout disabled */
  391. pci_write_config_byte(pdev, 0x40, 0x00);
  392. pci_write_config_byte(pdev, 0x41, 0x00);
  393. ret = pci_request_regions(pdev, SOLO6X10_NAME);
  394. if (ret)
  395. goto fail_probe;
  396. solo_dev->reg_base = pci_ioremap_bar(pdev, 0);
  397. if (solo_dev->reg_base == NULL) {
  398. ret = -ENOMEM;
  399. goto fail_probe;
  400. }
  401. chip_id = solo_reg_read(solo_dev, SOLO_CHIP_OPTION) &
  402. SOLO_CHIP_ID_MASK;
  403. switch (chip_id) {
  404. case 7:
  405. solo_dev->nr_chans = 16;
  406. solo_dev->nr_ext = 5;
  407. break;
  408. case 6:
  409. solo_dev->nr_chans = 8;
  410. solo_dev->nr_ext = 2;
  411. break;
  412. default:
  413. dev_warn(&pdev->dev, "Invalid chip_id 0x%02x, assuming 4 ch\n",
  414. chip_id);
  415. /* fall through */
  416. case 5:
  417. solo_dev->nr_chans = 4;
  418. solo_dev->nr_ext = 1;
  419. }
  420. /* Disable all interrupts to start */
  421. solo_irq_off(solo_dev, ~0);
  422. /* Initial global settings */
  423. if (solo_dev->type == SOLO_DEV_6010) {
  424. solo_dev->clock_mhz = 108;
  425. solo_dev->sys_config = SOLO_SYS_CFG_SDRAM64BIT
  426. | SOLO_SYS_CFG_INPUTDIV(25)
  427. | SOLO_SYS_CFG_FEEDBACKDIV(solo_dev->clock_mhz * 2 - 2)
  428. | SOLO_SYS_CFG_OUTDIV(3);
  429. solo_reg_write(solo_dev, SOLO_SYS_CFG, solo_dev->sys_config);
  430. } else {
  431. u32 divq, divf;
  432. solo_dev->clock_mhz = 135;
  433. if (solo_dev->clock_mhz < 125) {
  434. divq = 3;
  435. divf = (solo_dev->clock_mhz * 4) / 3 - 1;
  436. } else {
  437. divq = 2;
  438. divf = (solo_dev->clock_mhz * 2) / 3 - 1;
  439. }
  440. solo_reg_write(solo_dev, SOLO_PLL_CONFIG,
  441. (1 << 20) | /* PLL_RANGE */
  442. (8 << 15) | /* PLL_DIVR */
  443. (divq << 12) |
  444. (divf << 4) |
  445. (1 << 1) /* PLL_FSEN */);
  446. solo_dev->sys_config = SOLO_SYS_CFG_SDRAM64BIT;
  447. }
  448. solo_reg_write(solo_dev, SOLO_SYS_CFG, solo_dev->sys_config);
  449. solo_reg_write(solo_dev, SOLO_TIMER_CLOCK_NUM,
  450. solo_dev->clock_mhz - 1);
  451. /* PLL locking time of 1ms */
  452. mdelay(1);
  453. ret = request_irq(pdev->irq, solo_isr, IRQF_SHARED, SOLO6X10_NAME,
  454. solo_dev);
  455. if (ret)
  456. goto fail_probe;
  457. /* Handle this from the start */
  458. solo_irq_on(solo_dev, SOLO_IRQ_PCI_ERR);
  459. ret = solo_i2c_init(solo_dev);
  460. if (ret)
  461. goto fail_probe;
  462. /* Setup the DMA engine */
  463. solo_reg_write(solo_dev, SOLO_DMA_CTRL,
  464. SOLO_DMA_CTRL_REFRESH_CYCLE(1) |
  465. SOLO_DMA_CTRL_SDRAM_SIZE(2) |
  466. SOLO_DMA_CTRL_SDRAM_CLK_INVERT |
  467. SOLO_DMA_CTRL_READ_CLK_SELECT |
  468. SOLO_DMA_CTRL_LATENCY(1));
  469. /* Undocumented crap */
  470. solo_reg_write(solo_dev, SOLO_DMA_CTRL1,
  471. solo_dev->type == SOLO_DEV_6010 ? 0x100 : 0x300);
  472. if (solo_dev->type != SOLO_DEV_6010) {
  473. solo_dev->usec_lsb = 0x3f;
  474. solo_set_time(solo_dev);
  475. }
  476. /* Disable watchdog */
  477. solo_reg_write(solo_dev, SOLO_WATCHDOG, 0);
  478. /* Initialize sub components */
  479. ret = solo_p2m_init(solo_dev);
  480. if (ret)
  481. goto fail_probe;
  482. ret = solo_disp_init(solo_dev);
  483. if (ret)
  484. goto fail_probe;
  485. ret = solo_gpio_init(solo_dev);
  486. if (ret)
  487. goto fail_probe;
  488. ret = solo_tw28_init(solo_dev);
  489. if (ret)
  490. goto fail_probe;
  491. ret = solo_v4l2_init(solo_dev, video_nr);
  492. if (ret)
  493. goto fail_probe;
  494. ret = solo_enc_init(solo_dev);
  495. if (ret)
  496. goto fail_probe;
  497. ret = solo_enc_v4l2_init(solo_dev, video_nr);
  498. if (ret)
  499. goto fail_probe;
  500. ret = solo_g723_init(solo_dev);
  501. if (ret)
  502. goto fail_probe;
  503. ret = solo_sysfs_init(solo_dev);
  504. if (ret)
  505. goto fail_probe;
  506. /* Now that init is over, set this lower */
  507. solo_dev->p2m_jiffies = msecs_to_jiffies(20);
  508. return 0;
  509. fail_probe:
  510. free_solo_dev(solo_dev);
  511. return ret;
  512. }
  513. static void solo_pci_remove(struct pci_dev *pdev)
  514. {
  515. struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
  516. struct solo_dev *solo_dev = container_of(v4l2_dev, struct solo_dev, v4l2_dev);
  517. free_solo_dev(solo_dev);
  518. }
  519. static const struct pci_device_id solo_id_table[] = {
  520. /* 6010 based cards */
  521. { PCI_DEVICE(PCI_VENDOR_ID_SOFTLOGIC, PCI_DEVICE_ID_SOLO6010),
  522. .driver_data = SOLO_DEV_6010 },
  523. { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_NEUSOLO_4),
  524. .driver_data = SOLO_DEV_6010 },
  525. { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_NEUSOLO_9),
  526. .driver_data = SOLO_DEV_6010 },
  527. { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_NEUSOLO_16),
  528. .driver_data = SOLO_DEV_6010 },
  529. { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_SOLO_4),
  530. .driver_data = SOLO_DEV_6010 },
  531. { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_SOLO_9),
  532. .driver_data = SOLO_DEV_6010 },
  533. { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_SOLO_16),
  534. .driver_data = SOLO_DEV_6010 },
  535. /* 6110 based cards */
  536. { PCI_DEVICE(PCI_VENDOR_ID_SOFTLOGIC, PCI_DEVICE_ID_SOLO6110),
  537. .driver_data = SOLO_DEV_6110 },
  538. { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_6110_4),
  539. .driver_data = SOLO_DEV_6110 },
  540. { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_6110_8),
  541. .driver_data = SOLO_DEV_6110 },
  542. { PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_6110_16),
  543. .driver_data = SOLO_DEV_6110 },
  544. {0,}
  545. };
  546. MODULE_DEVICE_TABLE(pci, solo_id_table);
  547. static struct pci_driver solo_pci_driver = {
  548. .name = SOLO6X10_NAME,
  549. .id_table = solo_id_table,
  550. .probe = solo_pci_probe,
  551. .remove = solo_pci_remove,
  552. };
  553. module_pci_driver(solo_pci_driver);