ddbridge-main.c 7.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323
  1. /*
  2. * ddbridge.c: Digital Devices PCIe bridge driver
  3. *
  4. * Copyright (C) 2010-2017 Digital Devices GmbH
  5. * Ralph Metzler <rjkm@metzlerbros.de>
  6. * Marcus Metzler <mocm@metzlerbros.de>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 only, as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. */
  18. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  19. #include <linux/module.h>
  20. #include <linux/init.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/delay.h>
  23. #include <linux/slab.h>
  24. #include <linux/poll.h>
  25. #include <linux/io.h>
  26. #include <linux/pci.h>
  27. #include <linux/pci_ids.h>
  28. #include <linux/timer.h>
  29. #include <linux/i2c.h>
  30. #include <linux/swab.h>
  31. #include <linux/vmalloc.h>
  32. #include "ddbridge.h"
  33. #include "ddbridge-i2c.h"
  34. #include "ddbridge-regs.h"
  35. #include "ddbridge-hw.h"
  36. #include "ddbridge-io.h"
  37. /****************************************************************************/
  38. /* module parameters */
  39. #ifdef CONFIG_PCI_MSI
  40. #ifdef CONFIG_DVB_DDBRIDGE_MSIENABLE
  41. static int msi = 1;
  42. #else
  43. static int msi;
  44. #endif
  45. module_param(msi, int, 0444);
  46. #ifdef CONFIG_DVB_DDBRIDGE_MSIENABLE
  47. MODULE_PARM_DESC(msi, "Control MSI interrupts: 0-disable, 1-enable (default)");
  48. #else
  49. MODULE_PARM_DESC(msi, "Control MSI interrupts: 0-disable (default), 1-enable");
  50. #endif
  51. #endif
  52. /****************************************************************************/
  53. /****************************************************************************/
  54. /****************************************************************************/
  55. static void ddb_irq_disable(struct ddb *dev)
  56. {
  57. ddbwritel(dev, 0, INTERRUPT_ENABLE);
  58. ddbwritel(dev, 0, MSI1_ENABLE);
  59. }
  60. static void ddb_msi_exit(struct ddb *dev)
  61. {
  62. #ifdef CONFIG_PCI_MSI
  63. if (dev->msi)
  64. pci_free_irq_vectors(dev->pdev);
  65. #endif
  66. }
  67. static void ddb_irq_exit(struct ddb *dev)
  68. {
  69. ddb_irq_disable(dev);
  70. if (dev->msi == 2)
  71. free_irq(pci_irq_vector(dev->pdev, 1), dev);
  72. free_irq(pci_irq_vector(dev->pdev, 0), dev);
  73. }
  74. static void ddb_remove(struct pci_dev *pdev)
  75. {
  76. struct ddb *dev = (struct ddb *)pci_get_drvdata(pdev);
  77. ddb_device_destroy(dev);
  78. ddb_ports_detach(dev);
  79. ddb_i2c_release(dev);
  80. ddb_irq_exit(dev);
  81. ddb_msi_exit(dev);
  82. ddb_ports_release(dev);
  83. ddb_buffers_free(dev);
  84. ddb_unmap(dev);
  85. pci_set_drvdata(pdev, NULL);
  86. pci_disable_device(pdev);
  87. }
  88. #ifdef CONFIG_PCI_MSI
  89. static void ddb_irq_msi(struct ddb *dev, int nr)
  90. {
  91. int stat;
  92. if (msi && pci_msi_enabled()) {
  93. stat = pci_alloc_irq_vectors(dev->pdev, 1, nr,
  94. PCI_IRQ_MSI | PCI_IRQ_MSIX);
  95. if (stat >= 1) {
  96. dev->msi = stat;
  97. dev_info(dev->dev, "using %d MSI interrupt(s)\n",
  98. dev->msi);
  99. } else {
  100. dev_info(dev->dev, "MSI not available.\n");
  101. }
  102. }
  103. }
  104. #endif
  105. static int ddb_irq_init(struct ddb *dev)
  106. {
  107. int stat;
  108. int irq_flag = IRQF_SHARED;
  109. ddbwritel(dev, 0x00000000, INTERRUPT_ENABLE);
  110. ddbwritel(dev, 0x00000000, MSI1_ENABLE);
  111. ddbwritel(dev, 0x00000000, MSI2_ENABLE);
  112. ddbwritel(dev, 0x00000000, MSI3_ENABLE);
  113. ddbwritel(dev, 0x00000000, MSI4_ENABLE);
  114. ddbwritel(dev, 0x00000000, MSI5_ENABLE);
  115. ddbwritel(dev, 0x00000000, MSI6_ENABLE);
  116. ddbwritel(dev, 0x00000000, MSI7_ENABLE);
  117. #ifdef CONFIG_PCI_MSI
  118. ddb_irq_msi(dev, 2);
  119. if (dev->msi)
  120. irq_flag = 0;
  121. if (dev->msi == 2) {
  122. stat = request_irq(pci_irq_vector(dev->pdev, 0),
  123. ddb_irq_handler0, irq_flag, "ddbridge",
  124. (void *)dev);
  125. if (stat < 0)
  126. return stat;
  127. stat = request_irq(pci_irq_vector(dev->pdev, 1),
  128. ddb_irq_handler1, irq_flag, "ddbridge",
  129. (void *)dev);
  130. if (stat < 0) {
  131. free_irq(pci_irq_vector(dev->pdev, 0), dev);
  132. return stat;
  133. }
  134. } else
  135. #endif
  136. {
  137. stat = request_irq(pci_irq_vector(dev->pdev, 0),
  138. ddb_irq_handler, irq_flag, "ddbridge",
  139. (void *)dev);
  140. if (stat < 0)
  141. return stat;
  142. }
  143. if (dev->msi == 2) {
  144. ddbwritel(dev, 0x0fffff00, INTERRUPT_ENABLE);
  145. ddbwritel(dev, 0x0000000f, MSI1_ENABLE);
  146. } else {
  147. ddbwritel(dev, 0x0fffff0f, INTERRUPT_ENABLE);
  148. ddbwritel(dev, 0x00000000, MSI1_ENABLE);
  149. }
  150. return stat;
  151. }
  152. static int ddb_probe(struct pci_dev *pdev,
  153. const struct pci_device_id *id)
  154. {
  155. struct ddb *dev;
  156. int stat = 0;
  157. if (pci_enable_device(pdev) < 0)
  158. return -ENODEV;
  159. pci_set_master(pdev);
  160. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  161. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
  162. return -ENODEV;
  163. dev = vzalloc(sizeof(*dev));
  164. if (!dev)
  165. return -ENOMEM;
  166. mutex_init(&dev->mutex);
  167. dev->has_dma = 1;
  168. dev->pdev = pdev;
  169. dev->dev = &pdev->dev;
  170. pci_set_drvdata(pdev, dev);
  171. dev->link[0].ids.vendor = id->vendor;
  172. dev->link[0].ids.device = id->device;
  173. dev->link[0].ids.subvendor = id->subvendor;
  174. dev->link[0].ids.subdevice = pdev->subsystem_device;
  175. dev->link[0].ids.devid = (id->device << 16) | id->vendor;
  176. dev->link[0].dev = dev;
  177. dev->link[0].info = get_ddb_info(id->vendor, id->device,
  178. id->subvendor, pdev->subsystem_device);
  179. dev_info(&pdev->dev, "detected %s\n", dev->link[0].info->name);
  180. dev->regs_len = pci_resource_len(dev->pdev, 0);
  181. dev->regs = ioremap(pci_resource_start(dev->pdev, 0),
  182. pci_resource_len(dev->pdev, 0));
  183. if (!dev->regs) {
  184. dev_err(&pdev->dev, "not enough memory for register map\n");
  185. stat = -ENOMEM;
  186. goto fail;
  187. }
  188. if (ddbreadl(dev, 0) == 0xffffffff) {
  189. dev_err(&pdev->dev, "cannot read registers\n");
  190. stat = -ENODEV;
  191. goto fail;
  192. }
  193. dev->link[0].ids.hwid = ddbreadl(dev, 0);
  194. dev->link[0].ids.regmapid = ddbreadl(dev, 4);
  195. dev_info(&pdev->dev, "HW %08x REGMAP %08x\n",
  196. dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
  197. ddbwritel(dev, 0, DMA_BASE_READ);
  198. ddbwritel(dev, 0, DMA_BASE_WRITE);
  199. stat = ddb_irq_init(dev);
  200. if (stat < 0)
  201. goto fail0;
  202. if (ddb_init(dev) == 0)
  203. return 0;
  204. ddb_irq_exit(dev);
  205. fail0:
  206. dev_err(&pdev->dev, "fail0\n");
  207. ddb_msi_exit(dev);
  208. fail:
  209. dev_err(&pdev->dev, "fail\n");
  210. ddb_unmap(dev);
  211. pci_set_drvdata(pdev, NULL);
  212. pci_disable_device(pdev);
  213. return -1;
  214. }
  215. /****************************************************************************/
  216. /****************************************************************************/
  217. /****************************************************************************/
  218. #define DDB_DEVICE_ANY(_device) \
  219. { PCI_DEVICE_SUB(DDVID, _device, DDVID, PCI_ANY_ID) }
  220. static const struct pci_device_id ddb_id_table[] = {
  221. DDB_DEVICE_ANY(0x0002),
  222. DDB_DEVICE_ANY(0x0003),
  223. DDB_DEVICE_ANY(0x0005),
  224. DDB_DEVICE_ANY(0x0006),
  225. DDB_DEVICE_ANY(0x0007),
  226. DDB_DEVICE_ANY(0x0008),
  227. DDB_DEVICE_ANY(0x0009),
  228. DDB_DEVICE_ANY(0x0011),
  229. DDB_DEVICE_ANY(0x0012),
  230. DDB_DEVICE_ANY(0x0013),
  231. DDB_DEVICE_ANY(0x0201),
  232. DDB_DEVICE_ANY(0x0203),
  233. DDB_DEVICE_ANY(0x0210),
  234. DDB_DEVICE_ANY(0x0220),
  235. DDB_DEVICE_ANY(0x0320),
  236. DDB_DEVICE_ANY(0x0321),
  237. DDB_DEVICE_ANY(0x0322),
  238. DDB_DEVICE_ANY(0x0323),
  239. DDB_DEVICE_ANY(0x0328),
  240. DDB_DEVICE_ANY(0x0329),
  241. {0}
  242. };
  243. MODULE_DEVICE_TABLE(pci, ddb_id_table);
  244. static struct pci_driver ddb_pci_driver = {
  245. .name = "ddbridge",
  246. .id_table = ddb_id_table,
  247. .probe = ddb_probe,
  248. .remove = ddb_remove,
  249. };
  250. static __init int module_init_ddbridge(void)
  251. {
  252. int stat;
  253. pr_info("Digital Devices PCIE bridge driver "
  254. DDBRIDGE_VERSION
  255. ", Copyright (C) 2010-17 Digital Devices GmbH\n");
  256. stat = ddb_init_ddbridge();
  257. if (stat < 0)
  258. return stat;
  259. stat = pci_register_driver(&ddb_pci_driver);
  260. if (stat < 0)
  261. ddb_exit_ddbridge(0, stat);
  262. return stat;
  263. }
  264. static __exit void module_exit_ddbridge(void)
  265. {
  266. pci_unregister_driver(&ddb_pci_driver);
  267. ddb_exit_ddbridge(0, 0);
  268. }
  269. module_init(module_init_ddbridge);
  270. module_exit(module_exit_ddbridge);
  271. MODULE_DESCRIPTION("Digital Devices PCIe Bridge");
  272. MODULE_AUTHOR("Ralph and Marcus Metzler, Metzler Brothers Systementwicklung GbR");
  273. MODULE_LICENSE("GPL");
  274. MODULE_VERSION(DDBRIDGE_VERSION);