cx23885.h 21 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. */
  17. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18. #include <linux/pci.h>
  19. #include <linux/i2c.h>
  20. #include <linux/kdev_t.h>
  21. #include <linux/slab.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-fh.h>
  24. #include <media/v4l2-ctrls.h>
  25. #include <media/tuner.h>
  26. #include <media/tveeprom.h>
  27. #include <media/videobuf2-dma-sg.h>
  28. #include <media/videobuf2-dvb.h>
  29. #include <media/rc-core.h>
  30. #include "cx23885-reg.h"
  31. #include "media/drv-intf/cx2341x.h"
  32. #include <linux/mutex.h>
  33. #define CX23885_VERSION "0.0.4"
  34. #define UNSET (-1U)
  35. #define CX23885_MAXBOARDS 8
  36. /* Max number of inputs by card */
  37. #define MAX_CX23885_INPUT 8
  38. #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
  39. #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
  40. #define CX23885_BOARD_NOAUTO UNSET
  41. #define CX23885_BOARD_UNKNOWN 0
  42. #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
  43. #define CX23885_BOARD_HAUPPAUGE_HVR1800 2
  44. #define CX23885_BOARD_HAUPPAUGE_HVR1250 3
  45. #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
  46. #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
  47. #define CX23885_BOARD_HAUPPAUGE_HVR1500 6
  48. #define CX23885_BOARD_HAUPPAUGE_HVR1200 7
  49. #define CX23885_BOARD_HAUPPAUGE_HVR1700 8
  50. #define CX23885_BOARD_HAUPPAUGE_HVR1400 9
  51. #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
  52. #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
  53. #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
  54. #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
  55. #define CX23885_BOARD_TBS_6920 14
  56. #define CX23885_BOARD_TEVII_S470 15
  57. #define CX23885_BOARD_DVBWORLD_2005 16
  58. #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
  59. #define CX23885_BOARD_HAUPPAUGE_HVR1270 18
  60. #define CX23885_BOARD_HAUPPAUGE_HVR1275 19
  61. #define CX23885_BOARD_HAUPPAUGE_HVR1255 20
  62. #define CX23885_BOARD_HAUPPAUGE_HVR1210 21
  63. #define CX23885_BOARD_MYGICA_X8506 22
  64. #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
  65. #define CX23885_BOARD_HAUPPAUGE_HVR1850 24
  66. #define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
  67. #define CX23885_BOARD_HAUPPAUGE_HVR1290 26
  68. #define CX23885_BOARD_MYGICA_X8558PRO 27
  69. #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
  70. #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
  71. #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
  72. #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
  73. #define CX23885_BOARD_MPX885 32
  74. #define CX23885_BOARD_MYGICA_X8507 33
  75. #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
  76. #define CX23885_BOARD_TEVII_S471 35
  77. #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36
  78. #define CX23885_BOARD_PROF_8000 37
  79. #define CX23885_BOARD_HAUPPAUGE_HVR4400 38
  80. #define CX23885_BOARD_AVERMEDIA_HC81R 39
  81. #define CX23885_BOARD_TBS_6981 40
  82. #define CX23885_BOARD_TBS_6980 41
  83. #define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42
  84. #define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43
  85. #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44
  86. #define CX23885_BOARD_DVBSKY_T9580 45
  87. #define CX23885_BOARD_DVBSKY_T980C 46
  88. #define CX23885_BOARD_DVBSKY_S950C 47
  89. #define CX23885_BOARD_TT_CT2_4500_CI 48
  90. #define CX23885_BOARD_DVBSKY_S950 49
  91. #define CX23885_BOARD_DVBSKY_S952 50
  92. #define CX23885_BOARD_DVBSKY_T982 51
  93. #define CX23885_BOARD_HAUPPAUGE_HVR5525 52
  94. #define CX23885_BOARD_HAUPPAUGE_STARBURST 53
  95. #define CX23885_BOARD_VIEWCAST_260E 54
  96. #define CX23885_BOARD_VIEWCAST_460E 55
  97. #define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB 56
  98. #define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC 57
  99. #define CX23885_BOARD_HAUPPAUGE_HVR1265_K4 58
  100. #define CX23885_BOARD_HAUPPAUGE_STARBURST2 59
  101. #define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885 60
  102. #define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885 61
  103. #define CX23885_BOARD_AVERMEDIA_CE310B 62
  104. #define GPIO_0 0x00000001
  105. #define GPIO_1 0x00000002
  106. #define GPIO_2 0x00000004
  107. #define GPIO_3 0x00000008
  108. #define GPIO_4 0x00000010
  109. #define GPIO_5 0x00000020
  110. #define GPIO_6 0x00000040
  111. #define GPIO_7 0x00000080
  112. #define GPIO_8 0x00000100
  113. #define GPIO_9 0x00000200
  114. #define GPIO_10 0x00000400
  115. #define GPIO_11 0x00000800
  116. #define GPIO_12 0x00001000
  117. #define GPIO_13 0x00002000
  118. #define GPIO_14 0x00004000
  119. #define GPIO_15 0x00008000
  120. /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
  121. #define CX23885_NORMS (\
  122. V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
  123. V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
  124. V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
  125. V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
  126. struct cx23885_fmt {
  127. char *name;
  128. u32 fourcc; /* v4l2 format id */
  129. int depth;
  130. int flags;
  131. u32 cxformat;
  132. };
  133. struct cx23885_tvnorm {
  134. char *name;
  135. v4l2_std_id id;
  136. u32 cxiformat;
  137. u32 cxoformat;
  138. };
  139. enum cx23885_itype {
  140. CX23885_VMUX_COMPOSITE1 = 1,
  141. CX23885_VMUX_COMPOSITE2,
  142. CX23885_VMUX_COMPOSITE3,
  143. CX23885_VMUX_COMPOSITE4,
  144. CX23885_VMUX_SVIDEO,
  145. CX23885_VMUX_COMPONENT,
  146. CX23885_VMUX_TELEVISION,
  147. CX23885_VMUX_CABLE,
  148. CX23885_VMUX_DVB,
  149. CX23885_VMUX_DEBUG,
  150. CX23885_RADIO,
  151. };
  152. enum cx23885_src_sel_type {
  153. CX23885_SRC_SEL_EXT_656_VIDEO = 0,
  154. CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
  155. };
  156. struct cx23885_riscmem {
  157. unsigned int size;
  158. __le32 *cpu;
  159. __le32 *jmp;
  160. dma_addr_t dma;
  161. };
  162. /* buffer for one video frame */
  163. struct cx23885_buffer {
  164. /* common v4l buffer stuff -- must be first */
  165. struct vb2_v4l2_buffer vb;
  166. struct list_head queue;
  167. /* cx23885 specific */
  168. unsigned int bpl;
  169. struct cx23885_riscmem risc;
  170. struct cx23885_fmt *fmt;
  171. u32 count;
  172. };
  173. struct cx23885_input {
  174. enum cx23885_itype type;
  175. unsigned int vmux;
  176. unsigned int amux;
  177. u32 gpio0, gpio1, gpio2, gpio3;
  178. };
  179. typedef enum {
  180. CX23885_MPEG_UNDEFINED = 0,
  181. CX23885_MPEG_DVB,
  182. CX23885_ANALOG_VIDEO,
  183. CX23885_MPEG_ENCODER,
  184. } port_t;
  185. struct cx23885_board {
  186. char *name;
  187. port_t porta, portb, portc;
  188. int num_fds_portb, num_fds_portc;
  189. unsigned int tuner_type;
  190. unsigned int radio_type;
  191. unsigned char tuner_addr;
  192. unsigned char radio_addr;
  193. unsigned int tuner_bus;
  194. /* Vendors can and do run the PCIe bridge at different
  195. * clock rates, driven physically by crystals on the PCBs.
  196. * The core has to accommodate this. This allows the user
  197. * to add new boards with new frequencys. The value is
  198. * expressed in Hz.
  199. *
  200. * The core framework will default this value based on
  201. * current designs, but it can vary.
  202. */
  203. u32 clk_freq;
  204. struct cx23885_input input[MAX_CX23885_INPUT];
  205. int ci_type; /* for NetUP */
  206. /* Force bottom field first during DMA (888 workaround) */
  207. u32 force_bff;
  208. };
  209. struct cx23885_subid {
  210. u16 subvendor;
  211. u16 subdevice;
  212. u32 card;
  213. };
  214. struct cx23885_i2c {
  215. struct cx23885_dev *dev;
  216. int nr;
  217. /* i2c i/o */
  218. struct i2c_adapter i2c_adap;
  219. struct i2c_client i2c_client;
  220. u32 i2c_rc;
  221. /* 885 registers used for raw addess */
  222. u32 i2c_period;
  223. u32 reg_ctrl;
  224. u32 reg_stat;
  225. u32 reg_addr;
  226. u32 reg_rdata;
  227. u32 reg_wdata;
  228. };
  229. struct cx23885_dmaqueue {
  230. struct list_head active;
  231. u32 count;
  232. };
  233. struct cx23885_tsport {
  234. struct cx23885_dev *dev;
  235. unsigned nr;
  236. int sram_chno;
  237. struct vb2_dvb_frontends frontends;
  238. /* dma queues */
  239. struct cx23885_dmaqueue mpegq;
  240. u32 ts_packet_size;
  241. u32 ts_packet_count;
  242. int width;
  243. int height;
  244. spinlock_t slock;
  245. /* registers */
  246. u32 reg_gpcnt;
  247. u32 reg_gpcnt_ctl;
  248. u32 reg_dma_ctl;
  249. u32 reg_lngth;
  250. u32 reg_hw_sop_ctrl;
  251. u32 reg_gen_ctrl;
  252. u32 reg_bd_pkt_status;
  253. u32 reg_sop_status;
  254. u32 reg_fifo_ovfl_stat;
  255. u32 reg_vld_misc;
  256. u32 reg_ts_clk_en;
  257. u32 reg_ts_int_msk;
  258. u32 reg_ts_int_stat;
  259. u32 reg_src_sel;
  260. /* Default register vals */
  261. int pci_irqmask;
  262. u32 dma_ctl_val;
  263. u32 ts_int_msk_val;
  264. u32 gen_ctrl_val;
  265. u32 ts_clk_en_val;
  266. u32 src_sel_val;
  267. u32 vld_misc_val;
  268. u32 hw_sop_ctrl_val;
  269. /* Allow a single tsport to have multiple frontends */
  270. u32 num_frontends;
  271. void (*gate_ctrl)(struct cx23885_tsport *port, int open);
  272. void *port_priv;
  273. /* Workaround for a temp dvb_frontend that the tuner can attached to */
  274. struct dvb_frontend analog_fe;
  275. struct i2c_client *i2c_client_demod;
  276. struct i2c_client *i2c_client_tuner;
  277. struct i2c_client *i2c_client_sec;
  278. struct i2c_client *i2c_client_ci;
  279. int (*set_frontend)(struct dvb_frontend *fe);
  280. int (*fe_set_voltage)(struct dvb_frontend *fe,
  281. enum fe_sec_voltage voltage);
  282. };
  283. struct cx23885_kernel_ir {
  284. struct cx23885_dev *cx;
  285. char *name;
  286. char *phys;
  287. struct rc_dev *rc;
  288. };
  289. struct cx23885_audio_buffer {
  290. unsigned int bpl;
  291. struct cx23885_riscmem risc;
  292. void *vaddr;
  293. struct scatterlist *sglist;
  294. int sglen;
  295. int nr_pages;
  296. };
  297. struct cx23885_audio_dev {
  298. struct cx23885_dev *dev;
  299. struct pci_dev *pci;
  300. struct snd_card *card;
  301. spinlock_t lock;
  302. atomic_t count;
  303. unsigned int dma_size;
  304. unsigned int period_size;
  305. unsigned int num_periods;
  306. struct cx23885_audio_buffer *buf;
  307. struct snd_pcm_substream *substream;
  308. };
  309. struct cx23885_dev {
  310. atomic_t refcount;
  311. struct v4l2_device v4l2_dev;
  312. struct v4l2_ctrl_handler ctrl_handler;
  313. /* pci stuff */
  314. struct pci_dev *pci;
  315. unsigned char pci_rev, pci_lat;
  316. int pci_bus, pci_slot;
  317. u32 __iomem *lmmio;
  318. u8 __iomem *bmmio;
  319. int pci_irqmask;
  320. spinlock_t pci_irqmask_lock; /* protects mask reg too */
  321. int hwrevision;
  322. /* This valud is board specific and is used to configure the
  323. * AV core so we see nice clean and stable video and audio. */
  324. u32 clk_freq;
  325. /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
  326. struct cx23885_i2c i2c_bus[3];
  327. int nr;
  328. struct mutex lock;
  329. struct mutex gpio_lock;
  330. /* board details */
  331. unsigned int board;
  332. char name[32];
  333. struct cx23885_tsport ts1, ts2;
  334. /* sram configuration */
  335. struct sram_channel *sram_channels;
  336. enum {
  337. CX23885_BRIDGE_UNDEFINED = 0,
  338. CX23885_BRIDGE_885 = 885,
  339. CX23885_BRIDGE_887 = 887,
  340. CX23885_BRIDGE_888 = 888,
  341. } bridge;
  342. /* Analog video */
  343. unsigned int input;
  344. unsigned int audinput; /* Selectable audio input */
  345. u32 tvaudio;
  346. v4l2_std_id tvnorm;
  347. unsigned int tuner_type;
  348. unsigned char tuner_addr;
  349. unsigned int tuner_bus;
  350. unsigned int radio_type;
  351. unsigned char radio_addr;
  352. struct v4l2_subdev *sd_cx25840;
  353. struct work_struct cx25840_work;
  354. /* Infrared */
  355. struct v4l2_subdev *sd_ir;
  356. struct work_struct ir_rx_work;
  357. unsigned long ir_rx_notifications;
  358. struct work_struct ir_tx_work;
  359. unsigned long ir_tx_notifications;
  360. struct cx23885_kernel_ir *kernel_ir;
  361. atomic_t ir_input_stopping;
  362. /* V4l */
  363. u32 freq;
  364. struct video_device *video_dev;
  365. struct video_device *vbi_dev;
  366. /* video capture */
  367. struct cx23885_fmt *fmt;
  368. unsigned int width, height;
  369. unsigned field;
  370. struct cx23885_dmaqueue vidq;
  371. struct vb2_queue vb2_vidq;
  372. struct cx23885_dmaqueue vbiq;
  373. struct vb2_queue vb2_vbiq;
  374. spinlock_t slock;
  375. /* MPEG Encoder ONLY settings */
  376. u32 cx23417_mailbox;
  377. struct cx2341x_handler cxhdl;
  378. struct video_device *v4l_device;
  379. struct vb2_queue vb2_mpegq;
  380. struct cx23885_tvnorm encodernorm;
  381. /* Analog raw audio */
  382. struct cx23885_audio_dev *audio_dev;
  383. /* Does the system require periodic DMA resets? */
  384. unsigned int need_dma_reset:1;
  385. };
  386. static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
  387. {
  388. return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
  389. }
  390. #define call_all(dev, o, f, args...) \
  391. v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
  392. #define CX23885_HW_888_IR (1 << 0)
  393. #define CX23885_HW_AV_CORE (1 << 1)
  394. #define call_hw(dev, grpid, o, f, args...) \
  395. v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
  396. extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
  397. #define SRAM_CH01 0 /* Video A */
  398. #define SRAM_CH02 1 /* VBI A */
  399. #define SRAM_CH03 2 /* Video B */
  400. #define SRAM_CH04 3 /* Transport via B */
  401. #define SRAM_CH05 4 /* VBI B */
  402. #define SRAM_CH06 5 /* Video C */
  403. #define SRAM_CH07 6 /* Transport via C */
  404. #define SRAM_CH08 7 /* Audio Internal A */
  405. #define SRAM_CH09 8 /* Audio Internal B */
  406. #define SRAM_CH10 9 /* Audio External */
  407. #define SRAM_CH11 10 /* COMB_3D_N */
  408. #define SRAM_CH12 11 /* Comb 3D N1 */
  409. #define SRAM_CH13 12 /* Comb 3D N2 */
  410. #define SRAM_CH14 13 /* MOE Vid */
  411. #define SRAM_CH15 14 /* MOE RSLT */
  412. struct sram_channel {
  413. char *name;
  414. u32 cmds_start;
  415. u32 ctrl_start;
  416. u32 cdt;
  417. u32 fifo_start;
  418. u32 fifo_size;
  419. u32 ptr1_reg;
  420. u32 ptr2_reg;
  421. u32 cnt1_reg;
  422. u32 cnt2_reg;
  423. u32 jumponly;
  424. };
  425. /* ----------------------------------------------------------- */
  426. #define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
  427. #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
  428. #define cx_andor(reg, mask, value) \
  429. writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
  430. ((value) & (mask)), dev->lmmio+((reg)>>2))
  431. #define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
  432. #define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
  433. /* ----------------------------------------------------------- */
  434. /* cx23885-core.c */
  435. extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
  436. struct sram_channel *ch,
  437. unsigned int bpl, u32 risc);
  438. extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
  439. struct sram_channel *ch);
  440. extern int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc,
  441. struct scatterlist *sglist,
  442. unsigned int top_offset, unsigned int bottom_offset,
  443. unsigned int bpl, unsigned int padding, unsigned int lines);
  444. extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
  445. struct cx23885_riscmem *risc, struct scatterlist *sglist,
  446. unsigned int top_offset, unsigned int bottom_offset,
  447. unsigned int bpl, unsigned int padding, unsigned int lines);
  448. int cx23885_start_dma(struct cx23885_tsport *port,
  449. struct cx23885_dmaqueue *q,
  450. struct cx23885_buffer *buf);
  451. void cx23885_cancel_buffers(struct cx23885_tsport *port);
  452. extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
  453. extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
  454. extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
  455. extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
  456. int asoutput);
  457. extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
  458. extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
  459. extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
  460. extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
  461. /* ----------------------------------------------------------- */
  462. /* cx23885-cards.c */
  463. extern struct cx23885_board cx23885_boards[];
  464. extern const unsigned int cx23885_bcount;
  465. extern struct cx23885_subid cx23885_subids[];
  466. extern const unsigned int cx23885_idcount;
  467. extern int cx23885_tuner_callback(void *priv, int component,
  468. int command, int arg);
  469. extern void cx23885_card_list(struct cx23885_dev *dev);
  470. extern int cx23885_ir_init(struct cx23885_dev *dev);
  471. extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
  472. extern void cx23885_ir_fini(struct cx23885_dev *dev);
  473. extern void cx23885_gpio_setup(struct cx23885_dev *dev);
  474. extern void cx23885_card_setup(struct cx23885_dev *dev);
  475. extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
  476. extern int cx23885_dvb_register(struct cx23885_tsport *port);
  477. extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
  478. extern int cx23885_buf_prepare(struct cx23885_buffer *buf,
  479. struct cx23885_tsport *port);
  480. extern void cx23885_buf_queue(struct cx23885_tsport *port,
  481. struct cx23885_buffer *buf);
  482. extern void cx23885_free_buffer(struct cx23885_dev *dev,
  483. struct cx23885_buffer *buf);
  484. /* ----------------------------------------------------------- */
  485. /* cx23885-video.c */
  486. /* Video */
  487. extern int cx23885_video_register(struct cx23885_dev *dev);
  488. extern void cx23885_video_unregister(struct cx23885_dev *dev);
  489. extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
  490. extern void cx23885_video_wakeup(struct cx23885_dev *dev,
  491. struct cx23885_dmaqueue *q, u32 count);
  492. int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
  493. int cx23885_set_input(struct file *file, void *priv, unsigned int i);
  494. int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
  495. int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f);
  496. int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
  497. /* ----------------------------------------------------------- */
  498. /* cx23885-vbi.c */
  499. extern int cx23885_vbi_fmt(struct file *file, void *priv,
  500. struct v4l2_format *f);
  501. extern void cx23885_vbi_timeout(unsigned long data);
  502. extern const struct vb2_ops cx23885_vbi_qops;
  503. extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
  504. /* cx23885-i2c.c */
  505. extern int cx23885_i2c_register(struct cx23885_i2c *bus);
  506. extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
  507. extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
  508. /* ----------------------------------------------------------- */
  509. /* cx23885-417.c */
  510. extern int cx23885_417_register(struct cx23885_dev *dev);
  511. extern void cx23885_417_unregister(struct cx23885_dev *dev);
  512. extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
  513. extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
  514. extern void cx23885_mc417_init(struct cx23885_dev *dev);
  515. extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
  516. extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
  517. extern int mc417_register_read(struct cx23885_dev *dev,
  518. u16 address, u32 *value);
  519. extern int mc417_register_write(struct cx23885_dev *dev,
  520. u16 address, u32 value);
  521. extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
  522. extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
  523. extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
  524. /* ----------------------------------------------------------- */
  525. /* cx23885-alsa.c */
  526. extern struct cx23885_audio_dev *cx23885_audio_register(
  527. struct cx23885_dev *dev);
  528. extern void cx23885_audio_unregister(struct cx23885_dev *dev);
  529. extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
  530. extern int cx23885_risc_databuffer(struct pci_dev *pci,
  531. struct cx23885_riscmem *risc,
  532. struct scatterlist *sglist,
  533. unsigned int bpl,
  534. unsigned int lines,
  535. unsigned int lpi);
  536. /* ----------------------------------------------------------- */
  537. /* tv norms */
  538. static inline unsigned int norm_maxh(v4l2_std_id norm)
  539. {
  540. return (norm & V4L2_STD_525_60) ? 480 : 576;
  541. }