cx23885-cards.c 70 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. */
  17. #include "cx23885.h"
  18. #include <linux/init.h>
  19. #include <linux/module.h>
  20. #include <linux/pci.h>
  21. #include <linux/delay.h>
  22. #include <media/drv-intf/cx25840.h>
  23. #include <linux/firmware.h>
  24. #include <misc/altera.h>
  25. #include "tuner-xc2028.h"
  26. #include "netup-eeprom.h"
  27. #include "netup-init.h"
  28. #include "altera-ci.h"
  29. #include "xc4000.h"
  30. #include "xc5000.h"
  31. #include "cx23888-ir.h"
  32. static unsigned int netup_card_rev = 4;
  33. module_param(netup_card_rev, int, 0644);
  34. MODULE_PARM_DESC(netup_card_rev,
  35. "NetUP Dual DVB-T/C CI card revision");
  36. static unsigned int enable_885_ir;
  37. module_param(enable_885_ir, int, 0644);
  38. MODULE_PARM_DESC(enable_885_ir,
  39. "Enable integrated IR controller for supported\n"
  40. "\t\t CX2388[57] boards that are wired for it:\n"
  41. "\t\t\tHVR-1250 (reported safe)\n"
  42. "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
  43. "\t\t\tTeVii S470 (reported unsafe)\n"
  44. "\t\t This can cause an interrupt storm with some cards.\n"
  45. "\t\t Default: 0 [Disabled]");
  46. /* ------------------------------------------------------------------ */
  47. /* board config info */
  48. struct cx23885_board cx23885_boards[] = {
  49. [CX23885_BOARD_UNKNOWN] = {
  50. .name = "UNKNOWN/GENERIC",
  51. /* Ensure safe default for unknown boards */
  52. .clk_freq = 0,
  53. .input = {{
  54. .type = CX23885_VMUX_COMPOSITE1,
  55. .vmux = 0,
  56. }, {
  57. .type = CX23885_VMUX_COMPOSITE2,
  58. .vmux = 1,
  59. }, {
  60. .type = CX23885_VMUX_COMPOSITE3,
  61. .vmux = 2,
  62. }, {
  63. .type = CX23885_VMUX_COMPOSITE4,
  64. .vmux = 3,
  65. } },
  66. },
  67. [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
  68. .name = "Hauppauge WinTV-HVR1800lp",
  69. .portc = CX23885_MPEG_DVB,
  70. .input = {{
  71. .type = CX23885_VMUX_TELEVISION,
  72. .vmux = 0,
  73. .gpio0 = 0xff00,
  74. }, {
  75. .type = CX23885_VMUX_DEBUG,
  76. .vmux = 0,
  77. .gpio0 = 0xff01,
  78. }, {
  79. .type = CX23885_VMUX_COMPOSITE1,
  80. .vmux = 1,
  81. .gpio0 = 0xff02,
  82. }, {
  83. .type = CX23885_VMUX_SVIDEO,
  84. .vmux = 2,
  85. .gpio0 = 0xff02,
  86. } },
  87. },
  88. [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
  89. .name = "Hauppauge WinTV-HVR1800",
  90. .porta = CX23885_ANALOG_VIDEO,
  91. .portb = CX23885_MPEG_ENCODER,
  92. .portc = CX23885_MPEG_DVB,
  93. .tuner_type = TUNER_PHILIPS_TDA8290,
  94. .tuner_addr = 0x42, /* 0x84 >> 1 */
  95. .tuner_bus = 1,
  96. .input = {{
  97. .type = CX23885_VMUX_TELEVISION,
  98. .vmux = CX25840_VIN7_CH3 |
  99. CX25840_VIN5_CH2 |
  100. CX25840_VIN2_CH1,
  101. .amux = CX25840_AUDIO8,
  102. .gpio0 = 0,
  103. }, {
  104. .type = CX23885_VMUX_COMPOSITE1,
  105. .vmux = CX25840_VIN7_CH3 |
  106. CX25840_VIN4_CH2 |
  107. CX25840_VIN6_CH1,
  108. .amux = CX25840_AUDIO7,
  109. .gpio0 = 0,
  110. }, {
  111. .type = CX23885_VMUX_SVIDEO,
  112. .vmux = CX25840_VIN7_CH3 |
  113. CX25840_VIN4_CH2 |
  114. CX25840_VIN8_CH1 |
  115. CX25840_SVIDEO_ON,
  116. .amux = CX25840_AUDIO7,
  117. .gpio0 = 0,
  118. } },
  119. },
  120. [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
  121. .name = "Hauppauge WinTV-HVR1250",
  122. .porta = CX23885_ANALOG_VIDEO,
  123. .portc = CX23885_MPEG_DVB,
  124. #ifdef MT2131_NO_ANALOG_SUPPORT_YET
  125. .tuner_type = TUNER_PHILIPS_TDA8290,
  126. .tuner_addr = 0x42, /* 0x84 >> 1 */
  127. .tuner_bus = 1,
  128. #endif
  129. .force_bff = 1,
  130. .input = {{
  131. #ifdef MT2131_NO_ANALOG_SUPPORT_YET
  132. .type = CX23885_VMUX_TELEVISION,
  133. .vmux = CX25840_VIN7_CH3 |
  134. CX25840_VIN5_CH2 |
  135. CX25840_VIN2_CH1,
  136. .amux = CX25840_AUDIO8,
  137. .gpio0 = 0xff00,
  138. }, {
  139. #endif
  140. .type = CX23885_VMUX_COMPOSITE1,
  141. .vmux = CX25840_VIN7_CH3 |
  142. CX25840_VIN4_CH2 |
  143. CX25840_VIN6_CH1,
  144. .amux = CX25840_AUDIO7,
  145. .gpio0 = 0xff02,
  146. }, {
  147. .type = CX23885_VMUX_SVIDEO,
  148. .vmux = CX25840_VIN7_CH3 |
  149. CX25840_VIN4_CH2 |
  150. CX25840_VIN8_CH1 |
  151. CX25840_SVIDEO_ON,
  152. .amux = CX25840_AUDIO7,
  153. .gpio0 = 0xff02,
  154. } },
  155. },
  156. [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
  157. .name = "DViCO FusionHDTV5 Express",
  158. .portb = CX23885_MPEG_DVB,
  159. },
  160. [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
  161. .name = "Hauppauge WinTV-HVR1500Q",
  162. .portc = CX23885_MPEG_DVB,
  163. },
  164. [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
  165. .name = "Hauppauge WinTV-HVR1500",
  166. .porta = CX23885_ANALOG_VIDEO,
  167. .portc = CX23885_MPEG_DVB,
  168. .tuner_type = TUNER_XC2028,
  169. .tuner_addr = 0x61, /* 0xc2 >> 1 */
  170. .input = {{
  171. .type = CX23885_VMUX_TELEVISION,
  172. .vmux = CX25840_VIN7_CH3 |
  173. CX25840_VIN5_CH2 |
  174. CX25840_VIN2_CH1,
  175. .gpio0 = 0,
  176. }, {
  177. .type = CX23885_VMUX_COMPOSITE1,
  178. .vmux = CX25840_VIN7_CH3 |
  179. CX25840_VIN4_CH2 |
  180. CX25840_VIN6_CH1,
  181. .gpio0 = 0,
  182. }, {
  183. .type = CX23885_VMUX_SVIDEO,
  184. .vmux = CX25840_VIN7_CH3 |
  185. CX25840_VIN4_CH2 |
  186. CX25840_VIN8_CH1 |
  187. CX25840_SVIDEO_ON,
  188. .gpio0 = 0,
  189. } },
  190. },
  191. [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
  192. .name = "Hauppauge WinTV-HVR1200",
  193. .portc = CX23885_MPEG_DVB,
  194. },
  195. [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
  196. .name = "Hauppauge WinTV-HVR1700",
  197. .portc = CX23885_MPEG_DVB,
  198. },
  199. [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
  200. .name = "Hauppauge WinTV-HVR1400",
  201. .portc = CX23885_MPEG_DVB,
  202. },
  203. [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
  204. .name = "DViCO FusionHDTV7 Dual Express",
  205. .portb = CX23885_MPEG_DVB,
  206. .portc = CX23885_MPEG_DVB,
  207. },
  208. [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
  209. .name = "DViCO FusionHDTV DVB-T Dual Express",
  210. .portb = CX23885_MPEG_DVB,
  211. .portc = CX23885_MPEG_DVB,
  212. },
  213. [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
  214. .name = "Leadtek Winfast PxDVR3200 H",
  215. .portc = CX23885_MPEG_DVB,
  216. },
  217. [CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
  218. .name = "Leadtek Winfast PxPVR2200",
  219. .porta = CX23885_ANALOG_VIDEO,
  220. .tuner_type = TUNER_XC2028,
  221. .tuner_addr = 0x61,
  222. .tuner_bus = 1,
  223. .input = {{
  224. .type = CX23885_VMUX_TELEVISION,
  225. .vmux = CX25840_VIN2_CH1 |
  226. CX25840_VIN5_CH2,
  227. .amux = CX25840_AUDIO8,
  228. .gpio0 = 0x704040,
  229. }, {
  230. .type = CX23885_VMUX_COMPOSITE1,
  231. .vmux = CX25840_COMPOSITE1,
  232. .amux = CX25840_AUDIO7,
  233. .gpio0 = 0x704040,
  234. }, {
  235. .type = CX23885_VMUX_SVIDEO,
  236. .vmux = CX25840_SVIDEO_LUMA3 |
  237. CX25840_SVIDEO_CHROMA4,
  238. .amux = CX25840_AUDIO7,
  239. .gpio0 = 0x704040,
  240. }, {
  241. .type = CX23885_VMUX_COMPONENT,
  242. .vmux = CX25840_VIN7_CH1 |
  243. CX25840_VIN6_CH2 |
  244. CX25840_VIN8_CH3 |
  245. CX25840_COMPONENT_ON,
  246. .amux = CX25840_AUDIO7,
  247. .gpio0 = 0x704040,
  248. } },
  249. },
  250. [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
  251. .name = "Leadtek Winfast PxDVR3200 H XC4000",
  252. .porta = CX23885_ANALOG_VIDEO,
  253. .portc = CX23885_MPEG_DVB,
  254. .tuner_type = TUNER_XC4000,
  255. .tuner_addr = 0x61,
  256. .radio_type = UNSET,
  257. .radio_addr = ADDR_UNSET,
  258. .input = {{
  259. .type = CX23885_VMUX_TELEVISION,
  260. .vmux = CX25840_VIN2_CH1 |
  261. CX25840_VIN5_CH2 |
  262. CX25840_NONE0_CH3,
  263. }, {
  264. .type = CX23885_VMUX_COMPOSITE1,
  265. .vmux = CX25840_COMPOSITE1,
  266. }, {
  267. .type = CX23885_VMUX_SVIDEO,
  268. .vmux = CX25840_SVIDEO_LUMA3 |
  269. CX25840_SVIDEO_CHROMA4,
  270. }, {
  271. .type = CX23885_VMUX_COMPONENT,
  272. .vmux = CX25840_VIN7_CH1 |
  273. CX25840_VIN6_CH2 |
  274. CX25840_VIN8_CH3 |
  275. CX25840_COMPONENT_ON,
  276. } },
  277. },
  278. [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
  279. .name = "Compro VideoMate E650F",
  280. .portc = CX23885_MPEG_DVB,
  281. },
  282. [CX23885_BOARD_TBS_6920] = {
  283. .name = "TurboSight TBS 6920",
  284. .portb = CX23885_MPEG_DVB,
  285. },
  286. [CX23885_BOARD_TBS_6980] = {
  287. .name = "TurboSight TBS 6980",
  288. .portb = CX23885_MPEG_DVB,
  289. .portc = CX23885_MPEG_DVB,
  290. },
  291. [CX23885_BOARD_TBS_6981] = {
  292. .name = "TurboSight TBS 6981",
  293. .portb = CX23885_MPEG_DVB,
  294. .portc = CX23885_MPEG_DVB,
  295. },
  296. [CX23885_BOARD_TEVII_S470] = {
  297. .name = "TeVii S470",
  298. .portb = CX23885_MPEG_DVB,
  299. },
  300. [CX23885_BOARD_DVBWORLD_2005] = {
  301. .name = "DVBWorld DVB-S2 2005",
  302. .portb = CX23885_MPEG_DVB,
  303. },
  304. [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
  305. .ci_type = 1,
  306. .name = "NetUP Dual DVB-S2 CI",
  307. .portb = CX23885_MPEG_DVB,
  308. .portc = CX23885_MPEG_DVB,
  309. },
  310. [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
  311. .name = "Hauppauge WinTV-HVR1270",
  312. .portc = CX23885_MPEG_DVB,
  313. },
  314. [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
  315. .name = "Hauppauge WinTV-HVR1275",
  316. .portc = CX23885_MPEG_DVB,
  317. },
  318. [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
  319. .name = "Hauppauge WinTV-HVR1255",
  320. .porta = CX23885_ANALOG_VIDEO,
  321. .portc = CX23885_MPEG_DVB,
  322. .tuner_type = TUNER_ABSENT,
  323. .tuner_addr = 0x42, /* 0x84 >> 1 */
  324. .force_bff = 1,
  325. .input = {{
  326. .type = CX23885_VMUX_TELEVISION,
  327. .vmux = CX25840_VIN7_CH3 |
  328. CX25840_VIN5_CH2 |
  329. CX25840_VIN2_CH1 |
  330. CX25840_DIF_ON,
  331. .amux = CX25840_AUDIO8,
  332. }, {
  333. .type = CX23885_VMUX_COMPOSITE1,
  334. .vmux = CX25840_VIN7_CH3 |
  335. CX25840_VIN4_CH2 |
  336. CX25840_VIN6_CH1,
  337. .amux = CX25840_AUDIO7,
  338. }, {
  339. .type = CX23885_VMUX_SVIDEO,
  340. .vmux = CX25840_VIN7_CH3 |
  341. CX25840_VIN4_CH2 |
  342. CX25840_VIN8_CH1 |
  343. CX25840_SVIDEO_ON,
  344. .amux = CX25840_AUDIO7,
  345. } },
  346. },
  347. [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
  348. .name = "Hauppauge WinTV-HVR1255",
  349. .porta = CX23885_ANALOG_VIDEO,
  350. .portc = CX23885_MPEG_DVB,
  351. .tuner_type = TUNER_ABSENT,
  352. .tuner_addr = 0x42, /* 0x84 >> 1 */
  353. .force_bff = 1,
  354. .input = {{
  355. .type = CX23885_VMUX_TELEVISION,
  356. .vmux = CX25840_VIN7_CH3 |
  357. CX25840_VIN5_CH2 |
  358. CX25840_VIN2_CH1 |
  359. CX25840_DIF_ON,
  360. .amux = CX25840_AUDIO8,
  361. }, {
  362. .type = CX23885_VMUX_SVIDEO,
  363. .vmux = CX25840_VIN7_CH3 |
  364. CX25840_VIN4_CH2 |
  365. CX25840_VIN8_CH1 |
  366. CX25840_SVIDEO_ON,
  367. .amux = CX25840_AUDIO7,
  368. } },
  369. },
  370. [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
  371. .name = "Hauppauge WinTV-HVR1210",
  372. .portc = CX23885_MPEG_DVB,
  373. },
  374. [CX23885_BOARD_MYGICA_X8506] = {
  375. .name = "Mygica X8506 DMB-TH",
  376. .tuner_type = TUNER_XC5000,
  377. .tuner_addr = 0x61,
  378. .tuner_bus = 1,
  379. .porta = CX23885_ANALOG_VIDEO,
  380. .portb = CX23885_MPEG_DVB,
  381. .input = {
  382. {
  383. .type = CX23885_VMUX_TELEVISION,
  384. .vmux = CX25840_COMPOSITE2,
  385. },
  386. {
  387. .type = CX23885_VMUX_COMPOSITE1,
  388. .vmux = CX25840_COMPOSITE8,
  389. },
  390. {
  391. .type = CX23885_VMUX_SVIDEO,
  392. .vmux = CX25840_SVIDEO_LUMA3 |
  393. CX25840_SVIDEO_CHROMA4,
  394. },
  395. {
  396. .type = CX23885_VMUX_COMPONENT,
  397. .vmux = CX25840_COMPONENT_ON |
  398. CX25840_VIN1_CH1 |
  399. CX25840_VIN6_CH2 |
  400. CX25840_VIN7_CH3,
  401. },
  402. },
  403. },
  404. [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
  405. .name = "Magic-Pro ProHDTV Extreme 2",
  406. .tuner_type = TUNER_XC5000,
  407. .tuner_addr = 0x61,
  408. .tuner_bus = 1,
  409. .porta = CX23885_ANALOG_VIDEO,
  410. .portb = CX23885_MPEG_DVB,
  411. .input = {
  412. {
  413. .type = CX23885_VMUX_TELEVISION,
  414. .vmux = CX25840_COMPOSITE2,
  415. },
  416. {
  417. .type = CX23885_VMUX_COMPOSITE1,
  418. .vmux = CX25840_COMPOSITE8,
  419. },
  420. {
  421. .type = CX23885_VMUX_SVIDEO,
  422. .vmux = CX25840_SVIDEO_LUMA3 |
  423. CX25840_SVIDEO_CHROMA4,
  424. },
  425. {
  426. .type = CX23885_VMUX_COMPONENT,
  427. .vmux = CX25840_COMPONENT_ON |
  428. CX25840_VIN1_CH1 |
  429. CX25840_VIN6_CH2 |
  430. CX25840_VIN7_CH3,
  431. },
  432. },
  433. },
  434. [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
  435. .name = "Hauppauge WinTV-HVR1850",
  436. .porta = CX23885_ANALOG_VIDEO,
  437. .portb = CX23885_MPEG_ENCODER,
  438. .portc = CX23885_MPEG_DVB,
  439. .tuner_type = TUNER_ABSENT,
  440. .tuner_addr = 0x42, /* 0x84 >> 1 */
  441. .force_bff = 1,
  442. .input = {{
  443. .type = CX23885_VMUX_TELEVISION,
  444. .vmux = CX25840_VIN7_CH3 |
  445. CX25840_VIN5_CH2 |
  446. CX25840_VIN2_CH1 |
  447. CX25840_DIF_ON,
  448. .amux = CX25840_AUDIO8,
  449. }, {
  450. .type = CX23885_VMUX_COMPOSITE1,
  451. .vmux = CX25840_VIN7_CH3 |
  452. CX25840_VIN4_CH2 |
  453. CX25840_VIN6_CH1,
  454. .amux = CX25840_AUDIO7,
  455. }, {
  456. .type = CX23885_VMUX_SVIDEO,
  457. .vmux = CX25840_VIN7_CH3 |
  458. CX25840_VIN4_CH2 |
  459. CX25840_VIN8_CH1 |
  460. CX25840_SVIDEO_ON,
  461. .amux = CX25840_AUDIO7,
  462. } },
  463. },
  464. [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
  465. .name = "Compro VideoMate E800",
  466. .portc = CX23885_MPEG_DVB,
  467. },
  468. [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
  469. .name = "Hauppauge WinTV-HVR1290",
  470. .portc = CX23885_MPEG_DVB,
  471. },
  472. [CX23885_BOARD_MYGICA_X8558PRO] = {
  473. .name = "Mygica X8558 PRO DMB-TH",
  474. .portb = CX23885_MPEG_DVB,
  475. .portc = CX23885_MPEG_DVB,
  476. },
  477. [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
  478. .name = "LEADTEK WinFast PxTV1200",
  479. .porta = CX23885_ANALOG_VIDEO,
  480. .tuner_type = TUNER_XC2028,
  481. .tuner_addr = 0x61,
  482. .tuner_bus = 1,
  483. .input = {{
  484. .type = CX23885_VMUX_TELEVISION,
  485. .vmux = CX25840_VIN2_CH1 |
  486. CX25840_VIN5_CH2 |
  487. CX25840_NONE0_CH3,
  488. }, {
  489. .type = CX23885_VMUX_COMPOSITE1,
  490. .vmux = CX25840_COMPOSITE1,
  491. }, {
  492. .type = CX23885_VMUX_SVIDEO,
  493. .vmux = CX25840_SVIDEO_LUMA3 |
  494. CX25840_SVIDEO_CHROMA4,
  495. }, {
  496. .type = CX23885_VMUX_COMPONENT,
  497. .vmux = CX25840_VIN7_CH1 |
  498. CX25840_VIN6_CH2 |
  499. CX25840_VIN8_CH3 |
  500. CX25840_COMPONENT_ON,
  501. } },
  502. },
  503. [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
  504. .name = "GoTView X5 3D Hybrid",
  505. .tuner_type = TUNER_XC5000,
  506. .tuner_addr = 0x64,
  507. .tuner_bus = 1,
  508. .porta = CX23885_ANALOG_VIDEO,
  509. .portb = CX23885_MPEG_DVB,
  510. .input = {{
  511. .type = CX23885_VMUX_TELEVISION,
  512. .vmux = CX25840_VIN2_CH1 |
  513. CX25840_VIN5_CH2,
  514. .gpio0 = 0x02,
  515. }, {
  516. .type = CX23885_VMUX_COMPOSITE1,
  517. .vmux = CX23885_VMUX_COMPOSITE1,
  518. }, {
  519. .type = CX23885_VMUX_SVIDEO,
  520. .vmux = CX25840_SVIDEO_LUMA3 |
  521. CX25840_SVIDEO_CHROMA4,
  522. } },
  523. },
  524. [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
  525. .ci_type = 2,
  526. .name = "NetUP Dual DVB-T/C-CI RF",
  527. .porta = CX23885_ANALOG_VIDEO,
  528. .portb = CX23885_MPEG_DVB,
  529. .portc = CX23885_MPEG_DVB,
  530. .num_fds_portb = 2,
  531. .num_fds_portc = 2,
  532. .tuner_type = TUNER_XC5000,
  533. .tuner_addr = 0x64,
  534. .input = { {
  535. .type = CX23885_VMUX_TELEVISION,
  536. .vmux = CX25840_COMPOSITE1,
  537. } },
  538. },
  539. [CX23885_BOARD_MPX885] = {
  540. .name = "MPX-885",
  541. .porta = CX23885_ANALOG_VIDEO,
  542. .input = {{
  543. .type = CX23885_VMUX_COMPOSITE1,
  544. .vmux = CX25840_COMPOSITE1,
  545. .amux = CX25840_AUDIO6,
  546. .gpio0 = 0,
  547. }, {
  548. .type = CX23885_VMUX_COMPOSITE2,
  549. .vmux = CX25840_COMPOSITE2,
  550. .amux = CX25840_AUDIO6,
  551. .gpio0 = 0,
  552. }, {
  553. .type = CX23885_VMUX_COMPOSITE3,
  554. .vmux = CX25840_COMPOSITE3,
  555. .amux = CX25840_AUDIO7,
  556. .gpio0 = 0,
  557. }, {
  558. .type = CX23885_VMUX_COMPOSITE4,
  559. .vmux = CX25840_COMPOSITE4,
  560. .amux = CX25840_AUDIO7,
  561. .gpio0 = 0,
  562. } },
  563. },
  564. [CX23885_BOARD_MYGICA_X8507] = {
  565. .name = "Mygica X8502/X8507 ISDB-T",
  566. .tuner_type = TUNER_XC5000,
  567. .tuner_addr = 0x61,
  568. .tuner_bus = 1,
  569. .porta = CX23885_ANALOG_VIDEO,
  570. .portb = CX23885_MPEG_DVB,
  571. .input = {
  572. {
  573. .type = CX23885_VMUX_TELEVISION,
  574. .vmux = CX25840_COMPOSITE2,
  575. .amux = CX25840_AUDIO8,
  576. },
  577. {
  578. .type = CX23885_VMUX_COMPOSITE1,
  579. .vmux = CX25840_COMPOSITE8,
  580. .amux = CX25840_AUDIO7,
  581. },
  582. {
  583. .type = CX23885_VMUX_SVIDEO,
  584. .vmux = CX25840_SVIDEO_LUMA3 |
  585. CX25840_SVIDEO_CHROMA4,
  586. .amux = CX25840_AUDIO7,
  587. },
  588. {
  589. .type = CX23885_VMUX_COMPONENT,
  590. .vmux = CX25840_COMPONENT_ON |
  591. CX25840_VIN1_CH1 |
  592. CX25840_VIN6_CH2 |
  593. CX25840_VIN7_CH3,
  594. .amux = CX25840_AUDIO7,
  595. },
  596. },
  597. },
  598. [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
  599. .name = "TerraTec Cinergy T PCIe Dual",
  600. .portb = CX23885_MPEG_DVB,
  601. .portc = CX23885_MPEG_DVB,
  602. },
  603. [CX23885_BOARD_TEVII_S471] = {
  604. .name = "TeVii S471",
  605. .portb = CX23885_MPEG_DVB,
  606. },
  607. [CX23885_BOARD_PROF_8000] = {
  608. .name = "Prof Revolution DVB-S2 8000",
  609. .portb = CX23885_MPEG_DVB,
  610. },
  611. [CX23885_BOARD_HAUPPAUGE_HVR4400] = {
  612. .name = "Hauppauge WinTV-HVR4400/HVR5500",
  613. .porta = CX23885_ANALOG_VIDEO,
  614. .portb = CX23885_MPEG_DVB,
  615. .portc = CX23885_MPEG_DVB,
  616. .tuner_type = TUNER_NXP_TDA18271,
  617. .tuner_addr = 0x60, /* 0xc0 >> 1 */
  618. .tuner_bus = 1,
  619. },
  620. [CX23885_BOARD_HAUPPAUGE_STARBURST] = {
  621. .name = "Hauppauge WinTV Starburst",
  622. .portb = CX23885_MPEG_DVB,
  623. },
  624. [CX23885_BOARD_AVERMEDIA_HC81R] = {
  625. .name = "AVerTV Hybrid Express Slim HC81R",
  626. .tuner_type = TUNER_XC2028,
  627. .tuner_addr = 0x61, /* 0xc2 >> 1 */
  628. .tuner_bus = 1,
  629. .porta = CX23885_ANALOG_VIDEO,
  630. .input = {{
  631. .type = CX23885_VMUX_TELEVISION,
  632. .vmux = CX25840_VIN2_CH1 |
  633. CX25840_VIN5_CH2 |
  634. CX25840_NONE0_CH3 |
  635. CX25840_NONE1_CH3,
  636. .amux = CX25840_AUDIO8,
  637. }, {
  638. .type = CX23885_VMUX_SVIDEO,
  639. .vmux = CX25840_VIN8_CH1 |
  640. CX25840_NONE_CH2 |
  641. CX25840_VIN7_CH3 |
  642. CX25840_SVIDEO_ON,
  643. .amux = CX25840_AUDIO6,
  644. }, {
  645. .type = CX23885_VMUX_COMPONENT,
  646. .vmux = CX25840_VIN1_CH1 |
  647. CX25840_NONE_CH2 |
  648. CX25840_NONE0_CH3 |
  649. CX25840_NONE1_CH3,
  650. .amux = CX25840_AUDIO6,
  651. } },
  652. },
  653. [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
  654. .name = "DViCO FusionHDTV DVB-T Dual Express2",
  655. .portb = CX23885_MPEG_DVB,
  656. .portc = CX23885_MPEG_DVB,
  657. },
  658. [CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
  659. .name = "Hauppauge ImpactVCB-e",
  660. .tuner_type = TUNER_ABSENT,
  661. .porta = CX23885_ANALOG_VIDEO,
  662. .input = {{
  663. .type = CX23885_VMUX_COMPOSITE1,
  664. .vmux = CX25840_VIN7_CH3 |
  665. CX25840_VIN4_CH2 |
  666. CX25840_VIN6_CH1,
  667. .amux = CX25840_AUDIO7,
  668. }, {
  669. .type = CX23885_VMUX_SVIDEO,
  670. .vmux = CX25840_VIN7_CH3 |
  671. CX25840_VIN4_CH2 |
  672. CX25840_VIN8_CH1 |
  673. CX25840_SVIDEO_ON,
  674. .amux = CX25840_AUDIO7,
  675. } },
  676. },
  677. [CX23885_BOARD_DVBSKY_T9580] = {
  678. .name = "DVBSky T9580",
  679. .portb = CX23885_MPEG_DVB,
  680. .portc = CX23885_MPEG_DVB,
  681. },
  682. [CX23885_BOARD_DVBSKY_T980C] = {
  683. .name = "DVBSky T980C",
  684. .portb = CX23885_MPEG_DVB,
  685. },
  686. [CX23885_BOARD_DVBSKY_S950C] = {
  687. .name = "DVBSky S950C",
  688. .portb = CX23885_MPEG_DVB,
  689. },
  690. [CX23885_BOARD_TT_CT2_4500_CI] = {
  691. .name = "Technotrend TT-budget CT2-4500 CI",
  692. .portb = CX23885_MPEG_DVB,
  693. },
  694. [CX23885_BOARD_DVBSKY_S950] = {
  695. .name = "DVBSky S950",
  696. .portb = CX23885_MPEG_DVB,
  697. },
  698. [CX23885_BOARD_DVBSKY_S952] = {
  699. .name = "DVBSky S952",
  700. .portb = CX23885_MPEG_DVB,
  701. .portc = CX23885_MPEG_DVB,
  702. },
  703. [CX23885_BOARD_DVBSKY_T982] = {
  704. .name = "DVBSky T982",
  705. .portb = CX23885_MPEG_DVB,
  706. .portc = CX23885_MPEG_DVB,
  707. },
  708. [CX23885_BOARD_HAUPPAUGE_HVR5525] = {
  709. .name = "Hauppauge WinTV-HVR5525",
  710. .portb = CX23885_MPEG_DVB,
  711. .portc = CX23885_MPEG_DVB,
  712. },
  713. [CX23885_BOARD_VIEWCAST_260E] = {
  714. .name = "ViewCast 260e",
  715. .porta = CX23885_ANALOG_VIDEO,
  716. .force_bff = 1,
  717. .input = {{
  718. .type = CX23885_VMUX_COMPOSITE1,
  719. .vmux = CX25840_VIN6_CH1,
  720. .amux = CX25840_AUDIO7,
  721. }, {
  722. .type = CX23885_VMUX_SVIDEO,
  723. .vmux = CX25840_VIN7_CH3 |
  724. CX25840_VIN5_CH1 |
  725. CX25840_SVIDEO_ON,
  726. .amux = CX25840_AUDIO7,
  727. }, {
  728. .type = CX23885_VMUX_COMPONENT,
  729. .vmux = CX25840_VIN7_CH3 |
  730. CX25840_VIN6_CH2 |
  731. CX25840_VIN5_CH1 |
  732. CX25840_COMPONENT_ON,
  733. .amux = CX25840_AUDIO7,
  734. } },
  735. },
  736. [CX23885_BOARD_VIEWCAST_460E] = {
  737. .name = "ViewCast 460e",
  738. .porta = CX23885_ANALOG_VIDEO,
  739. .force_bff = 1,
  740. .input = {{
  741. .type = CX23885_VMUX_COMPOSITE1,
  742. .vmux = CX25840_VIN4_CH1,
  743. .amux = CX25840_AUDIO7,
  744. }, {
  745. .type = CX23885_VMUX_SVIDEO,
  746. .vmux = CX25840_VIN7_CH3 |
  747. CX25840_VIN6_CH1 |
  748. CX25840_SVIDEO_ON,
  749. .amux = CX25840_AUDIO7,
  750. }, {
  751. .type = CX23885_VMUX_COMPONENT,
  752. .vmux = CX25840_VIN7_CH3 |
  753. CX25840_VIN6_CH1 |
  754. CX25840_VIN5_CH2 |
  755. CX25840_COMPONENT_ON,
  756. .amux = CX25840_AUDIO7,
  757. }, {
  758. .type = CX23885_VMUX_COMPOSITE2,
  759. .vmux = CX25840_VIN6_CH1,
  760. .amux = CX25840_AUDIO7,
  761. } },
  762. },
  763. [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB] = {
  764. .name = "Hauppauge WinTV-QuadHD-DVB",
  765. .portb = CX23885_MPEG_DVB,
  766. .portc = CX23885_MPEG_DVB,
  767. },
  768. [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885] = {
  769. .name = "Hauppauge WinTV-QuadHD-DVB(885)",
  770. .portb = CX23885_MPEG_DVB,
  771. .portc = CX23885_MPEG_DVB,
  772. },
  773. [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC] = {
  774. .name = "Hauppauge WinTV-QuadHD-ATSC",
  775. .portb = CX23885_MPEG_DVB,
  776. .portc = CX23885_MPEG_DVB,
  777. },
  778. [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885] = {
  779. .name = "Hauppauge WinTV-QuadHD-ATSC(885)",
  780. .portb = CX23885_MPEG_DVB,
  781. .portc = CX23885_MPEG_DVB,
  782. },
  783. [CX23885_BOARD_HAUPPAUGE_HVR1265_K4] = {
  784. .name = "Hauppauge WinTV-HVR-1265(161111)",
  785. .porta = CX23885_ANALOG_VIDEO,
  786. .portc = CX23885_MPEG_DVB,
  787. .tuner_type = TUNER_ABSENT,
  788. .force_bff = 1,
  789. .input = {{
  790. .type = CX23885_VMUX_COMPOSITE1,
  791. .vmux = CX25840_VIN7_CH3 |
  792. CX25840_VIN4_CH2 |
  793. CX25840_VIN6_CH1,
  794. .amux = CX25840_AUDIO7,
  795. }, {
  796. .type = CX23885_VMUX_SVIDEO,
  797. .vmux = CX25840_VIN7_CH3 |
  798. CX25840_VIN4_CH2 |
  799. CX25840_VIN8_CH1 |
  800. CX25840_SVIDEO_ON,
  801. .amux = CX25840_AUDIO7,
  802. } },
  803. },
  804. [CX23885_BOARD_HAUPPAUGE_STARBURST2] = {
  805. .name = "Hauppauge WinTV-Starburst2",
  806. .portb = CX23885_MPEG_DVB,
  807. },
  808. [CX23885_BOARD_AVERMEDIA_CE310B] = {
  809. .name = "AVerMedia CE310B",
  810. .porta = CX23885_ANALOG_VIDEO,
  811. .force_bff = 1,
  812. .input = {{
  813. .type = CX23885_VMUX_COMPOSITE1,
  814. .vmux = CX25840_VIN1_CH1 |
  815. CX25840_NONE_CH2 |
  816. CX25840_NONE0_CH3,
  817. .amux = CX25840_AUDIO7,
  818. }, {
  819. .type = CX23885_VMUX_SVIDEO,
  820. .vmux = CX25840_VIN8_CH1 |
  821. CX25840_NONE_CH2 |
  822. CX25840_VIN7_CH3 |
  823. CX25840_SVIDEO_ON,
  824. .amux = CX25840_AUDIO7,
  825. } },
  826. },
  827. };
  828. const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
  829. /* ------------------------------------------------------------------ */
  830. /* PCI subsystem IDs */
  831. struct cx23885_subid cx23885_subids[] = {
  832. {
  833. .subvendor = 0x0070,
  834. .subdevice = 0x3400,
  835. .card = CX23885_BOARD_UNKNOWN,
  836. }, {
  837. .subvendor = 0x0070,
  838. .subdevice = 0x7600,
  839. .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
  840. }, {
  841. .subvendor = 0x0070,
  842. .subdevice = 0x7800,
  843. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  844. }, {
  845. .subvendor = 0x0070,
  846. .subdevice = 0x7801,
  847. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  848. }, {
  849. .subvendor = 0x0070,
  850. .subdevice = 0x7809,
  851. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  852. }, {
  853. .subvendor = 0x0070,
  854. .subdevice = 0x7911,
  855. .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
  856. }, {
  857. .subvendor = 0x18ac,
  858. .subdevice = 0xd500,
  859. .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
  860. }, {
  861. .subvendor = 0x0070,
  862. .subdevice = 0x7790,
  863. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  864. }, {
  865. .subvendor = 0x0070,
  866. .subdevice = 0x7797,
  867. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  868. }, {
  869. .subvendor = 0x0070,
  870. .subdevice = 0x7710,
  871. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  872. }, {
  873. .subvendor = 0x0070,
  874. .subdevice = 0x7717,
  875. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  876. }, {
  877. .subvendor = 0x0070,
  878. .subdevice = 0x71d1,
  879. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  880. }, {
  881. .subvendor = 0x0070,
  882. .subdevice = 0x71d3,
  883. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  884. }, {
  885. .subvendor = 0x0070,
  886. .subdevice = 0x8101,
  887. .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
  888. }, {
  889. .subvendor = 0x0070,
  890. .subdevice = 0x8010,
  891. .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
  892. }, {
  893. .subvendor = 0x18ac,
  894. .subdevice = 0xd618,
  895. .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
  896. }, {
  897. .subvendor = 0x18ac,
  898. .subdevice = 0xdb78,
  899. .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
  900. }, {
  901. .subvendor = 0x107d,
  902. .subdevice = 0x6681,
  903. .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
  904. }, {
  905. .subvendor = 0x107d,
  906. .subdevice = 0x6f21,
  907. .card = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
  908. }, {
  909. .subvendor = 0x107d,
  910. .subdevice = 0x6f39,
  911. .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
  912. }, {
  913. .subvendor = 0x185b,
  914. .subdevice = 0xe800,
  915. .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
  916. }, {
  917. .subvendor = 0x6920,
  918. .subdevice = 0x8888,
  919. .card = CX23885_BOARD_TBS_6920,
  920. }, {
  921. .subvendor = 0x6980,
  922. .subdevice = 0x8888,
  923. .card = CX23885_BOARD_TBS_6980,
  924. }, {
  925. .subvendor = 0x6981,
  926. .subdevice = 0x8888,
  927. .card = CX23885_BOARD_TBS_6981,
  928. }, {
  929. .subvendor = 0xd470,
  930. .subdevice = 0x9022,
  931. .card = CX23885_BOARD_TEVII_S470,
  932. }, {
  933. .subvendor = 0x0001,
  934. .subdevice = 0x2005,
  935. .card = CX23885_BOARD_DVBWORLD_2005,
  936. }, {
  937. .subvendor = 0x1b55,
  938. .subdevice = 0x2a2c,
  939. .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
  940. }, {
  941. .subvendor = 0x0070,
  942. .subdevice = 0x2211,
  943. .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
  944. }, {
  945. .subvendor = 0x0070,
  946. .subdevice = 0x2215,
  947. .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
  948. }, {
  949. .subvendor = 0x0070,
  950. .subdevice = 0x221d,
  951. .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
  952. }, {
  953. .subvendor = 0x0070,
  954. .subdevice = 0x2251,
  955. .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
  956. }, {
  957. .subvendor = 0x0070,
  958. .subdevice = 0x2259,
  959. .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
  960. }, {
  961. .subvendor = 0x0070,
  962. .subdevice = 0x2291,
  963. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  964. }, {
  965. .subvendor = 0x0070,
  966. .subdevice = 0x2295,
  967. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  968. }, {
  969. .subvendor = 0x0070,
  970. .subdevice = 0x2299,
  971. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  972. }, {
  973. .subvendor = 0x0070,
  974. .subdevice = 0x229d,
  975. .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
  976. }, {
  977. .subvendor = 0x0070,
  978. .subdevice = 0x22f0,
  979. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  980. }, {
  981. .subvendor = 0x0070,
  982. .subdevice = 0x22f1,
  983. .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
  984. }, {
  985. .subvendor = 0x0070,
  986. .subdevice = 0x22f2,
  987. .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
  988. }, {
  989. .subvendor = 0x0070,
  990. .subdevice = 0x22f3,
  991. .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
  992. }, {
  993. .subvendor = 0x0070,
  994. .subdevice = 0x22f4,
  995. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  996. }, {
  997. .subvendor = 0x0070,
  998. .subdevice = 0x22f5,
  999. .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
  1000. }, {
  1001. .subvendor = 0x14f1,
  1002. .subdevice = 0x8651,
  1003. .card = CX23885_BOARD_MYGICA_X8506,
  1004. }, {
  1005. .subvendor = 0x14f1,
  1006. .subdevice = 0x8657,
  1007. .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
  1008. }, {
  1009. .subvendor = 0x0070,
  1010. .subdevice = 0x8541,
  1011. .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
  1012. }, {
  1013. .subvendor = 0x1858,
  1014. .subdevice = 0xe800,
  1015. .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
  1016. }, {
  1017. .subvendor = 0x0070,
  1018. .subdevice = 0x8551,
  1019. .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
  1020. }, {
  1021. .subvendor = 0x14f1,
  1022. .subdevice = 0x8578,
  1023. .card = CX23885_BOARD_MYGICA_X8558PRO,
  1024. }, {
  1025. .subvendor = 0x107d,
  1026. .subdevice = 0x6f22,
  1027. .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
  1028. }, {
  1029. .subvendor = 0x5654,
  1030. .subdevice = 0x2390,
  1031. .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
  1032. }, {
  1033. .subvendor = 0x1b55,
  1034. .subdevice = 0xe2e4,
  1035. .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
  1036. }, {
  1037. .subvendor = 0x14f1,
  1038. .subdevice = 0x8502,
  1039. .card = CX23885_BOARD_MYGICA_X8507,
  1040. }, {
  1041. .subvendor = 0x153b,
  1042. .subdevice = 0x117e,
  1043. .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
  1044. }, {
  1045. .subvendor = 0xd471,
  1046. .subdevice = 0x9022,
  1047. .card = CX23885_BOARD_TEVII_S471,
  1048. }, {
  1049. .subvendor = 0x8000,
  1050. .subdevice = 0x3034,
  1051. .card = CX23885_BOARD_PROF_8000,
  1052. }, {
  1053. .subvendor = 0x0070,
  1054. .subdevice = 0xc108,
  1055. .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */
  1056. }, {
  1057. .subvendor = 0x0070,
  1058. .subdevice = 0xc138,
  1059. .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
  1060. }, {
  1061. .subvendor = 0x0070,
  1062. .subdevice = 0xc12a,
  1063. .card = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */
  1064. }, {
  1065. .subvendor = 0x0070,
  1066. .subdevice = 0xc1f8,
  1067. .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
  1068. }, {
  1069. .subvendor = 0x1461,
  1070. .subdevice = 0xd939,
  1071. .card = CX23885_BOARD_AVERMEDIA_HC81R,
  1072. }, {
  1073. .subvendor = 0x0070,
  1074. .subdevice = 0x7133,
  1075. .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
  1076. }, {
  1077. .subvendor = 0x0070,
  1078. .subdevice = 0x7137,
  1079. .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
  1080. }, {
  1081. .subvendor = 0x18ac,
  1082. .subdevice = 0xdb98,
  1083. .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
  1084. }, {
  1085. .subvendor = 0x4254,
  1086. .subdevice = 0x9580,
  1087. .card = CX23885_BOARD_DVBSKY_T9580,
  1088. }, {
  1089. .subvendor = 0x4254,
  1090. .subdevice = 0x980c,
  1091. .card = CX23885_BOARD_DVBSKY_T980C,
  1092. }, {
  1093. .subvendor = 0x4254,
  1094. .subdevice = 0x950c,
  1095. .card = CX23885_BOARD_DVBSKY_S950C,
  1096. }, {
  1097. .subvendor = 0x13c2,
  1098. .subdevice = 0x3013,
  1099. .card = CX23885_BOARD_TT_CT2_4500_CI,
  1100. }, {
  1101. .subvendor = 0x4254,
  1102. .subdevice = 0x0950,
  1103. .card = CX23885_BOARD_DVBSKY_S950,
  1104. }, {
  1105. .subvendor = 0x4254,
  1106. .subdevice = 0x0952,
  1107. .card = CX23885_BOARD_DVBSKY_S952,
  1108. }, {
  1109. .subvendor = 0x4254,
  1110. .subdevice = 0x0982,
  1111. .card = CX23885_BOARD_DVBSKY_T982,
  1112. }, {
  1113. .subvendor = 0x0070,
  1114. .subdevice = 0xf038,
  1115. .card = CX23885_BOARD_HAUPPAUGE_HVR5525,
  1116. }, {
  1117. .subvendor = 0x1576,
  1118. .subdevice = 0x0260,
  1119. .card = CX23885_BOARD_VIEWCAST_260E,
  1120. }, {
  1121. .subvendor = 0x1576,
  1122. .subdevice = 0x0460,
  1123. .card = CX23885_BOARD_VIEWCAST_460E,
  1124. }, {
  1125. .subvendor = 0x0070,
  1126. .subdevice = 0x6a28,
  1127. .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 1 */
  1128. }, {
  1129. .subvendor = 0x0070,
  1130. .subdevice = 0x6b28,
  1131. .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 2 */
  1132. }, {
  1133. .subvendor = 0x0070,
  1134. .subdevice = 0x6a18,
  1135. .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 1 */
  1136. }, {
  1137. .subvendor = 0x0070,
  1138. .subdevice = 0x6b18,
  1139. .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 2 */
  1140. }, {
  1141. .subvendor = 0x0070,
  1142. .subdevice = 0x2a18,
  1143. .card = CX23885_BOARD_HAUPPAUGE_HVR1265_K4, /* Hauppauge WinTV HVR-1265 (Model 161xx1, Hybrid ATSC/QAM-B) */
  1144. }, {
  1145. .subvendor = 0x0070,
  1146. .subdevice = 0xf02a,
  1147. .card = CX23885_BOARD_HAUPPAUGE_STARBURST2,
  1148. }, {
  1149. .subvendor = 0x1461,
  1150. .subdevice = 0x3100,
  1151. .card = CX23885_BOARD_AVERMEDIA_CE310B,
  1152. },
  1153. };
  1154. const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
  1155. void cx23885_card_list(struct cx23885_dev *dev)
  1156. {
  1157. int i;
  1158. if (0 == dev->pci->subsystem_vendor &&
  1159. 0 == dev->pci->subsystem_device) {
  1160. pr_info("%s: Board has no valid PCIe Subsystem ID and can't\n"
  1161. "%s: be autodetected. Pass card=<n> insmod option\n"
  1162. "%s: to workaround that. Redirect complaints to the\n"
  1163. "%s: vendor of the TV card. Best regards,\n"
  1164. "%s: -- tux\n",
  1165. dev->name, dev->name, dev->name, dev->name, dev->name);
  1166. } else {
  1167. pr_info("%s: Your board isn't known (yet) to the driver.\n"
  1168. "%s: Try to pick one of the existing card configs via\n"
  1169. "%s: card=<n> insmod option. Updating to the latest\n"
  1170. "%s: version might help as well.\n",
  1171. dev->name, dev->name, dev->name, dev->name);
  1172. }
  1173. pr_info("%s: Here is a list of valid choices for the card=<n> insmod option:\n",
  1174. dev->name);
  1175. for (i = 0; i < cx23885_bcount; i++)
  1176. pr_info("%s: card=%d -> %s\n",
  1177. dev->name, i, cx23885_boards[i].name);
  1178. }
  1179. static void viewcast_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
  1180. {
  1181. u32 sn;
  1182. /* The serial number record begins with tag 0x59 */
  1183. if (*(eeprom_data + 0x00) != 0x59) {
  1184. pr_info("%s() eeprom records are undefined, no serial number\n",
  1185. __func__);
  1186. return;
  1187. }
  1188. sn = (*(eeprom_data + 0x06) << 24) |
  1189. (*(eeprom_data + 0x05) << 16) |
  1190. (*(eeprom_data + 0x04) << 8) |
  1191. (*(eeprom_data + 0x03));
  1192. pr_info("%s: card '%s' sn# MM%d\n",
  1193. dev->name,
  1194. cx23885_boards[dev->board].name,
  1195. sn);
  1196. }
  1197. static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
  1198. {
  1199. struct tveeprom tv;
  1200. tveeprom_hauppauge_analog(&tv, eeprom_data);
  1201. /* Make sure we support the board model */
  1202. switch (tv.model) {
  1203. case 22001:
  1204. /* WinTV-HVR1270 (PCIe, Retail, half height)
  1205. * ATSC/QAM and basic analog, IR Blast */
  1206. case 22009:
  1207. /* WinTV-HVR1210 (PCIe, Retail, half height)
  1208. * DVB-T and basic analog, IR Blast */
  1209. case 22011:
  1210. /* WinTV-HVR1270 (PCIe, Retail, half height)
  1211. * ATSC/QAM and basic analog, IR Recv */
  1212. case 22019:
  1213. /* WinTV-HVR1210 (PCIe, Retail, half height)
  1214. * DVB-T and basic analog, IR Recv */
  1215. case 22021:
  1216. /* WinTV-HVR1275 (PCIe, Retail, half height)
  1217. * ATSC/QAM and basic analog, IR Recv */
  1218. case 22029:
  1219. /* WinTV-HVR1210 (PCIe, Retail, half height)
  1220. * DVB-T and basic analog, IR Recv */
  1221. case 22101:
  1222. /* WinTV-HVR1270 (PCIe, Retail, full height)
  1223. * ATSC/QAM and basic analog, IR Blast */
  1224. case 22109:
  1225. /* WinTV-HVR1210 (PCIe, Retail, full height)
  1226. * DVB-T and basic analog, IR Blast */
  1227. case 22111:
  1228. /* WinTV-HVR1270 (PCIe, Retail, full height)
  1229. * ATSC/QAM and basic analog, IR Recv */
  1230. case 22119:
  1231. /* WinTV-HVR1210 (PCIe, Retail, full height)
  1232. * DVB-T and basic analog, IR Recv */
  1233. case 22121:
  1234. /* WinTV-HVR1275 (PCIe, Retail, full height)
  1235. * ATSC/QAM and basic analog, IR Recv */
  1236. case 22129:
  1237. /* WinTV-HVR1210 (PCIe, Retail, full height)
  1238. * DVB-T and basic analog, IR Recv */
  1239. case 71009:
  1240. /* WinTV-HVR1200 (PCIe, Retail, full height)
  1241. * DVB-T and basic analog */
  1242. case 71100:
  1243. /* WinTV-ImpactVCB-e (PCIe, Retail, half height)
  1244. * Basic analog */
  1245. case 71359:
  1246. /* WinTV-HVR1200 (PCIe, OEM, half height)
  1247. * DVB-T and basic analog */
  1248. case 71439:
  1249. /* WinTV-HVR1200 (PCIe, OEM, half height)
  1250. * DVB-T and basic analog */
  1251. case 71449:
  1252. /* WinTV-HVR1200 (PCIe, OEM, full height)
  1253. * DVB-T and basic analog */
  1254. case 71939:
  1255. /* WinTV-HVR1200 (PCIe, OEM, half height)
  1256. * DVB-T and basic analog */
  1257. case 71949:
  1258. /* WinTV-HVR1200 (PCIe, OEM, full height)
  1259. * DVB-T and basic analog */
  1260. case 71959:
  1261. /* WinTV-HVR1200 (PCIe, OEM, full height)
  1262. * DVB-T and basic analog */
  1263. case 71979:
  1264. /* WinTV-HVR1200 (PCIe, OEM, half height)
  1265. * DVB-T and basic analog */
  1266. case 71999:
  1267. /* WinTV-HVR1200 (PCIe, OEM, full height)
  1268. * DVB-T and basic analog */
  1269. case 76601:
  1270. /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
  1271. channel ATSC and MPEG2 HW Encoder */
  1272. case 77001:
  1273. /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
  1274. and Basic analog */
  1275. case 77011:
  1276. /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
  1277. and Basic analog */
  1278. case 77041:
  1279. /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
  1280. and Basic analog */
  1281. case 77051:
  1282. /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
  1283. and Basic analog */
  1284. case 78011:
  1285. /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
  1286. Dual channel ATSC and MPEG2 HW Encoder */
  1287. case 78501:
  1288. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  1289. Dual channel ATSC and MPEG2 HW Encoder */
  1290. case 78521:
  1291. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  1292. Dual channel ATSC and MPEG2 HW Encoder */
  1293. case 78531:
  1294. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
  1295. Dual channel ATSC and MPEG2 HW Encoder */
  1296. case 78631:
  1297. /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
  1298. Dual channel ATSC and MPEG2 HW Encoder */
  1299. case 79001:
  1300. /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
  1301. ATSC and Basic analog */
  1302. case 79101:
  1303. /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
  1304. ATSC and Basic analog */
  1305. case 79501:
  1306. /* WinTV-HVR1250 (PCIe, No IR, half height,
  1307. ATSC [at least] and Basic analog) */
  1308. case 79561:
  1309. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  1310. ATSC and Basic analog */
  1311. case 79571:
  1312. /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
  1313. ATSC and Basic analog */
  1314. case 79671:
  1315. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  1316. ATSC and Basic analog */
  1317. case 80019:
  1318. /* WinTV-HVR1400 (Express Card, Retail, IR,
  1319. * DVB-T and Basic analog */
  1320. case 81509:
  1321. /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
  1322. * DVB-T and MPEG2 HW Encoder */
  1323. case 81519:
  1324. /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
  1325. * DVB-T and MPEG2 HW Encoder */
  1326. break;
  1327. case 85021:
  1328. /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
  1329. Dual channel ATSC and MPEG2 HW Encoder */
  1330. break;
  1331. case 85721:
  1332. /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
  1333. Dual channel ATSC and Basic analog */
  1334. case 121019:
  1335. /* WinTV-HVR4400 (PCIe, DVB-S2, DVB-C/T) */
  1336. break;
  1337. case 121029:
  1338. /* WinTV-HVR5500 (PCIe, DVB-S2, DVB-C/T) */
  1339. break;
  1340. case 150329:
  1341. /* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */
  1342. break;
  1343. case 161111:
  1344. /* WinTV-HVR-1265 K4 (PCIe, Analog/ATSC/QAM-B) */
  1345. break;
  1346. case 166100: /* 888 version, hybrid */
  1347. case 166200: /* 885 version, DVB only */
  1348. /* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height,
  1349. DVB-T/T2/C, DVB-T/T2/C */
  1350. break;
  1351. case 166101: /* 888 version, hybrid */
  1352. case 166201: /* 885 version, DVB only */
  1353. /* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height,
  1354. DVB-T/T2/C, DVB-T/T2/C */
  1355. break;
  1356. case 165100: /* 888 version, hybrid */
  1357. case 165200: /* 885 version, digital only */
  1358. /* WinTV-QuadHD (ATSC) Tuner Pair 1 (PCIe, IR, half height,
  1359. * ATSC/QAM-B, ATSC/QAM-B */
  1360. break;
  1361. case 165101: /* 888 version, hybrid */
  1362. case 165201: /* 885 version, digital only */
  1363. /* WinTV-QuadHD (ATSC) Tuner Pair 2 (PCIe, IR, half height,
  1364. * ATSC/QAM-B, ATSC/QAM-B */
  1365. break;
  1366. default:
  1367. pr_warn("%s: warning: unknown hauppauge model #%d\n",
  1368. dev->name, tv.model);
  1369. break;
  1370. }
  1371. pr_info("%s: hauppauge eeprom: model=%d\n",
  1372. dev->name, tv.model);
  1373. }
  1374. /* Some TBS cards require initing a chip using a bitbanged SPI attached
  1375. to the cx23885 gpio's. If this chip doesn't get init'ed the demod
  1376. doesn't respond to any command. */
  1377. static void tbs_card_init(struct cx23885_dev *dev)
  1378. {
  1379. int i;
  1380. static const u8 buf[] = {
  1381. 0xe0, 0x06, 0x66, 0x33, 0x65,
  1382. 0x01, 0x17, 0x06, 0xde};
  1383. switch (dev->board) {
  1384. case CX23885_BOARD_TBS_6980:
  1385. case CX23885_BOARD_TBS_6981:
  1386. cx_set(GP0_IO, 0x00070007);
  1387. usleep_range(1000, 10000);
  1388. cx_clear(GP0_IO, 2);
  1389. usleep_range(1000, 10000);
  1390. for (i = 0; i < 9 * 8; i++) {
  1391. cx_clear(GP0_IO, 7);
  1392. usleep_range(1000, 10000);
  1393. cx_set(GP0_IO,
  1394. ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
  1395. usleep_range(1000, 10000);
  1396. }
  1397. cx_set(GP0_IO, 7);
  1398. break;
  1399. }
  1400. }
  1401. int cx23885_tuner_callback(void *priv, int component, int command, int arg)
  1402. {
  1403. struct cx23885_tsport *port = priv;
  1404. struct cx23885_dev *dev = port->dev;
  1405. u32 bitmask = 0;
  1406. if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
  1407. return 0;
  1408. if (command != 0) {
  1409. pr_err("%s(): Unknown command 0x%x.\n",
  1410. __func__, command);
  1411. return -EINVAL;
  1412. }
  1413. switch (dev->board) {
  1414. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  1415. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  1416. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  1417. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  1418. case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
  1419. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
  1420. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  1421. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  1422. case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
  1423. /* Tuner Reset Command */
  1424. bitmask = 0x04;
  1425. break;
  1426. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  1427. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  1428. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
  1429. /* Two identical tuners on two different i2c buses,
  1430. * we need to reset the correct gpio. */
  1431. if (port->nr == 1)
  1432. bitmask = 0x01;
  1433. else if (port->nr == 2)
  1434. bitmask = 0x04;
  1435. break;
  1436. case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
  1437. /* Tuner Reset Command */
  1438. bitmask = 0x02;
  1439. break;
  1440. case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
  1441. altera_ci_tuner_reset(dev, port->nr);
  1442. break;
  1443. case CX23885_BOARD_AVERMEDIA_HC81R:
  1444. /* XC3028L Reset Command */
  1445. bitmask = 1 << 2;
  1446. break;
  1447. }
  1448. if (bitmask) {
  1449. /* Drive the tuner into reset and back out */
  1450. cx_clear(GP0_IO, bitmask);
  1451. mdelay(200);
  1452. cx_set(GP0_IO, bitmask);
  1453. }
  1454. return 0;
  1455. }
  1456. void cx23885_gpio_setup(struct cx23885_dev *dev)
  1457. {
  1458. switch (dev->board) {
  1459. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1460. /* GPIO-0 cx24227 demodulator reset */
  1461. cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
  1462. break;
  1463. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  1464. /* GPIO-0 cx24227 demodulator */
  1465. /* GPIO-2 xc3028 tuner */
  1466. /* Put the parts into reset */
  1467. cx_set(GP0_IO, 0x00050000);
  1468. cx_clear(GP0_IO, 0x00000005);
  1469. msleep(5);
  1470. /* Bring the parts out of reset */
  1471. cx_set(GP0_IO, 0x00050005);
  1472. break;
  1473. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  1474. /* GPIO-0 cx24227 demodulator reset */
  1475. /* GPIO-2 xc5000 tuner reset */
  1476. cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
  1477. break;
  1478. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  1479. /* GPIO-0 656_CLK */
  1480. /* GPIO-1 656_D0 */
  1481. /* GPIO-2 8295A Reset */
  1482. /* GPIO-3-10 cx23417 data0-7 */
  1483. /* GPIO-11-14 cx23417 addr0-3 */
  1484. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  1485. /* GPIO-19 IR_RX */
  1486. /* CX23417 GPIO's */
  1487. /* EIO15 Zilog Reset */
  1488. /* EIO14 S5H1409/CX24227 Reset */
  1489. mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
  1490. /* Put the demod into reset and protect the eeprom */
  1491. mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
  1492. msleep(100);
  1493. /* Bring the demod and blaster out of reset */
  1494. mc417_gpio_set(dev, GPIO_15 | GPIO_14);
  1495. msleep(100);
  1496. /* Force the TDA8295A into reset and back */
  1497. cx23885_gpio_enable(dev, GPIO_2, 1);
  1498. cx23885_gpio_set(dev, GPIO_2);
  1499. msleep(20);
  1500. cx23885_gpio_clear(dev, GPIO_2);
  1501. msleep(20);
  1502. cx23885_gpio_set(dev, GPIO_2);
  1503. msleep(20);
  1504. break;
  1505. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  1506. /* GPIO-0 tda10048 demodulator reset */
  1507. /* GPIO-2 tda18271 tuner reset */
  1508. /* Put the parts into reset and back */
  1509. cx_set(GP0_IO, 0x00050000);
  1510. msleep(20);
  1511. cx_clear(GP0_IO, 0x00000005);
  1512. msleep(20);
  1513. cx_set(GP0_IO, 0x00050005);
  1514. break;
  1515. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  1516. /* GPIO-0 TDA10048 demodulator reset */
  1517. /* GPIO-2 TDA8295A Reset */
  1518. /* GPIO-3-10 cx23417 data0-7 */
  1519. /* GPIO-11-14 cx23417 addr0-3 */
  1520. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  1521. /* The following GPIO's are on the interna AVCore (cx25840) */
  1522. /* GPIO-19 IR_RX */
  1523. /* GPIO-20 IR_TX 416/DVBT Select */
  1524. /* GPIO-21 IIS DAT */
  1525. /* GPIO-22 IIS WCLK */
  1526. /* GPIO-23 IIS BCLK */
  1527. /* Put the parts into reset and back */
  1528. cx_set(GP0_IO, 0x00050000);
  1529. msleep(20);
  1530. cx_clear(GP0_IO, 0x00000005);
  1531. msleep(20);
  1532. cx_set(GP0_IO, 0x00050005);
  1533. break;
  1534. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  1535. /* GPIO-0 Dibcom7000p demodulator reset */
  1536. /* GPIO-2 xc3028L tuner reset */
  1537. /* GPIO-13 LED */
  1538. /* Put the parts into reset and back */
  1539. cx_set(GP0_IO, 0x00050000);
  1540. msleep(20);
  1541. cx_clear(GP0_IO, 0x00000005);
  1542. msleep(20);
  1543. cx_set(GP0_IO, 0x00050005);
  1544. break;
  1545. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  1546. /* GPIO-0 xc5000 tuner reset i2c bus 0 */
  1547. /* GPIO-1 s5h1409 demod reset i2c bus 0 */
  1548. /* GPIO-2 xc5000 tuner reset i2c bus 1 */
  1549. /* GPIO-3 s5h1409 demod reset i2c bus 0 */
  1550. /* Put the parts into reset and back */
  1551. cx_set(GP0_IO, 0x000f0000);
  1552. msleep(20);
  1553. cx_clear(GP0_IO, 0x0000000f);
  1554. msleep(20);
  1555. cx_set(GP0_IO, 0x000f000f);
  1556. break;
  1557. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  1558. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
  1559. /* GPIO-0 portb xc3028 reset */
  1560. /* GPIO-1 portb zl10353 reset */
  1561. /* GPIO-2 portc xc3028 reset */
  1562. /* GPIO-3 portc zl10353 reset */
  1563. /* Put the parts into reset and back */
  1564. cx_set(GP0_IO, 0x000f0000);
  1565. msleep(20);
  1566. cx_clear(GP0_IO, 0x0000000f);
  1567. msleep(20);
  1568. cx_set(GP0_IO, 0x000f000f);
  1569. break;
  1570. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  1571. case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
  1572. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
  1573. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  1574. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  1575. case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
  1576. /* GPIO-2 xc3028 tuner reset */
  1577. /* The following GPIO's are on the internal AVCore (cx25840) */
  1578. /* GPIO-? zl10353 demod reset */
  1579. /* Put the parts into reset and back */
  1580. cx_set(GP0_IO, 0x00040000);
  1581. msleep(20);
  1582. cx_clear(GP0_IO, 0x00000004);
  1583. msleep(20);
  1584. cx_set(GP0_IO, 0x00040004);
  1585. break;
  1586. case CX23885_BOARD_TBS_6920:
  1587. case CX23885_BOARD_TBS_6980:
  1588. case CX23885_BOARD_TBS_6981:
  1589. case CX23885_BOARD_PROF_8000:
  1590. cx_write(MC417_CTL, 0x00000036);
  1591. cx_write(MC417_OEN, 0x00001000);
  1592. cx_set(MC417_RWD, 0x00000002);
  1593. msleep(200);
  1594. cx_clear(MC417_RWD, 0x00000800);
  1595. msleep(200);
  1596. cx_set(MC417_RWD, 0x00000800);
  1597. msleep(200);
  1598. break;
  1599. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  1600. /* GPIO-0 INTA from CiMax1
  1601. GPIO-1 INTB from CiMax2
  1602. GPIO-2 reset chips
  1603. GPIO-3 to GPIO-10 data/addr for CA
  1604. GPIO-11 ~CS0 to CiMax1
  1605. GPIO-12 ~CS1 to CiMax2
  1606. GPIO-13 ADL0 load LSB addr
  1607. GPIO-14 ADL1 load MSB addr
  1608. GPIO-15 ~RDY from CiMax
  1609. GPIO-17 ~RD to CiMax
  1610. GPIO-18 ~WR to CiMax
  1611. */
  1612. cx_set(GP0_IO, 0x00040000); /* GPIO as out */
  1613. /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
  1614. cx_clear(GP0_IO, 0x00030004);
  1615. msleep(100);/* reset delay */
  1616. cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
  1617. cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
  1618. /* GPIO-15 IN as ~ACK, rest as OUT */
  1619. cx_write(MC417_OEN, 0x00001000);
  1620. /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
  1621. cx_write(MC417_RWD, 0x0000c300);
  1622. /* enable irq */
  1623. cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
  1624. break;
  1625. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  1626. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  1627. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  1628. case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
  1629. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  1630. /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
  1631. /* GPIO-6 I2C Gate which can isolate the demod from the bus */
  1632. /* GPIO-9 Demod reset */
  1633. /* Put the parts into reset and back */
  1634. cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
  1635. cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
  1636. cx23885_gpio_clear(dev, GPIO_9);
  1637. msleep(20);
  1638. cx23885_gpio_set(dev, GPIO_9);
  1639. break;
  1640. case CX23885_BOARD_MYGICA_X8506:
  1641. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  1642. case CX23885_BOARD_MYGICA_X8507:
  1643. /* GPIO-0 (0)Analog / (1)Digital TV */
  1644. /* GPIO-1 reset XC5000 */
  1645. /* GPIO-2 demod reset */
  1646. cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
  1647. cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
  1648. msleep(100);
  1649. cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
  1650. msleep(100);
  1651. break;
  1652. case CX23885_BOARD_MYGICA_X8558PRO:
  1653. /* GPIO-0 reset first ATBM8830 */
  1654. /* GPIO-1 reset second ATBM8830 */
  1655. cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
  1656. cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
  1657. msleep(100);
  1658. cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
  1659. msleep(100);
  1660. break;
  1661. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  1662. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  1663. /* GPIO-0 656_CLK */
  1664. /* GPIO-1 656_D0 */
  1665. /* GPIO-2 Wake# */
  1666. /* GPIO-3-10 cx23417 data0-7 */
  1667. /* GPIO-11-14 cx23417 addr0-3 */
  1668. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  1669. /* GPIO-19 IR_RX */
  1670. /* GPIO-20 C_IR_TX */
  1671. /* GPIO-21 I2S DAT */
  1672. /* GPIO-22 I2S WCLK */
  1673. /* GPIO-23 I2S BCLK */
  1674. /* ALT GPIO: EXP GPIO LATCH */
  1675. /* CX23417 GPIO's */
  1676. /* GPIO-14 S5H1411/CX24228 Reset */
  1677. /* GPIO-13 EEPROM write protect */
  1678. mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
  1679. /* Put the demod into reset and protect the eeprom */
  1680. mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
  1681. msleep(100);
  1682. /* Bring the demod out of reset */
  1683. mc417_gpio_set(dev, GPIO_14);
  1684. msleep(100);
  1685. /* CX24228 GPIO */
  1686. /* Connected to IF / Mux */
  1687. break;
  1688. case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
  1689. cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
  1690. break;
  1691. case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
  1692. /* GPIO-0 ~INT in
  1693. GPIO-1 TMS out
  1694. GPIO-2 ~reset chips out
  1695. GPIO-3 to GPIO-10 data/addr for CA in/out
  1696. GPIO-11 ~CS out
  1697. GPIO-12 ADDR out
  1698. GPIO-13 ~WR out
  1699. GPIO-14 ~RD out
  1700. GPIO-15 ~RDY in
  1701. GPIO-16 TCK out
  1702. GPIO-17 TDO in
  1703. GPIO-18 TDI out
  1704. */
  1705. cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
  1706. /* GPIO-0 as INT, reset & TMS low */
  1707. cx_clear(GP0_IO, 0x00010006);
  1708. msleep(100);/* reset delay */
  1709. cx_set(GP0_IO, 0x00000004); /* reset high */
  1710. cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
  1711. /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
  1712. cx_write(MC417_OEN, 0x00005000);
  1713. /* ~RD, ~WR high; ADDR low; ~CS high */
  1714. cx_write(MC417_RWD, 0x00000d00);
  1715. /* enable irq */
  1716. cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
  1717. break;
  1718. case CX23885_BOARD_HAUPPAUGE_HVR4400:
  1719. case CX23885_BOARD_HAUPPAUGE_STARBURST:
  1720. /* GPIO-8 tda10071 demod reset */
  1721. /* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/
  1722. /* Put the parts into reset and back */
  1723. cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
  1724. cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
  1725. msleep(100);
  1726. cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
  1727. msleep(100);
  1728. break;
  1729. case CX23885_BOARD_AVERMEDIA_HC81R:
  1730. cx_clear(MC417_CTL, 1);
  1731. /* GPIO-0,1,2 setup direction as output */
  1732. cx_set(GP0_IO, 0x00070000);
  1733. usleep_range(10000, 11000);
  1734. /* AF9013 demod reset */
  1735. cx_set(GP0_IO, 0x00010001);
  1736. usleep_range(10000, 11000);
  1737. cx_clear(GP0_IO, 0x00010001);
  1738. usleep_range(10000, 11000);
  1739. cx_set(GP0_IO, 0x00010001);
  1740. usleep_range(10000, 11000);
  1741. /* demod tune? */
  1742. cx_clear(GP0_IO, 0x00030003);
  1743. usleep_range(10000, 11000);
  1744. cx_set(GP0_IO, 0x00020002);
  1745. usleep_range(10000, 11000);
  1746. cx_set(GP0_IO, 0x00010001);
  1747. usleep_range(10000, 11000);
  1748. cx_clear(GP0_IO, 0x00020002);
  1749. /* XC3028L tuner reset */
  1750. cx_set(GP0_IO, 0x00040004);
  1751. cx_clear(GP0_IO, 0x00040004);
  1752. cx_set(GP0_IO, 0x00040004);
  1753. msleep(60);
  1754. break;
  1755. case CX23885_BOARD_DVBSKY_T9580:
  1756. case CX23885_BOARD_DVBSKY_S952:
  1757. case CX23885_BOARD_DVBSKY_T982:
  1758. /* enable GPIO3-18 pins */
  1759. cx_write(MC417_CTL, 0x00000037);
  1760. cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
  1761. cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
  1762. msleep(100);
  1763. cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
  1764. break;
  1765. case CX23885_BOARD_DVBSKY_T980C:
  1766. case CX23885_BOARD_DVBSKY_S950C:
  1767. case CX23885_BOARD_TT_CT2_4500_CI:
  1768. /*
  1769. * GPIO-0 INTA from CiMax, input
  1770. * GPIO-1 reset CiMax, output, high active
  1771. * GPIO-2 reset demod, output, low active
  1772. * GPIO-3 to GPIO-10 data/addr for CAM
  1773. * GPIO-11 ~CS0 to CiMax1
  1774. * GPIO-12 ~CS1 to CiMax2
  1775. * GPIO-13 ADL0 load LSB addr
  1776. * GPIO-14 ADL1 load MSB addr
  1777. * GPIO-15 ~RDY from CiMax
  1778. * GPIO-17 ~RD to CiMax
  1779. * GPIO-18 ~WR to CiMax
  1780. */
  1781. cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
  1782. cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
  1783. msleep(100); /* reset delay */
  1784. cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
  1785. cx_clear(GP0_IO, 0x00010002);
  1786. cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
  1787. /* GPIO-15 IN as ~ACK, rest as OUT */
  1788. cx_write(MC417_OEN, 0x00001000);
  1789. /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
  1790. cx_write(MC417_RWD, 0x0000c300);
  1791. /* enable irq */
  1792. cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */
  1793. break;
  1794. case CX23885_BOARD_DVBSKY_S950:
  1795. cx23885_gpio_enable(dev, GPIO_2, 1);
  1796. cx23885_gpio_clear(dev, GPIO_2);
  1797. msleep(100);
  1798. cx23885_gpio_set(dev, GPIO_2);
  1799. break;
  1800. case CX23885_BOARD_HAUPPAUGE_HVR5525:
  1801. case CX23885_BOARD_HAUPPAUGE_STARBURST2:
  1802. /*
  1803. * HVR5525 GPIO Details:
  1804. * GPIO-00 IR_WIDE
  1805. * GPIO-02 wake#
  1806. * GPIO-03 VAUX Pres.
  1807. * GPIO-07 PROG#
  1808. * GPIO-08 SAT_RESN
  1809. * GPIO-09 TER_RESN
  1810. * GPIO-10 B2_SENSE
  1811. * GPIO-11 B1_SENSE
  1812. * GPIO-15 IR_LED_STATUS
  1813. * GPIO-19 IR_NARROW
  1814. * GPIO-20 Blauster1
  1815. * ALTGPIO VAUX_SWITCH
  1816. * AUX_PLL_CLK : Blaster2
  1817. */
  1818. /* Put the parts into reset and back */
  1819. cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
  1820. cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
  1821. msleep(100);
  1822. cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
  1823. msleep(100);
  1824. break;
  1825. case CX23885_BOARD_VIEWCAST_260E:
  1826. case CX23885_BOARD_VIEWCAST_460E:
  1827. /* For documentation purposes, it's worth noting that this
  1828. * card does not have any GPIO's connected to subcomponents.
  1829. */
  1830. break;
  1831. case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
  1832. case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
  1833. case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
  1834. case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
  1835. case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
  1836. /*
  1837. * GPIO-08 TER1_RESN
  1838. * GPIO-09 TER2_RESN
  1839. */
  1840. /* Put the parts into reset and back */
  1841. cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
  1842. cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
  1843. msleep(100);
  1844. cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
  1845. msleep(100);
  1846. break;
  1847. }
  1848. }
  1849. int cx23885_ir_init(struct cx23885_dev *dev)
  1850. {
  1851. static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
  1852. {
  1853. .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
  1854. .pin = CX23885_PIN_IR_RX_GPIO19,
  1855. .function = CX23885_PAD_IR_RX,
  1856. .value = 0,
  1857. .strength = CX25840_PIN_DRIVE_MEDIUM,
  1858. }, {
  1859. .flags = BIT(V4L2_SUBDEV_IO_PIN_OUTPUT),
  1860. .pin = CX23885_PIN_IR_TX_GPIO20,
  1861. .function = CX23885_PAD_IR_TX,
  1862. .value = 0,
  1863. .strength = CX25840_PIN_DRIVE_MEDIUM,
  1864. }
  1865. };
  1866. const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
  1867. static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
  1868. {
  1869. .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
  1870. .pin = CX23885_PIN_IR_RX_GPIO19,
  1871. .function = CX23885_PAD_IR_RX,
  1872. .value = 0,
  1873. .strength = CX25840_PIN_DRIVE_MEDIUM,
  1874. }
  1875. };
  1876. const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
  1877. struct v4l2_subdev_ir_parameters params;
  1878. int ret = 0;
  1879. switch (dev->board) {
  1880. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  1881. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  1882. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  1883. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  1884. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  1885. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  1886. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  1887. case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
  1888. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  1889. case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
  1890. case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
  1891. /* FIXME: Implement me */
  1892. break;
  1893. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  1894. ret = cx23888_ir_probe(dev);
  1895. if (ret)
  1896. break;
  1897. dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
  1898. v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
  1899. ir_rx_pin_cfg_count, ir_rx_pin_cfg);
  1900. break;
  1901. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  1902. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  1903. ret = cx23888_ir_probe(dev);
  1904. if (ret)
  1905. break;
  1906. dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
  1907. v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
  1908. ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
  1909. /*
  1910. * For these boards we need to invert the Tx output via the
  1911. * IR controller to have the LED off while idle
  1912. */
  1913. v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
  1914. params.enable = false;
  1915. params.shutdown = false;
  1916. params.invert_level = true;
  1917. v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
  1918. params.shutdown = true;
  1919. v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
  1920. break;
  1921. case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
  1922. case CX23885_BOARD_TEVII_S470:
  1923. case CX23885_BOARD_MYGICA_X8507:
  1924. case CX23885_BOARD_TBS_6980:
  1925. case CX23885_BOARD_TBS_6981:
  1926. case CX23885_BOARD_DVBSKY_T9580:
  1927. case CX23885_BOARD_DVBSKY_T980C:
  1928. case CX23885_BOARD_DVBSKY_S950C:
  1929. case CX23885_BOARD_TT_CT2_4500_CI:
  1930. case CX23885_BOARD_DVBSKY_S950:
  1931. case CX23885_BOARD_DVBSKY_S952:
  1932. case CX23885_BOARD_DVBSKY_T982:
  1933. if (!enable_885_ir)
  1934. break;
  1935. dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
  1936. if (dev->sd_ir == NULL) {
  1937. ret = -ENODEV;
  1938. break;
  1939. }
  1940. v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
  1941. ir_rx_pin_cfg_count, ir_rx_pin_cfg);
  1942. break;
  1943. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1944. if (!enable_885_ir)
  1945. break;
  1946. dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
  1947. if (dev->sd_ir == NULL) {
  1948. ret = -ENODEV;
  1949. break;
  1950. }
  1951. v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
  1952. ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
  1953. break;
  1954. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  1955. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
  1956. request_module("ir-kbd-i2c");
  1957. break;
  1958. }
  1959. return ret;
  1960. }
  1961. void cx23885_ir_fini(struct cx23885_dev *dev)
  1962. {
  1963. switch (dev->board) {
  1964. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  1965. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  1966. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  1967. cx23885_irq_remove(dev, PCI_MSK_IR);
  1968. cx23888_ir_remove(dev);
  1969. dev->sd_ir = NULL;
  1970. break;
  1971. case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
  1972. case CX23885_BOARD_TEVII_S470:
  1973. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1974. case CX23885_BOARD_MYGICA_X8507:
  1975. case CX23885_BOARD_TBS_6980:
  1976. case CX23885_BOARD_TBS_6981:
  1977. case CX23885_BOARD_DVBSKY_T9580:
  1978. case CX23885_BOARD_DVBSKY_T980C:
  1979. case CX23885_BOARD_DVBSKY_S950C:
  1980. case CX23885_BOARD_TT_CT2_4500_CI:
  1981. case CX23885_BOARD_DVBSKY_S950:
  1982. case CX23885_BOARD_DVBSKY_S952:
  1983. case CX23885_BOARD_DVBSKY_T982:
  1984. cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
  1985. /* sd_ir is a duplicate pointer to the AV Core, just clear it */
  1986. dev->sd_ir = NULL;
  1987. break;
  1988. }
  1989. }
  1990. static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
  1991. {
  1992. int data;
  1993. int tdo = 0;
  1994. struct cx23885_dev *dev = (struct cx23885_dev *)device;
  1995. /*TMS*/
  1996. data = ((cx_read(GP0_IO)) & (~0x00000002));
  1997. data |= (tms ? 0x00020002 : 0x00020000);
  1998. cx_write(GP0_IO, data);
  1999. /*TDI*/
  2000. data = ((cx_read(MC417_RWD)) & (~0x0000a000));
  2001. data |= (tdi ? 0x00008000 : 0);
  2002. cx_write(MC417_RWD, data);
  2003. if (read_tdo)
  2004. tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
  2005. cx_write(MC417_RWD, data | 0x00002000);
  2006. udelay(1);
  2007. /*TCK*/
  2008. cx_write(MC417_RWD, data);
  2009. return tdo;
  2010. }
  2011. void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
  2012. {
  2013. switch (dev->board) {
  2014. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  2015. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  2016. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  2017. if (dev->sd_ir)
  2018. cx23885_irq_add_enable(dev, PCI_MSK_IR);
  2019. break;
  2020. case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
  2021. case CX23885_BOARD_TEVII_S470:
  2022. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  2023. case CX23885_BOARD_MYGICA_X8507:
  2024. case CX23885_BOARD_TBS_6980:
  2025. case CX23885_BOARD_TBS_6981:
  2026. case CX23885_BOARD_DVBSKY_T9580:
  2027. case CX23885_BOARD_DVBSKY_T980C:
  2028. case CX23885_BOARD_DVBSKY_S950C:
  2029. case CX23885_BOARD_TT_CT2_4500_CI:
  2030. case CX23885_BOARD_DVBSKY_S950:
  2031. case CX23885_BOARD_DVBSKY_S952:
  2032. case CX23885_BOARD_DVBSKY_T982:
  2033. if (dev->sd_ir)
  2034. cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
  2035. break;
  2036. }
  2037. }
  2038. void cx23885_card_setup(struct cx23885_dev *dev)
  2039. {
  2040. struct cx23885_tsport *ts1 = &dev->ts1;
  2041. struct cx23885_tsport *ts2 = &dev->ts2;
  2042. static u8 eeprom[256];
  2043. if (dev->i2c_bus[0].i2c_rc == 0) {
  2044. dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
  2045. tveeprom_read(&dev->i2c_bus[0].i2c_client,
  2046. eeprom, sizeof(eeprom));
  2047. }
  2048. switch (dev->board) {
  2049. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  2050. if (dev->i2c_bus[0].i2c_rc == 0) {
  2051. if (eeprom[0x80] != 0x84)
  2052. hauppauge_eeprom(dev, eeprom+0xc0);
  2053. else
  2054. hauppauge_eeprom(dev, eeprom+0x80);
  2055. }
  2056. break;
  2057. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  2058. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  2059. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  2060. if (dev->i2c_bus[0].i2c_rc == 0)
  2061. hauppauge_eeprom(dev, eeprom+0x80);
  2062. break;
  2063. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  2064. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  2065. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  2066. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  2067. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  2068. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  2069. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  2070. case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
  2071. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  2072. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  2073. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  2074. case CX23885_BOARD_HAUPPAUGE_HVR4400:
  2075. case CX23885_BOARD_HAUPPAUGE_STARBURST:
  2076. case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
  2077. case CX23885_BOARD_HAUPPAUGE_HVR5525:
  2078. case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
  2079. case CX23885_BOARD_HAUPPAUGE_STARBURST2:
  2080. case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
  2081. case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
  2082. case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
  2083. case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
  2084. if (dev->i2c_bus[0].i2c_rc == 0)
  2085. hauppauge_eeprom(dev, eeprom+0xc0);
  2086. break;
  2087. case CX23885_BOARD_VIEWCAST_260E:
  2088. case CX23885_BOARD_VIEWCAST_460E:
  2089. dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1;
  2090. tveeprom_read(&dev->i2c_bus[1].i2c_client,
  2091. eeprom, sizeof(eeprom));
  2092. if (dev->i2c_bus[0].i2c_rc == 0)
  2093. viewcast_eeprom(dev, eeprom);
  2094. break;
  2095. }
  2096. switch (dev->board) {
  2097. case CX23885_BOARD_AVERMEDIA_HC81R:
  2098. /* Defaults for VID B */
  2099. ts1->gen_ctrl_val = 0x4; /* Parallel */
  2100. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2101. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2102. /* Defaults for VID C */
  2103. /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
  2104. ts2->gen_ctrl_val = 0x10e;
  2105. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2106. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2107. break;
  2108. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  2109. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  2110. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
  2111. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2112. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2113. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2114. /* fall-through */
  2115. case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
  2116. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2117. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2118. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2119. break;
  2120. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  2121. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  2122. /* Defaults for VID B - Analog encoder */
  2123. /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
  2124. ts1->gen_ctrl_val = 0x10e;
  2125. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2126. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2127. /* APB_TSVALERR_POL (active low)*/
  2128. ts1->vld_misc_val = 0x2000;
  2129. ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
  2130. cx_write(0x130184, 0xc);
  2131. /* Defaults for VID C */
  2132. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2133. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2134. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2135. break;
  2136. case CX23885_BOARD_TBS_6920:
  2137. ts1->gen_ctrl_val = 0x4; /* Parallel */
  2138. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2139. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2140. break;
  2141. case CX23885_BOARD_TEVII_S470:
  2142. case CX23885_BOARD_TEVII_S471:
  2143. case CX23885_BOARD_DVBWORLD_2005:
  2144. case CX23885_BOARD_PROF_8000:
  2145. case CX23885_BOARD_DVBSKY_T980C:
  2146. case CX23885_BOARD_DVBSKY_S950C:
  2147. case CX23885_BOARD_TT_CT2_4500_CI:
  2148. case CX23885_BOARD_DVBSKY_S950:
  2149. ts1->gen_ctrl_val = 0x5; /* Parallel */
  2150. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2151. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2152. break;
  2153. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  2154. case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
  2155. case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
  2156. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2157. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2158. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2159. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2160. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2161. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2162. break;
  2163. case CX23885_BOARD_TBS_6980:
  2164. case CX23885_BOARD_TBS_6981:
  2165. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2166. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2167. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2168. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2169. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2170. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2171. tbs_card_init(dev);
  2172. break;
  2173. case CX23885_BOARD_MYGICA_X8506:
  2174. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  2175. case CX23885_BOARD_MYGICA_X8507:
  2176. ts1->gen_ctrl_val = 0x5; /* Parallel */
  2177. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2178. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2179. break;
  2180. case CX23885_BOARD_MYGICA_X8558PRO:
  2181. ts1->gen_ctrl_val = 0x5; /* Parallel */
  2182. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2183. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2184. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2185. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2186. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2187. break;
  2188. case CX23885_BOARD_HAUPPAUGE_HVR4400:
  2189. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2190. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2191. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2192. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2193. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2194. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2195. break;
  2196. case CX23885_BOARD_HAUPPAUGE_STARBURST:
  2197. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2198. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2199. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2200. break;
  2201. case CX23885_BOARD_DVBSKY_T9580:
  2202. case CX23885_BOARD_DVBSKY_T982:
  2203. ts1->gen_ctrl_val = 0x5; /* Parallel */
  2204. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2205. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2206. ts2->gen_ctrl_val = 0x8; /* Serial bus */
  2207. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2208. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2209. break;
  2210. case CX23885_BOARD_DVBSKY_S952:
  2211. ts1->gen_ctrl_val = 0x5; /* Parallel */
  2212. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2213. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2214. ts2->gen_ctrl_val = 0xe; /* Serial bus */
  2215. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2216. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2217. break;
  2218. case CX23885_BOARD_HAUPPAUGE_HVR5525:
  2219. case CX23885_BOARD_HAUPPAUGE_STARBURST2:
  2220. ts1->gen_ctrl_val = 0x5; /* Parallel */
  2221. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2222. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2223. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2224. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2225. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2226. break;
  2227. case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
  2228. case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
  2229. case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
  2230. case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
  2231. case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
  2232. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2233. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2234. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2235. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2236. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2237. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2238. break;
  2239. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  2240. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  2241. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  2242. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  2243. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  2244. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  2245. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  2246. case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
  2247. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  2248. case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
  2249. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
  2250. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  2251. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  2252. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  2253. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  2254. case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
  2255. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  2256. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  2257. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  2258. case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
  2259. default:
  2260. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  2261. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  2262. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  2263. }
  2264. /* Certain boards support analog, or require the avcore to be
  2265. * loaded, ensure this happens.
  2266. */
  2267. switch (dev->board) {
  2268. case CX23885_BOARD_TEVII_S470:
  2269. /* Currently only enabled for the integrated IR controller */
  2270. if (!enable_885_ir)
  2271. break;
  2272. /* fall-through */
  2273. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  2274. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  2275. case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
  2276. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  2277. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  2278. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  2279. case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
  2280. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
  2281. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  2282. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  2283. case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
  2284. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  2285. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  2286. case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
  2287. case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
  2288. case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
  2289. case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
  2290. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  2291. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  2292. case CX23885_BOARD_MYGICA_X8506:
  2293. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  2294. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  2295. case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
  2296. case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
  2297. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  2298. case CX23885_BOARD_MPX885:
  2299. case CX23885_BOARD_MYGICA_X8507:
  2300. case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
  2301. case CX23885_BOARD_AVERMEDIA_HC81R:
  2302. case CX23885_BOARD_TBS_6980:
  2303. case CX23885_BOARD_TBS_6981:
  2304. case CX23885_BOARD_DVBSKY_T9580:
  2305. case CX23885_BOARD_DVBSKY_T980C:
  2306. case CX23885_BOARD_DVBSKY_S950C:
  2307. case CX23885_BOARD_TT_CT2_4500_CI:
  2308. case CX23885_BOARD_DVBSKY_S950:
  2309. case CX23885_BOARD_DVBSKY_S952:
  2310. case CX23885_BOARD_DVBSKY_T982:
  2311. case CX23885_BOARD_VIEWCAST_260E:
  2312. case CX23885_BOARD_VIEWCAST_460E:
  2313. case CX23885_BOARD_AVERMEDIA_CE310B:
  2314. dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
  2315. &dev->i2c_bus[2].i2c_adap,
  2316. "cx25840", 0x88 >> 1, NULL);
  2317. if (dev->sd_cx25840) {
  2318. /* set host data for clk_freq configuration */
  2319. v4l2_set_subdev_hostdata(dev->sd_cx25840,
  2320. &dev->clk_freq);
  2321. dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
  2322. v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
  2323. }
  2324. break;
  2325. }
  2326. switch (dev->board) {
  2327. case CX23885_BOARD_VIEWCAST_260E:
  2328. v4l2_i2c_new_subdev(&dev->v4l2_dev,
  2329. &dev->i2c_bus[0].i2c_adap,
  2330. "cs3308", 0x82 >> 1, NULL);
  2331. break;
  2332. case CX23885_BOARD_VIEWCAST_460E:
  2333. /* This cs3308 controls the audio from the breakout cable */
  2334. v4l2_i2c_new_subdev(&dev->v4l2_dev,
  2335. &dev->i2c_bus[0].i2c_adap,
  2336. "cs3308", 0x80 >> 1, NULL);
  2337. /* This cs3308 controls the audio from the onboard header */
  2338. v4l2_i2c_new_subdev(&dev->v4l2_dev,
  2339. &dev->i2c_bus[0].i2c_adap,
  2340. "cs3308", 0x82 >> 1, NULL);
  2341. break;
  2342. }
  2343. /* AUX-PLL 27MHz CLK */
  2344. switch (dev->board) {
  2345. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  2346. netup_initialize(dev);
  2347. break;
  2348. case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
  2349. int ret;
  2350. const struct firmware *fw;
  2351. const char *filename = "dvb-netup-altera-01.fw";
  2352. char *action = "configure";
  2353. static struct netup_card_info cinfo;
  2354. struct altera_config netup_config = {
  2355. .dev = dev,
  2356. .action = action,
  2357. .jtag_io = netup_jtag_io,
  2358. };
  2359. netup_initialize(dev);
  2360. netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
  2361. if (netup_card_rev)
  2362. cinfo.rev = netup_card_rev;
  2363. switch (cinfo.rev) {
  2364. case 0x4:
  2365. filename = "dvb-netup-altera-04.fw";
  2366. break;
  2367. default:
  2368. filename = "dvb-netup-altera-01.fw";
  2369. break;
  2370. }
  2371. pr_info("NetUP card rev=0x%x fw_filename=%s\n",
  2372. cinfo.rev, filename);
  2373. ret = request_firmware(&fw, filename, &dev->pci->dev);
  2374. if (ret == 0)
  2375. altera_init(&netup_config, fw);
  2376. release_firmware(fw);
  2377. break;
  2378. }
  2379. }
  2380. }