cx18-irq.c 2.1 KB

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  1. /*
  2. * cx18 interrupt handling
  3. *
  4. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  5. * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include "cx18-driver.h"
  18. #include "cx18-io.h"
  19. #include "cx18-irq.h"
  20. #include "cx18-mailbox.h"
  21. #include "cx18-scb.h"
  22. static void xpu_ack(struct cx18 *cx, u32 sw2)
  23. {
  24. if (sw2 & IRQ_CPU_TO_EPU_ACK)
  25. wake_up(&cx->mb_cpu_waitq);
  26. if (sw2 & IRQ_APU_TO_EPU_ACK)
  27. wake_up(&cx->mb_apu_waitq);
  28. }
  29. static void epu_cmd(struct cx18 *cx, u32 sw1)
  30. {
  31. if (sw1 & IRQ_CPU_TO_EPU)
  32. cx18_api_epu_cmd_irq(cx, CPU);
  33. if (sw1 & IRQ_APU_TO_EPU)
  34. cx18_api_epu_cmd_irq(cx, APU);
  35. }
  36. irqreturn_t cx18_irq_handler(int irq, void *dev_id)
  37. {
  38. struct cx18 *cx = (struct cx18 *)dev_id;
  39. u32 sw1, sw2, hw2;
  40. sw1 = cx18_read_reg(cx, SW1_INT_STATUS) & cx->sw1_irq_mask;
  41. sw2 = cx18_read_reg(cx, SW2_INT_STATUS) & cx->sw2_irq_mask;
  42. hw2 = cx18_read_reg(cx, HW2_INT_CLR_STATUS) & cx->hw2_irq_mask;
  43. if (sw1)
  44. cx18_write_reg_expect(cx, sw1, SW1_INT_STATUS, ~sw1, sw1);
  45. if (sw2)
  46. cx18_write_reg_expect(cx, sw2, SW2_INT_STATUS, ~sw2, sw2);
  47. if (hw2)
  48. cx18_write_reg_expect(cx, hw2, HW2_INT_CLR_STATUS, ~hw2, hw2);
  49. if (sw1 || sw2 || hw2)
  50. CX18_DEBUG_HI_IRQ("received interrupts SW1: %x SW2: %x HW2: %x\n",
  51. sw1, sw2, hw2);
  52. /*
  53. * SW1 responses have to happen first. The sending XPU times out the
  54. * incoming mailboxes on us rather rapidly.
  55. */
  56. if (sw1)
  57. epu_cmd(cx, sw1);
  58. /* To do: interrupt-based I2C handling
  59. if (hw2 & (HW2_I2C1_INT|HW2_I2C2_INT)) {
  60. }
  61. */
  62. if (sw2)
  63. xpu_ack(cx, sw2);
  64. return (sw1 || sw2 || hw2) ? IRQ_HANDLED : IRQ_NONE;
  65. }