mn88473.c 19 KB

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  1. /*
  2. * Panasonic MN88473 DVB-T/T2/C demodulator driver
  3. *
  4. * Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include "mn88473_priv.h"
  17. static int mn88473_get_tune_settings(struct dvb_frontend *fe,
  18. struct dvb_frontend_tune_settings *s)
  19. {
  20. s->min_delay_ms = 1000;
  21. return 0;
  22. }
  23. static int mn88473_set_frontend(struct dvb_frontend *fe)
  24. {
  25. struct i2c_client *client = fe->demodulator_priv;
  26. struct mn88473_dev *dev = i2c_get_clientdata(client);
  27. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  28. int ret, i;
  29. unsigned int uitmp;
  30. u32 if_frequency;
  31. u8 delivery_system_val, if_val[3], *conf_val_ptr;
  32. u8 reg_bank2_2d_val, reg_bank0_d2_val;
  33. dev_dbg(&client->dev,
  34. "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
  35. c->delivery_system, c->modulation, c->frequency,
  36. c->bandwidth_hz, c->symbol_rate, c->inversion, c->stream_id);
  37. if (!dev->active) {
  38. ret = -EAGAIN;
  39. goto err;
  40. }
  41. switch (c->delivery_system) {
  42. case SYS_DVBT:
  43. delivery_system_val = 0x02;
  44. reg_bank2_2d_val = 0x23;
  45. reg_bank0_d2_val = 0x2a;
  46. break;
  47. case SYS_DVBT2:
  48. delivery_system_val = 0x03;
  49. reg_bank2_2d_val = 0x3b;
  50. reg_bank0_d2_val = 0x29;
  51. break;
  52. case SYS_DVBC_ANNEX_A:
  53. delivery_system_val = 0x04;
  54. reg_bank2_2d_val = 0x3b;
  55. reg_bank0_d2_val = 0x29;
  56. break;
  57. default:
  58. ret = -EINVAL;
  59. goto err;
  60. }
  61. switch (c->delivery_system) {
  62. case SYS_DVBT:
  63. case SYS_DVBT2:
  64. switch (c->bandwidth_hz) {
  65. case 6000000:
  66. conf_val_ptr = "\xe9\x55\x55\x1c\x29\x1c\x29";
  67. break;
  68. case 7000000:
  69. conf_val_ptr = "\xc8\x00\x00\x17\x0a\x17\x0a";
  70. break;
  71. case 8000000:
  72. conf_val_ptr = "\xaf\x00\x00\x11\xec\x11\xec";
  73. break;
  74. default:
  75. ret = -EINVAL;
  76. goto err;
  77. }
  78. break;
  79. case SYS_DVBC_ANNEX_A:
  80. conf_val_ptr = "\x10\xab\x0d\xae\x1d\x9d";
  81. break;
  82. default:
  83. break;
  84. }
  85. /* Program tuner */
  86. if (fe->ops.tuner_ops.set_params) {
  87. ret = fe->ops.tuner_ops.set_params(fe);
  88. if (ret)
  89. goto err;
  90. }
  91. if (fe->ops.tuner_ops.get_if_frequency) {
  92. ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
  93. if (ret)
  94. goto err;
  95. dev_dbg(&client->dev, "get_if_frequency=%u\n", if_frequency);
  96. } else {
  97. ret = -EINVAL;
  98. goto err;
  99. }
  100. /* Calculate IF registers */
  101. uitmp = DIV_ROUND_CLOSEST_ULL((u64) if_frequency * 0x1000000, dev->clk);
  102. if_val[0] = (uitmp >> 16) & 0xff;
  103. if_val[1] = (uitmp >> 8) & 0xff;
  104. if_val[2] = (uitmp >> 0) & 0xff;
  105. ret = regmap_write(dev->regmap[2], 0x05, 0x00);
  106. if (ret)
  107. goto err;
  108. ret = regmap_write(dev->regmap[2], 0xfb, 0x13);
  109. if (ret)
  110. goto err;
  111. ret = regmap_write(dev->regmap[2], 0xef, 0x13);
  112. if (ret)
  113. goto err;
  114. ret = regmap_write(dev->regmap[2], 0xf9, 0x13);
  115. if (ret)
  116. goto err;
  117. ret = regmap_write(dev->regmap[2], 0x00, 0x18);
  118. if (ret)
  119. goto err;
  120. ret = regmap_write(dev->regmap[2], 0x01, 0x01);
  121. if (ret)
  122. goto err;
  123. ret = regmap_write(dev->regmap[2], 0x02, 0x21);
  124. if (ret)
  125. goto err;
  126. ret = regmap_write(dev->regmap[2], 0x03, delivery_system_val);
  127. if (ret)
  128. goto err;
  129. ret = regmap_write(dev->regmap[2], 0x0b, 0x00);
  130. if (ret)
  131. goto err;
  132. for (i = 0; i < sizeof(if_val); i++) {
  133. ret = regmap_write(dev->regmap[2], 0x10 + i, if_val[i]);
  134. if (ret)
  135. goto err;
  136. }
  137. switch (c->delivery_system) {
  138. case SYS_DVBT:
  139. case SYS_DVBT2:
  140. for (i = 0; i < 7; i++) {
  141. ret = regmap_write(dev->regmap[2], 0x13 + i,
  142. conf_val_ptr[i]);
  143. if (ret)
  144. goto err;
  145. }
  146. break;
  147. case SYS_DVBC_ANNEX_A:
  148. ret = regmap_bulk_write(dev->regmap[1], 0x10, conf_val_ptr, 6);
  149. if (ret)
  150. goto err;
  151. break;
  152. default:
  153. break;
  154. }
  155. ret = regmap_write(dev->regmap[2], 0x2d, reg_bank2_2d_val);
  156. if (ret)
  157. goto err;
  158. ret = regmap_write(dev->regmap[2], 0x2e, 0x00);
  159. if (ret)
  160. goto err;
  161. ret = regmap_write(dev->regmap[2], 0x56, 0x0d);
  162. if (ret)
  163. goto err;
  164. ret = regmap_bulk_write(dev->regmap[0], 0x01,
  165. "\xba\x13\x80\xba\x91\xdd\xe7\x28", 8);
  166. if (ret)
  167. goto err;
  168. ret = regmap_write(dev->regmap[0], 0x0a, 0x1a);
  169. if (ret)
  170. goto err;
  171. ret = regmap_write(dev->regmap[0], 0x13, 0x1f);
  172. if (ret)
  173. goto err;
  174. ret = regmap_write(dev->regmap[0], 0x19, 0x03);
  175. if (ret)
  176. goto err;
  177. ret = regmap_write(dev->regmap[0], 0x1d, 0xb0);
  178. if (ret)
  179. goto err;
  180. ret = regmap_write(dev->regmap[0], 0x2a, 0x72);
  181. if (ret)
  182. goto err;
  183. ret = regmap_write(dev->regmap[0], 0x2d, 0x00);
  184. if (ret)
  185. goto err;
  186. ret = regmap_write(dev->regmap[0], 0x3c, 0x00);
  187. if (ret)
  188. goto err;
  189. ret = regmap_write(dev->regmap[0], 0x3f, 0xf8);
  190. if (ret)
  191. goto err;
  192. ret = regmap_bulk_write(dev->regmap[0], 0x40, "\xf4\x08", 2);
  193. if (ret)
  194. goto err;
  195. ret = regmap_write(dev->regmap[0], 0xd2, reg_bank0_d2_val);
  196. if (ret)
  197. goto err;
  198. ret = regmap_write(dev->regmap[0], 0xd4, 0x55);
  199. if (ret)
  200. goto err;
  201. ret = regmap_write(dev->regmap[1], 0xbe, 0x08);
  202. if (ret)
  203. goto err;
  204. ret = regmap_write(dev->regmap[0], 0xb2, 0x37);
  205. if (ret)
  206. goto err;
  207. ret = regmap_write(dev->regmap[0], 0xd7, 0x04);
  208. if (ret)
  209. goto err;
  210. /* PLP */
  211. if (c->delivery_system == SYS_DVBT2) {
  212. ret = regmap_write(dev->regmap[2], 0x36,
  213. (c->stream_id == NO_STREAM_ID_FILTER) ? 0 :
  214. c->stream_id );
  215. if (ret)
  216. goto err;
  217. }
  218. /* Reset FSM */
  219. ret = regmap_write(dev->regmap[2], 0xf8, 0x9f);
  220. if (ret)
  221. goto err;
  222. return 0;
  223. err:
  224. dev_dbg(&client->dev, "failed=%d\n", ret);
  225. return ret;
  226. }
  227. static int mn88473_read_status(struct dvb_frontend *fe, enum fe_status *status)
  228. {
  229. struct i2c_client *client = fe->demodulator_priv;
  230. struct mn88473_dev *dev = i2c_get_clientdata(client);
  231. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  232. int ret, i, stmp;
  233. unsigned int utmp, utmp1, utmp2;
  234. u8 buf[5];
  235. if (!dev->active) {
  236. ret = -EAGAIN;
  237. goto err;
  238. }
  239. /* Lock detection */
  240. switch (c->delivery_system) {
  241. case SYS_DVBT:
  242. ret = regmap_read(dev->regmap[0], 0x62, &utmp);
  243. if (ret)
  244. goto err;
  245. if (!(utmp & 0xa0)) {
  246. if ((utmp & 0x0f) >= 0x09)
  247. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  248. FE_HAS_VITERBI | FE_HAS_SYNC |
  249. FE_HAS_LOCK;
  250. else if ((utmp & 0x0f) >= 0x03)
  251. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
  252. } else {
  253. *status = 0;
  254. }
  255. break;
  256. case SYS_DVBT2:
  257. ret = regmap_read(dev->regmap[2], 0x8b, &utmp);
  258. if (ret)
  259. goto err;
  260. if (!(utmp & 0x40)) {
  261. if ((utmp & 0x0f) >= 0x0d)
  262. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  263. FE_HAS_VITERBI | FE_HAS_SYNC |
  264. FE_HAS_LOCK;
  265. else if ((utmp & 0x0f) >= 0x0a)
  266. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  267. FE_HAS_VITERBI;
  268. else if ((utmp & 0x0f) >= 0x07)
  269. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
  270. } else {
  271. *status = 0;
  272. }
  273. break;
  274. case SYS_DVBC_ANNEX_A:
  275. ret = regmap_read(dev->regmap[1], 0x85, &utmp);
  276. if (ret)
  277. goto err;
  278. if (!(utmp & 0x40)) {
  279. ret = regmap_read(dev->regmap[1], 0x89, &utmp);
  280. if (ret)
  281. goto err;
  282. if (utmp & 0x01)
  283. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  284. FE_HAS_VITERBI | FE_HAS_SYNC |
  285. FE_HAS_LOCK;
  286. } else {
  287. *status = 0;
  288. }
  289. break;
  290. default:
  291. ret = -EINVAL;
  292. goto err;
  293. }
  294. /* Signal strength */
  295. if (*status & FE_HAS_SIGNAL) {
  296. for (i = 0; i < 2; i++) {
  297. ret = regmap_bulk_read(dev->regmap[2], 0x86 + i,
  298. &buf[i], 1);
  299. if (ret)
  300. goto err;
  301. }
  302. /* AGCRD[15:6] gives us a 10bit value ([5:0] are always 0) */
  303. utmp1 = buf[0] << 8 | buf[1] << 0 | buf[0] >> 2;
  304. dev_dbg(&client->dev, "strength=%u\n", utmp1);
  305. c->strength.stat[0].scale = FE_SCALE_RELATIVE;
  306. c->strength.stat[0].uvalue = utmp1;
  307. } else {
  308. c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  309. }
  310. /* CNR */
  311. if (*status & FE_HAS_VITERBI && c->delivery_system == SYS_DVBT) {
  312. /* DVB-T CNR */
  313. ret = regmap_bulk_read(dev->regmap[0], 0x8f, buf, 2);
  314. if (ret)
  315. goto err;
  316. utmp = buf[0] << 8 | buf[1] << 0;
  317. if (utmp) {
  318. /* CNR[dB]: 10 * (log10(65536 / value) + 0.2) */
  319. /* log10(65536) = 80807124, 0.2 = 3355443 */
  320. stmp = div_u64(((u64)80807124 - intlog10(utmp)
  321. + 3355443) * 10000, 1 << 24);
  322. dev_dbg(&client->dev, "cnr=%d value=%u\n", stmp, utmp);
  323. } else {
  324. stmp = 0;
  325. }
  326. c->cnr.stat[0].svalue = stmp;
  327. c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
  328. } else if (*status & FE_HAS_VITERBI &&
  329. c->delivery_system == SYS_DVBT2) {
  330. /* DVB-T2 CNR */
  331. for (i = 0; i < 3; i++) {
  332. ret = regmap_bulk_read(dev->regmap[2], 0xb7 + i,
  333. &buf[i], 1);
  334. if (ret)
  335. goto err;
  336. }
  337. utmp = buf[1] << 8 | buf[2] << 0;
  338. utmp1 = (buf[0] >> 2) & 0x01; /* 0=SISO, 1=MISO */
  339. if (utmp) {
  340. if (utmp1) {
  341. /* CNR[dB]: 10 * (log10(16384 / value) - 0.6) */
  342. /* log10(16384) = 70706234, 0.6 = 10066330 */
  343. stmp = div_u64(((u64)70706234 - intlog10(utmp)
  344. - 10066330) * 10000, 1 << 24);
  345. dev_dbg(&client->dev, "cnr=%d value=%u MISO\n",
  346. stmp, utmp);
  347. } else {
  348. /* CNR[dB]: 10 * (log10(65536 / value) + 0.2) */
  349. /* log10(65536) = 80807124, 0.2 = 3355443 */
  350. stmp = div_u64(((u64)80807124 - intlog10(utmp)
  351. + 3355443) * 10000, 1 << 24);
  352. dev_dbg(&client->dev, "cnr=%d value=%u SISO\n",
  353. stmp, utmp);
  354. }
  355. } else {
  356. stmp = 0;
  357. }
  358. c->cnr.stat[0].svalue = stmp;
  359. c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
  360. } else if (*status & FE_HAS_VITERBI &&
  361. c->delivery_system == SYS_DVBC_ANNEX_A) {
  362. /* DVB-C CNR */
  363. ret = regmap_bulk_read(dev->regmap[1], 0xa1, buf, 4);
  364. if (ret)
  365. goto err;
  366. utmp1 = buf[0] << 8 | buf[1] << 0; /* signal */
  367. utmp2 = buf[2] << 8 | buf[3] << 0; /* noise */
  368. if (utmp1 && utmp2) {
  369. /* CNR[dB]: 10 * log10(8 * (signal / noise)) */
  370. /* log10(8) = 15151336 */
  371. stmp = div_u64(((u64)15151336 + intlog10(utmp1)
  372. - intlog10(utmp2)) * 10000, 1 << 24);
  373. dev_dbg(&client->dev, "cnr=%d signal=%u noise=%u\n",
  374. stmp, utmp1, utmp2);
  375. } else {
  376. stmp = 0;
  377. }
  378. c->cnr.stat[0].svalue = stmp;
  379. c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
  380. } else {
  381. c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  382. }
  383. /* BER */
  384. if (*status & FE_HAS_LOCK && (c->delivery_system == SYS_DVBT ||
  385. c->delivery_system == SYS_DVBC_ANNEX_A)) {
  386. /* DVB-T & DVB-C BER */
  387. ret = regmap_bulk_read(dev->regmap[0], 0x92, buf, 5);
  388. if (ret)
  389. goto err;
  390. utmp1 = buf[0] << 16 | buf[1] << 8 | buf[2] << 0;
  391. utmp2 = buf[3] << 8 | buf[4] << 0;
  392. utmp2 = utmp2 * 8 * 204;
  393. dev_dbg(&client->dev, "post_bit_error=%u post_bit_count=%u\n",
  394. utmp1, utmp2);
  395. c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
  396. c->post_bit_error.stat[0].uvalue += utmp1;
  397. c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
  398. c->post_bit_count.stat[0].uvalue += utmp2;
  399. } else {
  400. c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  401. c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  402. }
  403. /* PER */
  404. if (*status & FE_HAS_LOCK) {
  405. ret = regmap_bulk_read(dev->regmap[0], 0xdd, buf, 4);
  406. if (ret)
  407. goto err;
  408. utmp1 = buf[0] << 8 | buf[1] << 0;
  409. utmp2 = buf[2] << 8 | buf[3] << 0;
  410. dev_dbg(&client->dev, "block_error=%u block_count=%u\n",
  411. utmp1, utmp2);
  412. c->block_error.stat[0].scale = FE_SCALE_COUNTER;
  413. c->block_error.stat[0].uvalue += utmp1;
  414. c->block_count.stat[0].scale = FE_SCALE_COUNTER;
  415. c->block_count.stat[0].uvalue += utmp2;
  416. } else {
  417. c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  418. c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  419. }
  420. return 0;
  421. err:
  422. dev_dbg(&client->dev, "failed=%d\n", ret);
  423. return ret;
  424. }
  425. static int mn88473_init(struct dvb_frontend *fe)
  426. {
  427. struct i2c_client *client = fe->demodulator_priv;
  428. struct mn88473_dev *dev = i2c_get_clientdata(client);
  429. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  430. int ret, len, remain;
  431. unsigned int uitmp;
  432. const struct firmware *fw;
  433. const char *name = MN88473_FIRMWARE;
  434. dev_dbg(&client->dev, "\n");
  435. /* Check if firmware is already running */
  436. ret = regmap_read(dev->regmap[0], 0xf5, &uitmp);
  437. if (ret)
  438. goto err;
  439. if (!(uitmp & 0x01))
  440. goto warm;
  441. /* Request the firmware, this will block and timeout */
  442. ret = request_firmware(&fw, name, &client->dev);
  443. if (ret) {
  444. dev_err(&client->dev, "firmware file '%s' not found\n", name);
  445. goto err;
  446. }
  447. dev_info(&client->dev, "downloading firmware from file '%s'\n", name);
  448. ret = regmap_write(dev->regmap[0], 0xf5, 0x03);
  449. if (ret)
  450. goto err_release_firmware;
  451. for (remain = fw->size; remain > 0; remain -= (dev->i2c_wr_max - 1)) {
  452. len = min(dev->i2c_wr_max - 1, remain);
  453. ret = regmap_bulk_write(dev->regmap[0], 0xf6,
  454. &fw->data[fw->size - remain], len);
  455. if (ret) {
  456. dev_err(&client->dev, "firmware download failed %d\n",
  457. ret);
  458. goto err_release_firmware;
  459. }
  460. }
  461. release_firmware(fw);
  462. /* Parity check of firmware */
  463. ret = regmap_read(dev->regmap[0], 0xf8, &uitmp);
  464. if (ret)
  465. goto err;
  466. if (uitmp & 0x10) {
  467. dev_err(&client->dev, "firmware parity check failed\n");
  468. ret = -EINVAL;
  469. goto err;
  470. }
  471. ret = regmap_write(dev->regmap[0], 0xf5, 0x00);
  472. if (ret)
  473. goto err;
  474. warm:
  475. /* TS config */
  476. ret = regmap_write(dev->regmap[2], 0x09, 0x08);
  477. if (ret)
  478. goto err;
  479. ret = regmap_write(dev->regmap[2], 0x08, 0x1d);
  480. if (ret)
  481. goto err;
  482. dev->active = true;
  483. /* init stats here to indicate which stats are supported */
  484. c->strength.len = 1;
  485. c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  486. c->cnr.len = 1;
  487. c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  488. c->post_bit_error.len = 1;
  489. c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  490. c->post_bit_count.len = 1;
  491. c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  492. c->block_error.len = 1;
  493. c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  494. c->block_count.len = 1;
  495. c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  496. return 0;
  497. err_release_firmware:
  498. release_firmware(fw);
  499. err:
  500. dev_dbg(&client->dev, "failed=%d\n", ret);
  501. return ret;
  502. }
  503. static int mn88473_sleep(struct dvb_frontend *fe)
  504. {
  505. struct i2c_client *client = fe->demodulator_priv;
  506. struct mn88473_dev *dev = i2c_get_clientdata(client);
  507. int ret;
  508. dev_dbg(&client->dev, "\n");
  509. dev->active = false;
  510. ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
  511. if (ret)
  512. goto err;
  513. return 0;
  514. err:
  515. dev_dbg(&client->dev, "failed=%d\n", ret);
  516. return ret;
  517. }
  518. static const struct dvb_frontend_ops mn88473_ops = {
  519. .delsys = {SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A},
  520. .info = {
  521. .name = "Panasonic MN88473",
  522. .symbol_rate_min = 1000000,
  523. .symbol_rate_max = 7200000,
  524. .caps = FE_CAN_FEC_1_2 |
  525. FE_CAN_FEC_2_3 |
  526. FE_CAN_FEC_3_4 |
  527. FE_CAN_FEC_5_6 |
  528. FE_CAN_FEC_7_8 |
  529. FE_CAN_FEC_AUTO |
  530. FE_CAN_QPSK |
  531. FE_CAN_QAM_16 |
  532. FE_CAN_QAM_32 |
  533. FE_CAN_QAM_64 |
  534. FE_CAN_QAM_128 |
  535. FE_CAN_QAM_256 |
  536. FE_CAN_QAM_AUTO |
  537. FE_CAN_TRANSMISSION_MODE_AUTO |
  538. FE_CAN_GUARD_INTERVAL_AUTO |
  539. FE_CAN_HIERARCHY_AUTO |
  540. FE_CAN_MUTE_TS |
  541. FE_CAN_2G_MODULATION |
  542. FE_CAN_MULTISTREAM
  543. },
  544. .get_tune_settings = mn88473_get_tune_settings,
  545. .init = mn88473_init,
  546. .sleep = mn88473_sleep,
  547. .set_frontend = mn88473_set_frontend,
  548. .read_status = mn88473_read_status,
  549. };
  550. static int mn88473_probe(struct i2c_client *client,
  551. const struct i2c_device_id *id)
  552. {
  553. struct mn88473_config *config = client->dev.platform_data;
  554. struct mn88473_dev *dev;
  555. int ret;
  556. unsigned int uitmp;
  557. static const struct regmap_config regmap_config = {
  558. .reg_bits = 8,
  559. .val_bits = 8,
  560. };
  561. dev_dbg(&client->dev, "\n");
  562. /* Caller really need to provide pointer for frontend we create */
  563. if (config->fe == NULL) {
  564. dev_err(&client->dev, "frontend pointer not defined\n");
  565. ret = -EINVAL;
  566. goto err;
  567. }
  568. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  569. if (dev == NULL) {
  570. ret = -ENOMEM;
  571. goto err;
  572. }
  573. if (config->i2c_wr_max)
  574. dev->i2c_wr_max = config->i2c_wr_max;
  575. else
  576. dev->i2c_wr_max = ~0;
  577. if (config->xtal)
  578. dev->clk = config->xtal;
  579. else
  580. dev->clk = 25000000;
  581. dev->client[0] = client;
  582. dev->regmap[0] = regmap_init_i2c(dev->client[0], &regmap_config);
  583. if (IS_ERR(dev->regmap[0])) {
  584. ret = PTR_ERR(dev->regmap[0]);
  585. goto err_kfree;
  586. }
  587. /*
  588. * Chip has three I2C addresses for different register banks. Used
  589. * addresses are 0x18, 0x1a and 0x1c. We register two dummy clients,
  590. * 0x1a and 0x1c, in order to get own I2C client for each register bank.
  591. *
  592. * Also, register bank 2 do not support sequential I/O. Only single
  593. * register write or read is allowed to that bank.
  594. */
  595. dev->client[1] = i2c_new_dummy(client->adapter, 0x1a);
  596. if (dev->client[1] == NULL) {
  597. ret = -ENODEV;
  598. dev_err(&client->dev, "I2C registration failed\n");
  599. if (ret)
  600. goto err_regmap_0_regmap_exit;
  601. }
  602. dev->regmap[1] = regmap_init_i2c(dev->client[1], &regmap_config);
  603. if (IS_ERR(dev->regmap[1])) {
  604. ret = PTR_ERR(dev->regmap[1]);
  605. goto err_client_1_i2c_unregister_device;
  606. }
  607. i2c_set_clientdata(dev->client[1], dev);
  608. dev->client[2] = i2c_new_dummy(client->adapter, 0x1c);
  609. if (dev->client[2] == NULL) {
  610. ret = -ENODEV;
  611. dev_err(&client->dev, "2nd I2C registration failed\n");
  612. if (ret)
  613. goto err_regmap_1_regmap_exit;
  614. }
  615. dev->regmap[2] = regmap_init_i2c(dev->client[2], &regmap_config);
  616. if (IS_ERR(dev->regmap[2])) {
  617. ret = PTR_ERR(dev->regmap[2]);
  618. goto err_client_2_i2c_unregister_device;
  619. }
  620. i2c_set_clientdata(dev->client[2], dev);
  621. /* Check demod answers with correct chip id */
  622. ret = regmap_read(dev->regmap[2], 0xff, &uitmp);
  623. if (ret)
  624. goto err_regmap_2_regmap_exit;
  625. dev_dbg(&client->dev, "chip id=%02x\n", uitmp);
  626. if (uitmp != 0x03) {
  627. ret = -ENODEV;
  628. goto err_regmap_2_regmap_exit;
  629. }
  630. /* Sleep because chip is active by default */
  631. ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
  632. if (ret)
  633. goto err_regmap_2_regmap_exit;
  634. /* Create dvb frontend */
  635. memcpy(&dev->frontend.ops, &mn88473_ops, sizeof(dev->frontend.ops));
  636. dev->frontend.demodulator_priv = client;
  637. *config->fe = &dev->frontend;
  638. i2c_set_clientdata(client, dev);
  639. dev_info(&client->dev, "Panasonic MN88473 successfully identified\n");
  640. return 0;
  641. err_regmap_2_regmap_exit:
  642. regmap_exit(dev->regmap[2]);
  643. err_client_2_i2c_unregister_device:
  644. i2c_unregister_device(dev->client[2]);
  645. err_regmap_1_regmap_exit:
  646. regmap_exit(dev->regmap[1]);
  647. err_client_1_i2c_unregister_device:
  648. i2c_unregister_device(dev->client[1]);
  649. err_regmap_0_regmap_exit:
  650. regmap_exit(dev->regmap[0]);
  651. err_kfree:
  652. kfree(dev);
  653. err:
  654. dev_dbg(&client->dev, "failed=%d\n", ret);
  655. return ret;
  656. }
  657. static int mn88473_remove(struct i2c_client *client)
  658. {
  659. struct mn88473_dev *dev = i2c_get_clientdata(client);
  660. dev_dbg(&client->dev, "\n");
  661. regmap_exit(dev->regmap[2]);
  662. i2c_unregister_device(dev->client[2]);
  663. regmap_exit(dev->regmap[1]);
  664. i2c_unregister_device(dev->client[1]);
  665. regmap_exit(dev->regmap[0]);
  666. kfree(dev);
  667. return 0;
  668. }
  669. static const struct i2c_device_id mn88473_id_table[] = {
  670. {"mn88473", 0},
  671. {}
  672. };
  673. MODULE_DEVICE_TABLE(i2c, mn88473_id_table);
  674. static struct i2c_driver mn88473_driver = {
  675. .driver = {
  676. .name = "mn88473",
  677. .suppress_bind_attrs = true,
  678. },
  679. .probe = mn88473_probe,
  680. .remove = mn88473_remove,
  681. .id_table = mn88473_id_table,
  682. };
  683. module_i2c_driver(mn88473_driver);
  684. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  685. MODULE_DESCRIPTION("Panasonic MN88473 DVB-T/T2/C demodulator driver");
  686. MODULE_LICENSE("GPL");
  687. MODULE_FIRMWARE(MN88473_FIRMWARE);