atbm8830.c 11 KB

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  1. /*
  2. * Support for AltoBeam GB20600 (a.k.a DMB-TH) demodulator
  3. * ATBM8830, ATBM8831
  4. *
  5. * Copyright (C) 2009 David T.L. Wong <davidtlwong@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <asm/div64.h>
  18. #include <media/dvb_frontend.h>
  19. #include "atbm8830.h"
  20. #include "atbm8830_priv.h"
  21. #define dprintk(args...) \
  22. do { \
  23. if (debug) \
  24. printk(KERN_DEBUG "atbm8830: " args); \
  25. } while (0)
  26. static int debug;
  27. module_param(debug, int, 0644);
  28. MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
  29. static int atbm8830_write_reg(struct atbm_state *priv, u16 reg, u8 data)
  30. {
  31. int ret = 0;
  32. u8 dev_addr;
  33. u8 buf1[] = { reg >> 8, reg & 0xFF };
  34. u8 buf2[] = { data };
  35. struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
  36. struct i2c_msg msg2 = { .flags = 0, .buf = buf2, .len = 1 };
  37. dev_addr = priv->config->demod_address;
  38. msg1.addr = dev_addr;
  39. msg2.addr = dev_addr;
  40. if (debug >= 2)
  41. dprintk("%s: reg=0x%04X, data=0x%02X\n", __func__, reg, data);
  42. ret = i2c_transfer(priv->i2c, &msg1, 1);
  43. if (ret != 1)
  44. return -EIO;
  45. ret = i2c_transfer(priv->i2c, &msg2, 1);
  46. return (ret != 1) ? -EIO : 0;
  47. }
  48. static int atbm8830_read_reg(struct atbm_state *priv, u16 reg, u8 *p_data)
  49. {
  50. int ret;
  51. u8 dev_addr;
  52. u8 buf1[] = { reg >> 8, reg & 0xFF };
  53. u8 buf2[] = { 0 };
  54. struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
  55. struct i2c_msg msg2 = { .flags = I2C_M_RD, .buf = buf2, .len = 1 };
  56. dev_addr = priv->config->demod_address;
  57. msg1.addr = dev_addr;
  58. msg2.addr = dev_addr;
  59. ret = i2c_transfer(priv->i2c, &msg1, 1);
  60. if (ret != 1) {
  61. dprintk("%s: error reg=0x%04x, ret=%i\n", __func__, reg, ret);
  62. return -EIO;
  63. }
  64. ret = i2c_transfer(priv->i2c, &msg2, 1);
  65. if (ret != 1)
  66. return -EIO;
  67. *p_data = buf2[0];
  68. if (debug >= 2)
  69. dprintk("%s: reg=0x%04X, data=0x%02X\n",
  70. __func__, reg, buf2[0]);
  71. return 0;
  72. }
  73. /* Lock register latch so that multi-register read is atomic */
  74. static inline int atbm8830_reglatch_lock(struct atbm_state *priv, int lock)
  75. {
  76. return atbm8830_write_reg(priv, REG_READ_LATCH, lock ? 1 : 0);
  77. }
  78. static int set_osc_freq(struct atbm_state *priv, u32 freq /*in kHz*/)
  79. {
  80. u32 val;
  81. u64 t;
  82. /* 0x100000 * freq / 30.4MHz */
  83. t = (u64)0x100000 * freq;
  84. do_div(t, 30400);
  85. val = t;
  86. atbm8830_write_reg(priv, REG_OSC_CLK, val);
  87. atbm8830_write_reg(priv, REG_OSC_CLK + 1, val >> 8);
  88. atbm8830_write_reg(priv, REG_OSC_CLK + 2, val >> 16);
  89. return 0;
  90. }
  91. static int set_if_freq(struct atbm_state *priv, u32 freq /*in kHz*/)
  92. {
  93. u32 fs = priv->config->osc_clk_freq;
  94. u64 t;
  95. u32 val;
  96. u8 dat;
  97. if (freq != 0) {
  98. /* 2 * PI * (freq - fs) / fs * (2 ^ 22) */
  99. t = (u64) 2 * 31416 * (freq - fs);
  100. t <<= 22;
  101. do_div(t, fs);
  102. do_div(t, 1000);
  103. val = t;
  104. atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 1);
  105. atbm8830_write_reg(priv, REG_IF_FREQ, val);
  106. atbm8830_write_reg(priv, REG_IF_FREQ+1, val >> 8);
  107. atbm8830_write_reg(priv, REG_IF_FREQ+2, val >> 16);
  108. atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
  109. dat &= 0xFC;
  110. atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
  111. } else {
  112. /* Zero IF */
  113. atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 0);
  114. atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
  115. dat &= 0xFC;
  116. dat |= 0x02;
  117. atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
  118. if (priv->config->zif_swap_iq)
  119. atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x03);
  120. else
  121. atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x01);
  122. }
  123. return 0;
  124. }
  125. static int is_locked(struct atbm_state *priv, u8 *locked)
  126. {
  127. u8 status;
  128. atbm8830_read_reg(priv, REG_LOCK_STATUS, &status);
  129. if (locked != NULL)
  130. *locked = (status == 1);
  131. return 0;
  132. }
  133. static int set_agc_config(struct atbm_state *priv,
  134. u8 min, u8 max, u8 hold_loop)
  135. {
  136. /* no effect if both min and max are zero */
  137. if (!min && !max)
  138. return 0;
  139. atbm8830_write_reg(priv, REG_AGC_MIN, min);
  140. atbm8830_write_reg(priv, REG_AGC_MAX, max);
  141. atbm8830_write_reg(priv, REG_AGC_HOLD_LOOP, hold_loop);
  142. return 0;
  143. }
  144. static int set_static_channel_mode(struct atbm_state *priv)
  145. {
  146. int i;
  147. for (i = 0; i < 5; i++)
  148. atbm8830_write_reg(priv, 0x099B + i, 0x08);
  149. atbm8830_write_reg(priv, 0x095B, 0x7F);
  150. atbm8830_write_reg(priv, 0x09CB, 0x01);
  151. atbm8830_write_reg(priv, 0x09CC, 0x7F);
  152. atbm8830_write_reg(priv, 0x09CD, 0x7F);
  153. atbm8830_write_reg(priv, 0x0E01, 0x20);
  154. /* For single carrier */
  155. atbm8830_write_reg(priv, 0x0B03, 0x0A);
  156. atbm8830_write_reg(priv, 0x0935, 0x10);
  157. atbm8830_write_reg(priv, 0x0936, 0x08);
  158. atbm8830_write_reg(priv, 0x093E, 0x08);
  159. atbm8830_write_reg(priv, 0x096E, 0x06);
  160. /* frame_count_max0 */
  161. atbm8830_write_reg(priv, 0x0B09, 0x00);
  162. /* frame_count_max1 */
  163. atbm8830_write_reg(priv, 0x0B0A, 0x08);
  164. return 0;
  165. }
  166. static int set_ts_config(struct atbm_state *priv)
  167. {
  168. const struct atbm8830_config *cfg = priv->config;
  169. /*Set parallel/serial ts mode*/
  170. atbm8830_write_reg(priv, REG_TS_SERIAL, cfg->serial_ts ? 1 : 0);
  171. atbm8830_write_reg(priv, REG_TS_CLK_MODE, cfg->serial_ts ? 1 : 0);
  172. /*Set ts sampling edge*/
  173. atbm8830_write_reg(priv, REG_TS_SAMPLE_EDGE,
  174. cfg->ts_sampling_edge ? 1 : 0);
  175. /*Set ts clock freerun*/
  176. atbm8830_write_reg(priv, REG_TS_CLK_FREERUN,
  177. cfg->ts_clk_gated ? 0 : 1);
  178. return 0;
  179. }
  180. static int atbm8830_init(struct dvb_frontend *fe)
  181. {
  182. struct atbm_state *priv = fe->demodulator_priv;
  183. const struct atbm8830_config *cfg = priv->config;
  184. /*Set oscillator frequency*/
  185. set_osc_freq(priv, cfg->osc_clk_freq);
  186. /*Set IF frequency*/
  187. set_if_freq(priv, cfg->if_freq);
  188. /*Set AGC Config*/
  189. set_agc_config(priv, cfg->agc_min, cfg->agc_max,
  190. cfg->agc_hold_loop);
  191. /*Set static channel mode*/
  192. set_static_channel_mode(priv);
  193. set_ts_config(priv);
  194. /*Turn off DSP reset*/
  195. atbm8830_write_reg(priv, 0x000A, 0);
  196. /*SW version test*/
  197. atbm8830_write_reg(priv, 0x020C, 11);
  198. /* Run */
  199. atbm8830_write_reg(priv, REG_DEMOD_RUN, 1);
  200. return 0;
  201. }
  202. static void atbm8830_release(struct dvb_frontend *fe)
  203. {
  204. struct atbm_state *state = fe->demodulator_priv;
  205. dprintk("%s\n", __func__);
  206. kfree(state);
  207. }
  208. static int atbm8830_set_fe(struct dvb_frontend *fe)
  209. {
  210. struct atbm_state *priv = fe->demodulator_priv;
  211. int i;
  212. u8 locked = 0;
  213. dprintk("%s\n", __func__);
  214. /* set frequency */
  215. if (fe->ops.tuner_ops.set_params) {
  216. if (fe->ops.i2c_gate_ctrl)
  217. fe->ops.i2c_gate_ctrl(fe, 1);
  218. fe->ops.tuner_ops.set_params(fe);
  219. if (fe->ops.i2c_gate_ctrl)
  220. fe->ops.i2c_gate_ctrl(fe, 0);
  221. }
  222. /* start auto lock */
  223. for (i = 0; i < 10; i++) {
  224. mdelay(100);
  225. dprintk("Try %d\n", i);
  226. is_locked(priv, &locked);
  227. if (locked != 0) {
  228. dprintk("ATBM8830 locked!\n");
  229. break;
  230. }
  231. }
  232. return 0;
  233. }
  234. static int atbm8830_get_fe(struct dvb_frontend *fe,
  235. struct dtv_frontend_properties *c)
  236. {
  237. dprintk("%s\n", __func__);
  238. /* TODO: get real readings from device */
  239. /* inversion status */
  240. c->inversion = INVERSION_OFF;
  241. /* bandwidth */
  242. c->bandwidth_hz = 8000000;
  243. c->code_rate_HP = FEC_AUTO;
  244. c->code_rate_LP = FEC_AUTO;
  245. c->modulation = QAM_AUTO;
  246. /* transmission mode */
  247. c->transmission_mode = TRANSMISSION_MODE_AUTO;
  248. /* guard interval */
  249. c->guard_interval = GUARD_INTERVAL_AUTO;
  250. /* hierarchy */
  251. c->hierarchy = HIERARCHY_NONE;
  252. return 0;
  253. }
  254. static int atbm8830_get_tune_settings(struct dvb_frontend *fe,
  255. struct dvb_frontend_tune_settings *fesettings)
  256. {
  257. fesettings->min_delay_ms = 0;
  258. fesettings->step_size = 0;
  259. fesettings->max_drift = 0;
  260. return 0;
  261. }
  262. static int atbm8830_read_status(struct dvb_frontend *fe,
  263. enum fe_status *fe_status)
  264. {
  265. struct atbm_state *priv = fe->demodulator_priv;
  266. u8 locked = 0;
  267. u8 agc_locked = 0;
  268. dprintk("%s\n", __func__);
  269. *fe_status = 0;
  270. is_locked(priv, &locked);
  271. if (locked) {
  272. *fe_status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
  273. FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
  274. }
  275. dprintk("%s: fe_status=0x%x\n", __func__, *fe_status);
  276. atbm8830_read_reg(priv, REG_AGC_LOCK, &agc_locked);
  277. dprintk("AGC Lock: %d\n", agc_locked);
  278. return 0;
  279. }
  280. static int atbm8830_read_ber(struct dvb_frontend *fe, u32 *ber)
  281. {
  282. struct atbm_state *priv = fe->demodulator_priv;
  283. u32 frame_err;
  284. u8 t;
  285. dprintk("%s\n", __func__);
  286. atbm8830_reglatch_lock(priv, 1);
  287. atbm8830_read_reg(priv, REG_FRAME_ERR_CNT + 1, &t);
  288. frame_err = t & 0x7F;
  289. frame_err <<= 8;
  290. atbm8830_read_reg(priv, REG_FRAME_ERR_CNT, &t);
  291. frame_err |= t;
  292. atbm8830_reglatch_lock(priv, 0);
  293. *ber = frame_err * 100 / 32767;
  294. dprintk("%s: ber=0x%x\n", __func__, *ber);
  295. return 0;
  296. }
  297. static int atbm8830_read_signal_strength(struct dvb_frontend *fe, u16 *signal)
  298. {
  299. struct atbm_state *priv = fe->demodulator_priv;
  300. u32 pwm;
  301. u8 t;
  302. dprintk("%s\n", __func__);
  303. atbm8830_reglatch_lock(priv, 1);
  304. atbm8830_read_reg(priv, REG_AGC_PWM_VAL + 1, &t);
  305. pwm = t & 0x03;
  306. pwm <<= 8;
  307. atbm8830_read_reg(priv, REG_AGC_PWM_VAL, &t);
  308. pwm |= t;
  309. atbm8830_reglatch_lock(priv, 0);
  310. dprintk("AGC PWM = 0x%02X\n", pwm);
  311. pwm = 0x400 - pwm;
  312. *signal = pwm * 0x10000 / 0x400;
  313. return 0;
  314. }
  315. static int atbm8830_read_snr(struct dvb_frontend *fe, u16 *snr)
  316. {
  317. dprintk("%s\n", __func__);
  318. *snr = 0;
  319. return 0;
  320. }
  321. static int atbm8830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  322. {
  323. dprintk("%s\n", __func__);
  324. *ucblocks = 0;
  325. return 0;
  326. }
  327. static int atbm8830_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
  328. {
  329. struct atbm_state *priv = fe->demodulator_priv;
  330. return atbm8830_write_reg(priv, REG_I2C_GATE, enable ? 1 : 0);
  331. }
  332. static const struct dvb_frontend_ops atbm8830_ops = {
  333. .delsys = { SYS_DTMB },
  334. .info = {
  335. .name = "AltoBeam ATBM8830/8831 DMB-TH",
  336. .frequency_min_hz = 474 * MHz,
  337. .frequency_max_hz = 858 * MHz,
  338. .frequency_stepsize_hz = 10 * kHz,
  339. .caps =
  340. FE_CAN_FEC_AUTO |
  341. FE_CAN_QAM_AUTO |
  342. FE_CAN_TRANSMISSION_MODE_AUTO |
  343. FE_CAN_GUARD_INTERVAL_AUTO
  344. },
  345. .release = atbm8830_release,
  346. .init = atbm8830_init,
  347. .sleep = NULL,
  348. .write = NULL,
  349. .i2c_gate_ctrl = atbm8830_i2c_gate_ctrl,
  350. .set_frontend = atbm8830_set_fe,
  351. .get_frontend = atbm8830_get_fe,
  352. .get_tune_settings = atbm8830_get_tune_settings,
  353. .read_status = atbm8830_read_status,
  354. .read_ber = atbm8830_read_ber,
  355. .read_signal_strength = atbm8830_read_signal_strength,
  356. .read_snr = atbm8830_read_snr,
  357. .read_ucblocks = atbm8830_read_ucblocks,
  358. };
  359. struct dvb_frontend *atbm8830_attach(const struct atbm8830_config *config,
  360. struct i2c_adapter *i2c)
  361. {
  362. struct atbm_state *priv = NULL;
  363. u8 data = 0;
  364. dprintk("%s()\n", __func__);
  365. if (config == NULL || i2c == NULL)
  366. return NULL;
  367. priv = kzalloc(sizeof(struct atbm_state), GFP_KERNEL);
  368. if (priv == NULL)
  369. goto error_out;
  370. priv->config = config;
  371. priv->i2c = i2c;
  372. /* check if the demod is there */
  373. if (atbm8830_read_reg(priv, REG_CHIP_ID, &data) != 0) {
  374. dprintk("%s atbm8830/8831 not found at i2c addr 0x%02X\n",
  375. __func__, priv->config->demod_address);
  376. goto error_out;
  377. }
  378. dprintk("atbm8830 chip id: 0x%02X\n", data);
  379. memcpy(&priv->frontend.ops, &atbm8830_ops,
  380. sizeof(struct dvb_frontend_ops));
  381. priv->frontend.demodulator_priv = priv;
  382. atbm8830_init(&priv->frontend);
  383. atbm8830_i2c_gate_ctrl(&priv->frontend, 1);
  384. return &priv->frontend;
  385. error_out:
  386. dprintk("%s() error_out\n", __func__);
  387. kfree(priv);
  388. return NULL;
  389. }
  390. EXPORT_SYMBOL(atbm8830_attach);
  391. MODULE_DESCRIPTION("AltoBeam ATBM8830/8831 GB20600 demodulator driver");
  392. MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>");
  393. MODULE_LICENSE("GPL");