af9013.c 35 KB

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  1. /*
  2. * Afatech AF9013 demodulator driver
  3. *
  4. * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
  5. * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
  6. *
  7. * Thanks to Afatech who kindly provided information.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. */
  20. #include "af9013_priv.h"
  21. struct af9013_state {
  22. struct i2c_client *client;
  23. struct regmap *regmap;
  24. struct i2c_mux_core *muxc;
  25. struct dvb_frontend fe;
  26. u32 clk;
  27. u8 tuner;
  28. u32 if_frequency;
  29. u8 ts_mode;
  30. u8 ts_output_pin;
  31. bool spec_inv;
  32. u8 api_version[4];
  33. u8 gpio[4];
  34. u32 bandwidth_hz;
  35. enum fe_status fe_status;
  36. /* RF and IF AGC limits used for signal strength calc */
  37. u8 strength_en, rf_agc_50, rf_agc_80, if_agc_50, if_agc_80;
  38. unsigned long set_frontend_jiffies;
  39. unsigned long read_status_jiffies;
  40. unsigned long strength_jiffies;
  41. unsigned long cnr_jiffies;
  42. unsigned long ber_ucb_jiffies;
  43. u16 dvbv3_snr;
  44. u16 dvbv3_strength;
  45. u32 dvbv3_ber;
  46. u32 dvbv3_ucblocks;
  47. bool first_tune;
  48. };
  49. static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval)
  50. {
  51. struct i2c_client *client = state->client;
  52. int ret;
  53. u8 pos;
  54. u16 addr;
  55. dev_dbg(&client->dev, "gpio %u, gpioval %02x\n", gpio, gpioval);
  56. /*
  57. * GPIO0 & GPIO1 0xd735
  58. * GPIO2 & GPIO3 0xd736
  59. */
  60. switch (gpio) {
  61. case 0:
  62. case 1:
  63. addr = 0xd735;
  64. break;
  65. case 2:
  66. case 3:
  67. addr = 0xd736;
  68. break;
  69. default:
  70. ret = -EINVAL;
  71. goto err;
  72. }
  73. switch (gpio) {
  74. case 0:
  75. case 2:
  76. pos = 0;
  77. break;
  78. case 1:
  79. case 3:
  80. default:
  81. pos = 4;
  82. break;
  83. }
  84. ret = regmap_update_bits(state->regmap, addr, 0x0f << pos,
  85. gpioval << pos);
  86. if (ret)
  87. goto err;
  88. return 0;
  89. err:
  90. dev_dbg(&client->dev, "failed %d\n", ret);
  91. return ret;
  92. }
  93. static int af9013_get_tune_settings(struct dvb_frontend *fe,
  94. struct dvb_frontend_tune_settings *fesettings)
  95. {
  96. fesettings->min_delay_ms = 800;
  97. fesettings->step_size = 0;
  98. fesettings->max_drift = 0;
  99. return 0;
  100. }
  101. static int af9013_set_frontend(struct dvb_frontend *fe)
  102. {
  103. struct af9013_state *state = fe->demodulator_priv;
  104. struct i2c_client *client = state->client;
  105. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  106. int ret, i, sampling_freq;
  107. bool auto_mode, spec_inv;
  108. u8 buf[6];
  109. u32 if_frequency, freq_cw;
  110. dev_dbg(&client->dev, "frequency %u, bandwidth_hz %u\n",
  111. c->frequency, c->bandwidth_hz);
  112. /* program tuner */
  113. if (fe->ops.tuner_ops.set_params) {
  114. ret = fe->ops.tuner_ops.set_params(fe);
  115. if (ret)
  116. goto err;
  117. }
  118. /* program CFOE coefficients */
  119. if (c->bandwidth_hz != state->bandwidth_hz) {
  120. for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
  121. if (coeff_lut[i].clock == state->clk &&
  122. coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
  123. break;
  124. }
  125. }
  126. /* Return an error if can't find bandwidth or the right clock */
  127. if (i == ARRAY_SIZE(coeff_lut)) {
  128. ret = -EINVAL;
  129. goto err;
  130. }
  131. ret = regmap_bulk_write(state->regmap, 0xae00, coeff_lut[i].val,
  132. sizeof(coeff_lut[i].val));
  133. if (ret)
  134. goto err;
  135. }
  136. /* program frequency control */
  137. if (c->bandwidth_hz != state->bandwidth_hz || state->first_tune) {
  138. /* get used IF frequency */
  139. if (fe->ops.tuner_ops.get_if_frequency) {
  140. ret = fe->ops.tuner_ops.get_if_frequency(fe,
  141. &if_frequency);
  142. if (ret)
  143. goto err;
  144. } else {
  145. if_frequency = state->if_frequency;
  146. }
  147. dev_dbg(&client->dev, "if_frequency %u\n", if_frequency);
  148. sampling_freq = if_frequency;
  149. while (sampling_freq > (state->clk / 2))
  150. sampling_freq -= state->clk;
  151. if (sampling_freq < 0) {
  152. sampling_freq *= -1;
  153. spec_inv = state->spec_inv;
  154. } else {
  155. spec_inv = !state->spec_inv;
  156. }
  157. freq_cw = DIV_ROUND_CLOSEST_ULL((u64)sampling_freq * 0x800000,
  158. state->clk);
  159. if (spec_inv)
  160. freq_cw = 0x800000 - freq_cw;
  161. buf[0] = (freq_cw >> 0) & 0xff;
  162. buf[1] = (freq_cw >> 8) & 0xff;
  163. buf[2] = (freq_cw >> 16) & 0x7f;
  164. freq_cw = 0x800000 - freq_cw;
  165. buf[3] = (freq_cw >> 0) & 0xff;
  166. buf[4] = (freq_cw >> 8) & 0xff;
  167. buf[5] = (freq_cw >> 16) & 0x7f;
  168. ret = regmap_bulk_write(state->regmap, 0xd140, buf, 3);
  169. if (ret)
  170. goto err;
  171. ret = regmap_bulk_write(state->regmap, 0x9be7, buf, 6);
  172. if (ret)
  173. goto err;
  174. }
  175. /* clear TPS lock flag */
  176. ret = regmap_update_bits(state->regmap, 0xd330, 0x08, 0x08);
  177. if (ret)
  178. goto err;
  179. /* clear MPEG2 lock flag */
  180. ret = regmap_update_bits(state->regmap, 0xd507, 0x40, 0x00);
  181. if (ret)
  182. goto err;
  183. /* empty channel function */
  184. ret = regmap_update_bits(state->regmap, 0x9bfe, 0x01, 0x00);
  185. if (ret)
  186. goto err;
  187. /* empty DVB-T channel function */
  188. ret = regmap_update_bits(state->regmap, 0x9bc2, 0x01, 0x00);
  189. if (ret)
  190. goto err;
  191. /* transmission parameters */
  192. auto_mode = false;
  193. memset(buf, 0, 3);
  194. switch (c->transmission_mode) {
  195. case TRANSMISSION_MODE_AUTO:
  196. auto_mode = true;
  197. break;
  198. case TRANSMISSION_MODE_2K:
  199. break;
  200. case TRANSMISSION_MODE_8K:
  201. buf[0] |= (1 << 0);
  202. break;
  203. default:
  204. dev_dbg(&client->dev, "invalid transmission_mode\n");
  205. auto_mode = true;
  206. }
  207. switch (c->guard_interval) {
  208. case GUARD_INTERVAL_AUTO:
  209. auto_mode = true;
  210. break;
  211. case GUARD_INTERVAL_1_32:
  212. break;
  213. case GUARD_INTERVAL_1_16:
  214. buf[0] |= (1 << 2);
  215. break;
  216. case GUARD_INTERVAL_1_8:
  217. buf[0] |= (2 << 2);
  218. break;
  219. case GUARD_INTERVAL_1_4:
  220. buf[0] |= (3 << 2);
  221. break;
  222. default:
  223. dev_dbg(&client->dev, "invalid guard_interval\n");
  224. auto_mode = true;
  225. }
  226. switch (c->hierarchy) {
  227. case HIERARCHY_AUTO:
  228. auto_mode = true;
  229. break;
  230. case HIERARCHY_NONE:
  231. break;
  232. case HIERARCHY_1:
  233. buf[0] |= (1 << 4);
  234. break;
  235. case HIERARCHY_2:
  236. buf[0] |= (2 << 4);
  237. break;
  238. case HIERARCHY_4:
  239. buf[0] |= (3 << 4);
  240. break;
  241. default:
  242. dev_dbg(&client->dev, "invalid hierarchy\n");
  243. auto_mode = true;
  244. }
  245. switch (c->modulation) {
  246. case QAM_AUTO:
  247. auto_mode = true;
  248. break;
  249. case QPSK:
  250. break;
  251. case QAM_16:
  252. buf[1] |= (1 << 6);
  253. break;
  254. case QAM_64:
  255. buf[1] |= (2 << 6);
  256. break;
  257. default:
  258. dev_dbg(&client->dev, "invalid modulation\n");
  259. auto_mode = true;
  260. }
  261. /* Use HP. How and which case we can switch to LP? */
  262. buf[1] |= (1 << 4);
  263. switch (c->code_rate_HP) {
  264. case FEC_AUTO:
  265. auto_mode = true;
  266. break;
  267. case FEC_1_2:
  268. break;
  269. case FEC_2_3:
  270. buf[2] |= (1 << 0);
  271. break;
  272. case FEC_3_4:
  273. buf[2] |= (2 << 0);
  274. break;
  275. case FEC_5_6:
  276. buf[2] |= (3 << 0);
  277. break;
  278. case FEC_7_8:
  279. buf[2] |= (4 << 0);
  280. break;
  281. default:
  282. dev_dbg(&client->dev, "invalid code_rate_HP\n");
  283. auto_mode = true;
  284. }
  285. switch (c->code_rate_LP) {
  286. case FEC_AUTO:
  287. auto_mode = true;
  288. break;
  289. case FEC_1_2:
  290. break;
  291. case FEC_2_3:
  292. buf[2] |= (1 << 3);
  293. break;
  294. case FEC_3_4:
  295. buf[2] |= (2 << 3);
  296. break;
  297. case FEC_5_6:
  298. buf[2] |= (3 << 3);
  299. break;
  300. case FEC_7_8:
  301. buf[2] |= (4 << 3);
  302. break;
  303. case FEC_NONE:
  304. break;
  305. default:
  306. dev_dbg(&client->dev, "invalid code_rate_LP\n");
  307. auto_mode = true;
  308. }
  309. switch (c->bandwidth_hz) {
  310. case 6000000:
  311. break;
  312. case 7000000:
  313. buf[1] |= (1 << 2);
  314. break;
  315. case 8000000:
  316. buf[1] |= (2 << 2);
  317. break;
  318. default:
  319. dev_dbg(&client->dev, "invalid bandwidth_hz\n");
  320. ret = -EINVAL;
  321. goto err;
  322. }
  323. ret = regmap_bulk_write(state->regmap, 0xd3c0, buf, 3);
  324. if (ret)
  325. goto err;
  326. if (auto_mode) {
  327. /* clear easy mode flag */
  328. ret = regmap_write(state->regmap, 0xaefd, 0x00);
  329. if (ret)
  330. goto err;
  331. dev_dbg(&client->dev, "auto params\n");
  332. } else {
  333. /* set easy mode flag */
  334. ret = regmap_write(state->regmap, 0xaefd, 0x01);
  335. if (ret)
  336. goto err;
  337. ret = regmap_write(state->regmap, 0xaefe, 0x00);
  338. if (ret)
  339. goto err;
  340. dev_dbg(&client->dev, "manual params\n");
  341. }
  342. /* Reset FSM */
  343. ret = regmap_write(state->regmap, 0xffff, 0x00);
  344. if (ret)
  345. goto err;
  346. state->bandwidth_hz = c->bandwidth_hz;
  347. state->set_frontend_jiffies = jiffies;
  348. state->first_tune = false;
  349. return 0;
  350. err:
  351. dev_dbg(&client->dev, "failed %d\n", ret);
  352. return ret;
  353. }
  354. static int af9013_get_frontend(struct dvb_frontend *fe,
  355. struct dtv_frontend_properties *c)
  356. {
  357. struct af9013_state *state = fe->demodulator_priv;
  358. struct i2c_client *client = state->client;
  359. int ret;
  360. u8 buf[3];
  361. dev_dbg(&client->dev, "\n");
  362. ret = regmap_bulk_read(state->regmap, 0xd3c0, buf, 3);
  363. if (ret)
  364. goto err;
  365. switch ((buf[1] >> 6) & 3) {
  366. case 0:
  367. c->modulation = QPSK;
  368. break;
  369. case 1:
  370. c->modulation = QAM_16;
  371. break;
  372. case 2:
  373. c->modulation = QAM_64;
  374. break;
  375. }
  376. switch ((buf[0] >> 0) & 3) {
  377. case 0:
  378. c->transmission_mode = TRANSMISSION_MODE_2K;
  379. break;
  380. case 1:
  381. c->transmission_mode = TRANSMISSION_MODE_8K;
  382. }
  383. switch ((buf[0] >> 2) & 3) {
  384. case 0:
  385. c->guard_interval = GUARD_INTERVAL_1_32;
  386. break;
  387. case 1:
  388. c->guard_interval = GUARD_INTERVAL_1_16;
  389. break;
  390. case 2:
  391. c->guard_interval = GUARD_INTERVAL_1_8;
  392. break;
  393. case 3:
  394. c->guard_interval = GUARD_INTERVAL_1_4;
  395. break;
  396. }
  397. switch ((buf[0] >> 4) & 7) {
  398. case 0:
  399. c->hierarchy = HIERARCHY_NONE;
  400. break;
  401. case 1:
  402. c->hierarchy = HIERARCHY_1;
  403. break;
  404. case 2:
  405. c->hierarchy = HIERARCHY_2;
  406. break;
  407. case 3:
  408. c->hierarchy = HIERARCHY_4;
  409. break;
  410. }
  411. switch ((buf[2] >> 0) & 7) {
  412. case 0:
  413. c->code_rate_HP = FEC_1_2;
  414. break;
  415. case 1:
  416. c->code_rate_HP = FEC_2_3;
  417. break;
  418. case 2:
  419. c->code_rate_HP = FEC_3_4;
  420. break;
  421. case 3:
  422. c->code_rate_HP = FEC_5_6;
  423. break;
  424. case 4:
  425. c->code_rate_HP = FEC_7_8;
  426. break;
  427. }
  428. switch ((buf[2] >> 3) & 7) {
  429. case 0:
  430. c->code_rate_LP = FEC_1_2;
  431. break;
  432. case 1:
  433. c->code_rate_LP = FEC_2_3;
  434. break;
  435. case 2:
  436. c->code_rate_LP = FEC_3_4;
  437. break;
  438. case 3:
  439. c->code_rate_LP = FEC_5_6;
  440. break;
  441. case 4:
  442. c->code_rate_LP = FEC_7_8;
  443. break;
  444. }
  445. switch ((buf[1] >> 2) & 3) {
  446. case 0:
  447. c->bandwidth_hz = 6000000;
  448. break;
  449. case 1:
  450. c->bandwidth_hz = 7000000;
  451. break;
  452. case 2:
  453. c->bandwidth_hz = 8000000;
  454. break;
  455. }
  456. return 0;
  457. err:
  458. dev_dbg(&client->dev, "failed %d\n", ret);
  459. return ret;
  460. }
  461. static int af9013_read_status(struct dvb_frontend *fe, enum fe_status *status)
  462. {
  463. struct af9013_state *state = fe->demodulator_priv;
  464. struct i2c_client *client = state->client;
  465. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  466. int ret, stmp1;
  467. unsigned int utmp, utmp1, utmp2, utmp3, utmp4;
  468. u8 buf[7];
  469. dev_dbg(&client->dev, "\n");
  470. /*
  471. * Return status from the cache if it is younger than 2000ms with the
  472. * exception of last tune is done during 4000ms.
  473. */
  474. if (time_is_after_jiffies(state->read_status_jiffies + msecs_to_jiffies(2000)) &&
  475. time_is_before_jiffies(state->set_frontend_jiffies + msecs_to_jiffies(4000))) {
  476. *status = state->fe_status;
  477. } else {
  478. /* MPEG2 lock */
  479. ret = regmap_read(state->regmap, 0xd507, &utmp);
  480. if (ret)
  481. goto err;
  482. if ((utmp >> 6) & 0x01) {
  483. utmp1 = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  484. FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
  485. } else {
  486. /* TPS lock */
  487. ret = regmap_read(state->regmap, 0xd330, &utmp);
  488. if (ret)
  489. goto err;
  490. if ((utmp >> 3) & 0x01)
  491. utmp1 = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  492. FE_HAS_VITERBI;
  493. else
  494. utmp1 = 0;
  495. }
  496. dev_dbg(&client->dev, "fe_status %02x\n", utmp1);
  497. state->read_status_jiffies = jiffies;
  498. state->fe_status = utmp1;
  499. *status = utmp1;
  500. }
  501. /* Signal strength */
  502. switch (state->strength_en) {
  503. case 0:
  504. /* Check if we support signal strength */
  505. ret = regmap_read(state->regmap, 0x9bee, &utmp);
  506. if (ret)
  507. goto err;
  508. if ((utmp >> 0) & 0x01) {
  509. /* Read agc values for signal strength estimation */
  510. ret = regmap_read(state->regmap, 0x9bbd, &utmp1);
  511. if (ret)
  512. goto err;
  513. ret = regmap_read(state->regmap, 0x9bd0, &utmp2);
  514. if (ret)
  515. goto err;
  516. ret = regmap_read(state->regmap, 0x9be2, &utmp3);
  517. if (ret)
  518. goto err;
  519. ret = regmap_read(state->regmap, 0x9be4, &utmp4);
  520. if (ret)
  521. goto err;
  522. state->rf_agc_50 = utmp1;
  523. state->rf_agc_80 = utmp2;
  524. state->if_agc_50 = utmp3;
  525. state->if_agc_80 = utmp4;
  526. dev_dbg(&client->dev,
  527. "rf_agc_50 %u, rf_agc_80 %u, if_agc_50 %u, if_agc_80 %u\n",
  528. utmp1, utmp2, utmp3, utmp4);
  529. state->strength_en = 1;
  530. } else {
  531. /* Signal strength is not supported */
  532. state->strength_en = 2;
  533. break;
  534. }
  535. /* Fall through */
  536. case 1:
  537. if (time_is_after_jiffies(state->strength_jiffies + msecs_to_jiffies(2000)))
  538. break;
  539. /* Read value */
  540. ret = regmap_bulk_read(state->regmap, 0xd07c, buf, 2);
  541. if (ret)
  542. goto err;
  543. /*
  544. * Construct line equation from tuner dependent -80/-50 dBm agc
  545. * limits and use it to map current agc value to dBm estimate
  546. */
  547. #define agc_gain (buf[0] + buf[1])
  548. #define agc_gain_50dbm (state->rf_agc_50 + state->if_agc_50)
  549. #define agc_gain_80dbm (state->rf_agc_80 + state->if_agc_80)
  550. stmp1 = 30000 * (agc_gain - agc_gain_80dbm) /
  551. (agc_gain_50dbm - agc_gain_80dbm) - 80000;
  552. dev_dbg(&client->dev,
  553. "strength %d, agc_gain %d, agc_gain_50dbm %d, agc_gain_80dbm %d\n",
  554. stmp1, agc_gain, agc_gain_50dbm, agc_gain_80dbm);
  555. state->strength_jiffies = jiffies;
  556. /* Convert [-90, -30] dBm to [0x0000, 0xffff] for dvbv3 */
  557. utmp1 = clamp(stmp1 + 90000, 0, 60000);
  558. state->dvbv3_strength = div_u64((u64)utmp1 * 0xffff, 60000);
  559. c->strength.stat[0].scale = FE_SCALE_DECIBEL;
  560. c->strength.stat[0].svalue = stmp1;
  561. break;
  562. default:
  563. c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  564. break;
  565. }
  566. /* CNR */
  567. switch (state->fe_status & FE_HAS_VITERBI) {
  568. case FE_HAS_VITERBI:
  569. if (time_is_after_jiffies(state->cnr_jiffies + msecs_to_jiffies(2000)))
  570. break;
  571. /* Check if cnr ready */
  572. ret = regmap_read(state->regmap, 0xd2e1, &utmp);
  573. if (ret)
  574. goto err;
  575. if (!((utmp >> 3) & 0x01)) {
  576. dev_dbg(&client->dev, "cnr not ready\n");
  577. break;
  578. }
  579. /* Read value */
  580. ret = regmap_bulk_read(state->regmap, 0xd2e3, buf, 3);
  581. if (ret)
  582. goto err;
  583. utmp1 = buf[2] << 16 | buf[1] << 8 | buf[0] << 0;
  584. /* Read current modulation */
  585. ret = regmap_read(state->regmap, 0xd3c1, &utmp);
  586. if (ret)
  587. goto err;
  588. switch ((utmp >> 6) & 3) {
  589. case 0:
  590. /*
  591. * QPSK
  592. * CNR[dB] 13 * -log10((1690000 - value) / value) + 2.6
  593. * value [653799, 1689999], 2.6 / 13 = 3355443
  594. */
  595. utmp1 = clamp(utmp1, 653799U, 1689999U);
  596. utmp1 = ((u64)(intlog10(utmp1)
  597. - intlog10(1690000 - utmp1)
  598. + 3355443) * 13 * 1000) >> 24;
  599. break;
  600. case 1:
  601. /*
  602. * QAM-16
  603. * CNR[dB] 6 * log10((value - 370000) / (828000 - value)) + 15.7
  604. * value [371105, 827999], 15.7 / 6 = 43900382
  605. */
  606. utmp1 = clamp(utmp1, 371105U, 827999U);
  607. utmp1 = ((u64)(intlog10(utmp1 - 370000)
  608. - intlog10(828000 - utmp1)
  609. + 43900382) * 6 * 1000) >> 24;
  610. break;
  611. case 2:
  612. /*
  613. * QAM-64
  614. * CNR[dB] 8 * log10((value - 193000) / (425000 - value)) + 23.8
  615. * value [193246, 424999], 23.8 / 8 = 49912218
  616. */
  617. utmp1 = clamp(utmp1, 193246U, 424999U);
  618. utmp1 = ((u64)(intlog10(utmp1 - 193000)
  619. - intlog10(425000 - utmp1)
  620. + 49912218) * 8 * 1000) >> 24;
  621. break;
  622. default:
  623. dev_dbg(&client->dev, "invalid modulation %u\n",
  624. (utmp >> 6) & 3);
  625. utmp1 = 0;
  626. break;
  627. }
  628. dev_dbg(&client->dev, "cnr %u\n", utmp1);
  629. state->cnr_jiffies = jiffies;
  630. state->dvbv3_snr = utmp1 / 100;
  631. c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
  632. c->cnr.stat[0].svalue = utmp1;
  633. break;
  634. default:
  635. c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  636. break;
  637. }
  638. /* BER / PER */
  639. switch (state->fe_status & FE_HAS_SYNC) {
  640. case FE_HAS_SYNC:
  641. if (time_is_after_jiffies(state->ber_ucb_jiffies + msecs_to_jiffies(2000)))
  642. break;
  643. /* Check if ber / ucb is ready */
  644. ret = regmap_read(state->regmap, 0xd391, &utmp);
  645. if (ret)
  646. goto err;
  647. if (!((utmp >> 4) & 0x01)) {
  648. dev_dbg(&client->dev, "ber not ready\n");
  649. break;
  650. }
  651. /* Read value */
  652. ret = regmap_bulk_read(state->regmap, 0xd385, buf, 7);
  653. if (ret)
  654. goto err;
  655. utmp1 = buf[4] << 16 | buf[3] << 8 | buf[2] << 0;
  656. utmp2 = (buf[1] << 8 | buf[0] << 0) * 204 * 8;
  657. utmp3 = buf[6] << 8 | buf[5] << 0;
  658. utmp4 = buf[1] << 8 | buf[0] << 0;
  659. /* Use 10000 TS packets for measure */
  660. if (utmp4 != 10000) {
  661. buf[0] = (10000 >> 0) & 0xff;
  662. buf[1] = (10000 >> 8) & 0xff;
  663. ret = regmap_bulk_write(state->regmap, 0xd385, buf, 2);
  664. if (ret)
  665. goto err;
  666. }
  667. /* Reset ber / ucb counter */
  668. ret = regmap_update_bits(state->regmap, 0xd391, 0x20, 0x20);
  669. if (ret)
  670. goto err;
  671. dev_dbg(&client->dev, "post_bit_error %u, post_bit_count %u\n",
  672. utmp1, utmp2);
  673. dev_dbg(&client->dev, "block_error %u, block_count %u\n",
  674. utmp3, utmp4);
  675. state->ber_ucb_jiffies = jiffies;
  676. state->dvbv3_ber = utmp1;
  677. state->dvbv3_ucblocks += utmp3;
  678. c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
  679. c->post_bit_error.stat[0].uvalue += utmp1;
  680. c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
  681. c->post_bit_count.stat[0].uvalue += utmp2;
  682. c->block_error.stat[0].scale = FE_SCALE_COUNTER;
  683. c->block_error.stat[0].uvalue += utmp3;
  684. c->block_count.stat[0].scale = FE_SCALE_COUNTER;
  685. c->block_count.stat[0].uvalue += utmp4;
  686. break;
  687. default:
  688. c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  689. c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  690. c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  691. c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  692. break;
  693. }
  694. return 0;
  695. err:
  696. dev_dbg(&client->dev, "failed %d\n", ret);
  697. return ret;
  698. }
  699. static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr)
  700. {
  701. struct af9013_state *state = fe->demodulator_priv;
  702. *snr = state->dvbv3_snr;
  703. return 0;
  704. }
  705. static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
  706. {
  707. struct af9013_state *state = fe->demodulator_priv;
  708. *strength = state->dvbv3_strength;
  709. return 0;
  710. }
  711. static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber)
  712. {
  713. struct af9013_state *state = fe->demodulator_priv;
  714. *ber = state->dvbv3_ber;
  715. return 0;
  716. }
  717. static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  718. {
  719. struct af9013_state *state = fe->demodulator_priv;
  720. *ucblocks = state->dvbv3_ucblocks;
  721. return 0;
  722. }
  723. static int af9013_init(struct dvb_frontend *fe)
  724. {
  725. struct af9013_state *state = fe->demodulator_priv;
  726. struct i2c_client *client = state->client;
  727. int ret, i, len;
  728. unsigned int utmp;
  729. u8 buf[3];
  730. const struct af9013_reg_mask_val *tab;
  731. dev_dbg(&client->dev, "\n");
  732. /* ADC on */
  733. ret = regmap_update_bits(state->regmap, 0xd73a, 0x08, 0x00);
  734. if (ret)
  735. goto err;
  736. /* Clear reset */
  737. ret = regmap_update_bits(state->regmap, 0xd417, 0x02, 0x00);
  738. if (ret)
  739. goto err;
  740. /* Disable reset */
  741. ret = regmap_update_bits(state->regmap, 0xd417, 0x10, 0x00);
  742. if (ret)
  743. goto err;
  744. /* write API version to firmware */
  745. ret = regmap_bulk_write(state->regmap, 0x9bf2, state->api_version, 4);
  746. if (ret)
  747. goto err;
  748. /* program ADC control */
  749. switch (state->clk) {
  750. case 28800000: /* 28.800 MHz */
  751. utmp = 0;
  752. break;
  753. case 20480000: /* 20.480 MHz */
  754. utmp = 1;
  755. break;
  756. case 28000000: /* 28.000 MHz */
  757. utmp = 2;
  758. break;
  759. case 25000000: /* 25.000 MHz */
  760. utmp = 3;
  761. break;
  762. default:
  763. ret = -EINVAL;
  764. goto err;
  765. }
  766. ret = regmap_update_bits(state->regmap, 0x9bd2, 0x0f, utmp);
  767. if (ret)
  768. goto err;
  769. utmp = div_u64((u64)state->clk * 0x80000, 1000000);
  770. buf[0] = (utmp >> 0) & 0xff;
  771. buf[1] = (utmp >> 8) & 0xff;
  772. buf[2] = (utmp >> 16) & 0xff;
  773. ret = regmap_bulk_write(state->regmap, 0xd180, buf, 3);
  774. if (ret)
  775. goto err;
  776. /* Demod core settings */
  777. dev_dbg(&client->dev, "load demod core settings\n");
  778. len = ARRAY_SIZE(demod_init_tab);
  779. tab = demod_init_tab;
  780. for (i = 0; i < len; i++) {
  781. ret = regmap_update_bits(state->regmap, tab[i].reg, tab[i].mask,
  782. tab[i].val);
  783. if (ret)
  784. goto err;
  785. }
  786. /* Demod tuner specific settings */
  787. dev_dbg(&client->dev, "load tuner specific settings\n");
  788. switch (state->tuner) {
  789. case AF9013_TUNER_MXL5003D:
  790. len = ARRAY_SIZE(tuner_init_tab_mxl5003d);
  791. tab = tuner_init_tab_mxl5003d;
  792. break;
  793. case AF9013_TUNER_MXL5005D:
  794. case AF9013_TUNER_MXL5005R:
  795. case AF9013_TUNER_MXL5007T:
  796. len = ARRAY_SIZE(tuner_init_tab_mxl5005);
  797. tab = tuner_init_tab_mxl5005;
  798. break;
  799. case AF9013_TUNER_ENV77H11D5:
  800. len = ARRAY_SIZE(tuner_init_tab_env77h11d5);
  801. tab = tuner_init_tab_env77h11d5;
  802. break;
  803. case AF9013_TUNER_MT2060:
  804. len = ARRAY_SIZE(tuner_init_tab_mt2060);
  805. tab = tuner_init_tab_mt2060;
  806. break;
  807. case AF9013_TUNER_MC44S803:
  808. len = ARRAY_SIZE(tuner_init_tab_mc44s803);
  809. tab = tuner_init_tab_mc44s803;
  810. break;
  811. case AF9013_TUNER_QT1010:
  812. case AF9013_TUNER_QT1010A:
  813. len = ARRAY_SIZE(tuner_init_tab_qt1010);
  814. tab = tuner_init_tab_qt1010;
  815. break;
  816. case AF9013_TUNER_MT2060_2:
  817. len = ARRAY_SIZE(tuner_init_tab_mt2060_2);
  818. tab = tuner_init_tab_mt2060_2;
  819. break;
  820. case AF9013_TUNER_TDA18271:
  821. case AF9013_TUNER_TDA18218:
  822. len = ARRAY_SIZE(tuner_init_tab_tda18271);
  823. tab = tuner_init_tab_tda18271;
  824. break;
  825. case AF9013_TUNER_UNKNOWN:
  826. default:
  827. len = ARRAY_SIZE(tuner_init_tab_unknown);
  828. tab = tuner_init_tab_unknown;
  829. break;
  830. }
  831. for (i = 0; i < len; i++) {
  832. ret = regmap_update_bits(state->regmap, tab[i].reg, tab[i].mask,
  833. tab[i].val);
  834. if (ret)
  835. goto err;
  836. }
  837. /* TS interface */
  838. if (state->ts_output_pin == 7)
  839. utmp = 1 << 3 | state->ts_mode << 1;
  840. else
  841. utmp = 0 << 3 | state->ts_mode << 1;
  842. ret = regmap_update_bits(state->regmap, 0xd500, 0x0e, utmp);
  843. if (ret)
  844. goto err;
  845. /* enable lock led */
  846. ret = regmap_update_bits(state->regmap, 0xd730, 0x01, 0x01);
  847. if (ret)
  848. goto err;
  849. state->first_tune = true;
  850. return 0;
  851. err:
  852. dev_dbg(&client->dev, "failed %d\n", ret);
  853. return ret;
  854. }
  855. static int af9013_sleep(struct dvb_frontend *fe)
  856. {
  857. struct af9013_state *state = fe->demodulator_priv;
  858. struct i2c_client *client = state->client;
  859. int ret;
  860. unsigned int utmp;
  861. dev_dbg(&client->dev, "\n");
  862. /* disable lock led */
  863. ret = regmap_update_bits(state->regmap, 0xd730, 0x01, 0x00);
  864. if (ret)
  865. goto err;
  866. /* Enable reset */
  867. ret = regmap_update_bits(state->regmap, 0xd417, 0x10, 0x10);
  868. if (ret)
  869. goto err;
  870. /* Start reset execution */
  871. ret = regmap_write(state->regmap, 0xaeff, 0x01);
  872. if (ret)
  873. goto err;
  874. /* Wait reset performs */
  875. ret = regmap_read_poll_timeout(state->regmap, 0xd417, utmp,
  876. (utmp >> 1) & 0x01, 5000, 1000000);
  877. if (ret)
  878. goto err;
  879. if (!((utmp >> 1) & 0x01)) {
  880. ret = -ETIMEDOUT;
  881. goto err;
  882. }
  883. /* ADC off */
  884. ret = regmap_update_bits(state->regmap, 0xd73a, 0x08, 0x08);
  885. if (ret)
  886. goto err;
  887. return 0;
  888. err:
  889. dev_dbg(&client->dev, "failed %d\n", ret);
  890. return ret;
  891. }
  892. static const struct dvb_frontend_ops af9013_ops;
  893. static int af9013_download_firmware(struct af9013_state *state)
  894. {
  895. struct i2c_client *client = state->client;
  896. int ret, i, len, rem;
  897. unsigned int utmp;
  898. u8 buf[4];
  899. u16 checksum = 0;
  900. const struct firmware *firmware;
  901. const char *name = AF9013_FIRMWARE;
  902. dev_dbg(&client->dev, "\n");
  903. /* Check whether firmware is already running */
  904. ret = regmap_read(state->regmap, 0x98be, &utmp);
  905. if (ret)
  906. goto err;
  907. dev_dbg(&client->dev, "firmware status %02x\n", utmp);
  908. if (utmp == 0x0c)
  909. return 0;
  910. dev_info(&client->dev, "found a '%s' in cold state, will try to load a firmware\n",
  911. af9013_ops.info.name);
  912. /* Request the firmware, will block and timeout */
  913. ret = request_firmware(&firmware, name, &client->dev);
  914. if (ret)
  915. goto err;
  916. /* Write firmware checksum & size */
  917. for (i = 0; i < firmware->size; i++)
  918. checksum += firmware->data[i];
  919. buf[0] = (checksum >> 8) & 0xff;
  920. buf[1] = (checksum >> 0) & 0xff;
  921. buf[2] = (firmware->size >> 8) & 0xff;
  922. buf[3] = (firmware->size >> 0) & 0xff;
  923. ret = regmap_bulk_write(state->regmap, 0x50fc, buf, 4);
  924. if (ret)
  925. goto err_release_firmware;
  926. /* Download firmware */
  927. #define LEN_MAX 16
  928. for (rem = firmware->size; rem > 0; rem -= LEN_MAX) {
  929. len = min(LEN_MAX, rem);
  930. ret = regmap_bulk_write(state->regmap,
  931. 0x5100 + firmware->size - rem,
  932. &firmware->data[firmware->size - rem],
  933. len);
  934. if (ret) {
  935. dev_err(&client->dev, "firmware download failed %d\n",
  936. ret);
  937. goto err_release_firmware;
  938. }
  939. }
  940. release_firmware(firmware);
  941. /* Boot firmware */
  942. ret = regmap_write(state->regmap, 0xe205, 0x01);
  943. if (ret)
  944. goto err;
  945. /* Check firmware status. 0c=OK, 04=fail */
  946. ret = regmap_read_poll_timeout(state->regmap, 0x98be, utmp,
  947. (utmp == 0x0c || utmp == 0x04),
  948. 5000, 1000000);
  949. if (ret)
  950. goto err;
  951. dev_dbg(&client->dev, "firmware status %02x\n", utmp);
  952. if (utmp == 0x04) {
  953. ret = -ENODEV;
  954. dev_err(&client->dev, "firmware did not run\n");
  955. goto err;
  956. } else if (utmp != 0x0c) {
  957. ret = -ENODEV;
  958. dev_err(&client->dev, "firmware boot timeout\n");
  959. goto err;
  960. }
  961. dev_info(&client->dev, "found a '%s' in warm state\n",
  962. af9013_ops.info.name);
  963. return 0;
  964. err_release_firmware:
  965. release_firmware(firmware);
  966. err:
  967. dev_dbg(&client->dev, "failed %d\n", ret);
  968. return ret;
  969. }
  970. static const struct dvb_frontend_ops af9013_ops = {
  971. .delsys = { SYS_DVBT },
  972. .info = {
  973. .name = "Afatech AF9013",
  974. .frequency_min_hz = 174 * MHz,
  975. .frequency_max_hz = 862 * MHz,
  976. .frequency_stepsize_hz = 250 * kHz,
  977. .caps = FE_CAN_FEC_1_2 |
  978. FE_CAN_FEC_2_3 |
  979. FE_CAN_FEC_3_4 |
  980. FE_CAN_FEC_5_6 |
  981. FE_CAN_FEC_7_8 |
  982. FE_CAN_FEC_AUTO |
  983. FE_CAN_QPSK |
  984. FE_CAN_QAM_16 |
  985. FE_CAN_QAM_64 |
  986. FE_CAN_QAM_AUTO |
  987. FE_CAN_TRANSMISSION_MODE_AUTO |
  988. FE_CAN_GUARD_INTERVAL_AUTO |
  989. FE_CAN_HIERARCHY_AUTO |
  990. FE_CAN_RECOVER |
  991. FE_CAN_MUTE_TS
  992. },
  993. .init = af9013_init,
  994. .sleep = af9013_sleep,
  995. .get_tune_settings = af9013_get_tune_settings,
  996. .set_frontend = af9013_set_frontend,
  997. .get_frontend = af9013_get_frontend,
  998. .read_status = af9013_read_status,
  999. .read_snr = af9013_read_snr,
  1000. .read_signal_strength = af9013_read_signal_strength,
  1001. .read_ber = af9013_read_ber,
  1002. .read_ucblocks = af9013_read_ucblocks,
  1003. };
  1004. static int af9013_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
  1005. {
  1006. struct af9013_state *state = fe->demodulator_priv;
  1007. struct i2c_client *client = state->client;
  1008. int ret;
  1009. dev_dbg(&client->dev, "onoff %d\n", onoff);
  1010. ret = regmap_update_bits(state->regmap, 0xd503, 0x01, onoff);
  1011. if (ret)
  1012. goto err;
  1013. return 0;
  1014. err:
  1015. dev_dbg(&client->dev, "failed %d\n", ret);
  1016. return ret;
  1017. }
  1018. static int af9013_pid_filter(struct dvb_frontend *fe, u8 index, u16 pid,
  1019. int onoff)
  1020. {
  1021. struct af9013_state *state = fe->demodulator_priv;
  1022. struct i2c_client *client = state->client;
  1023. int ret;
  1024. u8 buf[2];
  1025. dev_dbg(&client->dev, "index %d, pid %04x, onoff %d\n",
  1026. index, pid, onoff);
  1027. if (pid > 0x1fff) {
  1028. /* 0x2000 is kernel virtual pid for whole ts (all pids) */
  1029. ret = 0;
  1030. goto err;
  1031. }
  1032. buf[0] = (pid >> 0) & 0xff;
  1033. buf[1] = (pid >> 8) & 0xff;
  1034. ret = regmap_bulk_write(state->regmap, 0xd505, buf, 2);
  1035. if (ret)
  1036. goto err;
  1037. ret = regmap_write(state->regmap, 0xd504, onoff << 5 | index << 0);
  1038. if (ret)
  1039. goto err;
  1040. return 0;
  1041. err:
  1042. dev_dbg(&client->dev, "failed %d\n", ret);
  1043. return ret;
  1044. }
  1045. static struct dvb_frontend *af9013_get_dvb_frontend(struct i2c_client *client)
  1046. {
  1047. struct af9013_state *state = i2c_get_clientdata(client);
  1048. dev_dbg(&client->dev, "\n");
  1049. return &state->fe;
  1050. }
  1051. static struct i2c_adapter *af9013_get_i2c_adapter(struct i2c_client *client)
  1052. {
  1053. struct af9013_state *state = i2c_get_clientdata(client);
  1054. dev_dbg(&client->dev, "\n");
  1055. return state->muxc->adapter[0];
  1056. }
  1057. /*
  1058. * XXX: Hackish solution. We use virtual register, reg bit 16, to carry info
  1059. * about i2c adapter locking. Own locking is needed because i2c mux call has
  1060. * already locked i2c adapter.
  1061. */
  1062. static int af9013_select(struct i2c_mux_core *muxc, u32 chan)
  1063. {
  1064. struct af9013_state *state = i2c_mux_priv(muxc);
  1065. struct i2c_client *client = state->client;
  1066. int ret;
  1067. dev_dbg(&client->dev, "\n");
  1068. if (state->ts_mode == AF9013_TS_MODE_USB)
  1069. ret = regmap_update_bits(state->regmap, 0x1d417, 0x08, 0x08);
  1070. else
  1071. ret = regmap_update_bits(state->regmap, 0x1d607, 0x04, 0x04);
  1072. if (ret)
  1073. goto err;
  1074. return 0;
  1075. err:
  1076. dev_dbg(&client->dev, "failed %d\n", ret);
  1077. return ret;
  1078. }
  1079. static int af9013_deselect(struct i2c_mux_core *muxc, u32 chan)
  1080. {
  1081. struct af9013_state *state = i2c_mux_priv(muxc);
  1082. struct i2c_client *client = state->client;
  1083. int ret;
  1084. dev_dbg(&client->dev, "\n");
  1085. if (state->ts_mode == AF9013_TS_MODE_USB)
  1086. ret = regmap_update_bits(state->regmap, 0x1d417, 0x08, 0x00);
  1087. else
  1088. ret = regmap_update_bits(state->regmap, 0x1d607, 0x04, 0x00);
  1089. if (ret)
  1090. goto err;
  1091. return 0;
  1092. err:
  1093. dev_dbg(&client->dev, "failed %d\n", ret);
  1094. return ret;
  1095. }
  1096. /* Own I2C access routines needed for regmap as chip uses extra command byte */
  1097. static int af9013_wregs(struct i2c_client *client, u8 cmd, u16 reg,
  1098. const u8 *val, int len, u8 lock)
  1099. {
  1100. int ret;
  1101. u8 buf[21];
  1102. struct i2c_msg msg[1] = {
  1103. {
  1104. .addr = client->addr,
  1105. .flags = 0,
  1106. .len = 3 + len,
  1107. .buf = buf,
  1108. }
  1109. };
  1110. if (3 + len > sizeof(buf)) {
  1111. ret = -EINVAL;
  1112. goto err;
  1113. }
  1114. buf[0] = (reg >> 8) & 0xff;
  1115. buf[1] = (reg >> 0) & 0xff;
  1116. buf[2] = cmd;
  1117. memcpy(&buf[3], val, len);
  1118. if (lock)
  1119. i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
  1120. ret = __i2c_transfer(client->adapter, msg, 1);
  1121. if (lock)
  1122. i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
  1123. if (ret < 0) {
  1124. goto err;
  1125. } else if (ret != 1) {
  1126. ret = -EREMOTEIO;
  1127. goto err;
  1128. }
  1129. return 0;
  1130. err:
  1131. dev_dbg(&client->dev, "failed %d\n", ret);
  1132. return ret;
  1133. }
  1134. static int af9013_rregs(struct i2c_client *client, u8 cmd, u16 reg,
  1135. u8 *val, int len, u8 lock)
  1136. {
  1137. int ret;
  1138. u8 buf[3];
  1139. struct i2c_msg msg[2] = {
  1140. {
  1141. .addr = client->addr,
  1142. .flags = 0,
  1143. .len = 3,
  1144. .buf = buf,
  1145. }, {
  1146. .addr = client->addr,
  1147. .flags = I2C_M_RD,
  1148. .len = len,
  1149. .buf = val,
  1150. }
  1151. };
  1152. buf[0] = (reg >> 8) & 0xff;
  1153. buf[1] = (reg >> 0) & 0xff;
  1154. buf[2] = cmd;
  1155. if (lock)
  1156. i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
  1157. ret = __i2c_transfer(client->adapter, msg, 2);
  1158. if (lock)
  1159. i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
  1160. if (ret < 0) {
  1161. goto err;
  1162. } else if (ret != 2) {
  1163. ret = -EREMOTEIO;
  1164. goto err;
  1165. }
  1166. return 0;
  1167. err:
  1168. dev_dbg(&client->dev, "failed %d\n", ret);
  1169. return ret;
  1170. }
  1171. static int af9013_regmap_write(void *context, const void *data, size_t count)
  1172. {
  1173. struct i2c_client *client = context;
  1174. struct af9013_state *state = i2c_get_clientdata(client);
  1175. int ret, i;
  1176. u8 cmd;
  1177. u8 lock = !((u8 *)data)[0];
  1178. u16 reg = ((u8 *)data)[1] << 8 | ((u8 *)data)[2] << 0;
  1179. u8 *val = &((u8 *)data)[3];
  1180. const unsigned int len = count - 3;
  1181. if (state->ts_mode == AF9013_TS_MODE_USB && (reg & 0xff00) != 0xae00) {
  1182. cmd = 0 << 7|0 << 6|(len - 1) << 2|1 << 1|1 << 0;
  1183. ret = af9013_wregs(client, cmd, reg, val, len, lock);
  1184. if (ret)
  1185. goto err;
  1186. } else if (reg >= 0x5100 && reg < 0x8fff) {
  1187. /* Firmware download */
  1188. cmd = 1 << 7|1 << 6|(len - 1) << 2|1 << 1|1 << 0;
  1189. ret = af9013_wregs(client, cmd, reg, val, len, lock);
  1190. if (ret)
  1191. goto err;
  1192. } else {
  1193. cmd = 0 << 7|0 << 6|(1 - 1) << 2|1 << 1|1 << 0;
  1194. for (i = 0; i < len; i++) {
  1195. ret = af9013_wregs(client, cmd, reg + i, val + i, 1,
  1196. lock);
  1197. if (ret)
  1198. goto err;
  1199. }
  1200. }
  1201. return 0;
  1202. err:
  1203. dev_dbg(&client->dev, "failed %d\n", ret);
  1204. return ret;
  1205. }
  1206. static int af9013_regmap_read(void *context, const void *reg_buf,
  1207. size_t reg_size, void *val_buf, size_t val_size)
  1208. {
  1209. struct i2c_client *client = context;
  1210. struct af9013_state *state = i2c_get_clientdata(client);
  1211. int ret, i;
  1212. u8 cmd;
  1213. u8 lock = !((u8 *)reg_buf)[0];
  1214. u16 reg = ((u8 *)reg_buf)[1] << 8 | ((u8 *)reg_buf)[2] << 0;
  1215. u8 *val = &((u8 *)val_buf)[0];
  1216. const unsigned int len = val_size;
  1217. if (state->ts_mode == AF9013_TS_MODE_USB && (reg & 0xff00) != 0xae00) {
  1218. cmd = 0 << 7|0 << 6|(len - 1) << 2|1 << 1|0 << 0;
  1219. ret = af9013_rregs(client, cmd, reg, val_buf, len, lock);
  1220. if (ret)
  1221. goto err;
  1222. } else {
  1223. cmd = 0 << 7|0 << 6|(1 - 1) << 2|1 << 1|0 << 0;
  1224. for (i = 0; i < len; i++) {
  1225. ret = af9013_rregs(client, cmd, reg + i, val + i, 1,
  1226. lock);
  1227. if (ret)
  1228. goto err;
  1229. }
  1230. }
  1231. return 0;
  1232. err:
  1233. dev_dbg(&client->dev, "failed %d\n", ret);
  1234. return ret;
  1235. }
  1236. static int af9013_probe(struct i2c_client *client,
  1237. const struct i2c_device_id *id)
  1238. {
  1239. struct af9013_state *state;
  1240. struct af9013_platform_data *pdata = client->dev.platform_data;
  1241. struct dtv_frontend_properties *c;
  1242. int ret, i;
  1243. u8 firmware_version[4];
  1244. static const struct regmap_bus regmap_bus = {
  1245. .read = af9013_regmap_read,
  1246. .write = af9013_regmap_write,
  1247. };
  1248. static const struct regmap_config regmap_config = {
  1249. /* Actual reg is 16 bits, see i2c adapter lock */
  1250. .reg_bits = 24,
  1251. .val_bits = 8,
  1252. };
  1253. state = kzalloc(sizeof(*state), GFP_KERNEL);
  1254. if (!state) {
  1255. ret = -ENOMEM;
  1256. goto err;
  1257. }
  1258. dev_dbg(&client->dev, "\n");
  1259. /* Setup the state */
  1260. state->client = client;
  1261. i2c_set_clientdata(client, state);
  1262. state->clk = pdata->clk;
  1263. state->tuner = pdata->tuner;
  1264. state->if_frequency = pdata->if_frequency;
  1265. state->ts_mode = pdata->ts_mode;
  1266. state->ts_output_pin = pdata->ts_output_pin;
  1267. state->spec_inv = pdata->spec_inv;
  1268. memcpy(&state->api_version, pdata->api_version, sizeof(state->api_version));
  1269. memcpy(&state->gpio, pdata->gpio, sizeof(state->gpio));
  1270. state->regmap = regmap_init(&client->dev, &regmap_bus, client,
  1271. &regmap_config);
  1272. if (IS_ERR(state->regmap)) {
  1273. ret = PTR_ERR(state->regmap);
  1274. goto err_kfree;
  1275. }
  1276. /* Create mux i2c adapter */
  1277. state->muxc = i2c_mux_alloc(client->adapter, &client->dev, 1, 0, 0,
  1278. af9013_select, af9013_deselect);
  1279. if (!state->muxc) {
  1280. ret = -ENOMEM;
  1281. goto err_regmap_exit;
  1282. }
  1283. state->muxc->priv = state;
  1284. ret = i2c_mux_add_adapter(state->muxc, 0, 0, 0);
  1285. if (ret)
  1286. goto err_regmap_exit;
  1287. /* Download firmware */
  1288. if (state->ts_mode != AF9013_TS_MODE_USB) {
  1289. ret = af9013_download_firmware(state);
  1290. if (ret)
  1291. goto err_i2c_mux_del_adapters;
  1292. }
  1293. /* Firmware version */
  1294. ret = regmap_bulk_read(state->regmap, 0x5103, firmware_version,
  1295. sizeof(firmware_version));
  1296. if (ret)
  1297. goto err_i2c_mux_del_adapters;
  1298. /* Set GPIOs */
  1299. for (i = 0; i < sizeof(state->gpio); i++) {
  1300. ret = af9013_set_gpio(state, i, state->gpio[i]);
  1301. if (ret)
  1302. goto err_i2c_mux_del_adapters;
  1303. }
  1304. /* Create dvb frontend */
  1305. memcpy(&state->fe.ops, &af9013_ops, sizeof(state->fe.ops));
  1306. state->fe.demodulator_priv = state;
  1307. /* Setup callbacks */
  1308. pdata->get_dvb_frontend = af9013_get_dvb_frontend;
  1309. pdata->get_i2c_adapter = af9013_get_i2c_adapter;
  1310. pdata->pid_filter = af9013_pid_filter;
  1311. pdata->pid_filter_ctrl = af9013_pid_filter_ctrl;
  1312. /* Init stats to indicate which stats are supported */
  1313. c = &state->fe.dtv_property_cache;
  1314. c->strength.len = 1;
  1315. c->cnr.len = 1;
  1316. c->post_bit_error.len = 1;
  1317. c->post_bit_count.len = 1;
  1318. c->block_error.len = 1;
  1319. c->block_count.len = 1;
  1320. dev_info(&client->dev, "Afatech AF9013 successfully attached\n");
  1321. dev_info(&client->dev, "firmware version: %d.%d.%d.%d\n",
  1322. firmware_version[0], firmware_version[1],
  1323. firmware_version[2], firmware_version[3]);
  1324. return 0;
  1325. err_i2c_mux_del_adapters:
  1326. i2c_mux_del_adapters(state->muxc);
  1327. err_regmap_exit:
  1328. regmap_exit(state->regmap);
  1329. err_kfree:
  1330. kfree(state);
  1331. err:
  1332. dev_dbg(&client->dev, "failed %d\n", ret);
  1333. return ret;
  1334. }
  1335. static int af9013_remove(struct i2c_client *client)
  1336. {
  1337. struct af9013_state *state = i2c_get_clientdata(client);
  1338. dev_dbg(&client->dev, "\n");
  1339. i2c_mux_del_adapters(state->muxc);
  1340. regmap_exit(state->regmap);
  1341. kfree(state);
  1342. return 0;
  1343. }
  1344. static const struct i2c_device_id af9013_id_table[] = {
  1345. {"af9013", 0},
  1346. {}
  1347. };
  1348. MODULE_DEVICE_TABLE(i2c, af9013_id_table);
  1349. static struct i2c_driver af9013_driver = {
  1350. .driver = {
  1351. .name = "af9013",
  1352. .suppress_bind_attrs = true,
  1353. },
  1354. .probe = af9013_probe,
  1355. .remove = af9013_remove,
  1356. .id_table = af9013_id_table,
  1357. };
  1358. module_i2c_driver(af9013_driver);
  1359. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  1360. MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver");
  1361. MODULE_LICENSE("GPL");
  1362. MODULE_FIRMWARE(AF9013_FIRMWARE);