mISDNisar.c 43 KB

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  1. /*
  2. * mISDNisar.c ISAR (Siemens PSB 7110) specific functions
  3. *
  4. * Author Karsten Keil (keil@isdn4linux.de)
  5. *
  6. * Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. *
  21. */
  22. /* define this to enable static debug messages, if you kernel supports
  23. * dynamic debugging, you should use debugfs for this
  24. */
  25. /* #define DEBUG */
  26. #include <linux/gfp.h>
  27. #include <linux/delay.h>
  28. #include <linux/vmalloc.h>
  29. #include <linux/mISDNhw.h>
  30. #include <linux/module.h>
  31. #include "isar.h"
  32. #define ISAR_REV "2.1"
  33. MODULE_AUTHOR("Karsten Keil");
  34. MODULE_LICENSE("GPL v2");
  35. MODULE_VERSION(ISAR_REV);
  36. #define DEBUG_HW_FIRMWARE_FIFO 0x10000
  37. static const u8 faxmodulation_s[] = "3,24,48,72,73,74,96,97,98,121,122,145,146";
  38. static const u8 faxmodulation[] = {3, 24, 48, 72, 73, 74, 96, 97, 98, 121,
  39. 122, 145, 146};
  40. #define FAXMODCNT 13
  41. static void isar_setup(struct isar_hw *);
  42. static inline int
  43. waitforHIA(struct isar_hw *isar, int timeout)
  44. {
  45. int t = timeout;
  46. u8 val = isar->read_reg(isar->hw, ISAR_HIA);
  47. while ((val & 1) && t) {
  48. udelay(1);
  49. t--;
  50. val = isar->read_reg(isar->hw, ISAR_HIA);
  51. }
  52. pr_debug("%s: HIA after %dus\n", isar->name, timeout - t);
  53. return timeout;
  54. }
  55. /*
  56. * send msg to ISAR mailbox
  57. * if msg is NULL use isar->buf
  58. */
  59. static int
  60. send_mbox(struct isar_hw *isar, u8 his, u8 creg, u8 len, u8 *msg)
  61. {
  62. if (!waitforHIA(isar, 1000))
  63. return 0;
  64. pr_debug("send_mbox(%02x,%02x,%d)\n", his, creg, len);
  65. isar->write_reg(isar->hw, ISAR_CTRL_H, creg);
  66. isar->write_reg(isar->hw, ISAR_CTRL_L, len);
  67. isar->write_reg(isar->hw, ISAR_WADR, 0);
  68. if (!msg)
  69. msg = isar->buf;
  70. if (msg && len) {
  71. isar->write_fifo(isar->hw, ISAR_MBOX, msg, len);
  72. if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) {
  73. int l = 0;
  74. while (l < (int)len) {
  75. hex_dump_to_buffer(msg + l, len - l, 32, 1,
  76. isar->log, 256, 1);
  77. pr_debug("%s: %s %02x: %s\n", isar->name,
  78. __func__, l, isar->log);
  79. l += 32;
  80. }
  81. }
  82. }
  83. isar->write_reg(isar->hw, ISAR_HIS, his);
  84. waitforHIA(isar, 1000);
  85. return 1;
  86. }
  87. /*
  88. * receive message from ISAR mailbox
  89. * if msg is NULL use isar->buf
  90. */
  91. static void
  92. rcv_mbox(struct isar_hw *isar, u8 *msg)
  93. {
  94. if (!msg)
  95. msg = isar->buf;
  96. isar->write_reg(isar->hw, ISAR_RADR, 0);
  97. if (msg && isar->clsb) {
  98. isar->read_fifo(isar->hw, ISAR_MBOX, msg, isar->clsb);
  99. if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) {
  100. int l = 0;
  101. while (l < (int)isar->clsb) {
  102. hex_dump_to_buffer(msg + l, isar->clsb - l, 32,
  103. 1, isar->log, 256, 1);
  104. pr_debug("%s: %s %02x: %s\n", isar->name,
  105. __func__, l, isar->log);
  106. l += 32;
  107. }
  108. }
  109. }
  110. isar->write_reg(isar->hw, ISAR_IIA, 0);
  111. }
  112. static inline void
  113. get_irq_infos(struct isar_hw *isar)
  114. {
  115. isar->iis = isar->read_reg(isar->hw, ISAR_IIS);
  116. isar->cmsb = isar->read_reg(isar->hw, ISAR_CTRL_H);
  117. isar->clsb = isar->read_reg(isar->hw, ISAR_CTRL_L);
  118. pr_debug("%s: rcv_mbox(%02x,%02x,%d)\n", isar->name,
  119. isar->iis, isar->cmsb, isar->clsb);
  120. }
  121. /*
  122. * poll answer message from ISAR mailbox
  123. * should be used only with ISAR IRQs disabled before DSP was started
  124. *
  125. */
  126. static int
  127. poll_mbox(struct isar_hw *isar, int maxdelay)
  128. {
  129. int t = maxdelay;
  130. u8 irq;
  131. irq = isar->read_reg(isar->hw, ISAR_IRQBIT);
  132. while (t && !(irq & ISAR_IRQSTA)) {
  133. udelay(1);
  134. t--;
  135. }
  136. if (t) {
  137. get_irq_infos(isar);
  138. rcv_mbox(isar, NULL);
  139. }
  140. pr_debug("%s: pulled %d bytes after %d us\n",
  141. isar->name, isar->clsb, maxdelay - t);
  142. return t;
  143. }
  144. static int
  145. ISARVersion(struct isar_hw *isar)
  146. {
  147. int ver;
  148. /* disable ISAR IRQ */
  149. isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
  150. isar->buf[0] = ISAR_MSG_HWVER;
  151. isar->buf[1] = 0;
  152. isar->buf[2] = 1;
  153. if (!send_mbox(isar, ISAR_HIS_VNR, 0, 3, NULL))
  154. return -1;
  155. if (!poll_mbox(isar, 1000))
  156. return -2;
  157. if (isar->iis == ISAR_IIS_VNR) {
  158. if (isar->clsb == 1) {
  159. ver = isar->buf[0] & 0xf;
  160. return ver;
  161. }
  162. return -3;
  163. }
  164. return -4;
  165. }
  166. static int
  167. load_firmware(struct isar_hw *isar, const u8 *buf, int size)
  168. {
  169. u32 saved_debug = isar->ch[0].bch.debug;
  170. int ret, cnt;
  171. u8 nom, noc;
  172. u16 left, val, *sp = (u16 *)buf;
  173. u8 *mp;
  174. u_long flags;
  175. struct {
  176. u16 sadr;
  177. u16 len;
  178. u16 d_key;
  179. } blk_head;
  180. if (1 != isar->version) {
  181. pr_err("%s: ISAR wrong version %d firmware download aborted\n",
  182. isar->name, isar->version);
  183. return -EINVAL;
  184. }
  185. if (!(saved_debug & DEBUG_HW_FIRMWARE_FIFO))
  186. isar->ch[0].bch.debug &= ~DEBUG_HW_BFIFO;
  187. pr_debug("%s: load firmware %d words (%d bytes)\n",
  188. isar->name, size / 2, size);
  189. cnt = 0;
  190. size /= 2;
  191. /* disable ISAR IRQ */
  192. spin_lock_irqsave(isar->hwlock, flags);
  193. isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
  194. spin_unlock_irqrestore(isar->hwlock, flags);
  195. while (cnt < size) {
  196. blk_head.sadr = le16_to_cpu(*sp++);
  197. blk_head.len = le16_to_cpu(*sp++);
  198. blk_head.d_key = le16_to_cpu(*sp++);
  199. cnt += 3;
  200. pr_debug("ISAR firmware block (%#x,%d,%#x)\n",
  201. blk_head.sadr, blk_head.len, blk_head.d_key & 0xff);
  202. left = blk_head.len;
  203. if (cnt + left > size) {
  204. pr_info("%s: firmware error have %d need %d words\n",
  205. isar->name, size, cnt + left);
  206. ret = -EINVAL;
  207. goto reterrflg;
  208. }
  209. spin_lock_irqsave(isar->hwlock, flags);
  210. if (!send_mbox(isar, ISAR_HIS_DKEY, blk_head.d_key & 0xff,
  211. 0, NULL)) {
  212. pr_info("ISAR send_mbox dkey failed\n");
  213. ret = -ETIME;
  214. goto reterror;
  215. }
  216. if (!poll_mbox(isar, 1000)) {
  217. pr_warning("ISAR poll_mbox dkey failed\n");
  218. ret = -ETIME;
  219. goto reterror;
  220. }
  221. spin_unlock_irqrestore(isar->hwlock, flags);
  222. if ((isar->iis != ISAR_IIS_DKEY) || isar->cmsb || isar->clsb) {
  223. pr_info("ISAR wrong dkey response (%x,%x,%x)\n",
  224. isar->iis, isar->cmsb, isar->clsb);
  225. ret = 1;
  226. goto reterrflg;
  227. }
  228. while (left > 0) {
  229. if (left > 126)
  230. noc = 126;
  231. else
  232. noc = left;
  233. nom = (2 * noc) + 3;
  234. mp = isar->buf;
  235. /* the ISAR is big endian */
  236. *mp++ = blk_head.sadr >> 8;
  237. *mp++ = blk_head.sadr & 0xFF;
  238. left -= noc;
  239. cnt += noc;
  240. *mp++ = noc;
  241. pr_debug("%s: load %3d words at %04x\n", isar->name,
  242. noc, blk_head.sadr);
  243. blk_head.sadr += noc;
  244. while (noc) {
  245. val = le16_to_cpu(*sp++);
  246. *mp++ = val >> 8;
  247. *mp++ = val & 0xFF;
  248. noc--;
  249. }
  250. spin_lock_irqsave(isar->hwlock, flags);
  251. if (!send_mbox(isar, ISAR_HIS_FIRM, 0, nom, NULL)) {
  252. pr_info("ISAR send_mbox prog failed\n");
  253. ret = -ETIME;
  254. goto reterror;
  255. }
  256. if (!poll_mbox(isar, 1000)) {
  257. pr_info("ISAR poll_mbox prog failed\n");
  258. ret = -ETIME;
  259. goto reterror;
  260. }
  261. spin_unlock_irqrestore(isar->hwlock, flags);
  262. if ((isar->iis != ISAR_IIS_FIRM) ||
  263. isar->cmsb || isar->clsb) {
  264. pr_info("ISAR wrong prog response (%x,%x,%x)\n",
  265. isar->iis, isar->cmsb, isar->clsb);
  266. ret = -EIO;
  267. goto reterrflg;
  268. }
  269. }
  270. pr_debug("%s: ISAR firmware block %d words loaded\n",
  271. isar->name, blk_head.len);
  272. }
  273. isar->ch[0].bch.debug = saved_debug;
  274. /* 10ms delay */
  275. cnt = 10;
  276. while (cnt--)
  277. mdelay(1);
  278. isar->buf[0] = 0xff;
  279. isar->buf[1] = 0xfe;
  280. isar->bstat = 0;
  281. spin_lock_irqsave(isar->hwlock, flags);
  282. if (!send_mbox(isar, ISAR_HIS_STDSP, 0, 2, NULL)) {
  283. pr_info("ISAR send_mbox start dsp failed\n");
  284. ret = -ETIME;
  285. goto reterror;
  286. }
  287. if (!poll_mbox(isar, 1000)) {
  288. pr_info("ISAR poll_mbox start dsp failed\n");
  289. ret = -ETIME;
  290. goto reterror;
  291. }
  292. if ((isar->iis != ISAR_IIS_STDSP) || isar->cmsb || isar->clsb) {
  293. pr_info("ISAR wrong start dsp response (%x,%x,%x)\n",
  294. isar->iis, isar->cmsb, isar->clsb);
  295. ret = -EIO;
  296. goto reterror;
  297. } else
  298. pr_debug("%s: ISAR start dsp success\n", isar->name);
  299. /* NORMAL mode entered */
  300. /* Enable IRQs of ISAR */
  301. isar->write_reg(isar->hw, ISAR_IRQBIT, ISAR_IRQSTA);
  302. spin_unlock_irqrestore(isar->hwlock, flags);
  303. cnt = 1000; /* max 1s */
  304. while ((!isar->bstat) && cnt) {
  305. mdelay(1);
  306. cnt--;
  307. }
  308. if (!cnt) {
  309. pr_info("ISAR no general status event received\n");
  310. ret = -ETIME;
  311. goto reterrflg;
  312. } else
  313. pr_debug("%s: ISAR general status event %x\n",
  314. isar->name, isar->bstat);
  315. /* 10ms delay */
  316. cnt = 10;
  317. while (cnt--)
  318. mdelay(1);
  319. isar->iis = 0;
  320. spin_lock_irqsave(isar->hwlock, flags);
  321. if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) {
  322. pr_info("ISAR send_mbox self tst failed\n");
  323. ret = -ETIME;
  324. goto reterror;
  325. }
  326. spin_unlock_irqrestore(isar->hwlock, flags);
  327. cnt = 10000; /* max 100 ms */
  328. while ((isar->iis != ISAR_IIS_DIAG) && cnt) {
  329. udelay(10);
  330. cnt--;
  331. }
  332. mdelay(1);
  333. if (!cnt) {
  334. pr_info("ISAR no self tst response\n");
  335. ret = -ETIME;
  336. goto reterrflg;
  337. }
  338. if ((isar->cmsb == ISAR_CTRL_STST) && (isar->clsb == 1)
  339. && (isar->buf[0] == 0))
  340. pr_debug("%s: ISAR selftest OK\n", isar->name);
  341. else {
  342. pr_info("ISAR selftest not OK %x/%x/%x\n",
  343. isar->cmsb, isar->clsb, isar->buf[0]);
  344. ret = -EIO;
  345. goto reterrflg;
  346. }
  347. spin_lock_irqsave(isar->hwlock, flags);
  348. isar->iis = 0;
  349. if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) {
  350. pr_info("ISAR RQST SVN failed\n");
  351. ret = -ETIME;
  352. goto reterror;
  353. }
  354. spin_unlock_irqrestore(isar->hwlock, flags);
  355. cnt = 30000; /* max 300 ms */
  356. while ((isar->iis != ISAR_IIS_DIAG) && cnt) {
  357. udelay(10);
  358. cnt--;
  359. }
  360. mdelay(1);
  361. if (!cnt) {
  362. pr_info("ISAR no SVN response\n");
  363. ret = -ETIME;
  364. goto reterrflg;
  365. } else {
  366. if ((isar->cmsb == ISAR_CTRL_SWVER) && (isar->clsb == 1)) {
  367. pr_notice("%s: ISAR software version %#x\n",
  368. isar->name, isar->buf[0]);
  369. } else {
  370. pr_info("%s: ISAR wrong swver response (%x,%x)"
  371. " cnt(%d)\n", isar->name, isar->cmsb,
  372. isar->clsb, cnt);
  373. ret = -EIO;
  374. goto reterrflg;
  375. }
  376. }
  377. spin_lock_irqsave(isar->hwlock, flags);
  378. isar_setup(isar);
  379. spin_unlock_irqrestore(isar->hwlock, flags);
  380. ret = 0;
  381. reterrflg:
  382. spin_lock_irqsave(isar->hwlock, flags);
  383. reterror:
  384. isar->ch[0].bch.debug = saved_debug;
  385. if (ret)
  386. /* disable ISAR IRQ */
  387. isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
  388. spin_unlock_irqrestore(isar->hwlock, flags);
  389. return ret;
  390. }
  391. static inline void
  392. deliver_status(struct isar_ch *ch, int status)
  393. {
  394. pr_debug("%s: HL->LL FAXIND %x\n", ch->is->name, status);
  395. _queue_data(&ch->bch.ch, PH_CONTROL_IND, status, 0, NULL, GFP_ATOMIC);
  396. }
  397. static inline void
  398. isar_rcv_frame(struct isar_ch *ch)
  399. {
  400. u8 *ptr;
  401. int maxlen;
  402. if (!ch->is->clsb) {
  403. pr_debug("%s; ISAR zero len frame\n", ch->is->name);
  404. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  405. return;
  406. }
  407. if (test_bit(FLG_RX_OFF, &ch->bch.Flags)) {
  408. ch->bch.dropcnt += ch->is->clsb;
  409. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  410. return;
  411. }
  412. switch (ch->bch.state) {
  413. case ISDN_P_NONE:
  414. pr_debug("%s: ISAR protocol 0 spurious IIS_RDATA %x/%x/%x\n",
  415. ch->is->name, ch->is->iis, ch->is->cmsb, ch->is->clsb);
  416. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  417. break;
  418. case ISDN_P_B_RAW:
  419. case ISDN_P_B_L2DTMF:
  420. case ISDN_P_B_MODEM_ASYNC:
  421. maxlen = bchannel_get_rxbuf(&ch->bch, ch->is->clsb);
  422. if (maxlen < 0) {
  423. pr_warning("%s.B%d: No bufferspace for %d bytes\n",
  424. ch->is->name, ch->bch.nr, ch->is->clsb);
  425. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  426. break;
  427. }
  428. rcv_mbox(ch->is, skb_put(ch->bch.rx_skb, ch->is->clsb));
  429. recv_Bchannel(&ch->bch, 0, false);
  430. break;
  431. case ISDN_P_B_HDLC:
  432. maxlen = bchannel_get_rxbuf(&ch->bch, ch->is->clsb);
  433. if (maxlen < 0) {
  434. pr_warning("%s.B%d: No bufferspace for %d bytes\n",
  435. ch->is->name, ch->bch.nr, ch->is->clsb);
  436. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  437. break;
  438. }
  439. if (ch->is->cmsb & HDLC_ERROR) {
  440. pr_debug("%s: ISAR frame error %x len %d\n",
  441. ch->is->name, ch->is->cmsb, ch->is->clsb);
  442. #ifdef ERROR_STATISTIC
  443. if (ch->is->cmsb & HDLC_ERR_RER)
  444. ch->bch.err_inv++;
  445. if (ch->is->cmsb & HDLC_ERR_CER)
  446. ch->bch.err_crc++;
  447. #endif
  448. skb_trim(ch->bch.rx_skb, 0);
  449. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  450. break;
  451. }
  452. if (ch->is->cmsb & HDLC_FSD)
  453. skb_trim(ch->bch.rx_skb, 0);
  454. ptr = skb_put(ch->bch.rx_skb, ch->is->clsb);
  455. rcv_mbox(ch->is, ptr);
  456. if (ch->is->cmsb & HDLC_FED) {
  457. if (ch->bch.rx_skb->len < 3) { /* last 2 are the FCS */
  458. pr_debug("%s: ISAR frame to short %d\n",
  459. ch->is->name, ch->bch.rx_skb->len);
  460. skb_trim(ch->bch.rx_skb, 0);
  461. break;
  462. }
  463. skb_trim(ch->bch.rx_skb, ch->bch.rx_skb->len - 2);
  464. recv_Bchannel(&ch->bch, 0, false);
  465. }
  466. break;
  467. case ISDN_P_B_T30_FAX:
  468. if (ch->state != STFAX_ACTIV) {
  469. pr_debug("%s: isar_rcv_frame: not ACTIV\n",
  470. ch->is->name);
  471. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  472. if (ch->bch.rx_skb)
  473. skb_trim(ch->bch.rx_skb, 0);
  474. break;
  475. }
  476. if (!ch->bch.rx_skb) {
  477. ch->bch.rx_skb = mI_alloc_skb(ch->bch.maxlen,
  478. GFP_ATOMIC);
  479. if (unlikely(!ch->bch.rx_skb)) {
  480. pr_info("%s: B receive out of memory\n",
  481. __func__);
  482. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  483. break;
  484. }
  485. }
  486. if (ch->cmd == PCTRL_CMD_FRM) {
  487. rcv_mbox(ch->is, skb_put(ch->bch.rx_skb, ch->is->clsb));
  488. pr_debug("%s: isar_rcv_frame: %d\n",
  489. ch->is->name, ch->bch.rx_skb->len);
  490. if (ch->is->cmsb & SART_NMD) { /* ABORT */
  491. pr_debug("%s: isar_rcv_frame: no more data\n",
  492. ch->is->name);
  493. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  494. send_mbox(ch->is, SET_DPS(ch->dpath) |
  495. ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC,
  496. 0, NULL);
  497. ch->state = STFAX_ESCAPE;
  498. /* set_skb_flag(skb, DF_NOMOREDATA); */
  499. }
  500. recv_Bchannel(&ch->bch, 0, false);
  501. if (ch->is->cmsb & SART_NMD)
  502. deliver_status(ch, HW_MOD_NOCARR);
  503. break;
  504. }
  505. if (ch->cmd != PCTRL_CMD_FRH) {
  506. pr_debug("%s: isar_rcv_frame: unknown fax mode %x\n",
  507. ch->is->name, ch->cmd);
  508. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  509. if (ch->bch.rx_skb)
  510. skb_trim(ch->bch.rx_skb, 0);
  511. break;
  512. }
  513. /* PCTRL_CMD_FRH */
  514. if ((ch->bch.rx_skb->len + ch->is->clsb) >
  515. (ch->bch.maxlen + 2)) {
  516. pr_info("%s: %s incoming packet too large\n",
  517. ch->is->name, __func__);
  518. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  519. skb_trim(ch->bch.rx_skb, 0);
  520. break;
  521. } else if (ch->is->cmsb & HDLC_ERROR) {
  522. pr_info("%s: ISAR frame error %x len %d\n",
  523. ch->is->name, ch->is->cmsb, ch->is->clsb);
  524. skb_trim(ch->bch.rx_skb, 0);
  525. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  526. break;
  527. }
  528. if (ch->is->cmsb & HDLC_FSD)
  529. skb_trim(ch->bch.rx_skb, 0);
  530. ptr = skb_put(ch->bch.rx_skb, ch->is->clsb);
  531. rcv_mbox(ch->is, ptr);
  532. if (ch->is->cmsb & HDLC_FED) {
  533. if (ch->bch.rx_skb->len < 3) { /* last 2 are the FCS */
  534. pr_info("%s: ISAR frame to short %d\n",
  535. ch->is->name, ch->bch.rx_skb->len);
  536. skb_trim(ch->bch.rx_skb, 0);
  537. break;
  538. }
  539. skb_trim(ch->bch.rx_skb, ch->bch.rx_skb->len - 2);
  540. recv_Bchannel(&ch->bch, 0, false);
  541. }
  542. if (ch->is->cmsb & SART_NMD) { /* ABORT */
  543. pr_debug("%s: isar_rcv_frame: no more data\n",
  544. ch->is->name);
  545. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  546. if (ch->bch.rx_skb)
  547. skb_trim(ch->bch.rx_skb, 0);
  548. send_mbox(ch->is, SET_DPS(ch->dpath) |
  549. ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL);
  550. ch->state = STFAX_ESCAPE;
  551. deliver_status(ch, HW_MOD_NOCARR);
  552. }
  553. break;
  554. default:
  555. pr_info("isar_rcv_frame protocol (%x)error\n", ch->bch.state);
  556. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  557. break;
  558. }
  559. }
  560. static void
  561. isar_fill_fifo(struct isar_ch *ch)
  562. {
  563. int count;
  564. u8 msb;
  565. u8 *ptr;
  566. pr_debug("%s: ch%d tx_skb %d tx_idx %d\n", ch->is->name, ch->bch.nr,
  567. ch->bch.tx_skb ? ch->bch.tx_skb->len : -1, ch->bch.tx_idx);
  568. if (!(ch->is->bstat &
  569. (ch->dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2)))
  570. return;
  571. if (!ch->bch.tx_skb) {
  572. if (!test_bit(FLG_TX_EMPTY, &ch->bch.Flags) ||
  573. (ch->bch.state != ISDN_P_B_RAW))
  574. return;
  575. count = ch->mml;
  576. /* use the card buffer */
  577. memset(ch->is->buf, ch->bch.fill[0], count);
  578. send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
  579. 0, count, ch->is->buf);
  580. return;
  581. }
  582. count = ch->bch.tx_skb->len - ch->bch.tx_idx;
  583. if (count <= 0)
  584. return;
  585. if (count > ch->mml) {
  586. msb = 0;
  587. count = ch->mml;
  588. } else {
  589. msb = HDLC_FED;
  590. }
  591. ptr = ch->bch.tx_skb->data + ch->bch.tx_idx;
  592. if (!ch->bch.tx_idx) {
  593. pr_debug("%s: frame start\n", ch->is->name);
  594. if ((ch->bch.state == ISDN_P_B_T30_FAX) &&
  595. (ch->cmd == PCTRL_CMD_FTH)) {
  596. if (count > 1) {
  597. if ((ptr[0] == 0xff) && (ptr[1] == 0x13)) {
  598. /* last frame */
  599. test_and_set_bit(FLG_LASTDATA,
  600. &ch->bch.Flags);
  601. pr_debug("%s: set LASTDATA\n",
  602. ch->is->name);
  603. if (msb == HDLC_FED)
  604. test_and_set_bit(FLG_DLEETX,
  605. &ch->bch.Flags);
  606. }
  607. }
  608. }
  609. msb |= HDLC_FST;
  610. }
  611. ch->bch.tx_idx += count;
  612. switch (ch->bch.state) {
  613. case ISDN_P_NONE:
  614. pr_info("%s: wrong protocol 0\n", __func__);
  615. break;
  616. case ISDN_P_B_RAW:
  617. case ISDN_P_B_L2DTMF:
  618. case ISDN_P_B_MODEM_ASYNC:
  619. send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
  620. 0, count, ptr);
  621. break;
  622. case ISDN_P_B_HDLC:
  623. send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
  624. msb, count, ptr);
  625. break;
  626. case ISDN_P_B_T30_FAX:
  627. if (ch->state != STFAX_ACTIV)
  628. pr_debug("%s: not ACTIV\n", ch->is->name);
  629. else if (ch->cmd == PCTRL_CMD_FTH)
  630. send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
  631. msb, count, ptr);
  632. else if (ch->cmd == PCTRL_CMD_FTM)
  633. send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
  634. 0, count, ptr);
  635. else
  636. pr_debug("%s: not FTH/FTM\n", ch->is->name);
  637. break;
  638. default:
  639. pr_info("%s: protocol(%x) error\n",
  640. __func__, ch->bch.state);
  641. break;
  642. }
  643. }
  644. static inline struct isar_ch *
  645. sel_bch_isar(struct isar_hw *isar, u8 dpath)
  646. {
  647. struct isar_ch *base = &isar->ch[0];
  648. if ((!dpath) || (dpath > 2))
  649. return NULL;
  650. if (base->dpath == dpath)
  651. return base;
  652. base++;
  653. if (base->dpath == dpath)
  654. return base;
  655. return NULL;
  656. }
  657. static void
  658. send_next(struct isar_ch *ch)
  659. {
  660. pr_debug("%s: %s ch%d tx_skb %d tx_idx %d\n", ch->is->name, __func__,
  661. ch->bch.nr, ch->bch.tx_skb ? ch->bch.tx_skb->len : -1,
  662. ch->bch.tx_idx);
  663. if (ch->bch.state == ISDN_P_B_T30_FAX) {
  664. if (ch->cmd == PCTRL_CMD_FTH) {
  665. if (test_bit(FLG_LASTDATA, &ch->bch.Flags)) {
  666. pr_debug("set NMD_DATA\n");
  667. test_and_set_bit(FLG_NMD_DATA, &ch->bch.Flags);
  668. }
  669. } else if (ch->cmd == PCTRL_CMD_FTM) {
  670. if (test_bit(FLG_DLEETX, &ch->bch.Flags)) {
  671. test_and_set_bit(FLG_LASTDATA, &ch->bch.Flags);
  672. test_and_set_bit(FLG_NMD_DATA, &ch->bch.Flags);
  673. }
  674. }
  675. }
  676. if (ch->bch.tx_skb)
  677. dev_kfree_skb(ch->bch.tx_skb);
  678. if (get_next_bframe(&ch->bch)) {
  679. isar_fill_fifo(ch);
  680. test_and_clear_bit(FLG_TX_EMPTY, &ch->bch.Flags);
  681. } else if (test_bit(FLG_TX_EMPTY, &ch->bch.Flags)) {
  682. isar_fill_fifo(ch);
  683. } else {
  684. if (test_and_clear_bit(FLG_DLEETX, &ch->bch.Flags)) {
  685. if (test_and_clear_bit(FLG_LASTDATA,
  686. &ch->bch.Flags)) {
  687. if (test_and_clear_bit(FLG_NMD_DATA,
  688. &ch->bch.Flags)) {
  689. u8 zd = 0;
  690. send_mbox(ch->is, SET_DPS(ch->dpath) |
  691. ISAR_HIS_SDATA, 0x01, 1, &zd);
  692. }
  693. test_and_set_bit(FLG_LL_OK, &ch->bch.Flags);
  694. } else {
  695. deliver_status(ch, HW_MOD_CONNECT);
  696. }
  697. } else if (test_bit(FLG_FILLEMPTY, &ch->bch.Flags)) {
  698. test_and_set_bit(FLG_TX_EMPTY, &ch->bch.Flags);
  699. }
  700. }
  701. }
  702. static void
  703. check_send(struct isar_hw *isar, u8 rdm)
  704. {
  705. struct isar_ch *ch;
  706. pr_debug("%s: rdm %x\n", isar->name, rdm);
  707. if (rdm & BSTAT_RDM1) {
  708. ch = sel_bch_isar(isar, 1);
  709. if (ch && test_bit(FLG_ACTIVE, &ch->bch.Flags)) {
  710. if (ch->bch.tx_skb && (ch->bch.tx_skb->len >
  711. ch->bch.tx_idx))
  712. isar_fill_fifo(ch);
  713. else
  714. send_next(ch);
  715. }
  716. }
  717. if (rdm & BSTAT_RDM2) {
  718. ch = sel_bch_isar(isar, 2);
  719. if (ch && test_bit(FLG_ACTIVE, &ch->bch.Flags)) {
  720. if (ch->bch.tx_skb && (ch->bch.tx_skb->len >
  721. ch->bch.tx_idx))
  722. isar_fill_fifo(ch);
  723. else
  724. send_next(ch);
  725. }
  726. }
  727. }
  728. const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200", "NODEF4",
  729. "300", "600", "1200", "2400", "4800", "7200",
  730. "9600nt", "9600t", "12000", "14400", "WRONG"};
  731. const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21",
  732. "Bell103", "V23", "Bell202", "V17", "V29", "V27ter"};
  733. static void
  734. isar_pump_status_rsp(struct isar_ch *ch) {
  735. u8 ril = ch->is->buf[0];
  736. u8 rim;
  737. if (!test_and_clear_bit(ISAR_RATE_REQ, &ch->is->Flags))
  738. return;
  739. if (ril > 14) {
  740. pr_info("%s: wrong pstrsp ril=%d\n", ch->is->name, ril);
  741. ril = 15;
  742. }
  743. switch (ch->is->buf[1]) {
  744. case 0:
  745. rim = 0;
  746. break;
  747. case 0x20:
  748. rim = 2;
  749. break;
  750. case 0x40:
  751. rim = 3;
  752. break;
  753. case 0x41:
  754. rim = 4;
  755. break;
  756. case 0x51:
  757. rim = 5;
  758. break;
  759. case 0x61:
  760. rim = 6;
  761. break;
  762. case 0x71:
  763. rim = 7;
  764. break;
  765. case 0x82:
  766. rim = 8;
  767. break;
  768. case 0x92:
  769. rim = 9;
  770. break;
  771. case 0xa2:
  772. rim = 10;
  773. break;
  774. default:
  775. rim = 1;
  776. break;
  777. }
  778. sprintf(ch->conmsg, "%s %s", dmril[ril], dmrim[rim]);
  779. pr_debug("%s: pump strsp %s\n", ch->is->name, ch->conmsg);
  780. }
  781. static void
  782. isar_pump_statev_modem(struct isar_ch *ch, u8 devt) {
  783. u8 dps = SET_DPS(ch->dpath);
  784. switch (devt) {
  785. case PSEV_10MS_TIMER:
  786. pr_debug("%s: pump stev TIMER\n", ch->is->name);
  787. break;
  788. case PSEV_CON_ON:
  789. pr_debug("%s: pump stev CONNECT\n", ch->is->name);
  790. deliver_status(ch, HW_MOD_CONNECT);
  791. break;
  792. case PSEV_CON_OFF:
  793. pr_debug("%s: pump stev NO CONNECT\n", ch->is->name);
  794. send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
  795. deliver_status(ch, HW_MOD_NOCARR);
  796. break;
  797. case PSEV_V24_OFF:
  798. pr_debug("%s: pump stev V24 OFF\n", ch->is->name);
  799. break;
  800. case PSEV_CTS_ON:
  801. pr_debug("%s: pump stev CTS ON\n", ch->is->name);
  802. break;
  803. case PSEV_CTS_OFF:
  804. pr_debug("%s pump stev CTS OFF\n", ch->is->name);
  805. break;
  806. case PSEV_DCD_ON:
  807. pr_debug("%s: pump stev CARRIER ON\n", ch->is->name);
  808. test_and_set_bit(ISAR_RATE_REQ, &ch->is->Flags);
  809. send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
  810. break;
  811. case PSEV_DCD_OFF:
  812. pr_debug("%s: pump stev CARRIER OFF\n", ch->is->name);
  813. break;
  814. case PSEV_DSR_ON:
  815. pr_debug("%s: pump stev DSR ON\n", ch->is->name);
  816. break;
  817. case PSEV_DSR_OFF:
  818. pr_debug("%s: pump stev DSR_OFF\n", ch->is->name);
  819. break;
  820. case PSEV_REM_RET:
  821. pr_debug("%s: pump stev REMOTE RETRAIN\n", ch->is->name);
  822. break;
  823. case PSEV_REM_REN:
  824. pr_debug("%s: pump stev REMOTE RENEGOTIATE\n", ch->is->name);
  825. break;
  826. case PSEV_GSTN_CLR:
  827. pr_debug("%s: pump stev GSTN CLEAR\n", ch->is->name);
  828. break;
  829. default:
  830. pr_info("u%s: unknown pump stev %x\n", ch->is->name, devt);
  831. break;
  832. }
  833. }
  834. static void
  835. isar_pump_statev_fax(struct isar_ch *ch, u8 devt) {
  836. u8 dps = SET_DPS(ch->dpath);
  837. u8 p1;
  838. switch (devt) {
  839. case PSEV_10MS_TIMER:
  840. pr_debug("%s: pump stev TIMER\n", ch->is->name);
  841. break;
  842. case PSEV_RSP_READY:
  843. pr_debug("%s: pump stev RSP_READY\n", ch->is->name);
  844. ch->state = STFAX_READY;
  845. deliver_status(ch, HW_MOD_READY);
  846. #ifdef AUTOCON
  847. if (test_bit(BC_FLG_ORIG, &ch->bch.Flags))
  848. isar_pump_cmd(bch, HW_MOD_FRH, 3);
  849. else
  850. isar_pump_cmd(bch, HW_MOD_FTH, 3);
  851. #endif
  852. break;
  853. case PSEV_LINE_TX_H:
  854. if (ch->state == STFAX_LINE) {
  855. pr_debug("%s: pump stev LINE_TX_H\n", ch->is->name);
  856. ch->state = STFAX_CONT;
  857. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  858. PCTRL_CMD_CONT, 0, NULL);
  859. } else {
  860. pr_debug("%s: pump stev LINE_TX_H wrong st %x\n",
  861. ch->is->name, ch->state);
  862. }
  863. break;
  864. case PSEV_LINE_RX_H:
  865. if (ch->state == STFAX_LINE) {
  866. pr_debug("%s: pump stev LINE_RX_H\n", ch->is->name);
  867. ch->state = STFAX_CONT;
  868. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  869. PCTRL_CMD_CONT, 0, NULL);
  870. } else {
  871. pr_debug("%s: pump stev LINE_RX_H wrong st %x\n",
  872. ch->is->name, ch->state);
  873. }
  874. break;
  875. case PSEV_LINE_TX_B:
  876. if (ch->state == STFAX_LINE) {
  877. pr_debug("%s: pump stev LINE_TX_B\n", ch->is->name);
  878. ch->state = STFAX_CONT;
  879. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  880. PCTRL_CMD_CONT, 0, NULL);
  881. } else {
  882. pr_debug("%s: pump stev LINE_TX_B wrong st %x\n",
  883. ch->is->name, ch->state);
  884. }
  885. break;
  886. case PSEV_LINE_RX_B:
  887. if (ch->state == STFAX_LINE) {
  888. pr_debug("%s: pump stev LINE_RX_B\n", ch->is->name);
  889. ch->state = STFAX_CONT;
  890. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  891. PCTRL_CMD_CONT, 0, NULL);
  892. } else {
  893. pr_debug("%s: pump stev LINE_RX_B wrong st %x\n",
  894. ch->is->name, ch->state);
  895. }
  896. break;
  897. case PSEV_RSP_CONN:
  898. if (ch->state == STFAX_CONT) {
  899. pr_debug("%s: pump stev RSP_CONN\n", ch->is->name);
  900. ch->state = STFAX_ACTIV;
  901. test_and_set_bit(ISAR_RATE_REQ, &ch->is->Flags);
  902. send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
  903. if (ch->cmd == PCTRL_CMD_FTH) {
  904. int delay = (ch->mod == 3) ? 1000 : 200;
  905. /* 1s (200 ms) Flags before data */
  906. if (test_and_set_bit(FLG_FTI_RUN,
  907. &ch->bch.Flags))
  908. del_timer(&ch->ftimer);
  909. ch->ftimer.expires =
  910. jiffies + ((delay * HZ) / 1000);
  911. test_and_set_bit(FLG_LL_CONN,
  912. &ch->bch.Flags);
  913. add_timer(&ch->ftimer);
  914. } else {
  915. deliver_status(ch, HW_MOD_CONNECT);
  916. }
  917. } else {
  918. pr_debug("%s: pump stev RSP_CONN wrong st %x\n",
  919. ch->is->name, ch->state);
  920. }
  921. break;
  922. case PSEV_FLAGS_DET:
  923. pr_debug("%s: pump stev FLAGS_DET\n", ch->is->name);
  924. break;
  925. case PSEV_RSP_DISC:
  926. pr_debug("%s: pump stev RSP_DISC state(%d)\n",
  927. ch->is->name, ch->state);
  928. if (ch->state == STFAX_ESCAPE) {
  929. p1 = 5;
  930. switch (ch->newcmd) {
  931. case 0:
  932. ch->state = STFAX_READY;
  933. break;
  934. case PCTRL_CMD_FTM:
  935. p1 = 2;
  936. /* fall through */
  937. case PCTRL_CMD_FTH:
  938. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  939. PCTRL_CMD_SILON, 1, &p1);
  940. ch->state = STFAX_SILDET;
  941. break;
  942. case PCTRL_CMD_FRH:
  943. case PCTRL_CMD_FRM:
  944. ch->mod = ch->newmod;
  945. p1 = ch->newmod;
  946. ch->newmod = 0;
  947. ch->cmd = ch->newcmd;
  948. ch->newcmd = 0;
  949. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  950. ch->cmd, 1, &p1);
  951. ch->state = STFAX_LINE;
  952. ch->try_mod = 3;
  953. break;
  954. default:
  955. pr_debug("%s: RSP_DISC unknown newcmd %x\n",
  956. ch->is->name, ch->newcmd);
  957. break;
  958. }
  959. } else if (ch->state == STFAX_ACTIV) {
  960. if (test_and_clear_bit(FLG_LL_OK, &ch->bch.Flags))
  961. deliver_status(ch, HW_MOD_OK);
  962. else if (ch->cmd == PCTRL_CMD_FRM)
  963. deliver_status(ch, HW_MOD_NOCARR);
  964. else
  965. deliver_status(ch, HW_MOD_FCERROR);
  966. ch->state = STFAX_READY;
  967. } else if (ch->state != STFAX_SILDET) {
  968. /* ignore in STFAX_SILDET */
  969. ch->state = STFAX_READY;
  970. deliver_status(ch, HW_MOD_FCERROR);
  971. }
  972. break;
  973. case PSEV_RSP_SILDET:
  974. pr_debug("%s: pump stev RSP_SILDET\n", ch->is->name);
  975. if (ch->state == STFAX_SILDET) {
  976. ch->mod = ch->newmod;
  977. p1 = ch->newmod;
  978. ch->newmod = 0;
  979. ch->cmd = ch->newcmd;
  980. ch->newcmd = 0;
  981. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  982. ch->cmd, 1, &p1);
  983. ch->state = STFAX_LINE;
  984. ch->try_mod = 3;
  985. }
  986. break;
  987. case PSEV_RSP_SILOFF:
  988. pr_debug("%s: pump stev RSP_SILOFF\n", ch->is->name);
  989. break;
  990. case PSEV_RSP_FCERR:
  991. if (ch->state == STFAX_LINE) {
  992. pr_debug("%s: pump stev RSP_FCERR try %d\n",
  993. ch->is->name, ch->try_mod);
  994. if (ch->try_mod--) {
  995. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  996. ch->cmd, 1, &ch->mod);
  997. break;
  998. }
  999. }
  1000. pr_debug("%s: pump stev RSP_FCERR\n", ch->is->name);
  1001. ch->state = STFAX_ESCAPE;
  1002. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC,
  1003. 0, NULL);
  1004. deliver_status(ch, HW_MOD_FCERROR);
  1005. break;
  1006. default:
  1007. break;
  1008. }
  1009. }
  1010. void
  1011. mISDNisar_irq(struct isar_hw *isar)
  1012. {
  1013. struct isar_ch *ch;
  1014. get_irq_infos(isar);
  1015. switch (isar->iis & ISAR_IIS_MSCMSD) {
  1016. case ISAR_IIS_RDATA:
  1017. ch = sel_bch_isar(isar, isar->iis >> 6);
  1018. if (ch)
  1019. isar_rcv_frame(ch);
  1020. else {
  1021. pr_debug("%s: ISAR spurious IIS_RDATA %x/%x/%x\n",
  1022. isar->name, isar->iis, isar->cmsb,
  1023. isar->clsb);
  1024. isar->write_reg(isar->hw, ISAR_IIA, 0);
  1025. }
  1026. break;
  1027. case ISAR_IIS_GSTEV:
  1028. isar->write_reg(isar->hw, ISAR_IIA, 0);
  1029. isar->bstat |= isar->cmsb;
  1030. check_send(isar, isar->cmsb);
  1031. break;
  1032. case ISAR_IIS_BSTEV:
  1033. #ifdef ERROR_STATISTIC
  1034. ch = sel_bch_isar(isar, isar->iis >> 6);
  1035. if (ch) {
  1036. if (isar->cmsb == BSTEV_TBO)
  1037. ch->bch.err_tx++;
  1038. if (isar->cmsb == BSTEV_RBO)
  1039. ch->bch.err_rdo++;
  1040. }
  1041. #endif
  1042. pr_debug("%s: Buffer STEV dpath%d msb(%x)\n",
  1043. isar->name, isar->iis >> 6, isar->cmsb);
  1044. isar->write_reg(isar->hw, ISAR_IIA, 0);
  1045. break;
  1046. case ISAR_IIS_PSTEV:
  1047. ch = sel_bch_isar(isar, isar->iis >> 6);
  1048. if (ch) {
  1049. rcv_mbox(isar, NULL);
  1050. if (ch->bch.state == ISDN_P_B_MODEM_ASYNC)
  1051. isar_pump_statev_modem(ch, isar->cmsb);
  1052. else if (ch->bch.state == ISDN_P_B_T30_FAX)
  1053. isar_pump_statev_fax(ch, isar->cmsb);
  1054. else if (ch->bch.state == ISDN_P_B_RAW) {
  1055. int tt;
  1056. tt = isar->cmsb | 0x30;
  1057. if (tt == 0x3e)
  1058. tt = '*';
  1059. else if (tt == 0x3f)
  1060. tt = '#';
  1061. else if (tt > '9')
  1062. tt += 7;
  1063. tt |= DTMF_TONE_VAL;
  1064. _queue_data(&ch->bch.ch, PH_CONTROL_IND,
  1065. MISDN_ID_ANY, sizeof(tt), &tt,
  1066. GFP_ATOMIC);
  1067. } else
  1068. pr_debug("%s: ISAR IIS_PSTEV pm %d sta %x\n",
  1069. isar->name, ch->bch.state,
  1070. isar->cmsb);
  1071. } else {
  1072. pr_debug("%s: ISAR spurious IIS_PSTEV %x/%x/%x\n",
  1073. isar->name, isar->iis, isar->cmsb,
  1074. isar->clsb);
  1075. isar->write_reg(isar->hw, ISAR_IIA, 0);
  1076. }
  1077. break;
  1078. case ISAR_IIS_PSTRSP:
  1079. ch = sel_bch_isar(isar, isar->iis >> 6);
  1080. if (ch) {
  1081. rcv_mbox(isar, NULL);
  1082. isar_pump_status_rsp(ch);
  1083. } else {
  1084. pr_debug("%s: ISAR spurious IIS_PSTRSP %x/%x/%x\n",
  1085. isar->name, isar->iis, isar->cmsb,
  1086. isar->clsb);
  1087. isar->write_reg(isar->hw, ISAR_IIA, 0);
  1088. }
  1089. break;
  1090. case ISAR_IIS_DIAG:
  1091. case ISAR_IIS_BSTRSP:
  1092. case ISAR_IIS_IOM2RSP:
  1093. rcv_mbox(isar, NULL);
  1094. break;
  1095. case ISAR_IIS_INVMSG:
  1096. rcv_mbox(isar, NULL);
  1097. pr_debug("%s: invalid msg his:%x\n", isar->name, isar->cmsb);
  1098. break;
  1099. default:
  1100. rcv_mbox(isar, NULL);
  1101. pr_debug("%s: unhandled msg iis(%x) ctrl(%x/%x)\n",
  1102. isar->name, isar->iis, isar->cmsb, isar->clsb);
  1103. break;
  1104. }
  1105. }
  1106. EXPORT_SYMBOL(mISDNisar_irq);
  1107. static void
  1108. ftimer_handler(struct timer_list *t)
  1109. {
  1110. struct isar_ch *ch = from_timer(ch, t, ftimer);
  1111. pr_debug("%s: ftimer flags %lx\n", ch->is->name, ch->bch.Flags);
  1112. test_and_clear_bit(FLG_FTI_RUN, &ch->bch.Flags);
  1113. if (test_and_clear_bit(FLG_LL_CONN, &ch->bch.Flags))
  1114. deliver_status(ch, HW_MOD_CONNECT);
  1115. }
  1116. static void
  1117. setup_pump(struct isar_ch *ch) {
  1118. u8 dps = SET_DPS(ch->dpath);
  1119. u8 ctrl, param[6];
  1120. switch (ch->bch.state) {
  1121. case ISDN_P_NONE:
  1122. case ISDN_P_B_RAW:
  1123. case ISDN_P_B_HDLC:
  1124. send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, PMOD_BYPASS, 0, NULL);
  1125. break;
  1126. case ISDN_P_B_L2DTMF:
  1127. if (test_bit(FLG_DTMFSEND, &ch->bch.Flags)) {
  1128. param[0] = 5; /* TOA 5 db */
  1129. send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG,
  1130. PMOD_DTMF_TRANS, 1, param);
  1131. } else {
  1132. param[0] = 40; /* REL -46 dbm */
  1133. send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG,
  1134. PMOD_DTMF, 1, param);
  1135. }
  1136. /* fall through */
  1137. case ISDN_P_B_MODEM_ASYNC:
  1138. ctrl = PMOD_DATAMODEM;
  1139. if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) {
  1140. ctrl |= PCTRL_ORIG;
  1141. param[5] = PV32P6_CTN;
  1142. } else {
  1143. param[5] = PV32P6_ATN;
  1144. }
  1145. param[0] = 6; /* 6 db */
  1146. param[1] = PV32P2_V23R | PV32P2_V22A | PV32P2_V22B |
  1147. PV32P2_V22C | PV32P2_V21 | PV32P2_BEL;
  1148. param[2] = PV32P3_AMOD | PV32P3_V32B | PV32P3_V23B;
  1149. param[3] = PV32P4_UT144;
  1150. param[4] = PV32P5_UT144;
  1151. send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, ctrl, 6, param);
  1152. break;
  1153. case ISDN_P_B_T30_FAX:
  1154. ctrl = PMOD_FAX;
  1155. if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) {
  1156. ctrl |= PCTRL_ORIG;
  1157. param[1] = PFAXP2_CTN;
  1158. } else {
  1159. param[1] = PFAXP2_ATN;
  1160. }
  1161. param[0] = 6; /* 6 db */
  1162. send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, ctrl, 2, param);
  1163. ch->state = STFAX_NULL;
  1164. ch->newcmd = 0;
  1165. ch->newmod = 0;
  1166. test_and_set_bit(FLG_FTI_RUN, &ch->bch.Flags);
  1167. break;
  1168. }
  1169. udelay(1000);
  1170. send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
  1171. udelay(1000);
  1172. }
  1173. static void
  1174. setup_sart(struct isar_ch *ch) {
  1175. u8 dps = SET_DPS(ch->dpath);
  1176. u8 ctrl, param[2] = {0, 0};
  1177. switch (ch->bch.state) {
  1178. case ISDN_P_NONE:
  1179. send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_DISABLE,
  1180. 0, NULL);
  1181. break;
  1182. case ISDN_P_B_RAW:
  1183. case ISDN_P_B_L2DTMF:
  1184. send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_BINARY,
  1185. 2, param);
  1186. break;
  1187. case ISDN_P_B_HDLC:
  1188. case ISDN_P_B_T30_FAX:
  1189. send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_HDLC,
  1190. 1, param);
  1191. break;
  1192. case ISDN_P_B_MODEM_ASYNC:
  1193. ctrl = SMODE_V14 | SCTRL_HDMC_BOTH;
  1194. param[0] = S_P1_CHS_8;
  1195. param[1] = S_P2_BFT_DEF;
  1196. send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, ctrl, 2, param);
  1197. break;
  1198. }
  1199. udelay(1000);
  1200. send_mbox(ch->is, dps | ISAR_HIS_BSTREQ, 0, 0, NULL);
  1201. udelay(1000);
  1202. }
  1203. static void
  1204. setup_iom2(struct isar_ch *ch) {
  1205. u8 dps = SET_DPS(ch->dpath);
  1206. u8 cmsb = IOM_CTRL_ENA, msg[5] = {IOM_P1_TXD, 0, 0, 0, 0};
  1207. if (ch->bch.nr == 2) {
  1208. msg[1] = 1;
  1209. msg[3] = 1;
  1210. }
  1211. switch (ch->bch.state) {
  1212. case ISDN_P_NONE:
  1213. cmsb = 0;
  1214. /* dummy slot */
  1215. msg[1] = ch->dpath + 2;
  1216. msg[3] = ch->dpath + 2;
  1217. break;
  1218. case ISDN_P_B_RAW:
  1219. case ISDN_P_B_HDLC:
  1220. break;
  1221. case ISDN_P_B_MODEM_ASYNC:
  1222. case ISDN_P_B_T30_FAX:
  1223. cmsb |= IOM_CTRL_RCV;
  1224. /* fall through */
  1225. case ISDN_P_B_L2DTMF:
  1226. if (test_bit(FLG_DTMFSEND, &ch->bch.Flags))
  1227. cmsb |= IOM_CTRL_RCV;
  1228. cmsb |= IOM_CTRL_ALAW;
  1229. break;
  1230. }
  1231. send_mbox(ch->is, dps | ISAR_HIS_IOM2CFG, cmsb, 5, msg);
  1232. udelay(1000);
  1233. send_mbox(ch->is, dps | ISAR_HIS_IOM2REQ, 0, 0, NULL);
  1234. udelay(1000);
  1235. }
  1236. static int
  1237. modeisar(struct isar_ch *ch, u32 bprotocol)
  1238. {
  1239. /* Here we are selecting the best datapath for requested protocol */
  1240. if (ch->bch.state == ISDN_P_NONE) { /* New Setup */
  1241. switch (bprotocol) {
  1242. case ISDN_P_NONE: /* init */
  1243. if (!ch->dpath)
  1244. /* no init for dpath 0 */
  1245. return 0;
  1246. test_and_clear_bit(FLG_HDLC, &ch->bch.Flags);
  1247. test_and_clear_bit(FLG_TRANSPARENT, &ch->bch.Flags);
  1248. break;
  1249. case ISDN_P_B_RAW:
  1250. case ISDN_P_B_HDLC:
  1251. /* best is datapath 2 */
  1252. if (!test_and_set_bit(ISAR_DP2_USE, &ch->is->Flags))
  1253. ch->dpath = 2;
  1254. else if (!test_and_set_bit(ISAR_DP1_USE,
  1255. &ch->is->Flags))
  1256. ch->dpath = 1;
  1257. else {
  1258. pr_info("modeisar both paths in use\n");
  1259. return -EBUSY;
  1260. }
  1261. if (bprotocol == ISDN_P_B_HDLC)
  1262. test_and_set_bit(FLG_HDLC, &ch->bch.Flags);
  1263. else
  1264. test_and_set_bit(FLG_TRANSPARENT,
  1265. &ch->bch.Flags);
  1266. break;
  1267. case ISDN_P_B_MODEM_ASYNC:
  1268. case ISDN_P_B_T30_FAX:
  1269. case ISDN_P_B_L2DTMF:
  1270. /* only datapath 1 */
  1271. if (!test_and_set_bit(ISAR_DP1_USE, &ch->is->Flags))
  1272. ch->dpath = 1;
  1273. else {
  1274. pr_info("%s: ISAR modeisar analog functions"
  1275. "only with DP1\n", ch->is->name);
  1276. return -EBUSY;
  1277. }
  1278. break;
  1279. default:
  1280. pr_info("%s: protocol not known %x\n", ch->is->name,
  1281. bprotocol);
  1282. return -ENOPROTOOPT;
  1283. }
  1284. }
  1285. pr_debug("%s: ISAR ch%d dp%d protocol %x->%x\n", ch->is->name,
  1286. ch->bch.nr, ch->dpath, ch->bch.state, bprotocol);
  1287. ch->bch.state = bprotocol;
  1288. setup_pump(ch);
  1289. setup_iom2(ch);
  1290. setup_sart(ch);
  1291. if (ch->bch.state == ISDN_P_NONE) {
  1292. /* Clear resources */
  1293. if (ch->dpath == 1)
  1294. test_and_clear_bit(ISAR_DP1_USE, &ch->is->Flags);
  1295. else if (ch->dpath == 2)
  1296. test_and_clear_bit(ISAR_DP2_USE, &ch->is->Flags);
  1297. ch->dpath = 0;
  1298. ch->is->ctrl(ch->is->hw, HW_DEACT_IND, ch->bch.nr);
  1299. } else
  1300. ch->is->ctrl(ch->is->hw, HW_ACTIVATE_IND, ch->bch.nr);
  1301. return 0;
  1302. }
  1303. static void
  1304. isar_pump_cmd(struct isar_ch *ch, u32 cmd, u8 para)
  1305. {
  1306. u8 dps = SET_DPS(ch->dpath);
  1307. u8 ctrl = 0, nom = 0, p1 = 0;
  1308. pr_debug("%s: isar_pump_cmd %x/%x state(%x)\n",
  1309. ch->is->name, cmd, para, ch->bch.state);
  1310. switch (cmd) {
  1311. case HW_MOD_FTM:
  1312. if (ch->state == STFAX_READY) {
  1313. p1 = para;
  1314. ctrl = PCTRL_CMD_FTM;
  1315. nom = 1;
  1316. ch->state = STFAX_LINE;
  1317. ch->cmd = ctrl;
  1318. ch->mod = para;
  1319. ch->newmod = 0;
  1320. ch->newcmd = 0;
  1321. ch->try_mod = 3;
  1322. } else if ((ch->state == STFAX_ACTIV) &&
  1323. (ch->cmd == PCTRL_CMD_FTM) && (ch->mod == para))
  1324. deliver_status(ch, HW_MOD_CONNECT);
  1325. else {
  1326. ch->newmod = para;
  1327. ch->newcmd = PCTRL_CMD_FTM;
  1328. nom = 0;
  1329. ctrl = PCTRL_CMD_ESC;
  1330. ch->state = STFAX_ESCAPE;
  1331. }
  1332. break;
  1333. case HW_MOD_FTH:
  1334. if (ch->state == STFAX_READY) {
  1335. p1 = para;
  1336. ctrl = PCTRL_CMD_FTH;
  1337. nom = 1;
  1338. ch->state = STFAX_LINE;
  1339. ch->cmd = ctrl;
  1340. ch->mod = para;
  1341. ch->newmod = 0;
  1342. ch->newcmd = 0;
  1343. ch->try_mod = 3;
  1344. } else if ((ch->state == STFAX_ACTIV) &&
  1345. (ch->cmd == PCTRL_CMD_FTH) && (ch->mod == para))
  1346. deliver_status(ch, HW_MOD_CONNECT);
  1347. else {
  1348. ch->newmod = para;
  1349. ch->newcmd = PCTRL_CMD_FTH;
  1350. nom = 0;
  1351. ctrl = PCTRL_CMD_ESC;
  1352. ch->state = STFAX_ESCAPE;
  1353. }
  1354. break;
  1355. case HW_MOD_FRM:
  1356. if (ch->state == STFAX_READY) {
  1357. p1 = para;
  1358. ctrl = PCTRL_CMD_FRM;
  1359. nom = 1;
  1360. ch->state = STFAX_LINE;
  1361. ch->cmd = ctrl;
  1362. ch->mod = para;
  1363. ch->newmod = 0;
  1364. ch->newcmd = 0;
  1365. ch->try_mod = 3;
  1366. } else if ((ch->state == STFAX_ACTIV) &&
  1367. (ch->cmd == PCTRL_CMD_FRM) && (ch->mod == para))
  1368. deliver_status(ch, HW_MOD_CONNECT);
  1369. else {
  1370. ch->newmod = para;
  1371. ch->newcmd = PCTRL_CMD_FRM;
  1372. nom = 0;
  1373. ctrl = PCTRL_CMD_ESC;
  1374. ch->state = STFAX_ESCAPE;
  1375. }
  1376. break;
  1377. case HW_MOD_FRH:
  1378. if (ch->state == STFAX_READY) {
  1379. p1 = para;
  1380. ctrl = PCTRL_CMD_FRH;
  1381. nom = 1;
  1382. ch->state = STFAX_LINE;
  1383. ch->cmd = ctrl;
  1384. ch->mod = para;
  1385. ch->newmod = 0;
  1386. ch->newcmd = 0;
  1387. ch->try_mod = 3;
  1388. } else if ((ch->state == STFAX_ACTIV) &&
  1389. (ch->cmd == PCTRL_CMD_FRH) && (ch->mod == para))
  1390. deliver_status(ch, HW_MOD_CONNECT);
  1391. else {
  1392. ch->newmod = para;
  1393. ch->newcmd = PCTRL_CMD_FRH;
  1394. nom = 0;
  1395. ctrl = PCTRL_CMD_ESC;
  1396. ch->state = STFAX_ESCAPE;
  1397. }
  1398. break;
  1399. case PCTRL_CMD_TDTMF:
  1400. p1 = para;
  1401. nom = 1;
  1402. ctrl = PCTRL_CMD_TDTMF;
  1403. break;
  1404. }
  1405. if (ctrl)
  1406. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, ctrl, nom, &p1);
  1407. }
  1408. static void
  1409. isar_setup(struct isar_hw *isar)
  1410. {
  1411. u8 msg;
  1412. int i;
  1413. /* Dpath 1, 2 */
  1414. msg = 61;
  1415. for (i = 0; i < 2; i++) {
  1416. /* Buffer Config */
  1417. send_mbox(isar, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) |
  1418. ISAR_HIS_P12CFG, 4, 1, &msg);
  1419. isar->ch[i].mml = msg;
  1420. isar->ch[i].bch.state = 0;
  1421. isar->ch[i].dpath = i + 1;
  1422. modeisar(&isar->ch[i], ISDN_P_NONE);
  1423. }
  1424. }
  1425. static int
  1426. isar_l2l1(struct mISDNchannel *ch, struct sk_buff *skb)
  1427. {
  1428. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  1429. struct isar_ch *ich = container_of(bch, struct isar_ch, bch);
  1430. int ret = -EINVAL;
  1431. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  1432. u32 id, *val;
  1433. u_long flags;
  1434. switch (hh->prim) {
  1435. case PH_DATA_REQ:
  1436. spin_lock_irqsave(ich->is->hwlock, flags);
  1437. ret = bchannel_senddata(bch, skb);
  1438. if (ret > 0) { /* direct TX */
  1439. ret = 0;
  1440. isar_fill_fifo(ich);
  1441. }
  1442. spin_unlock_irqrestore(ich->is->hwlock, flags);
  1443. return ret;
  1444. case PH_ACTIVATE_REQ:
  1445. spin_lock_irqsave(ich->is->hwlock, flags);
  1446. if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
  1447. ret = modeisar(ich, ch->protocol);
  1448. else
  1449. ret = 0;
  1450. spin_unlock_irqrestore(ich->is->hwlock, flags);
  1451. if (!ret)
  1452. _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
  1453. NULL, GFP_KERNEL);
  1454. break;
  1455. case PH_DEACTIVATE_REQ:
  1456. spin_lock_irqsave(ich->is->hwlock, flags);
  1457. mISDN_clear_bchannel(bch);
  1458. modeisar(ich, ISDN_P_NONE);
  1459. spin_unlock_irqrestore(ich->is->hwlock, flags);
  1460. _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
  1461. NULL, GFP_KERNEL);
  1462. ret = 0;
  1463. break;
  1464. case PH_CONTROL_REQ:
  1465. val = (u32 *)skb->data;
  1466. pr_debug("%s: PH_CONTROL | REQUEST %x/%x\n", ich->is->name,
  1467. hh->id, *val);
  1468. if ((hh->id == 0) && ((*val & ~DTMF_TONE_MASK) ==
  1469. DTMF_TONE_VAL)) {
  1470. if (bch->state == ISDN_P_B_L2DTMF) {
  1471. char tt = *val & DTMF_TONE_MASK;
  1472. if (tt == '*')
  1473. tt = 0x1e;
  1474. else if (tt == '#')
  1475. tt = 0x1f;
  1476. else if (tt > '9')
  1477. tt -= 7;
  1478. tt &= 0x1f;
  1479. spin_lock_irqsave(ich->is->hwlock, flags);
  1480. isar_pump_cmd(ich, PCTRL_CMD_TDTMF, tt);
  1481. spin_unlock_irqrestore(ich->is->hwlock, flags);
  1482. } else {
  1483. pr_info("%s: DTMF send wrong protocol %x\n",
  1484. __func__, bch->state);
  1485. return -EINVAL;
  1486. }
  1487. } else if ((hh->id == HW_MOD_FRM) || (hh->id == HW_MOD_FRH) ||
  1488. (hh->id == HW_MOD_FTM) || (hh->id == HW_MOD_FTH)) {
  1489. for (id = 0; id < FAXMODCNT; id++)
  1490. if (faxmodulation[id] == *val)
  1491. break;
  1492. if ((FAXMODCNT > id) &&
  1493. test_bit(FLG_INITIALIZED, &bch->Flags)) {
  1494. pr_debug("%s: isar: new mod\n", ich->is->name);
  1495. isar_pump_cmd(ich, hh->id, *val);
  1496. ret = 0;
  1497. } else {
  1498. pr_info("%s: wrong modulation\n",
  1499. ich->is->name);
  1500. ret = -EINVAL;
  1501. }
  1502. } else if (hh->id == HW_MOD_LASTDATA)
  1503. test_and_set_bit(FLG_DLEETX, &bch->Flags);
  1504. else {
  1505. pr_info("%s: unknown PH_CONTROL_REQ %x\n",
  1506. ich->is->name, hh->id);
  1507. ret = -EINVAL;
  1508. }
  1509. /* fall through */
  1510. default:
  1511. pr_info("%s: %s unknown prim(%x,%x)\n",
  1512. ich->is->name, __func__, hh->prim, hh->id);
  1513. ret = -EINVAL;
  1514. }
  1515. if (!ret)
  1516. dev_kfree_skb(skb);
  1517. return ret;
  1518. }
  1519. static int
  1520. channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
  1521. {
  1522. return mISDN_ctrl_bchannel(bch, cq);
  1523. }
  1524. static int
  1525. isar_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  1526. {
  1527. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  1528. struct isar_ch *ich = container_of(bch, struct isar_ch, bch);
  1529. int ret = -EINVAL;
  1530. u_long flags;
  1531. pr_debug("%s: %s cmd:%x %p\n", ich->is->name, __func__, cmd, arg);
  1532. switch (cmd) {
  1533. case CLOSE_CHANNEL:
  1534. test_and_clear_bit(FLG_OPEN, &bch->Flags);
  1535. cancel_work_sync(&bch->workq);
  1536. spin_lock_irqsave(ich->is->hwlock, flags);
  1537. mISDN_clear_bchannel(bch);
  1538. modeisar(ich, ISDN_P_NONE);
  1539. spin_unlock_irqrestore(ich->is->hwlock, flags);
  1540. ch->protocol = ISDN_P_NONE;
  1541. ch->peer = NULL;
  1542. module_put(ich->is->owner);
  1543. ret = 0;
  1544. break;
  1545. case CONTROL_CHANNEL:
  1546. ret = channel_bctrl(bch, arg);
  1547. break;
  1548. default:
  1549. pr_info("%s: %s unknown prim(%x)\n",
  1550. ich->is->name, __func__, cmd);
  1551. }
  1552. return ret;
  1553. }
  1554. static void
  1555. free_isar(struct isar_hw *isar)
  1556. {
  1557. modeisar(&isar->ch[0], ISDN_P_NONE);
  1558. modeisar(&isar->ch[1], ISDN_P_NONE);
  1559. del_timer(&isar->ch[0].ftimer);
  1560. del_timer(&isar->ch[1].ftimer);
  1561. test_and_clear_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags);
  1562. test_and_clear_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags);
  1563. }
  1564. static int
  1565. init_isar(struct isar_hw *isar)
  1566. {
  1567. int cnt = 3;
  1568. while (cnt--) {
  1569. isar->version = ISARVersion(isar);
  1570. if (isar->ch[0].bch.debug & DEBUG_HW)
  1571. pr_notice("%s: Testing version %d (%d time)\n",
  1572. isar->name, isar->version, 3 - cnt);
  1573. if (isar->version == 1)
  1574. break;
  1575. isar->ctrl(isar->hw, HW_RESET_REQ, 0);
  1576. }
  1577. if (isar->version != 1)
  1578. return -EINVAL;
  1579. timer_setup(&isar->ch[0].ftimer, ftimer_handler, 0);
  1580. test_and_set_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags);
  1581. timer_setup(&isar->ch[1].ftimer, ftimer_handler, 0);
  1582. test_and_set_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags);
  1583. return 0;
  1584. }
  1585. static int
  1586. isar_open(struct isar_hw *isar, struct channel_req *rq)
  1587. {
  1588. struct bchannel *bch;
  1589. if (rq->adr.channel == 0 || rq->adr.channel > 2)
  1590. return -EINVAL;
  1591. if (rq->protocol == ISDN_P_NONE)
  1592. return -EINVAL;
  1593. bch = &isar->ch[rq->adr.channel - 1].bch;
  1594. if (test_and_set_bit(FLG_OPEN, &bch->Flags))
  1595. return -EBUSY; /* b-channel can be only open once */
  1596. bch->ch.protocol = rq->protocol;
  1597. rq->ch = &bch->ch;
  1598. return 0;
  1599. }
  1600. u32
  1601. mISDNisar_init(struct isar_hw *isar, void *hw)
  1602. {
  1603. u32 ret, i;
  1604. isar->hw = hw;
  1605. for (i = 0; i < 2; i++) {
  1606. isar->ch[i].bch.nr = i + 1;
  1607. mISDN_initbchannel(&isar->ch[i].bch, MAX_DATA_MEM, 32);
  1608. isar->ch[i].bch.ch.nr = i + 1;
  1609. isar->ch[i].bch.ch.send = &isar_l2l1;
  1610. isar->ch[i].bch.ch.ctrl = isar_bctrl;
  1611. isar->ch[i].bch.hw = hw;
  1612. isar->ch[i].is = isar;
  1613. }
  1614. isar->init = &init_isar;
  1615. isar->release = &free_isar;
  1616. isar->firmware = &load_firmware;
  1617. isar->open = &isar_open;
  1618. ret = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
  1619. (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)) |
  1620. (1 << (ISDN_P_B_L2DTMF & ISDN_P_B_MASK)) |
  1621. (1 << (ISDN_P_B_MODEM_ASYNC & ISDN_P_B_MASK)) |
  1622. (1 << (ISDN_P_B_T30_FAX & ISDN_P_B_MASK));
  1623. return ret;
  1624. }
  1625. EXPORT_SYMBOL(mISDNisar_init);
  1626. static int __init isar_mod_init(void)
  1627. {
  1628. pr_notice("mISDN: ISAR driver Rev. %s\n", ISAR_REV);
  1629. return 0;
  1630. }
  1631. static void __exit isar_mod_cleanup(void)
  1632. {
  1633. pr_notice("mISDN: ISAR module unloaded\n");
  1634. }
  1635. module_init(isar_mod_init);
  1636. module_exit(isar_mod_cleanup);