os_pri.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* $Id: os_pri.c,v 1.32 2004/03/21 17:26:01 armin Exp $ */
  3. #include "platform.h"
  4. #include "debuglib.h"
  5. #include "cardtype.h"
  6. #include "pc.h"
  7. #include "pr_pc.h"
  8. #include "di_defs.h"
  9. #include "dsp_defs.h"
  10. #include "di.h"
  11. #include "io.h"
  12. #include "xdi_msg.h"
  13. #include "xdi_adapter.h"
  14. #include "os_pri.h"
  15. #include "diva_pci.h"
  16. #include "mi_pc.h"
  17. #include "pc_maint.h"
  18. #include "dsp_tst.h"
  19. #include "diva_dma.h"
  20. #include "dsrv_pri.h"
  21. /* --------------------------------------------------------------------------
  22. OS Dependent part of XDI driver for DIVA PRI Adapter
  23. DSP detection/validation by Anthony Booth (Eicon Networks, www.eicon.com)
  24. -------------------------------------------------------------------------- */
  25. #define DIVA_PRI_NO_PCI_BIOS_WORKAROUND 1
  26. extern int diva_card_read_xlog(diva_os_xdi_adapter_t *a);
  27. /*
  28. ** IMPORTS
  29. */
  30. extern void prepare_pri_functions(PISDN_ADAPTER IoAdapter);
  31. extern void prepare_pri2_functions(PISDN_ADAPTER IoAdapter);
  32. extern void diva_xdi_display_adapter_features(int card);
  33. static int diva_pri_cleanup_adapter(diva_os_xdi_adapter_t *a);
  34. static int diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
  35. diva_xdi_um_cfg_cmd_t *cmd, int length);
  36. static int pri_get_serial_number(diva_os_xdi_adapter_t *a);
  37. static int diva_pri_stop_adapter(diva_os_xdi_adapter_t *a);
  38. static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t *a);
  39. /*
  40. ** Check card revision
  41. */
  42. static int pri_is_rev_2_card(int card_ordinal)
  43. {
  44. switch (card_ordinal) {
  45. case CARDTYPE_DIVASRV_P_30M_V2_PCI:
  46. case CARDTYPE_DIVASRV_VOICE_P_30M_V2_PCI:
  47. return (1);
  48. }
  49. return (0);
  50. }
  51. static void diva_pri_set_addresses(diva_os_xdi_adapter_t *a)
  52. {
  53. a->resources.pci.mem_type_id[MEM_TYPE_ADDRESS] = 0;
  54. a->resources.pci.mem_type_id[MEM_TYPE_CONTROL] = 2;
  55. a->resources.pci.mem_type_id[MEM_TYPE_CONFIG] = 4;
  56. a->resources.pci.mem_type_id[MEM_TYPE_RAM] = 0;
  57. a->resources.pci.mem_type_id[MEM_TYPE_RESET] = 2;
  58. a->resources.pci.mem_type_id[MEM_TYPE_CFG] = 4;
  59. a->resources.pci.mem_type_id[MEM_TYPE_PROM] = 3;
  60. a->xdi_adapter.Address = a->resources.pci.addr[0];
  61. a->xdi_adapter.Control = a->resources.pci.addr[2];
  62. a->xdi_adapter.Config = a->resources.pci.addr[4];
  63. a->xdi_adapter.ram = a->resources.pci.addr[0];
  64. a->xdi_adapter.ram += MP_SHARED_RAM_OFFSET;
  65. a->xdi_adapter.reset = a->resources.pci.addr[2];
  66. a->xdi_adapter.reset += MP_RESET;
  67. a->xdi_adapter.cfg = a->resources.pci.addr[4];
  68. a->xdi_adapter.cfg += MP_IRQ_RESET;
  69. a->xdi_adapter.sdram_bar = a->resources.pci.bar[0];
  70. a->xdi_adapter.prom = a->resources.pci.addr[3];
  71. }
  72. /*
  73. ** BAR0 - SDRAM, MP_MEMORY_SIZE, MP2_MEMORY_SIZE by Rev.2
  74. ** BAR1 - DEVICES, 0x1000
  75. ** BAR2 - CONTROL (REG), 0x2000
  76. ** BAR3 - FLASH (REG), 0x8000
  77. ** BAR4 - CONFIG (CFG), 0x1000
  78. */
  79. int diva_pri_init_card(diva_os_xdi_adapter_t *a)
  80. {
  81. int bar = 0;
  82. int pri_rev_2;
  83. unsigned long bar_length[5] = {
  84. MP_MEMORY_SIZE,
  85. 0x1000,
  86. 0x2000,
  87. 0x8000,
  88. 0x1000
  89. };
  90. pri_rev_2 = pri_is_rev_2_card(a->CardOrdinal);
  91. if (pri_rev_2) {
  92. bar_length[0] = MP2_MEMORY_SIZE;
  93. }
  94. /*
  95. Set properties
  96. */
  97. a->xdi_adapter.Properties = CardProperties[a->CardOrdinal];
  98. DBG_LOG(("Load %s", a->xdi_adapter.Properties.Name))
  99. /*
  100. First initialization step: get and check hardware resoures.
  101. Do not map resources and do not acecess card at this step
  102. */
  103. for (bar = 0; bar < 5; bar++) {
  104. a->resources.pci.bar[bar] =
  105. divasa_get_pci_bar(a->resources.pci.bus,
  106. a->resources.pci.func, bar,
  107. a->resources.pci.hdev);
  108. if (!a->resources.pci.bar[bar]
  109. || (a->resources.pci.bar[bar] == 0xFFFFFFF0)) {
  110. DBG_ERR(("A: invalid bar[%d]=%08x", bar,
  111. a->resources.pci.bar[bar]))
  112. return (-1);
  113. }
  114. }
  115. a->resources.pci.irq =
  116. (byte) divasa_get_pci_irq(a->resources.pci.bus,
  117. a->resources.pci.func,
  118. a->resources.pci.hdev);
  119. if (!a->resources.pci.irq) {
  120. DBG_ERR(("A: invalid irq"));
  121. return (-1);
  122. }
  123. /*
  124. Map all BAR's
  125. */
  126. for (bar = 0; bar < 5; bar++) {
  127. a->resources.pci.addr[bar] =
  128. divasa_remap_pci_bar(a, bar, a->resources.pci.bar[bar],
  129. bar_length[bar]);
  130. if (!a->resources.pci.addr[bar]) {
  131. DBG_ERR(("A: A(%d), can't map bar[%d]",
  132. a->controller, bar))
  133. diva_pri_cleanup_adapter(a);
  134. return (-1);
  135. }
  136. }
  137. /*
  138. Set all memory areas
  139. */
  140. diva_pri_set_addresses(a);
  141. /*
  142. Get Serial Number of this adapter
  143. */
  144. if (pri_get_serial_number(a)) {
  145. dword serNo;
  146. serNo = a->resources.pci.bar[1] & 0xffff0000;
  147. serNo |= ((dword) a->resources.pci.bus) << 8;
  148. serNo += (a->resources.pci.func + a->controller + 1);
  149. a->xdi_adapter.serialNo = serNo & ~0xFF000000;
  150. DBG_ERR(("A: A(%d) can't get Serial Number, generated serNo=%ld",
  151. a->controller, a->xdi_adapter.serialNo))
  152. }
  153. /*
  154. Initialize os objects
  155. */
  156. if (diva_os_initialize_spin_lock(&a->xdi_adapter.isr_spin_lock, "isr")) {
  157. diva_pri_cleanup_adapter(a);
  158. return (-1);
  159. }
  160. if (diva_os_initialize_spin_lock
  161. (&a->xdi_adapter.data_spin_lock, "data")) {
  162. diva_pri_cleanup_adapter(a);
  163. return (-1);
  164. }
  165. strcpy(a->xdi_adapter.req_soft_isr.dpc_thread_name, "kdivasprid");
  166. if (diva_os_initialize_soft_isr(&a->xdi_adapter.req_soft_isr,
  167. DIDpcRoutine, &a->xdi_adapter)) {
  168. diva_pri_cleanup_adapter(a);
  169. return (-1);
  170. }
  171. /*
  172. Do not initialize second DPC - only one thread will be created
  173. */
  174. a->xdi_adapter.isr_soft_isr.object =
  175. a->xdi_adapter.req_soft_isr.object;
  176. /*
  177. Next step of card initialization:
  178. set up all interface pointers
  179. */
  180. a->xdi_adapter.Channels = CardProperties[a->CardOrdinal].Channels;
  181. a->xdi_adapter.e_max = CardProperties[a->CardOrdinal].E_info;
  182. a->xdi_adapter.e_tbl =
  183. diva_os_malloc(0, a->xdi_adapter.e_max * sizeof(E_INFO));
  184. if (!a->xdi_adapter.e_tbl) {
  185. diva_pri_cleanup_adapter(a);
  186. return (-1);
  187. }
  188. memset(a->xdi_adapter.e_tbl, 0x00, a->xdi_adapter.e_max * sizeof(E_INFO));
  189. a->xdi_adapter.a.io = &a->xdi_adapter;
  190. a->xdi_adapter.DIRequest = request;
  191. a->interface.cleanup_adapter_proc = diva_pri_cleanup_adapter;
  192. a->interface.cmd_proc = diva_pri_cmd_card_proc;
  193. if (pri_rev_2) {
  194. prepare_pri2_functions(&a->xdi_adapter);
  195. } else {
  196. prepare_pri_functions(&a->xdi_adapter);
  197. }
  198. a->dsp_mask = diva_pri_detect_dsps(a);
  199. /*
  200. Allocate DMA map
  201. */
  202. if (pri_rev_2) {
  203. diva_init_dma_map(a->resources.pci.hdev,
  204. (struct _diva_dma_map_entry **) &a->xdi_adapter.dma_map, 32);
  205. }
  206. /*
  207. Set IRQ handler
  208. */
  209. a->xdi_adapter.irq_info.irq_nr = a->resources.pci.irq;
  210. sprintf(a->xdi_adapter.irq_info.irq_name,
  211. "DIVA PRI %ld", (long) a->xdi_adapter.serialNo);
  212. if (diva_os_register_irq(a, a->xdi_adapter.irq_info.irq_nr,
  213. a->xdi_adapter.irq_info.irq_name)) {
  214. diva_pri_cleanup_adapter(a);
  215. return (-1);
  216. }
  217. a->xdi_adapter.irq_info.registered = 1;
  218. diva_log_info("%s IRQ:%d SerNo:%d", a->xdi_adapter.Properties.Name,
  219. a->resources.pci.irq, a->xdi_adapter.serialNo);
  220. return (0);
  221. }
  222. static int diva_pri_cleanup_adapter(diva_os_xdi_adapter_t *a)
  223. {
  224. int bar = 0;
  225. /*
  226. Stop Adapter if adapter is running
  227. */
  228. if (a->xdi_adapter.Initialized) {
  229. diva_pri_stop_adapter(a);
  230. }
  231. /*
  232. Remove ISR Handler
  233. */
  234. if (a->xdi_adapter.irq_info.registered) {
  235. diva_os_remove_irq(a, a->xdi_adapter.irq_info.irq_nr);
  236. }
  237. a->xdi_adapter.irq_info.registered = 0;
  238. /*
  239. Step 1: unmap all BAR's, if any was mapped
  240. */
  241. for (bar = 0; bar < 5; bar++) {
  242. if (a->resources.pci.bar[bar]
  243. && a->resources.pci.addr[bar]) {
  244. divasa_unmap_pci_bar(a->resources.pci.addr[bar]);
  245. a->resources.pci.bar[bar] = 0;
  246. a->resources.pci.addr[bar] = NULL;
  247. }
  248. }
  249. /*
  250. Free OS objects
  251. */
  252. diva_os_cancel_soft_isr(&a->xdi_adapter.isr_soft_isr);
  253. diva_os_cancel_soft_isr(&a->xdi_adapter.req_soft_isr);
  254. diva_os_remove_soft_isr(&a->xdi_adapter.req_soft_isr);
  255. a->xdi_adapter.isr_soft_isr.object = NULL;
  256. diva_os_destroy_spin_lock(&a->xdi_adapter.isr_spin_lock, "rm");
  257. diva_os_destroy_spin_lock(&a->xdi_adapter.data_spin_lock, "rm");
  258. /*
  259. Free memory accupied by XDI adapter
  260. */
  261. if (a->xdi_adapter.e_tbl) {
  262. diva_os_free(0, a->xdi_adapter.e_tbl);
  263. a->xdi_adapter.e_tbl = NULL;
  264. }
  265. a->xdi_adapter.Channels = 0;
  266. a->xdi_adapter.e_max = 0;
  267. /*
  268. Free adapter DMA map
  269. */
  270. diva_free_dma_map(a->resources.pci.hdev,
  271. (struct _diva_dma_map_entry *) a->xdi_adapter.
  272. dma_map);
  273. a->xdi_adapter.dma_map = NULL;
  274. /*
  275. Detach this adapter from debug driver
  276. */
  277. return (0);
  278. }
  279. /*
  280. ** Activate On Board Boot Loader
  281. */
  282. static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter)
  283. {
  284. dword i;
  285. struct mp_load __iomem *boot;
  286. if (!IoAdapter->Address || !IoAdapter->reset) {
  287. return (-1);
  288. }
  289. if (IoAdapter->Initialized) {
  290. DBG_ERR(("A: A(%d) can't reset PRI adapter - please stop first",
  291. IoAdapter->ANum))
  292. return (-1);
  293. }
  294. boot = (struct mp_load __iomem *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
  295. WRITE_DWORD(&boot->err, 0);
  296. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  297. IoAdapter->rstFnc(IoAdapter);
  298. diva_os_wait(10);
  299. boot = (struct mp_load __iomem *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
  300. i = READ_DWORD(&boot->live);
  301. diva_os_wait(10);
  302. if (i == READ_DWORD(&boot->live)) {
  303. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  304. DBG_ERR(("A: A(%d) CPU on PRI %ld is not alive!",
  305. IoAdapter->ANum, IoAdapter->serialNo))
  306. return (-1);
  307. }
  308. if (READ_DWORD(&boot->err)) {
  309. DBG_ERR(("A: A(%d) PRI %ld Board Selftest failed, error=%08lx",
  310. IoAdapter->ANum, IoAdapter->serialNo,
  311. READ_DWORD(&boot->err)))
  312. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  313. return (-1);
  314. }
  315. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  316. /*
  317. Forget all outstanding entities
  318. */
  319. IoAdapter->e_count = 0;
  320. if (IoAdapter->e_tbl) {
  321. memset(IoAdapter->e_tbl, 0x00,
  322. IoAdapter->e_max * sizeof(E_INFO));
  323. }
  324. IoAdapter->head = 0;
  325. IoAdapter->tail = 0;
  326. IoAdapter->assign = 0;
  327. IoAdapter->trapped = 0;
  328. memset(&IoAdapter->a.IdTable[0], 0x00,
  329. sizeof(IoAdapter->a.IdTable));
  330. memset(&IoAdapter->a.IdTypeTable[0], 0x00,
  331. sizeof(IoAdapter->a.IdTypeTable));
  332. memset(&IoAdapter->a.FlowControlIdTable[0], 0x00,
  333. sizeof(IoAdapter->a.FlowControlIdTable));
  334. memset(&IoAdapter->a.FlowControlSkipTable[0], 0x00,
  335. sizeof(IoAdapter->a.FlowControlSkipTable));
  336. memset(&IoAdapter->a.misc_flags_table[0], 0x00,
  337. sizeof(IoAdapter->a.misc_flags_table));
  338. memset(&IoAdapter->a.rx_stream[0], 0x00,
  339. sizeof(IoAdapter->a.rx_stream));
  340. memset(&IoAdapter->a.tx_stream[0], 0x00,
  341. sizeof(IoAdapter->a.tx_stream));
  342. memset(&IoAdapter->a.tx_pos[0], 0x00, sizeof(IoAdapter->a.tx_pos));
  343. memset(&IoAdapter->a.rx_pos[0], 0x00, sizeof(IoAdapter->a.rx_pos));
  344. return (0);
  345. }
  346. static int
  347. diva_pri_write_sdram_block(PISDN_ADAPTER IoAdapter,
  348. dword address,
  349. const byte *data, dword length, dword limit)
  350. {
  351. byte __iomem *p = DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
  352. byte __iomem *mem = p;
  353. if (((address + length) >= limit) || !mem) {
  354. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p);
  355. DBG_ERR(("A: A(%d) write PRI address=0x%08lx",
  356. IoAdapter->ANum, address + length))
  357. return (-1);
  358. }
  359. mem += address;
  360. /* memcpy_toio(), maybe? */
  361. while (length--) {
  362. WRITE_BYTE(mem++, *data++);
  363. }
  364. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p);
  365. return (0);
  366. }
  367. static int
  368. diva_pri_start_adapter(PISDN_ADAPTER IoAdapter,
  369. dword start_address, dword features)
  370. {
  371. dword i;
  372. int started = 0;
  373. byte __iomem *p;
  374. struct mp_load __iomem *boot = (struct mp_load __iomem *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
  375. ADAPTER *a = &IoAdapter->a;
  376. if (IoAdapter->Initialized) {
  377. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  378. DBG_ERR(("A: A(%d) pri_start_adapter, adapter already running",
  379. IoAdapter->ANum))
  380. return (-1);
  381. }
  382. if (!boot) {
  383. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  384. DBG_ERR(("A: PRI %ld can't start, adapter not mapped",
  385. IoAdapter->serialNo))
  386. return (-1);
  387. }
  388. sprintf(IoAdapter->Name, "A(%d)", (int) IoAdapter->ANum);
  389. DBG_LOG(("A(%d) start PRI at 0x%08lx", IoAdapter->ANum,
  390. start_address))
  391. WRITE_DWORD(&boot->addr, start_address);
  392. WRITE_DWORD(&boot->cmd, 3);
  393. for (i = 0; i < 300; ++i) {
  394. diva_os_wait(10);
  395. if ((READ_DWORD(&boot->signature) >> 16) == 0x4447) {
  396. DBG_LOG(("A(%d) Protocol startup time %d.%02d seconds",
  397. IoAdapter->ANum, (i / 100), (i % 100)))
  398. started = 1;
  399. break;
  400. }
  401. }
  402. if (!started) {
  403. byte __iomem *p = (byte __iomem *)boot;
  404. dword TrapId;
  405. dword debug;
  406. TrapId = READ_DWORD(&p[0x80]);
  407. debug = READ_DWORD(&p[0x1c]);
  408. DBG_ERR(("A(%d) Adapter start failed 0x%08lx, TrapId=%08lx, debug=%08lx",
  409. IoAdapter->ANum, READ_DWORD(&boot->signature),
  410. TrapId, debug))
  411. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  412. if (IoAdapter->trapFnc) {
  413. (*(IoAdapter->trapFnc)) (IoAdapter);
  414. }
  415. IoAdapter->stop(IoAdapter);
  416. return (-1);
  417. }
  418. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  419. IoAdapter->Initialized = true;
  420. /*
  421. Check Interrupt
  422. */
  423. IoAdapter->IrqCount = 0;
  424. p = DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
  425. WRITE_DWORD(p, (dword)~0x03E00000);
  426. DIVA_OS_MEM_DETACH_CFG(IoAdapter, p);
  427. a->ReadyInt = 1;
  428. a->ram_out(a, &PR_RAM->ReadyInt, 1);
  429. for (i = 100; !IoAdapter->IrqCount && (i-- > 0); diva_os_wait(10));
  430. if (!IoAdapter->IrqCount) {
  431. DBG_ERR(("A: A(%d) interrupt test failed",
  432. IoAdapter->ANum))
  433. IoAdapter->Initialized = false;
  434. IoAdapter->stop(IoAdapter);
  435. return (-1);
  436. }
  437. IoAdapter->Properties.Features = (word) features;
  438. diva_xdi_display_adapter_features(IoAdapter->ANum);
  439. DBG_LOG(("A(%d) PRI adapter successfully started", IoAdapter->ANum))
  440. /*
  441. Register with DIDD
  442. */
  443. diva_xdi_didd_register_adapter(IoAdapter->ANum);
  444. return (0);
  445. }
  446. static void diva_pri_clear_interrupts(diva_os_xdi_adapter_t *a)
  447. {
  448. PISDN_ADAPTER IoAdapter = &a->xdi_adapter;
  449. /*
  450. clear any pending interrupt
  451. */
  452. IoAdapter->disIrq(IoAdapter);
  453. IoAdapter->tst_irq(&IoAdapter->a);
  454. IoAdapter->clr_irq(&IoAdapter->a);
  455. IoAdapter->tst_irq(&IoAdapter->a);
  456. /*
  457. kill pending dpcs
  458. */
  459. diva_os_cancel_soft_isr(&IoAdapter->req_soft_isr);
  460. diva_os_cancel_soft_isr(&IoAdapter->isr_soft_isr);
  461. }
  462. /*
  463. ** Stop Adapter, but do not unmap/unregister - adapter
  464. ** will be restarted later
  465. */
  466. static int diva_pri_stop_adapter(diva_os_xdi_adapter_t *a)
  467. {
  468. PISDN_ADAPTER IoAdapter = &a->xdi_adapter;
  469. int i = 100;
  470. if (!IoAdapter->ram) {
  471. return (-1);
  472. }
  473. if (!IoAdapter->Initialized) {
  474. DBG_ERR(("A: A(%d) can't stop PRI adapter - not running",
  475. IoAdapter->ANum))
  476. return (-1); /* nothing to stop */
  477. }
  478. IoAdapter->Initialized = 0;
  479. /*
  480. Disconnect Adapter from DIDD
  481. */
  482. diva_xdi_didd_remove_adapter(IoAdapter->ANum);
  483. /*
  484. Stop interrupts
  485. */
  486. a->clear_interrupts_proc = diva_pri_clear_interrupts;
  487. IoAdapter->a.ReadyInt = 1;
  488. IoAdapter->a.ram_inc(&IoAdapter->a, &PR_RAM->ReadyInt);
  489. do {
  490. diva_os_sleep(10);
  491. } while (i-- && a->clear_interrupts_proc);
  492. if (a->clear_interrupts_proc) {
  493. diva_pri_clear_interrupts(a);
  494. a->clear_interrupts_proc = NULL;
  495. DBG_ERR(("A: A(%d) no final interrupt from PRI adapter",
  496. IoAdapter->ANum))
  497. }
  498. IoAdapter->a.ReadyInt = 0;
  499. /*
  500. Stop and reset adapter
  501. */
  502. IoAdapter->stop(IoAdapter);
  503. return (0);
  504. }
  505. /*
  506. ** Process commands form configuration/download framework and from
  507. ** user mode
  508. **
  509. ** return 0 on success
  510. */
  511. static int
  512. diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
  513. diva_xdi_um_cfg_cmd_t *cmd, int length)
  514. {
  515. int ret = -1;
  516. if (cmd->adapter != a->controller) {
  517. DBG_ERR(("A: pri_cmd, invalid controller=%d != %d",
  518. cmd->adapter, a->controller))
  519. return (-1);
  520. }
  521. switch (cmd->command) {
  522. case DIVA_XDI_UM_CMD_GET_CARD_ORDINAL:
  523. a->xdi_mbox.data_length = sizeof(dword);
  524. a->xdi_mbox.data =
  525. diva_os_malloc(0, a->xdi_mbox.data_length);
  526. if (a->xdi_mbox.data) {
  527. *(dword *) a->xdi_mbox.data =
  528. (dword) a->CardOrdinal;
  529. a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
  530. ret = 0;
  531. }
  532. break;
  533. case DIVA_XDI_UM_CMD_GET_SERIAL_NR:
  534. a->xdi_mbox.data_length = sizeof(dword);
  535. a->xdi_mbox.data =
  536. diva_os_malloc(0, a->xdi_mbox.data_length);
  537. if (a->xdi_mbox.data) {
  538. *(dword *) a->xdi_mbox.data =
  539. (dword) a->xdi_adapter.serialNo;
  540. a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
  541. ret = 0;
  542. }
  543. break;
  544. case DIVA_XDI_UM_CMD_GET_PCI_HW_CONFIG:
  545. a->xdi_mbox.data_length = sizeof(dword) * 9;
  546. a->xdi_mbox.data =
  547. diva_os_malloc(0, a->xdi_mbox.data_length);
  548. if (a->xdi_mbox.data) {
  549. int i;
  550. dword *data = (dword *) a->xdi_mbox.data;
  551. for (i = 0; i < 8; i++) {
  552. *data++ = a->resources.pci.bar[i];
  553. }
  554. *data++ = (dword) a->resources.pci.irq;
  555. a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
  556. ret = 0;
  557. }
  558. break;
  559. case DIVA_XDI_UM_CMD_RESET_ADAPTER:
  560. ret = diva_pri_reset_adapter(&a->xdi_adapter);
  561. break;
  562. case DIVA_XDI_UM_CMD_WRITE_SDRAM_BLOCK:
  563. ret = diva_pri_write_sdram_block(&a->xdi_adapter,
  564. cmd->command_data.
  565. write_sdram.offset,
  566. (byte *)&cmd[1],
  567. cmd->command_data.
  568. write_sdram.length,
  569. pri_is_rev_2_card(a->
  570. CardOrdinal)
  571. ? MP2_MEMORY_SIZE :
  572. MP_MEMORY_SIZE);
  573. break;
  574. case DIVA_XDI_UM_CMD_STOP_ADAPTER:
  575. ret = diva_pri_stop_adapter(a);
  576. break;
  577. case DIVA_XDI_UM_CMD_START_ADAPTER:
  578. ret = diva_pri_start_adapter(&a->xdi_adapter,
  579. cmd->command_data.start.
  580. offset,
  581. cmd->command_data.start.
  582. features);
  583. break;
  584. case DIVA_XDI_UM_CMD_SET_PROTOCOL_FEATURES:
  585. a->xdi_adapter.features =
  586. cmd->command_data.features.features;
  587. a->xdi_adapter.a.protocol_capabilities =
  588. a->xdi_adapter.features;
  589. DBG_TRC(("Set raw protocol features (%08x)",
  590. a->xdi_adapter.features))
  591. ret = 0;
  592. break;
  593. case DIVA_XDI_UM_CMD_GET_CARD_STATE:
  594. a->xdi_mbox.data_length = sizeof(dword);
  595. a->xdi_mbox.data =
  596. diva_os_malloc(0, a->xdi_mbox.data_length);
  597. if (a->xdi_mbox.data) {
  598. dword *data = (dword *) a->xdi_mbox.data;
  599. if (!a->xdi_adapter.ram ||
  600. !a->xdi_adapter.reset ||
  601. !a->xdi_adapter.cfg) {
  602. *data = 3;
  603. } else if (a->xdi_adapter.trapped) {
  604. *data = 2;
  605. } else if (a->xdi_adapter.Initialized) {
  606. *data = 1;
  607. } else {
  608. *data = 0;
  609. }
  610. a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
  611. ret = 0;
  612. }
  613. break;
  614. case DIVA_XDI_UM_CMD_READ_XLOG_ENTRY:
  615. ret = diva_card_read_xlog(a);
  616. break;
  617. case DIVA_XDI_UM_CMD_READ_SDRAM:
  618. if (a->xdi_adapter.Address) {
  619. if (
  620. (a->xdi_mbox.data_length =
  621. cmd->command_data.read_sdram.length)) {
  622. if (
  623. (a->xdi_mbox.data_length +
  624. cmd->command_data.read_sdram.offset) <
  625. a->xdi_adapter.MemorySize) {
  626. a->xdi_mbox.data =
  627. diva_os_malloc(0,
  628. a->xdi_mbox.
  629. data_length);
  630. if (a->xdi_mbox.data) {
  631. byte __iomem *p = DIVA_OS_MEM_ATTACH_ADDRESS(&a->xdi_adapter);
  632. byte __iomem *src = p;
  633. byte *dst = a->xdi_mbox.data;
  634. dword len = a->xdi_mbox.data_length;
  635. src += cmd->command_data.read_sdram.offset;
  636. while (len--) {
  637. *dst++ = READ_BYTE(src++);
  638. }
  639. a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
  640. DIVA_OS_MEM_DETACH_ADDRESS(&a->xdi_adapter, p);
  641. ret = 0;
  642. }
  643. }
  644. }
  645. }
  646. break;
  647. default:
  648. DBG_ERR(("A: A(%d) invalid cmd=%d", a->controller,
  649. cmd->command))
  650. }
  651. return (ret);
  652. }
  653. /*
  654. ** Get Serial Number
  655. */
  656. static int pri_get_serial_number(diva_os_xdi_adapter_t *a)
  657. {
  658. byte data[64];
  659. int i;
  660. dword len = sizeof(data);
  661. volatile byte __iomem *config;
  662. volatile byte __iomem *flash;
  663. byte c;
  664. /*
  665. * First set some GT6401x config registers before accessing the BOOT-ROM
  666. */
  667. config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
  668. c = READ_BYTE(&config[0xc3c]);
  669. if (!(c & 0x08)) {
  670. WRITE_BYTE(&config[0xc3c], c); /* Base Address enable register */
  671. }
  672. WRITE_BYTE(&config[LOW_BOOTCS_DREG], 0x00);
  673. WRITE_BYTE(&config[HI_BOOTCS_DREG], 0xFF);
  674. DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
  675. /*
  676. * Read only the last 64 bytes of manufacturing data
  677. */
  678. memset(data, '\0', len);
  679. flash = DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter);
  680. for (i = 0; i < len; i++) {
  681. data[i] = READ_BYTE(&flash[0x8000 - len + i]);
  682. }
  683. DIVA_OS_MEM_DETACH_PROM(&a->xdi_adapter, flash);
  684. config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
  685. WRITE_BYTE(&config[LOW_BOOTCS_DREG], 0xFC); /* Disable FLASH EPROM access */
  686. WRITE_BYTE(&config[HI_BOOTCS_DREG], 0xFF);
  687. DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
  688. if (memcmp(&data[48], "DIVAserverPR", 12)) {
  689. #if !defined(DIVA_PRI_NO_PCI_BIOS_WORKAROUND) /* { */
  690. word cmd = 0, cmd_org;
  691. void *addr;
  692. dword addr1, addr3, addr4;
  693. byte Bus, Slot;
  694. void *hdev;
  695. addr4 = a->resources.pci.bar[4];
  696. addr3 = a->resources.pci.bar[3]; /* flash */
  697. addr1 = a->resources.pci.bar[1]; /* unused */
  698. DBG_ERR(("A: apply Compaq BIOS workaround"))
  699. DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
  700. data[0], data[1], data[2], data[3],
  701. data[4], data[5], data[6], data[7]))
  702. Bus = a->resources.pci.bus;
  703. Slot = a->resources.pci.func;
  704. hdev = a->resources.pci.hdev;
  705. PCIread(Bus, Slot, 0x04, &cmd_org, sizeof(cmd_org), hdev);
  706. PCIwrite(Bus, Slot, 0x04, &cmd, sizeof(cmd), hdev);
  707. PCIwrite(Bus, Slot, 0x14, &addr4, sizeof(addr4), hdev);
  708. PCIwrite(Bus, Slot, 0x20, &addr1, sizeof(addr1), hdev);
  709. PCIwrite(Bus, Slot, 0x04, &cmd_org, sizeof(cmd_org), hdev);
  710. addr = a->resources.pci.addr[1];
  711. a->resources.pci.addr[1] = a->resources.pci.addr[4];
  712. a->resources.pci.addr[4] = addr;
  713. addr1 = a->resources.pci.bar[1];
  714. a->resources.pci.bar[1] = a->resources.pci.bar[4];
  715. a->resources.pci.bar[4] = addr1;
  716. /*
  717. Try to read Flash again
  718. */
  719. len = sizeof(data);
  720. config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
  721. if (!(config[0xc3c] & 0x08)) {
  722. config[0xc3c] |= 0x08; /* Base Address enable register */
  723. }
  724. config[LOW_BOOTCS_DREG] = 0x00;
  725. config[HI_BOOTCS_DREG] = 0xFF;
  726. DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
  727. memset(data, '\0', len);
  728. flash = DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter);
  729. for (i = 0; i < len; i++) {
  730. data[i] = flash[0x8000 - len + i];
  731. }
  732. DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter, flash);
  733. config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
  734. config[LOW_BOOTCS_DREG] = 0xFC;
  735. config[HI_BOOTCS_DREG] = 0xFF;
  736. DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
  737. if (memcmp(&data[48], "DIVAserverPR", 12)) {
  738. DBG_ERR(("A: failed to read serial number"))
  739. DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
  740. data[0], data[1], data[2], data[3],
  741. data[4], data[5], data[6], data[7]))
  742. return (-1);
  743. }
  744. #else /* } { */
  745. DBG_ERR(("A: failed to read DIVA signature word"))
  746. DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
  747. data[0], data[1], data[2], data[3],
  748. data[4], data[5], data[6], data[7]))
  749. DBG_LOG(("%02x:%02x:%02x:%02x", data[47], data[46],
  750. data[45], data[44]))
  751. #endif /* } */
  752. }
  753. a->xdi_adapter.serialNo =
  754. (data[47] << 24) | (data[46] << 16) | (data[45] << 8) |
  755. data[44];
  756. if (!a->xdi_adapter.serialNo
  757. || (a->xdi_adapter.serialNo == 0xffffffff)) {
  758. a->xdi_adapter.serialNo = 0;
  759. DBG_ERR(("A: failed to read serial number"))
  760. return (-1);
  761. }
  762. DBG_LOG(("Serial No. : %ld", a->xdi_adapter.serialNo))
  763. DBG_TRC(("Board Revision : %d.%02d", (int) data[41],
  764. (int) data[40]))
  765. DBG_TRC(("PLD revision : %d.%02d", (int) data[33],
  766. (int) data[32]))
  767. DBG_TRC(("Boot loader version : %d.%02d", (int) data[37],
  768. (int) data[36]))
  769. DBG_TRC(("Manufacturing Date : %d/%02d/%02d (yyyy/mm/dd)",
  770. (int) ((data[28] > 90) ? 1900 : 2000) +
  771. (int) data[28], (int) data[29], (int) data[30]))
  772. return (0);
  773. }
  774. void diva_os_prepare_pri2_functions(PISDN_ADAPTER IoAdapter)
  775. {
  776. }
  777. void diva_os_prepare_pri_functions(PISDN_ADAPTER IoAdapter)
  778. {
  779. }
  780. /*
  781. ** Checks presence of DSP on board
  782. */
  783. static int
  784. dsp_check_presence(volatile byte __iomem *addr, volatile byte __iomem *data, int dsp)
  785. {
  786. word pattern;
  787. WRITE_WORD(addr, 0x4000);
  788. WRITE_WORD(data, DSP_SIGNATURE_PROBE_WORD);
  789. WRITE_WORD(addr, 0x4000);
  790. pattern = READ_WORD(data);
  791. if (pattern != DSP_SIGNATURE_PROBE_WORD) {
  792. DBG_TRC(("W: DSP[%d] %04x(is) != %04x(should)",
  793. dsp, pattern, DSP_SIGNATURE_PROBE_WORD))
  794. return (-1);
  795. }
  796. WRITE_WORD(addr, 0x4000);
  797. WRITE_WORD(data, ~DSP_SIGNATURE_PROBE_WORD);
  798. WRITE_WORD(addr, 0x4000);
  799. pattern = READ_WORD(data);
  800. if (pattern != (word)~DSP_SIGNATURE_PROBE_WORD) {
  801. DBG_ERR(("A: DSP[%d] %04x(is) != %04x(should)",
  802. dsp, pattern, (word)~DSP_SIGNATURE_PROBE_WORD))
  803. return (-2);
  804. }
  805. DBG_TRC(("DSP[%d] present", dsp))
  806. return (0);
  807. }
  808. /*
  809. ** Check if DSP's are present and operating
  810. ** Information about detected DSP's is returned as bit mask
  811. ** Bit 0 - DSP1
  812. ** ...
  813. ** ...
  814. ** ...
  815. ** Bit 29 - DSP30
  816. */
  817. static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t *a)
  818. {
  819. byte __iomem *base;
  820. byte __iomem *p;
  821. dword ret = 0;
  822. dword row_offset[7] = {
  823. 0x00000000,
  824. 0x00000800, /* 1 - ROW 1 */
  825. 0x00000840, /* 2 - ROW 2 */
  826. 0x00001000, /* 3 - ROW 3 */
  827. 0x00001040, /* 4 - ROW 4 */
  828. 0x00000000 /* 5 - ROW 0 */
  829. };
  830. byte __iomem *dsp_addr_port;
  831. byte __iomem *dsp_data_port;
  832. byte row_state;
  833. int dsp_row = 0, dsp_index, dsp_num;
  834. if (!a->xdi_adapter.Control || !a->xdi_adapter.reset) {
  835. return (0);
  836. }
  837. p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter);
  838. WRITE_BYTE(p, _MP_RISC_RESET | _MP_DSP_RESET);
  839. DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p);
  840. diva_os_wait(5);
  841. base = DIVA_OS_MEM_ATTACH_CONTROL(&a->xdi_adapter);
  842. for (dsp_num = 0; dsp_num < 30; dsp_num++) {
  843. dsp_row = dsp_num / 7 + 1;
  844. dsp_index = dsp_num % 7;
  845. dsp_data_port = base;
  846. dsp_addr_port = base;
  847. dsp_data_port += row_offset[dsp_row];
  848. dsp_addr_port += row_offset[dsp_row];
  849. dsp_data_port += (dsp_index * 8);
  850. dsp_addr_port += (dsp_index * 8) + 0x80;
  851. if (!dsp_check_presence
  852. (dsp_addr_port, dsp_data_port, dsp_num + 1)) {
  853. ret |= (1 << dsp_num);
  854. }
  855. }
  856. DIVA_OS_MEM_DETACH_CONTROL(&a->xdi_adapter, base);
  857. p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter);
  858. WRITE_BYTE(p, _MP_RISC_RESET | _MP_LED1 | _MP_LED2);
  859. DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p);
  860. diva_os_wait(5);
  861. /*
  862. Verify modules
  863. */
  864. for (dsp_row = 0; dsp_row < 4; dsp_row++) {
  865. row_state = ((ret >> (dsp_row * 7)) & 0x7F);
  866. if (row_state && (row_state != 0x7F)) {
  867. for (dsp_index = 0; dsp_index < 7; dsp_index++) {
  868. if (!(row_state & (1 << dsp_index))) {
  869. DBG_ERR(("A: MODULE[%d]-DSP[%d] failed",
  870. dsp_row + 1,
  871. dsp_index + 1))
  872. }
  873. }
  874. }
  875. }
  876. if (!(ret & 0x10000000)) {
  877. DBG_ERR(("A: ON BOARD-DSP[1] failed"))
  878. }
  879. if (!(ret & 0x20000000)) {
  880. DBG_ERR(("A: ON BOARD-DSP[2] failed"))
  881. }
  882. /*
  883. Print module population now
  884. */
  885. DBG_LOG(("+-----------------------+"))
  886. DBG_LOG(("| DSP MODULE POPULATION |"))
  887. DBG_LOG(("+-----------------------+"))
  888. DBG_LOG(("| 1 | 2 | 3 | 4 |"))
  889. DBG_LOG(("+-----------------------+"))
  890. DBG_LOG(("| %s | %s | %s | %s |",
  891. ((ret >> (0 * 7)) & 0x7F) ? "Y" : "N",
  892. ((ret >> (1 * 7)) & 0x7F) ? "Y" : "N",
  893. ((ret >> (2 * 7)) & 0x7F) ? "Y" : "N",
  894. ((ret >> (3 * 7)) & 0x7F) ? "Y" : "N"))
  895. DBG_LOG(("+-----------------------+"))
  896. DBG_LOG(("DSP's(present-absent):%08x-%08x", ret,
  897. ~ret & 0x3fffffff))
  898. return (ret);
  899. }