mtk-pmic-keys.c 8.5 KB

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  1. /*
  2. * Copyright (C) 2017 MediaTek, Inc.
  3. *
  4. * Author: Chen Zhong <chen.zhong@mediatek.com>
  5. *
  6. * This software is licensed under the terms of the GNU General Public
  7. * License version 2, as published by the Free Software Foundation, and
  8. * may be copied, distributed, and modified under those terms.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. */
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/input.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/kernel.h>
  22. #include <linux/of.h>
  23. #include <linux/of_device.h>
  24. #include <linux/regmap.h>
  25. #include <linux/mfd/mt6323/registers.h>
  26. #include <linux/mfd/mt6397/registers.h>
  27. #include <linux/mfd/mt6397/core.h>
  28. #define MTK_PMIC_PWRKEY_RST_EN_MASK 0x1
  29. #define MTK_PMIC_PWRKEY_RST_EN_SHIFT 6
  30. #define MTK_PMIC_HOMEKEY_RST_EN_MASK 0x1
  31. #define MTK_PMIC_HOMEKEY_RST_EN_SHIFT 5
  32. #define MTK_PMIC_RST_DU_MASK 0x3
  33. #define MTK_PMIC_RST_DU_SHIFT 8
  34. #define MTK_PMIC_PWRKEY_RST \
  35. (MTK_PMIC_PWRKEY_RST_EN_MASK << MTK_PMIC_PWRKEY_RST_EN_SHIFT)
  36. #define MTK_PMIC_HOMEKEY_RST \
  37. (MTK_PMIC_HOMEKEY_RST_EN_MASK << MTK_PMIC_HOMEKEY_RST_EN_SHIFT)
  38. #define MTK_PMIC_PWRKEY_INDEX 0
  39. #define MTK_PMIC_HOMEKEY_INDEX 1
  40. #define MTK_PMIC_MAX_KEY_COUNT 2
  41. struct mtk_pmic_keys_regs {
  42. u32 deb_reg;
  43. u32 deb_mask;
  44. u32 intsel_reg;
  45. u32 intsel_mask;
  46. };
  47. #define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \
  48. _intsel_reg, _intsel_mask) \
  49. { \
  50. .deb_reg = _deb_reg, \
  51. .deb_mask = _deb_mask, \
  52. .intsel_reg = _intsel_reg, \
  53. .intsel_mask = _intsel_mask, \
  54. }
  55. struct mtk_pmic_regs {
  56. const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT];
  57. u32 pmic_rst_reg;
  58. };
  59. static const struct mtk_pmic_regs mt6397_regs = {
  60. .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
  61. MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS,
  62. 0x8, MT6397_INT_RSV, 0x10),
  63. .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
  64. MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2,
  65. 0x10, MT6397_INT_RSV, 0x8),
  66. .pmic_rst_reg = MT6397_TOP_RST_MISC,
  67. };
  68. static const struct mtk_pmic_regs mt6323_regs = {
  69. .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
  70. MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
  71. 0x2, MT6323_INT_MISC_CON, 0x10),
  72. .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
  73. MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
  74. 0x4, MT6323_INT_MISC_CON, 0x8),
  75. .pmic_rst_reg = MT6323_TOP_RST_MISC,
  76. };
  77. struct mtk_pmic_keys_info {
  78. struct mtk_pmic_keys *keys;
  79. const struct mtk_pmic_keys_regs *regs;
  80. unsigned int keycode;
  81. int irq;
  82. bool wakeup:1;
  83. };
  84. struct mtk_pmic_keys {
  85. struct input_dev *input_dev;
  86. struct device *dev;
  87. struct regmap *regmap;
  88. struct mtk_pmic_keys_info keys[MTK_PMIC_MAX_KEY_COUNT];
  89. };
  90. enum mtk_pmic_keys_lp_mode {
  91. LP_DISABLE,
  92. LP_ONEKEY,
  93. LP_TWOKEY,
  94. };
  95. static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys,
  96. u32 pmic_rst_reg)
  97. {
  98. int ret;
  99. u32 long_press_mode, long_press_debounce;
  100. ret = of_property_read_u32(keys->dev->of_node,
  101. "power-off-time-sec", &long_press_debounce);
  102. if (ret)
  103. long_press_debounce = 0;
  104. regmap_update_bits(keys->regmap, pmic_rst_reg,
  105. MTK_PMIC_RST_DU_MASK << MTK_PMIC_RST_DU_SHIFT,
  106. long_press_debounce << MTK_PMIC_RST_DU_SHIFT);
  107. ret = of_property_read_u32(keys->dev->of_node,
  108. "mediatek,long-press-mode", &long_press_mode);
  109. if (ret)
  110. long_press_mode = LP_DISABLE;
  111. switch (long_press_mode) {
  112. case LP_ONEKEY:
  113. regmap_update_bits(keys->regmap, pmic_rst_reg,
  114. MTK_PMIC_PWRKEY_RST,
  115. MTK_PMIC_PWRKEY_RST);
  116. regmap_update_bits(keys->regmap, pmic_rst_reg,
  117. MTK_PMIC_HOMEKEY_RST,
  118. 0);
  119. break;
  120. case LP_TWOKEY:
  121. regmap_update_bits(keys->regmap, pmic_rst_reg,
  122. MTK_PMIC_PWRKEY_RST,
  123. MTK_PMIC_PWRKEY_RST);
  124. regmap_update_bits(keys->regmap, pmic_rst_reg,
  125. MTK_PMIC_HOMEKEY_RST,
  126. MTK_PMIC_HOMEKEY_RST);
  127. break;
  128. case LP_DISABLE:
  129. regmap_update_bits(keys->regmap, pmic_rst_reg,
  130. MTK_PMIC_PWRKEY_RST,
  131. 0);
  132. regmap_update_bits(keys->regmap, pmic_rst_reg,
  133. MTK_PMIC_HOMEKEY_RST,
  134. 0);
  135. break;
  136. default:
  137. break;
  138. }
  139. }
  140. static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data)
  141. {
  142. struct mtk_pmic_keys_info *info = data;
  143. u32 key_deb, pressed;
  144. regmap_read(info->keys->regmap, info->regs->deb_reg, &key_deb);
  145. key_deb &= info->regs->deb_mask;
  146. pressed = !key_deb;
  147. input_report_key(info->keys->input_dev, info->keycode, pressed);
  148. input_sync(info->keys->input_dev);
  149. dev_dbg(info->keys->dev, "(%s) key =%d using PMIC\n",
  150. pressed ? "pressed" : "released", info->keycode);
  151. return IRQ_HANDLED;
  152. }
  153. static int mtk_pmic_key_setup(struct mtk_pmic_keys *keys,
  154. struct mtk_pmic_keys_info *info)
  155. {
  156. int ret;
  157. info->keys = keys;
  158. ret = regmap_update_bits(keys->regmap, info->regs->intsel_reg,
  159. info->regs->intsel_mask,
  160. info->regs->intsel_mask);
  161. if (ret < 0)
  162. return ret;
  163. ret = devm_request_threaded_irq(keys->dev, info->irq, NULL,
  164. mtk_pmic_keys_irq_handler_thread,
  165. IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
  166. "mtk-pmic-keys", info);
  167. if (ret) {
  168. dev_err(keys->dev, "Failed to request IRQ: %d: %d\n",
  169. info->irq, ret);
  170. return ret;
  171. }
  172. input_set_capability(keys->input_dev, EV_KEY, info->keycode);
  173. return 0;
  174. }
  175. static int __maybe_unused mtk_pmic_keys_suspend(struct device *dev)
  176. {
  177. struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
  178. int index;
  179. for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
  180. if (keys->keys[index].wakeup)
  181. enable_irq_wake(keys->keys[index].irq);
  182. }
  183. return 0;
  184. }
  185. static int __maybe_unused mtk_pmic_keys_resume(struct device *dev)
  186. {
  187. struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
  188. int index;
  189. for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
  190. if (keys->keys[index].wakeup)
  191. disable_irq_wake(keys->keys[index].irq);
  192. }
  193. return 0;
  194. }
  195. static SIMPLE_DEV_PM_OPS(mtk_pmic_keys_pm_ops, mtk_pmic_keys_suspend,
  196. mtk_pmic_keys_resume);
  197. static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = {
  198. {
  199. .compatible = "mediatek,mt6397-keys",
  200. .data = &mt6397_regs,
  201. }, {
  202. .compatible = "mediatek,mt6323-keys",
  203. .data = &mt6323_regs,
  204. }, {
  205. /* sentinel */
  206. }
  207. };
  208. MODULE_DEVICE_TABLE(of, of_mtk_pmic_keys_match_tbl);
  209. static int mtk_pmic_keys_probe(struct platform_device *pdev)
  210. {
  211. int error, index = 0;
  212. unsigned int keycount;
  213. struct mt6397_chip *pmic_chip = dev_get_drvdata(pdev->dev.parent);
  214. struct device_node *node = pdev->dev.of_node, *child;
  215. struct mtk_pmic_keys *keys;
  216. const struct mtk_pmic_regs *mtk_pmic_regs;
  217. struct input_dev *input_dev;
  218. const struct of_device_id *of_id =
  219. of_match_device(of_mtk_pmic_keys_match_tbl, &pdev->dev);
  220. keys = devm_kzalloc(&pdev->dev, sizeof(*keys), GFP_KERNEL);
  221. if (!keys)
  222. return -ENOMEM;
  223. keys->dev = &pdev->dev;
  224. keys->regmap = pmic_chip->regmap;
  225. mtk_pmic_regs = of_id->data;
  226. keys->input_dev = input_dev = devm_input_allocate_device(keys->dev);
  227. if (!input_dev) {
  228. dev_err(keys->dev, "input allocate device fail.\n");
  229. return -ENOMEM;
  230. }
  231. input_dev->name = "mtk-pmic-keys";
  232. input_dev->id.bustype = BUS_HOST;
  233. input_dev->id.vendor = 0x0001;
  234. input_dev->id.product = 0x0001;
  235. input_dev->id.version = 0x0001;
  236. keycount = of_get_available_child_count(node);
  237. if (keycount > MTK_PMIC_MAX_KEY_COUNT) {
  238. dev_err(keys->dev, "too many keys defined (%d)\n", keycount);
  239. return -EINVAL;
  240. }
  241. for_each_child_of_node(node, child) {
  242. keys->keys[index].regs = &mtk_pmic_regs->keys_regs[index];
  243. keys->keys[index].irq = platform_get_irq(pdev, index);
  244. if (keys->keys[index].irq < 0)
  245. return keys->keys[index].irq;
  246. error = of_property_read_u32(child,
  247. "linux,keycodes", &keys->keys[index].keycode);
  248. if (error) {
  249. dev_err(keys->dev,
  250. "failed to read key:%d linux,keycode property: %d\n",
  251. index, error);
  252. return error;
  253. }
  254. if (of_property_read_bool(child, "wakeup-source"))
  255. keys->keys[index].wakeup = true;
  256. error = mtk_pmic_key_setup(keys, &keys->keys[index]);
  257. if (error)
  258. return error;
  259. index++;
  260. }
  261. error = input_register_device(input_dev);
  262. if (error) {
  263. dev_err(&pdev->dev,
  264. "register input device failed (%d)\n", error);
  265. return error;
  266. }
  267. mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs->pmic_rst_reg);
  268. platform_set_drvdata(pdev, keys);
  269. return 0;
  270. }
  271. static struct platform_driver pmic_keys_pdrv = {
  272. .probe = mtk_pmic_keys_probe,
  273. .driver = {
  274. .name = "mtk-pmic-keys",
  275. .of_match_table = of_mtk_pmic_keys_match_tbl,
  276. .pm = &mtk_pmic_keys_pm_ops,
  277. },
  278. };
  279. module_platform_driver(pmic_keys_pdrv);
  280. MODULE_LICENSE("GPL v2");
  281. MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>");
  282. MODULE_DESCRIPTION("MTK pmic-keys driver v0.1");