nes_verbs.c 117 KB

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  1. /*
  2. * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/module.h>
  34. #include <linux/moduleparam.h>
  35. #include <linux/random.h>
  36. #include <linux/highmem.h>
  37. #include <linux/slab.h>
  38. #include <asm/byteorder.h>
  39. #include <rdma/ib_verbs.h>
  40. #include <rdma/iw_cm.h>
  41. #include <rdma/ib_user_verbs.h>
  42. #include "nes.h"
  43. #include <rdma/ib_umem.h>
  44. atomic_t mod_qp_timouts;
  45. atomic_t qps_created;
  46. atomic_t sw_qps_destroyed;
  47. static void nes_unregister_ofa_device(struct nes_ib_device *nesibdev);
  48. static int nes_dereg_mr(struct ib_mr *ib_mr);
  49. /**
  50. * nes_alloc_mw
  51. */
  52. static struct ib_mw *nes_alloc_mw(struct ib_pd *ibpd, enum ib_mw_type type,
  53. struct ib_udata *udata)
  54. {
  55. struct nes_pd *nespd = to_nespd(ibpd);
  56. struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
  57. struct nes_device *nesdev = nesvnic->nesdev;
  58. struct nes_adapter *nesadapter = nesdev->nesadapter;
  59. struct nes_cqp_request *cqp_request;
  60. struct nes_mr *nesmr;
  61. struct ib_mw *ibmw;
  62. struct nes_hw_cqp_wqe *cqp_wqe;
  63. int ret;
  64. u32 stag;
  65. u32 stag_index = 0;
  66. u32 next_stag_index = 0;
  67. u32 driver_key = 0;
  68. u8 stag_key = 0;
  69. if (type != IB_MW_TYPE_1)
  70. return ERR_PTR(-EINVAL);
  71. get_random_bytes(&next_stag_index, sizeof(next_stag_index));
  72. stag_key = (u8)next_stag_index;
  73. driver_key = 0;
  74. next_stag_index >>= 8;
  75. next_stag_index %= nesadapter->max_mr;
  76. ret = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs,
  77. nesadapter->max_mr, &stag_index, &next_stag_index, NES_RESOURCE_MW);
  78. if (ret) {
  79. return ERR_PTR(ret);
  80. }
  81. nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
  82. if (!nesmr) {
  83. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  84. return ERR_PTR(-ENOMEM);
  85. }
  86. stag = stag_index << 8;
  87. stag |= driver_key;
  88. stag += (u32)stag_key;
  89. nes_debug(NES_DBG_MR, "Registering STag 0x%08X, index = 0x%08X\n",
  90. stag, stag_index);
  91. /* Register the region with the adapter */
  92. cqp_request = nes_get_cqp_request(nesdev);
  93. if (cqp_request == NULL) {
  94. kfree(nesmr);
  95. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  96. return ERR_PTR(-ENOMEM);
  97. }
  98. cqp_request->waiting = 1;
  99. cqp_wqe = &cqp_request->cqp_wqe;
  100. cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] =
  101. cpu_to_le32( NES_CQP_ALLOCATE_STAG | NES_CQP_STAG_RIGHTS_REMOTE_READ |
  102. NES_CQP_STAG_RIGHTS_REMOTE_WRITE | NES_CQP_STAG_VA_TO |
  103. NES_CQP_STAG_REM_ACC_EN);
  104. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  105. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX, (nespd->pd_id & 0x00007fff));
  106. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag);
  107. atomic_set(&cqp_request->refcount, 2);
  108. nes_post_cqp_request(nesdev, cqp_request);
  109. /* Wait for CQP */
  110. ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0),
  111. NES_EVENT_TIMEOUT);
  112. nes_debug(NES_DBG_MR, "Register STag 0x%08X completed, wait_event_timeout ret = %u,"
  113. " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
  114. stag, ret, cqp_request->major_code, cqp_request->minor_code);
  115. if ((!ret) || (cqp_request->major_code)) {
  116. nes_put_cqp_request(nesdev, cqp_request);
  117. kfree(nesmr);
  118. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  119. if (!ret) {
  120. return ERR_PTR(-ETIME);
  121. } else {
  122. return ERR_PTR(-ENOMEM);
  123. }
  124. }
  125. nes_put_cqp_request(nesdev, cqp_request);
  126. nesmr->ibmw.rkey = stag;
  127. nesmr->mode = IWNES_MEMREG_TYPE_MW;
  128. ibmw = &nesmr->ibmw;
  129. nesmr->pbl_4k = 0;
  130. nesmr->pbls_used = 0;
  131. return ibmw;
  132. }
  133. /**
  134. * nes_dealloc_mw
  135. */
  136. static int nes_dealloc_mw(struct ib_mw *ibmw)
  137. {
  138. struct nes_mr *nesmr = to_nesmw(ibmw);
  139. struct nes_vnic *nesvnic = to_nesvnic(ibmw->device);
  140. struct nes_device *nesdev = nesvnic->nesdev;
  141. struct nes_adapter *nesadapter = nesdev->nesadapter;
  142. struct nes_hw_cqp_wqe *cqp_wqe;
  143. struct nes_cqp_request *cqp_request;
  144. int err = 0;
  145. int ret;
  146. /* Deallocate the window with the adapter */
  147. cqp_request = nes_get_cqp_request(nesdev);
  148. if (cqp_request == NULL) {
  149. nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n");
  150. return -ENOMEM;
  151. }
  152. cqp_request->waiting = 1;
  153. cqp_wqe = &cqp_request->cqp_wqe;
  154. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  155. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, NES_CQP_DEALLOCATE_STAG);
  156. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, ibmw->rkey);
  157. atomic_set(&cqp_request->refcount, 2);
  158. nes_post_cqp_request(nesdev, cqp_request);
  159. /* Wait for CQP */
  160. nes_debug(NES_DBG_MR, "Waiting for deallocate STag 0x%08X to complete.\n",
  161. ibmw->rkey);
  162. ret = wait_event_timeout(cqp_request->waitq, (0 != cqp_request->request_done),
  163. NES_EVENT_TIMEOUT);
  164. nes_debug(NES_DBG_MR, "Deallocate STag completed, wait_event_timeout ret = %u,"
  165. " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
  166. ret, cqp_request->major_code, cqp_request->minor_code);
  167. if (!ret)
  168. err = -ETIME;
  169. else if (cqp_request->major_code)
  170. err = -EIO;
  171. nes_put_cqp_request(nesdev, cqp_request);
  172. nes_free_resource(nesadapter, nesadapter->allocated_mrs,
  173. (ibmw->rkey & 0x0fffff00) >> 8);
  174. kfree(nesmr);
  175. return err;
  176. }
  177. /*
  178. * nes_alloc_fast_mr
  179. */
  180. static int alloc_fast_reg_mr(struct nes_device *nesdev, struct nes_pd *nespd,
  181. u32 stag, u32 page_count)
  182. {
  183. struct nes_hw_cqp_wqe *cqp_wqe;
  184. struct nes_cqp_request *cqp_request;
  185. unsigned long flags;
  186. int ret;
  187. struct nes_adapter *nesadapter = nesdev->nesadapter;
  188. u32 opcode = 0;
  189. u16 major_code;
  190. u64 region_length = page_count * PAGE_SIZE;
  191. cqp_request = nes_get_cqp_request(nesdev);
  192. if (cqp_request == NULL) {
  193. nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n");
  194. return -ENOMEM;
  195. }
  196. nes_debug(NES_DBG_MR, "alloc_fast_reg_mr: page_count = %d, "
  197. "region_length = %llu\n",
  198. page_count, region_length);
  199. cqp_request->waiting = 1;
  200. cqp_wqe = &cqp_request->cqp_wqe;
  201. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  202. if (nesadapter->free_4kpbl > 0) {
  203. nesadapter->free_4kpbl--;
  204. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  205. } else {
  206. /* No 4kpbl's available: */
  207. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  208. nes_debug(NES_DBG_MR, "Out of Pbls\n");
  209. nes_free_cqp_request(nesdev, cqp_request);
  210. return -ENOMEM;
  211. }
  212. opcode = NES_CQP_ALLOCATE_STAG | NES_CQP_STAG_MR |
  213. NES_CQP_STAG_PBL_BLK_SIZE | NES_CQP_STAG_VA_TO |
  214. NES_CQP_STAG_REM_ACC_EN;
  215. /*
  216. * The current OFED API does not support the zero based TO option.
  217. * If added then need to changed the NES_CQP_STAG_VA* option. Also,
  218. * the API does not support that ability to have the MR set for local
  219. * access only when created and not allow the SQ op to override. Given
  220. * this the remote enable must be set here.
  221. */
  222. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  223. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
  224. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX, 1);
  225. cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX] =
  226. cpu_to_le32((u32)(region_length >> 8) & 0xff000000);
  227. cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX] |=
  228. cpu_to_le32(nespd->pd_id & 0x00007fff);
  229. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag);
  230. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_VA_LOW_IDX, 0);
  231. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_LEN_LOW_IDX, 0);
  232. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PA_LOW_IDX, 0);
  233. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PBL_LEN_IDX, (page_count * 8));
  234. cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(NES_CQP_STAG_PBL_BLK_SIZE);
  235. barrier();
  236. atomic_set(&cqp_request->refcount, 2);
  237. nes_post_cqp_request(nesdev, cqp_request);
  238. /* Wait for CQP */
  239. ret = wait_event_timeout(cqp_request->waitq,
  240. (0 != cqp_request->request_done),
  241. NES_EVENT_TIMEOUT);
  242. nes_debug(NES_DBG_MR, "Allocate STag 0x%08X completed, "
  243. "wait_event_timeout ret = %u, CQP Major:Minor codes = "
  244. "0x%04X:0x%04X.\n", stag, ret, cqp_request->major_code,
  245. cqp_request->minor_code);
  246. major_code = cqp_request->major_code;
  247. nes_put_cqp_request(nesdev, cqp_request);
  248. if (!ret || major_code) {
  249. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  250. nesadapter->free_4kpbl++;
  251. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  252. }
  253. if (!ret)
  254. return -ETIME;
  255. else if (major_code)
  256. return -EIO;
  257. return 0;
  258. }
  259. /*
  260. * nes_alloc_mr
  261. */
  262. static struct ib_mr *nes_alloc_mr(struct ib_pd *ibpd,
  263. enum ib_mr_type mr_type,
  264. u32 max_num_sg)
  265. {
  266. struct nes_pd *nespd = to_nespd(ibpd);
  267. struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
  268. struct nes_device *nesdev = nesvnic->nesdev;
  269. struct nes_adapter *nesadapter = nesdev->nesadapter;
  270. u32 next_stag_index;
  271. u8 stag_key = 0;
  272. u32 driver_key = 0;
  273. int err = 0;
  274. u32 stag_index = 0;
  275. struct nes_mr *nesmr;
  276. u32 stag;
  277. int ret;
  278. struct ib_mr *ibmr;
  279. if (mr_type != IB_MR_TYPE_MEM_REG)
  280. return ERR_PTR(-EINVAL);
  281. if (max_num_sg > (NES_4K_PBL_CHUNK_SIZE / sizeof(u64)))
  282. return ERR_PTR(-E2BIG);
  283. /*
  284. * Note: Set to always use a fixed length single page entry PBL. This is to allow
  285. * for the fast_reg_mr operation to always know the size of the PBL.
  286. */
  287. if (max_num_sg > (NES_4K_PBL_CHUNK_SIZE / sizeof(u64)))
  288. return ERR_PTR(-E2BIG);
  289. get_random_bytes(&next_stag_index, sizeof(next_stag_index));
  290. stag_key = (u8)next_stag_index;
  291. next_stag_index >>= 8;
  292. next_stag_index %= nesadapter->max_mr;
  293. err = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs,
  294. nesadapter->max_mr, &stag_index,
  295. &next_stag_index, NES_RESOURCE_FAST_MR);
  296. if (err)
  297. return ERR_PTR(err);
  298. nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
  299. if (!nesmr) {
  300. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  301. return ERR_PTR(-ENOMEM);
  302. }
  303. stag = stag_index << 8;
  304. stag |= driver_key;
  305. stag += (u32)stag_key;
  306. nes_debug(NES_DBG_MR, "Allocating STag 0x%08X index = 0x%08X\n",
  307. stag, stag_index);
  308. ret = alloc_fast_reg_mr(nesdev, nespd, stag, max_num_sg);
  309. if (ret == 0) {
  310. nesmr->ibmr.rkey = stag;
  311. nesmr->ibmr.lkey = stag;
  312. nesmr->mode = IWNES_MEMREG_TYPE_FMEM;
  313. ibmr = &nesmr->ibmr;
  314. } else {
  315. kfree(nesmr);
  316. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  317. return ERR_PTR(-ENOMEM);
  318. }
  319. nesmr->pages = pci_alloc_consistent(nesdev->pcidev,
  320. max_num_sg * sizeof(u64),
  321. &nesmr->paddr);
  322. if (!nesmr->paddr)
  323. goto err;
  324. nesmr->max_pages = max_num_sg;
  325. return ibmr;
  326. err:
  327. nes_dereg_mr(ibmr);
  328. return ERR_PTR(-ENOMEM);
  329. }
  330. static int nes_set_page(struct ib_mr *ibmr, u64 addr)
  331. {
  332. struct nes_mr *nesmr = to_nesmr(ibmr);
  333. if (unlikely(nesmr->npages == nesmr->max_pages))
  334. return -ENOMEM;
  335. nesmr->pages[nesmr->npages++] = cpu_to_le64(addr);
  336. return 0;
  337. }
  338. static int nes_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
  339. int sg_nents, unsigned int *sg_offset)
  340. {
  341. struct nes_mr *nesmr = to_nesmr(ibmr);
  342. nesmr->npages = 0;
  343. return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, nes_set_page);
  344. }
  345. /**
  346. * nes_query_device
  347. */
  348. static int nes_query_device(struct ib_device *ibdev, struct ib_device_attr *props,
  349. struct ib_udata *uhw)
  350. {
  351. struct nes_vnic *nesvnic = to_nesvnic(ibdev);
  352. struct nes_device *nesdev = nesvnic->nesdev;
  353. struct nes_ib_device *nesibdev = nesvnic->nesibdev;
  354. if (uhw->inlen || uhw->outlen)
  355. return -EINVAL;
  356. memset(props, 0, sizeof(*props));
  357. memcpy(&props->sys_image_guid, nesvnic->netdev->dev_addr, 6);
  358. props->fw_ver = nesdev->nesadapter->firmware_version;
  359. props->device_cap_flags = nesdev->nesadapter->device_cap_flags;
  360. props->vendor_id = nesdev->nesadapter->vendor_id;
  361. props->vendor_part_id = nesdev->nesadapter->vendor_part_id;
  362. props->hw_ver = nesdev->nesadapter->hw_rev;
  363. props->max_mr_size = 0x80000000;
  364. props->max_qp = nesibdev->max_qp;
  365. props->max_qp_wr = nesdev->nesadapter->max_qp_wr - 2;
  366. props->max_send_sge = nesdev->nesadapter->max_sge;
  367. props->max_recv_sge = nesdev->nesadapter->max_sge;
  368. props->max_cq = nesibdev->max_cq;
  369. props->max_cqe = nesdev->nesadapter->max_cqe;
  370. props->max_mr = nesibdev->max_mr;
  371. props->max_mw = nesibdev->max_mr;
  372. props->max_pd = nesibdev->max_pd;
  373. props->max_sge_rd = 1;
  374. switch (nesdev->nesadapter->max_irrq_wr) {
  375. case 0:
  376. props->max_qp_rd_atom = 2;
  377. break;
  378. case 1:
  379. props->max_qp_rd_atom = 8;
  380. break;
  381. case 2:
  382. props->max_qp_rd_atom = 32;
  383. break;
  384. case 3:
  385. props->max_qp_rd_atom = 64;
  386. break;
  387. default:
  388. props->max_qp_rd_atom = 0;
  389. }
  390. props->max_qp_init_rd_atom = props->max_qp_rd_atom;
  391. props->atomic_cap = IB_ATOMIC_NONE;
  392. props->max_map_per_fmr = 1;
  393. return 0;
  394. }
  395. /**
  396. * nes_query_port
  397. */
  398. static int nes_query_port(struct ib_device *ibdev, u8 port, struct ib_port_attr *props)
  399. {
  400. struct nes_vnic *nesvnic = to_nesvnic(ibdev);
  401. struct net_device *netdev = nesvnic->netdev;
  402. /* props being zeroed by the caller, avoid zeroing it here */
  403. props->max_mtu = IB_MTU_4096;
  404. props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
  405. props->lid = 1;
  406. if (netif_queue_stopped(netdev))
  407. props->state = IB_PORT_DOWN;
  408. else if (nesvnic->linkup)
  409. props->state = IB_PORT_ACTIVE;
  410. else
  411. props->state = IB_PORT_DOWN;
  412. props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
  413. IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
  414. props->gid_tbl_len = 1;
  415. props->pkey_tbl_len = 1;
  416. props->active_width = IB_WIDTH_4X;
  417. props->active_speed = IB_SPEED_SDR;
  418. props->max_msg_sz = 0x80000000;
  419. return 0;
  420. }
  421. /**
  422. * nes_query_pkey
  423. */
  424. static int nes_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
  425. {
  426. *pkey = 0;
  427. return 0;
  428. }
  429. /**
  430. * nes_query_gid
  431. */
  432. static int nes_query_gid(struct ib_device *ibdev, u8 port,
  433. int index, union ib_gid *gid)
  434. {
  435. struct nes_vnic *nesvnic = to_nesvnic(ibdev);
  436. memset(&(gid->raw[0]), 0, sizeof(gid->raw));
  437. memcpy(&(gid->raw[0]), nesvnic->netdev->dev_addr, 6);
  438. return 0;
  439. }
  440. /**
  441. * nes_alloc_ucontext - Allocate the user context data structure. This keeps track
  442. * of all objects associated with a particular user-mode client.
  443. */
  444. static struct ib_ucontext *nes_alloc_ucontext(struct ib_device *ibdev,
  445. struct ib_udata *udata)
  446. {
  447. struct nes_vnic *nesvnic = to_nesvnic(ibdev);
  448. struct nes_device *nesdev = nesvnic->nesdev;
  449. struct nes_adapter *nesadapter = nesdev->nesadapter;
  450. struct nes_alloc_ucontext_req req;
  451. struct nes_alloc_ucontext_resp uresp;
  452. struct nes_ucontext *nes_ucontext;
  453. struct nes_ib_device *nesibdev = nesvnic->nesibdev;
  454. if (ib_copy_from_udata(&req, udata, sizeof(struct nes_alloc_ucontext_req))) {
  455. printk(KERN_ERR PFX "Invalid structure size on allocate user context.\n");
  456. return ERR_PTR(-EINVAL);
  457. }
  458. if (req.userspace_ver != NES_ABI_USERSPACE_VER) {
  459. printk(KERN_ERR PFX "Invalid userspace driver version detected. Detected version %d, should be %d\n",
  460. req.userspace_ver, NES_ABI_USERSPACE_VER);
  461. return ERR_PTR(-EINVAL);
  462. }
  463. memset(&uresp, 0, sizeof uresp);
  464. uresp.max_qps = nesibdev->max_qp;
  465. uresp.max_pds = nesibdev->max_pd;
  466. uresp.wq_size = nesdev->nesadapter->max_qp_wr * 2;
  467. uresp.virtwq = nesadapter->virtwq;
  468. uresp.kernel_ver = NES_ABI_KERNEL_VER;
  469. nes_ucontext = kzalloc(sizeof *nes_ucontext, GFP_KERNEL);
  470. if (!nes_ucontext)
  471. return ERR_PTR(-ENOMEM);
  472. nes_ucontext->nesdev = nesdev;
  473. nes_ucontext->mmap_wq_offset = uresp.max_pds;
  474. nes_ucontext->mmap_cq_offset = nes_ucontext->mmap_wq_offset +
  475. ((sizeof(struct nes_hw_qp_wqe) * uresp.max_qps * 2) + PAGE_SIZE-1) /
  476. PAGE_SIZE;
  477. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  478. kfree(nes_ucontext);
  479. return ERR_PTR(-EFAULT);
  480. }
  481. INIT_LIST_HEAD(&nes_ucontext->cq_reg_mem_list);
  482. INIT_LIST_HEAD(&nes_ucontext->qp_reg_mem_list);
  483. atomic_set(&nes_ucontext->usecnt, 1);
  484. return &nes_ucontext->ibucontext;
  485. }
  486. /**
  487. * nes_dealloc_ucontext
  488. */
  489. static int nes_dealloc_ucontext(struct ib_ucontext *context)
  490. {
  491. /* struct nes_vnic *nesvnic = to_nesvnic(context->device); */
  492. /* struct nes_device *nesdev = nesvnic->nesdev; */
  493. struct nes_ucontext *nes_ucontext = to_nesucontext(context);
  494. if (!atomic_dec_and_test(&nes_ucontext->usecnt))
  495. return 0;
  496. kfree(nes_ucontext);
  497. return 0;
  498. }
  499. /**
  500. * nes_mmap
  501. */
  502. static int nes_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
  503. {
  504. unsigned long index;
  505. struct nes_vnic *nesvnic = to_nesvnic(context->device);
  506. struct nes_device *nesdev = nesvnic->nesdev;
  507. /* struct nes_adapter *nesadapter = nesdev->nesadapter; */
  508. struct nes_ucontext *nes_ucontext;
  509. struct nes_qp *nesqp;
  510. nes_ucontext = to_nesucontext(context);
  511. if (vma->vm_pgoff >= nes_ucontext->mmap_wq_offset) {
  512. index = (vma->vm_pgoff - nes_ucontext->mmap_wq_offset) * PAGE_SIZE;
  513. index /= ((sizeof(struct nes_hw_qp_wqe) * nesdev->nesadapter->max_qp_wr * 2) +
  514. PAGE_SIZE-1) & (~(PAGE_SIZE-1));
  515. if (!test_bit(index, nes_ucontext->allocated_wqs)) {
  516. nes_debug(NES_DBG_MMAP, "wq %lu not allocated\n", index);
  517. return -EFAULT;
  518. }
  519. nesqp = nes_ucontext->mmap_nesqp[index];
  520. if (nesqp == NULL) {
  521. nes_debug(NES_DBG_MMAP, "wq %lu has a NULL QP base.\n", index);
  522. return -EFAULT;
  523. }
  524. if (remap_pfn_range(vma, vma->vm_start,
  525. virt_to_phys(nesqp->hwqp.sq_vbase) >> PAGE_SHIFT,
  526. vma->vm_end - vma->vm_start,
  527. vma->vm_page_prot)) {
  528. nes_debug(NES_DBG_MMAP, "remap_pfn_range failed.\n");
  529. return -EAGAIN;
  530. }
  531. vma->vm_private_data = nesqp;
  532. return 0;
  533. } else {
  534. index = vma->vm_pgoff;
  535. if (!test_bit(index, nes_ucontext->allocated_doorbells))
  536. return -EFAULT;
  537. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  538. if (io_remap_pfn_range(vma, vma->vm_start,
  539. (nesdev->doorbell_start +
  540. ((nes_ucontext->mmap_db_index[index] - nesdev->base_doorbell_index) * 4096))
  541. >> PAGE_SHIFT, PAGE_SIZE, vma->vm_page_prot))
  542. return -EAGAIN;
  543. vma->vm_private_data = nes_ucontext;
  544. return 0;
  545. }
  546. return -ENOSYS;
  547. }
  548. /**
  549. * nes_alloc_pd
  550. */
  551. static struct ib_pd *nes_alloc_pd(struct ib_device *ibdev,
  552. struct ib_ucontext *context, struct ib_udata *udata)
  553. {
  554. struct nes_pd *nespd;
  555. struct nes_vnic *nesvnic = to_nesvnic(ibdev);
  556. struct nes_device *nesdev = nesvnic->nesdev;
  557. struct nes_adapter *nesadapter = nesdev->nesadapter;
  558. struct nes_ucontext *nesucontext;
  559. struct nes_alloc_pd_resp uresp;
  560. u32 pd_num = 0;
  561. int err;
  562. nes_debug(NES_DBG_PD, "nesvnic=%p, netdev=%p %s, ibdev=%p, context=%p, netdev refcnt=%u\n",
  563. nesvnic, nesdev->netdev[0], nesdev->netdev[0]->name, ibdev, context,
  564. netdev_refcnt_read(nesvnic->netdev));
  565. err = nes_alloc_resource(nesadapter, nesadapter->allocated_pds,
  566. nesadapter->max_pd, &pd_num, &nesadapter->next_pd, NES_RESOURCE_PD);
  567. if (err) {
  568. return ERR_PTR(err);
  569. }
  570. nespd = kzalloc(sizeof (struct nes_pd), GFP_KERNEL);
  571. if (!nespd) {
  572. nes_free_resource(nesadapter, nesadapter->allocated_pds, pd_num);
  573. return ERR_PTR(-ENOMEM);
  574. }
  575. nes_debug(NES_DBG_PD, "Allocating PD (%p) for ib device %s\n",
  576. nespd, nesvnic->nesibdev->ibdev.name);
  577. nespd->pd_id = (pd_num << (PAGE_SHIFT-12)) + nesadapter->base_pd;
  578. if (context) {
  579. nesucontext = to_nesucontext(context);
  580. nespd->mmap_db_index = find_next_zero_bit(nesucontext->allocated_doorbells,
  581. NES_MAX_USER_DB_REGIONS, nesucontext->first_free_db);
  582. nes_debug(NES_DBG_PD, "find_first_zero_biton doorbells returned %u, mapping pd_id %u.\n",
  583. nespd->mmap_db_index, nespd->pd_id);
  584. if (nespd->mmap_db_index >= NES_MAX_USER_DB_REGIONS) {
  585. nes_debug(NES_DBG_PD, "mmap_db_index > MAX\n");
  586. nes_free_resource(nesadapter, nesadapter->allocated_pds, pd_num);
  587. kfree(nespd);
  588. return ERR_PTR(-ENOMEM);
  589. }
  590. uresp.pd_id = nespd->pd_id;
  591. uresp.mmap_db_index = nespd->mmap_db_index;
  592. if (ib_copy_to_udata(udata, &uresp, sizeof (struct nes_alloc_pd_resp))) {
  593. nes_free_resource(nesadapter, nesadapter->allocated_pds, pd_num);
  594. kfree(nespd);
  595. return ERR_PTR(-EFAULT);
  596. }
  597. set_bit(nespd->mmap_db_index, nesucontext->allocated_doorbells);
  598. nesucontext->mmap_db_index[nespd->mmap_db_index] = nespd->pd_id;
  599. nesucontext->first_free_db = nespd->mmap_db_index + 1;
  600. }
  601. nes_debug(NES_DBG_PD, "PD%u structure located @%p.\n", nespd->pd_id, nespd);
  602. return &nespd->ibpd;
  603. }
  604. /**
  605. * nes_dealloc_pd
  606. */
  607. static int nes_dealloc_pd(struct ib_pd *ibpd)
  608. {
  609. struct nes_ucontext *nesucontext;
  610. struct nes_pd *nespd = to_nespd(ibpd);
  611. struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
  612. struct nes_device *nesdev = nesvnic->nesdev;
  613. struct nes_adapter *nesadapter = nesdev->nesadapter;
  614. if ((ibpd->uobject) && (ibpd->uobject->context)) {
  615. nesucontext = to_nesucontext(ibpd->uobject->context);
  616. nes_debug(NES_DBG_PD, "Clearing bit %u from allocated doorbells\n",
  617. nespd->mmap_db_index);
  618. clear_bit(nespd->mmap_db_index, nesucontext->allocated_doorbells);
  619. nesucontext->mmap_db_index[nespd->mmap_db_index] = 0;
  620. if (nesucontext->first_free_db > nespd->mmap_db_index) {
  621. nesucontext->first_free_db = nespd->mmap_db_index;
  622. }
  623. }
  624. nes_debug(NES_DBG_PD, "Deallocating PD%u structure located @%p.\n",
  625. nespd->pd_id, nespd);
  626. nes_free_resource(nesadapter, nesadapter->allocated_pds,
  627. (nespd->pd_id-nesadapter->base_pd)>>(PAGE_SHIFT-12));
  628. kfree(nespd);
  629. return 0;
  630. }
  631. /**
  632. * nes_get_encoded_size
  633. */
  634. static inline u8 nes_get_encoded_size(int *size)
  635. {
  636. u8 encoded_size = 0;
  637. if (*size <= 32) {
  638. *size = 32;
  639. encoded_size = 1;
  640. } else if (*size <= 128) {
  641. *size = 128;
  642. encoded_size = 2;
  643. } else if (*size <= 512) {
  644. *size = 512;
  645. encoded_size = 3;
  646. }
  647. return (encoded_size);
  648. }
  649. /**
  650. * nes_setup_virt_qp
  651. */
  652. static int nes_setup_virt_qp(struct nes_qp *nesqp, struct nes_pbl *nespbl,
  653. struct nes_vnic *nesvnic, int sq_size, int rq_size)
  654. {
  655. unsigned long flags;
  656. void *mem;
  657. __le64 *pbl = NULL;
  658. __le64 *tpbl;
  659. __le64 *pblbuffer;
  660. struct nes_device *nesdev = nesvnic->nesdev;
  661. struct nes_adapter *nesadapter = nesdev->nesadapter;
  662. u32 pbl_entries;
  663. u8 rq_pbl_entries;
  664. u8 sq_pbl_entries;
  665. pbl_entries = nespbl->pbl_size >> 3;
  666. nes_debug(NES_DBG_QP, "Userspace PBL, pbl_size=%u, pbl_entries = %d pbl_vbase=%p, pbl_pbase=%lx\n",
  667. nespbl->pbl_size, pbl_entries,
  668. (void *)nespbl->pbl_vbase,
  669. (unsigned long) nespbl->pbl_pbase);
  670. pbl = (__le64 *) nespbl->pbl_vbase; /* points to first pbl entry */
  671. /* now lets set the sq_vbase as well as rq_vbase addrs we will assign */
  672. /* the first pbl to be fro the rq_vbase... */
  673. rq_pbl_entries = (rq_size * sizeof(struct nes_hw_qp_wqe)) >> 12;
  674. sq_pbl_entries = (sq_size * sizeof(struct nes_hw_qp_wqe)) >> 12;
  675. nesqp->hwqp.sq_pbase = (le32_to_cpu(((__le32 *)pbl)[0])) | ((u64)((le32_to_cpu(((__le32 *)pbl)[1]))) << 32);
  676. if (!nespbl->page) {
  677. nes_debug(NES_DBG_QP, "QP nespbl->page is NULL \n");
  678. kfree(nespbl);
  679. return -ENOMEM;
  680. }
  681. nesqp->hwqp.sq_vbase = kmap(nespbl->page);
  682. nesqp->page = nespbl->page;
  683. if (!nesqp->hwqp.sq_vbase) {
  684. nes_debug(NES_DBG_QP, "QP sq_vbase kmap failed\n");
  685. kfree(nespbl);
  686. return -ENOMEM;
  687. }
  688. /* Now to get to sq.. we need to calculate how many */
  689. /* PBL entries were used by the rq.. */
  690. pbl += sq_pbl_entries;
  691. nesqp->hwqp.rq_pbase = (le32_to_cpu(((__le32 *)pbl)[0])) | ((u64)((le32_to_cpu(((__le32 *)pbl)[1]))) << 32);
  692. /* nesqp->hwqp.rq_vbase = bus_to_virt(*pbl); */
  693. /*nesqp->hwqp.rq_vbase = phys_to_virt(*pbl); */
  694. nes_debug(NES_DBG_QP, "QP sq_vbase= %p sq_pbase=%lx rq_vbase=%p rq_pbase=%lx\n",
  695. nesqp->hwqp.sq_vbase, (unsigned long) nesqp->hwqp.sq_pbase,
  696. nesqp->hwqp.rq_vbase, (unsigned long) nesqp->hwqp.rq_pbase);
  697. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  698. if (!nesadapter->free_256pbl) {
  699. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
  700. nespbl->pbl_pbase);
  701. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  702. kunmap(nesqp->page);
  703. kfree(nespbl);
  704. return -ENOMEM;
  705. }
  706. nesadapter->free_256pbl--;
  707. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  708. nesqp->pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 256, &nesqp->pbl_pbase);
  709. pblbuffer = nesqp->pbl_vbase;
  710. if (!nesqp->pbl_vbase) {
  711. /* memory allocated during nes_reg_user_mr() */
  712. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
  713. nespbl->pbl_pbase);
  714. kfree(nespbl);
  715. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  716. nesadapter->free_256pbl++;
  717. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  718. kunmap(nesqp->page);
  719. return -ENOMEM;
  720. }
  721. memset(nesqp->pbl_vbase, 0, 256);
  722. /* fill in the page address in the pbl buffer.. */
  723. tpbl = pblbuffer + 16;
  724. pbl = (__le64 *)nespbl->pbl_vbase;
  725. while (sq_pbl_entries--)
  726. *tpbl++ = *pbl++;
  727. tpbl = pblbuffer;
  728. while (rq_pbl_entries--)
  729. *tpbl++ = *pbl++;
  730. /* done with memory allocated during nes_reg_user_mr() */
  731. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
  732. nespbl->pbl_pbase);
  733. kfree(nespbl);
  734. nesqp->qp_mem_size =
  735. max((u32)sizeof(struct nes_qp_context), ((u32)256)) + 256; /* this is Q2 */
  736. /* Round up to a multiple of a page */
  737. nesqp->qp_mem_size += PAGE_SIZE - 1;
  738. nesqp->qp_mem_size &= ~(PAGE_SIZE - 1);
  739. mem = pci_alloc_consistent(nesdev->pcidev, nesqp->qp_mem_size,
  740. &nesqp->hwqp.q2_pbase);
  741. if (!mem) {
  742. pci_free_consistent(nesdev->pcidev, 256, nesqp->pbl_vbase, nesqp->pbl_pbase);
  743. nesqp->pbl_vbase = NULL;
  744. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  745. nesadapter->free_256pbl++;
  746. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  747. kunmap(nesqp->page);
  748. return -ENOMEM;
  749. }
  750. nesqp->sq_kmapped = 1;
  751. nesqp->hwqp.q2_vbase = mem;
  752. mem += 256;
  753. memset(nesqp->hwqp.q2_vbase, 0, 256);
  754. nesqp->nesqp_context = mem;
  755. memset(nesqp->nesqp_context, 0, sizeof(*nesqp->nesqp_context));
  756. nesqp->nesqp_context_pbase = nesqp->hwqp.q2_pbase + 256;
  757. return 0;
  758. }
  759. /**
  760. * nes_setup_mmap_qp
  761. */
  762. static int nes_setup_mmap_qp(struct nes_qp *nesqp, struct nes_vnic *nesvnic,
  763. int sq_size, int rq_size)
  764. {
  765. void *mem;
  766. struct nes_device *nesdev = nesvnic->nesdev;
  767. nesqp->qp_mem_size = (sizeof(struct nes_hw_qp_wqe) * sq_size) +
  768. (sizeof(struct nes_hw_qp_wqe) * rq_size) +
  769. max((u32)sizeof(struct nes_qp_context), ((u32)256)) +
  770. 256; /* this is Q2 */
  771. /* Round up to a multiple of a page */
  772. nesqp->qp_mem_size += PAGE_SIZE - 1;
  773. nesqp->qp_mem_size &= ~(PAGE_SIZE - 1);
  774. mem = pci_alloc_consistent(nesdev->pcidev, nesqp->qp_mem_size,
  775. &nesqp->hwqp.sq_pbase);
  776. if (!mem)
  777. return -ENOMEM;
  778. nes_debug(NES_DBG_QP, "PCI consistent memory for "
  779. "host descriptor rings located @ %p (pa = 0x%08lX.) size = %u.\n",
  780. mem, (unsigned long)nesqp->hwqp.sq_pbase, nesqp->qp_mem_size);
  781. memset(mem, 0, nesqp->qp_mem_size);
  782. nesqp->hwqp.sq_vbase = mem;
  783. mem += sizeof(struct nes_hw_qp_wqe) * sq_size;
  784. nesqp->hwqp.rq_vbase = mem;
  785. nesqp->hwqp.rq_pbase = nesqp->hwqp.sq_pbase +
  786. sizeof(struct nes_hw_qp_wqe) * sq_size;
  787. mem += sizeof(struct nes_hw_qp_wqe) * rq_size;
  788. nesqp->hwqp.q2_vbase = mem;
  789. nesqp->hwqp.q2_pbase = nesqp->hwqp.rq_pbase +
  790. sizeof(struct nes_hw_qp_wqe) * rq_size;
  791. mem += 256;
  792. memset(nesqp->hwqp.q2_vbase, 0, 256);
  793. nesqp->nesqp_context = mem;
  794. nesqp->nesqp_context_pbase = nesqp->hwqp.q2_pbase + 256;
  795. memset(nesqp->nesqp_context, 0, sizeof(*nesqp->nesqp_context));
  796. return 0;
  797. }
  798. /**
  799. * nes_free_qp_mem() is to free up the qp's pci_alloc_consistent() memory.
  800. */
  801. static void nes_free_qp_mem(struct nes_device *nesdev,
  802. struct nes_qp *nesqp, int virt_wqs)
  803. {
  804. unsigned long flags;
  805. struct nes_adapter *nesadapter = nesdev->nesadapter;
  806. if (!virt_wqs) {
  807. pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size,
  808. nesqp->hwqp.sq_vbase, nesqp->hwqp.sq_pbase);
  809. }else {
  810. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  811. nesadapter->free_256pbl++;
  812. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  813. pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size, nesqp->hwqp.q2_vbase, nesqp->hwqp.q2_pbase);
  814. pci_free_consistent(nesdev->pcidev, 256, nesqp->pbl_vbase, nesqp->pbl_pbase );
  815. nesqp->pbl_vbase = NULL;
  816. if (nesqp->sq_kmapped) {
  817. nesqp->sq_kmapped = 0;
  818. kunmap(nesqp->page);
  819. }
  820. }
  821. }
  822. /**
  823. * nes_create_qp
  824. */
  825. static struct ib_qp *nes_create_qp(struct ib_pd *ibpd,
  826. struct ib_qp_init_attr *init_attr, struct ib_udata *udata)
  827. {
  828. u64 u64temp= 0;
  829. u64 u64nesqp = 0;
  830. struct nes_pd *nespd = to_nespd(ibpd);
  831. struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
  832. struct nes_device *nesdev = nesvnic->nesdev;
  833. struct nes_adapter *nesadapter = nesdev->nesadapter;
  834. struct nes_qp *nesqp;
  835. struct nes_cq *nescq;
  836. struct nes_ucontext *nes_ucontext;
  837. struct nes_hw_cqp_wqe *cqp_wqe;
  838. struct nes_cqp_request *cqp_request;
  839. struct nes_create_qp_req req;
  840. struct nes_create_qp_resp uresp;
  841. struct nes_pbl *nespbl = NULL;
  842. u32 qp_num = 0;
  843. u32 opcode = 0;
  844. /* u32 counter = 0; */
  845. void *mem;
  846. unsigned long flags;
  847. int ret;
  848. int err;
  849. int virt_wqs = 0;
  850. int sq_size;
  851. int rq_size;
  852. u8 sq_encoded_size;
  853. u8 rq_encoded_size;
  854. /* int counter; */
  855. if (init_attr->create_flags)
  856. return ERR_PTR(-EINVAL);
  857. atomic_inc(&qps_created);
  858. switch (init_attr->qp_type) {
  859. case IB_QPT_RC:
  860. if (nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) {
  861. init_attr->cap.max_inline_data = 0;
  862. } else {
  863. init_attr->cap.max_inline_data = 64;
  864. }
  865. sq_size = init_attr->cap.max_send_wr;
  866. rq_size = init_attr->cap.max_recv_wr;
  867. /* check if the encoded sizes are OK or not... */
  868. sq_encoded_size = nes_get_encoded_size(&sq_size);
  869. rq_encoded_size = nes_get_encoded_size(&rq_size);
  870. if ((!sq_encoded_size) || (!rq_encoded_size)) {
  871. nes_debug(NES_DBG_QP, "ERROR bad rq (%u) or sq (%u) size\n",
  872. rq_size, sq_size);
  873. return ERR_PTR(-EINVAL);
  874. }
  875. init_attr->cap.max_send_wr = sq_size -2;
  876. init_attr->cap.max_recv_wr = rq_size -1;
  877. nes_debug(NES_DBG_QP, "RQ size=%u, SQ Size=%u\n", rq_size, sq_size);
  878. ret = nes_alloc_resource(nesadapter, nesadapter->allocated_qps,
  879. nesadapter->max_qp, &qp_num, &nesadapter->next_qp, NES_RESOURCE_QP);
  880. if (ret) {
  881. return ERR_PTR(ret);
  882. }
  883. /* Need 512 (actually now 1024) byte alignment on this structure */
  884. mem = kzalloc(sizeof(*nesqp)+NES_SW_CONTEXT_ALIGN-1, GFP_KERNEL);
  885. if (!mem) {
  886. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  887. return ERR_PTR(-ENOMEM);
  888. }
  889. u64nesqp = (unsigned long)mem;
  890. u64nesqp += ((u64)NES_SW_CONTEXT_ALIGN) - 1;
  891. u64temp = ((u64)NES_SW_CONTEXT_ALIGN) - 1;
  892. u64nesqp &= ~u64temp;
  893. nesqp = (struct nes_qp *)(unsigned long)u64nesqp;
  894. /* nes_debug(NES_DBG_QP, "nesqp=%p, allocated buffer=%p. Rounded to closest %u\n",
  895. nesqp, mem, NES_SW_CONTEXT_ALIGN); */
  896. nesqp->allocated_buffer = mem;
  897. if (udata) {
  898. if (ib_copy_from_udata(&req, udata, sizeof(struct nes_create_qp_req))) {
  899. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  900. kfree(nesqp->allocated_buffer);
  901. nes_debug(NES_DBG_QP, "ib_copy_from_udata() Failed \n");
  902. return ERR_PTR(-EFAULT);
  903. }
  904. if (req.user_wqe_buffers) {
  905. virt_wqs = 1;
  906. }
  907. if (req.user_qp_buffer)
  908. nesqp->nesuqp_addr = req.user_qp_buffer;
  909. if ((ibpd->uobject) && (ibpd->uobject->context)) {
  910. nesqp->user_mode = 1;
  911. nes_ucontext = to_nesucontext(ibpd->uobject->context);
  912. if (virt_wqs) {
  913. err = 1;
  914. list_for_each_entry(nespbl, &nes_ucontext->qp_reg_mem_list, list) {
  915. if (nespbl->user_base == (unsigned long )req.user_wqe_buffers) {
  916. list_del(&nespbl->list);
  917. err = 0;
  918. nes_debug(NES_DBG_QP, "Found PBL for virtual QP. nespbl=%p. user_base=0x%lx\n",
  919. nespbl, nespbl->user_base);
  920. break;
  921. }
  922. }
  923. if (err) {
  924. nes_debug(NES_DBG_QP, "Didn't Find PBL for virtual QP. address = %llx.\n",
  925. (long long unsigned int)req.user_wqe_buffers);
  926. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  927. kfree(nesqp->allocated_buffer);
  928. return ERR_PTR(-EFAULT);
  929. }
  930. }
  931. nes_ucontext = to_nesucontext(ibpd->uobject->context);
  932. nesqp->mmap_sq_db_index =
  933. find_next_zero_bit(nes_ucontext->allocated_wqs,
  934. NES_MAX_USER_WQ_REGIONS, nes_ucontext->first_free_wq);
  935. /* nes_debug(NES_DBG_QP, "find_first_zero_biton wqs returned %u\n",
  936. nespd->mmap_db_index); */
  937. if (nesqp->mmap_sq_db_index >= NES_MAX_USER_WQ_REGIONS) {
  938. nes_debug(NES_DBG_QP,
  939. "db index > max user regions, failing create QP\n");
  940. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  941. if (virt_wqs) {
  942. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
  943. nespbl->pbl_pbase);
  944. kfree(nespbl);
  945. }
  946. kfree(nesqp->allocated_buffer);
  947. return ERR_PTR(-ENOMEM);
  948. }
  949. set_bit(nesqp->mmap_sq_db_index, nes_ucontext->allocated_wqs);
  950. nes_ucontext->mmap_nesqp[nesqp->mmap_sq_db_index] = nesqp;
  951. nes_ucontext->first_free_wq = nesqp->mmap_sq_db_index + 1;
  952. } else {
  953. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  954. kfree(nesqp->allocated_buffer);
  955. return ERR_PTR(-EFAULT);
  956. }
  957. }
  958. err = (!virt_wqs) ? nes_setup_mmap_qp(nesqp, nesvnic, sq_size, rq_size) :
  959. nes_setup_virt_qp(nesqp, nespbl, nesvnic, sq_size, rq_size);
  960. if (err) {
  961. nes_debug(NES_DBG_QP,
  962. "error geting qp mem code = %d\n", err);
  963. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  964. kfree(nesqp->allocated_buffer);
  965. return ERR_PTR(-ENOMEM);
  966. }
  967. nesqp->hwqp.sq_size = sq_size;
  968. nesqp->hwqp.sq_encoded_size = sq_encoded_size;
  969. nesqp->hwqp.sq_head = 1;
  970. nesqp->hwqp.rq_size = rq_size;
  971. nesqp->hwqp.rq_encoded_size = rq_encoded_size;
  972. /* nes_debug(NES_DBG_QP, "nesqp->nesqp_context_pbase = %p\n",
  973. (void *)nesqp->nesqp_context_pbase);
  974. */
  975. nesqp->hwqp.qp_id = qp_num;
  976. nesqp->ibqp.qp_num = nesqp->hwqp.qp_id;
  977. nesqp->nespd = nespd;
  978. nescq = to_nescq(init_attr->send_cq);
  979. nesqp->nesscq = nescq;
  980. nescq = to_nescq(init_attr->recv_cq);
  981. nesqp->nesrcq = nescq;
  982. nesqp->nesqp_context->misc |= cpu_to_le32((u32)PCI_FUNC(nesdev->pcidev->devfn) <<
  983. NES_QPCONTEXT_MISC_PCI_FCN_SHIFT);
  984. nesqp->nesqp_context->misc |= cpu_to_le32((u32)nesqp->hwqp.rq_encoded_size <<
  985. NES_QPCONTEXT_MISC_RQ_SIZE_SHIFT);
  986. nesqp->nesqp_context->misc |= cpu_to_le32((u32)nesqp->hwqp.sq_encoded_size <<
  987. NES_QPCONTEXT_MISC_SQ_SIZE_SHIFT);
  988. if (!udata) {
  989. nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_PRIV_EN);
  990. nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_FAST_REGISTER_EN);
  991. }
  992. nesqp->nesqp_context->cqs = cpu_to_le32(nesqp->nesscq->hw_cq.cq_number +
  993. ((u32)nesqp->nesrcq->hw_cq.cq_number << 16));
  994. u64temp = (u64)nesqp->hwqp.sq_pbase;
  995. nesqp->nesqp_context->sq_addr_low = cpu_to_le32((u32)u64temp);
  996. nesqp->nesqp_context->sq_addr_high = cpu_to_le32((u32)(u64temp >> 32));
  997. if (!virt_wqs) {
  998. u64temp = (u64)nesqp->hwqp.sq_pbase;
  999. nesqp->nesqp_context->sq_addr_low = cpu_to_le32((u32)u64temp);
  1000. nesqp->nesqp_context->sq_addr_high = cpu_to_le32((u32)(u64temp >> 32));
  1001. u64temp = (u64)nesqp->hwqp.rq_pbase;
  1002. nesqp->nesqp_context->rq_addr_low = cpu_to_le32((u32)u64temp);
  1003. nesqp->nesqp_context->rq_addr_high = cpu_to_le32((u32)(u64temp >> 32));
  1004. } else {
  1005. u64temp = (u64)nesqp->pbl_pbase;
  1006. nesqp->nesqp_context->rq_addr_low = cpu_to_le32((u32)u64temp);
  1007. nesqp->nesqp_context->rq_addr_high = cpu_to_le32((u32)(u64temp >> 32));
  1008. }
  1009. /* nes_debug(NES_DBG_QP, "next_qp_nic_index=%u, using nic_index=%d\n",
  1010. nesvnic->next_qp_nic_index,
  1011. nesvnic->qp_nic_index[nesvnic->next_qp_nic_index]); */
  1012. spin_lock_irqsave(&nesdev->cqp.lock, flags);
  1013. nesqp->nesqp_context->misc2 |= cpu_to_le32(
  1014. (u32)nesvnic->qp_nic_index[nesvnic->next_qp_nic_index] <<
  1015. NES_QPCONTEXT_MISC2_NIC_INDEX_SHIFT);
  1016. nesvnic->next_qp_nic_index++;
  1017. if ((nesvnic->next_qp_nic_index > 3) ||
  1018. (nesvnic->qp_nic_index[nesvnic->next_qp_nic_index] == 0xf)) {
  1019. nesvnic->next_qp_nic_index = 0;
  1020. }
  1021. spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
  1022. nesqp->nesqp_context->pd_index_wscale |= cpu_to_le32((u32)nesqp->nespd->pd_id << 16);
  1023. u64temp = (u64)nesqp->hwqp.q2_pbase;
  1024. nesqp->nesqp_context->q2_addr_low = cpu_to_le32((u32)u64temp);
  1025. nesqp->nesqp_context->q2_addr_high = cpu_to_le32((u32)(u64temp >> 32));
  1026. nesqp->nesqp_context->aeq_token_low = cpu_to_le32((u32)((unsigned long)(nesqp)));
  1027. nesqp->nesqp_context->aeq_token_high = cpu_to_le32((u32)(upper_32_bits((unsigned long)(nesqp))));
  1028. nesqp->nesqp_context->ird_ord_sizes = cpu_to_le32(NES_QPCONTEXT_ORDIRD_ALSMM |
  1029. NES_QPCONTEXT_ORDIRD_AAH |
  1030. ((((u32)nesadapter->max_irrq_wr) <<
  1031. NES_QPCONTEXT_ORDIRD_IRDSIZE_SHIFT) & NES_QPCONTEXT_ORDIRD_IRDSIZE_MASK));
  1032. if (disable_mpa_crc) {
  1033. nes_debug(NES_DBG_QP, "Disabling MPA crc checking due to module option.\n");
  1034. nesqp->nesqp_context->ird_ord_sizes |= cpu_to_le32(NES_QPCONTEXT_ORDIRD_RNMC);
  1035. }
  1036. /* Create the QP */
  1037. cqp_request = nes_get_cqp_request(nesdev);
  1038. if (cqp_request == NULL) {
  1039. nes_debug(NES_DBG_QP, "Failed to get a cqp_request\n");
  1040. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  1041. nes_free_qp_mem(nesdev, nesqp,virt_wqs);
  1042. kfree(nesqp->allocated_buffer);
  1043. return ERR_PTR(-ENOMEM);
  1044. }
  1045. cqp_request->waiting = 1;
  1046. cqp_wqe = &cqp_request->cqp_wqe;
  1047. if (!virt_wqs) {
  1048. opcode = NES_CQP_CREATE_QP | NES_CQP_QP_TYPE_IWARP |
  1049. NES_CQP_QP_IWARP_STATE_IDLE;
  1050. } else {
  1051. opcode = NES_CQP_CREATE_QP | NES_CQP_QP_TYPE_IWARP | NES_CQP_QP_VIRT_WQS |
  1052. NES_CQP_QP_IWARP_STATE_IDLE;
  1053. }
  1054. opcode |= NES_CQP_QP_CQS_VALID;
  1055. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  1056. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
  1057. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, nesqp->hwqp.qp_id);
  1058. u64temp = (u64)nesqp->nesqp_context_pbase;
  1059. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp);
  1060. atomic_set(&cqp_request->refcount, 2);
  1061. nes_post_cqp_request(nesdev, cqp_request);
  1062. /* Wait for CQP */
  1063. nes_debug(NES_DBG_QP, "Waiting for create iWARP QP%u to complete.\n",
  1064. nesqp->hwqp.qp_id);
  1065. ret = wait_event_timeout(cqp_request->waitq,
  1066. (cqp_request->request_done != 0), NES_EVENT_TIMEOUT);
  1067. nes_debug(NES_DBG_QP, "Create iwarp QP%u completed, wait_event_timeout ret=%u,"
  1068. " nesdev->cqp_head = %u, nesdev->cqp.sq_tail = %u,"
  1069. " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
  1070. nesqp->hwqp.qp_id, ret, nesdev->cqp.sq_head, nesdev->cqp.sq_tail,
  1071. cqp_request->major_code, cqp_request->minor_code);
  1072. if ((!ret) || (cqp_request->major_code)) {
  1073. nes_put_cqp_request(nesdev, cqp_request);
  1074. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  1075. nes_free_qp_mem(nesdev, nesqp,virt_wqs);
  1076. kfree(nesqp->allocated_buffer);
  1077. if (!ret) {
  1078. return ERR_PTR(-ETIME);
  1079. } else {
  1080. return ERR_PTR(-EIO);
  1081. }
  1082. }
  1083. nes_put_cqp_request(nesdev, cqp_request);
  1084. if (ibpd->uobject) {
  1085. uresp.mmap_sq_db_index = nesqp->mmap_sq_db_index;
  1086. uresp.mmap_rq_db_index = 0;
  1087. uresp.actual_sq_size = sq_size;
  1088. uresp.actual_rq_size = rq_size;
  1089. uresp.qp_id = nesqp->hwqp.qp_id;
  1090. uresp.nes_drv_opt = nes_drv_opt;
  1091. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  1092. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  1093. nes_free_qp_mem(nesdev, nesqp,virt_wqs);
  1094. kfree(nesqp->allocated_buffer);
  1095. return ERR_PTR(-EFAULT);
  1096. }
  1097. }
  1098. nes_debug(NES_DBG_QP, "QP%u structure located @%p.Size = %u.\n",
  1099. nesqp->hwqp.qp_id, nesqp, (u32)sizeof(*nesqp));
  1100. spin_lock_init(&nesqp->lock);
  1101. nes_add_ref(&nesqp->ibqp);
  1102. break;
  1103. default:
  1104. nes_debug(NES_DBG_QP, "Invalid QP type: %d\n", init_attr->qp_type);
  1105. return ERR_PTR(-EINVAL);
  1106. }
  1107. init_completion(&nesqp->sq_drained);
  1108. init_completion(&nesqp->rq_drained);
  1109. nesqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR);
  1110. timer_setup(&nesqp->terminate_timer, nes_terminate_timeout, 0);
  1111. /* update the QP table */
  1112. nesdev->nesadapter->qp_table[nesqp->hwqp.qp_id-NES_FIRST_QPN] = nesqp;
  1113. nes_debug(NES_DBG_QP, "netdev refcnt=%u\n",
  1114. netdev_refcnt_read(nesvnic->netdev));
  1115. return &nesqp->ibqp;
  1116. }
  1117. /**
  1118. * nes_clean_cq
  1119. */
  1120. static void nes_clean_cq(struct nes_qp *nesqp, struct nes_cq *nescq)
  1121. {
  1122. u32 cq_head;
  1123. u32 lo;
  1124. u32 hi;
  1125. u64 u64temp;
  1126. unsigned long flags = 0;
  1127. spin_lock_irqsave(&nescq->lock, flags);
  1128. cq_head = nescq->hw_cq.cq_head;
  1129. while (le32_to_cpu(nescq->hw_cq.cq_vbase[cq_head].cqe_words[NES_CQE_OPCODE_IDX]) & NES_CQE_VALID) {
  1130. rmb();
  1131. lo = le32_to_cpu(nescq->hw_cq.cq_vbase[cq_head].cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX]);
  1132. hi = le32_to_cpu(nescq->hw_cq.cq_vbase[cq_head].cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX]);
  1133. u64temp = (((u64)hi) << 32) | ((u64)lo);
  1134. u64temp &= ~(NES_SW_CONTEXT_ALIGN-1);
  1135. if (u64temp == (u64)(unsigned long)nesqp) {
  1136. /* Zero the context value so cqe will be ignored */
  1137. nescq->hw_cq.cq_vbase[cq_head].cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX] = 0;
  1138. nescq->hw_cq.cq_vbase[cq_head].cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX] = 0;
  1139. }
  1140. if (++cq_head >= nescq->hw_cq.cq_size)
  1141. cq_head = 0;
  1142. }
  1143. spin_unlock_irqrestore(&nescq->lock, flags);
  1144. }
  1145. /**
  1146. * nes_destroy_qp
  1147. */
  1148. static int nes_destroy_qp(struct ib_qp *ibqp)
  1149. {
  1150. struct nes_qp *nesqp = to_nesqp(ibqp);
  1151. struct nes_ucontext *nes_ucontext;
  1152. struct ib_qp_attr attr;
  1153. struct iw_cm_id *cm_id;
  1154. struct iw_cm_event cm_event;
  1155. int ret = 0;
  1156. atomic_inc(&sw_qps_destroyed);
  1157. nesqp->destroyed = 1;
  1158. /* Blow away the connection if it exists. */
  1159. if (nesqp->ibqp_state >= IB_QPS_INIT && nesqp->ibqp_state <= IB_QPS_RTS) {
  1160. /* if (nesqp->ibqp_state == IB_QPS_RTS) { */
  1161. attr.qp_state = IB_QPS_ERR;
  1162. nes_modify_qp(&nesqp->ibqp, &attr, IB_QP_STATE, NULL);
  1163. }
  1164. if (((nesqp->ibqp_state == IB_QPS_INIT) ||
  1165. (nesqp->ibqp_state == IB_QPS_RTR)) && (nesqp->cm_id)) {
  1166. cm_id = nesqp->cm_id;
  1167. cm_event.event = IW_CM_EVENT_CONNECT_REPLY;
  1168. cm_event.status = -ETIMEDOUT;
  1169. cm_event.local_addr = cm_id->local_addr;
  1170. cm_event.remote_addr = cm_id->remote_addr;
  1171. cm_event.private_data = NULL;
  1172. cm_event.private_data_len = 0;
  1173. nes_debug(NES_DBG_QP, "Generating a CM Timeout Event for "
  1174. "QP%u. cm_id = %p, refcount = %u. \n",
  1175. nesqp->hwqp.qp_id, cm_id, atomic_read(&nesqp->refcount));
  1176. cm_id->rem_ref(cm_id);
  1177. ret = cm_id->event_handler(cm_id, &cm_event);
  1178. if (ret)
  1179. nes_debug(NES_DBG_QP, "OFA CM event_handler returned, ret=%d\n", ret);
  1180. }
  1181. if (nesqp->user_mode) {
  1182. if ((ibqp->uobject)&&(ibqp->uobject->context)) {
  1183. nes_ucontext = to_nesucontext(ibqp->uobject->context);
  1184. clear_bit(nesqp->mmap_sq_db_index, nes_ucontext->allocated_wqs);
  1185. nes_ucontext->mmap_nesqp[nesqp->mmap_sq_db_index] = NULL;
  1186. if (nes_ucontext->first_free_wq > nesqp->mmap_sq_db_index) {
  1187. nes_ucontext->first_free_wq = nesqp->mmap_sq_db_index;
  1188. }
  1189. }
  1190. if (nesqp->pbl_pbase && nesqp->sq_kmapped) {
  1191. nesqp->sq_kmapped = 0;
  1192. kunmap(nesqp->page);
  1193. }
  1194. } else {
  1195. /* Clean any pending completions from the cq(s) */
  1196. if (nesqp->nesscq)
  1197. nes_clean_cq(nesqp, nesqp->nesscq);
  1198. if ((nesqp->nesrcq) && (nesqp->nesrcq != nesqp->nesscq))
  1199. nes_clean_cq(nesqp, nesqp->nesrcq);
  1200. }
  1201. nes_rem_ref(&nesqp->ibqp);
  1202. return 0;
  1203. }
  1204. /**
  1205. * nes_create_cq
  1206. */
  1207. static struct ib_cq *nes_create_cq(struct ib_device *ibdev,
  1208. const struct ib_cq_init_attr *attr,
  1209. struct ib_ucontext *context,
  1210. struct ib_udata *udata)
  1211. {
  1212. int entries = attr->cqe;
  1213. u64 u64temp;
  1214. struct nes_vnic *nesvnic = to_nesvnic(ibdev);
  1215. struct nes_device *nesdev = nesvnic->nesdev;
  1216. struct nes_adapter *nesadapter = nesdev->nesadapter;
  1217. struct nes_cq *nescq;
  1218. struct nes_ucontext *nes_ucontext = NULL;
  1219. struct nes_cqp_request *cqp_request;
  1220. void *mem = NULL;
  1221. struct nes_hw_cqp_wqe *cqp_wqe;
  1222. struct nes_pbl *nespbl = NULL;
  1223. struct nes_create_cq_req req;
  1224. struct nes_create_cq_resp resp;
  1225. u32 cq_num = 0;
  1226. u32 opcode = 0;
  1227. u32 pbl_entries = 1;
  1228. int err;
  1229. unsigned long flags;
  1230. int ret;
  1231. if (attr->flags)
  1232. return ERR_PTR(-EINVAL);
  1233. if (entries > nesadapter->max_cqe)
  1234. return ERR_PTR(-EINVAL);
  1235. err = nes_alloc_resource(nesadapter, nesadapter->allocated_cqs,
  1236. nesadapter->max_cq, &cq_num, &nesadapter->next_cq, NES_RESOURCE_CQ);
  1237. if (err) {
  1238. return ERR_PTR(err);
  1239. }
  1240. nescq = kzalloc(sizeof(struct nes_cq), GFP_KERNEL);
  1241. if (!nescq) {
  1242. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1243. return ERR_PTR(-ENOMEM);
  1244. }
  1245. nescq->hw_cq.cq_size = max(entries + 1, 5);
  1246. nescq->hw_cq.cq_number = cq_num;
  1247. nescq->ibcq.cqe = nescq->hw_cq.cq_size - 1;
  1248. if (context) {
  1249. nes_ucontext = to_nesucontext(context);
  1250. if (ib_copy_from_udata(&req, udata, sizeof (struct nes_create_cq_req))) {
  1251. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1252. kfree(nescq);
  1253. return ERR_PTR(-EFAULT);
  1254. }
  1255. nesvnic->mcrq_ucontext = nes_ucontext;
  1256. nes_ucontext->mcrqf = req.mcrqf;
  1257. if (nes_ucontext->mcrqf) {
  1258. if (nes_ucontext->mcrqf & 0x80000000)
  1259. nescq->hw_cq.cq_number = nesvnic->nic.qp_id + 28 + 2 * ((nes_ucontext->mcrqf & 0xf) - 1);
  1260. else if (nes_ucontext->mcrqf & 0x40000000)
  1261. nescq->hw_cq.cq_number = nes_ucontext->mcrqf & 0xffff;
  1262. else
  1263. nescq->hw_cq.cq_number = nesvnic->mcrq_qp_id + nes_ucontext->mcrqf-1;
  1264. nescq->mcrqf = nes_ucontext->mcrqf;
  1265. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1266. }
  1267. nes_debug(NES_DBG_CQ, "CQ Virtual Address = %08lX, size = %u.\n",
  1268. (unsigned long)req.user_cq_buffer, entries);
  1269. err = 1;
  1270. list_for_each_entry(nespbl, &nes_ucontext->cq_reg_mem_list, list) {
  1271. if (nespbl->user_base == (unsigned long )req.user_cq_buffer) {
  1272. list_del(&nespbl->list);
  1273. err = 0;
  1274. nes_debug(NES_DBG_CQ, "Found PBL for virtual CQ. nespbl=%p.\n",
  1275. nespbl);
  1276. break;
  1277. }
  1278. }
  1279. if (err) {
  1280. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1281. kfree(nescq);
  1282. return ERR_PTR(-EFAULT);
  1283. }
  1284. pbl_entries = nespbl->pbl_size >> 3;
  1285. nescq->cq_mem_size = 0;
  1286. } else {
  1287. nescq->cq_mem_size = nescq->hw_cq.cq_size * sizeof(struct nes_hw_cqe);
  1288. nes_debug(NES_DBG_CQ, "Attempting to allocate pci memory (%u entries, %u bytes) for CQ%u.\n",
  1289. entries, nescq->cq_mem_size, nescq->hw_cq.cq_number);
  1290. /* allocate the physical buffer space */
  1291. mem = pci_zalloc_consistent(nesdev->pcidev, nescq->cq_mem_size,
  1292. &nescq->hw_cq.cq_pbase);
  1293. if (!mem) {
  1294. printk(KERN_ERR PFX "Unable to allocate pci memory for cq\n");
  1295. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1296. kfree(nescq);
  1297. return ERR_PTR(-ENOMEM);
  1298. }
  1299. nescq->hw_cq.cq_vbase = mem;
  1300. nescq->hw_cq.cq_head = 0;
  1301. nes_debug(NES_DBG_CQ, "CQ%u virtual address @ %p, phys = 0x%08X\n",
  1302. nescq->hw_cq.cq_number, nescq->hw_cq.cq_vbase,
  1303. (u32)nescq->hw_cq.cq_pbase);
  1304. }
  1305. nescq->hw_cq.ce_handler = nes_iwarp_ce_handler;
  1306. spin_lock_init(&nescq->lock);
  1307. /* send CreateCQ request to CQP */
  1308. cqp_request = nes_get_cqp_request(nesdev);
  1309. if (cqp_request == NULL) {
  1310. nes_debug(NES_DBG_CQ, "Failed to get a cqp_request.\n");
  1311. if (!context)
  1312. pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, mem,
  1313. nescq->hw_cq.cq_pbase);
  1314. else {
  1315. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size,
  1316. nespbl->pbl_vbase, nespbl->pbl_pbase);
  1317. kfree(nespbl);
  1318. }
  1319. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1320. kfree(nescq);
  1321. return ERR_PTR(-ENOMEM);
  1322. }
  1323. cqp_request->waiting = 1;
  1324. cqp_wqe = &cqp_request->cqp_wqe;
  1325. opcode = NES_CQP_CREATE_CQ | NES_CQP_CQ_CEQ_VALID |
  1326. NES_CQP_CQ_CHK_OVERFLOW |
  1327. NES_CQP_CQ_CEQE_MASK | ((u32)nescq->hw_cq.cq_size << 16);
  1328. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  1329. if (pbl_entries != 1) {
  1330. if (pbl_entries > 32) {
  1331. /* use 4k pbl */
  1332. nes_debug(NES_DBG_CQ, "pbl_entries=%u, use a 4k PBL\n", pbl_entries);
  1333. if (nesadapter->free_4kpbl == 0) {
  1334. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1335. nes_free_cqp_request(nesdev, cqp_request);
  1336. if (!context)
  1337. pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, mem,
  1338. nescq->hw_cq.cq_pbase);
  1339. else {
  1340. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size,
  1341. nespbl->pbl_vbase, nespbl->pbl_pbase);
  1342. kfree(nespbl);
  1343. }
  1344. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1345. kfree(nescq);
  1346. return ERR_PTR(-ENOMEM);
  1347. } else {
  1348. opcode |= (NES_CQP_CQ_VIRT | NES_CQP_CQ_4KB_CHUNK);
  1349. nescq->virtual_cq = 2;
  1350. nesadapter->free_4kpbl--;
  1351. }
  1352. } else {
  1353. /* use 256 byte pbl */
  1354. nes_debug(NES_DBG_CQ, "pbl_entries=%u, use a 256 byte PBL\n", pbl_entries);
  1355. if (nesadapter->free_256pbl == 0) {
  1356. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1357. nes_free_cqp_request(nesdev, cqp_request);
  1358. if (!context)
  1359. pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, mem,
  1360. nescq->hw_cq.cq_pbase);
  1361. else {
  1362. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size,
  1363. nespbl->pbl_vbase, nespbl->pbl_pbase);
  1364. kfree(nespbl);
  1365. }
  1366. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1367. kfree(nescq);
  1368. return ERR_PTR(-ENOMEM);
  1369. } else {
  1370. opcode |= NES_CQP_CQ_VIRT;
  1371. nescq->virtual_cq = 1;
  1372. nesadapter->free_256pbl--;
  1373. }
  1374. }
  1375. }
  1376. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1377. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  1378. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
  1379. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX,
  1380. (nescq->hw_cq.cq_number | ((u32)nesdev->ceq_index << 16)));
  1381. if (context) {
  1382. if (pbl_entries != 1)
  1383. u64temp = (u64)nespbl->pbl_pbase;
  1384. else
  1385. u64temp = le64_to_cpu(nespbl->pbl_vbase[0]);
  1386. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_CQ_WQE_DOORBELL_INDEX_HIGH_IDX,
  1387. nes_ucontext->mmap_db_index[0]);
  1388. } else {
  1389. u64temp = (u64)nescq->hw_cq.cq_pbase;
  1390. cqp_wqe->wqe_words[NES_CQP_CQ_WQE_DOORBELL_INDEX_HIGH_IDX] = 0;
  1391. }
  1392. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_CQ_WQE_PBL_LOW_IDX, u64temp);
  1393. cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_HIGH_IDX] = 0;
  1394. u64temp = (u64)(unsigned long)&nescq->hw_cq;
  1395. cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_LOW_IDX] =
  1396. cpu_to_le32((u32)(u64temp >> 1));
  1397. cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_HIGH_IDX] =
  1398. cpu_to_le32(((u32)((u64temp) >> 33)) & 0x7FFFFFFF);
  1399. atomic_set(&cqp_request->refcount, 2);
  1400. nes_post_cqp_request(nesdev, cqp_request);
  1401. /* Wait for CQP */
  1402. nes_debug(NES_DBG_CQ, "Waiting for create iWARP CQ%u to complete.\n",
  1403. nescq->hw_cq.cq_number);
  1404. ret = wait_event_timeout(cqp_request->waitq, (0 != cqp_request->request_done),
  1405. NES_EVENT_TIMEOUT * 2);
  1406. nes_debug(NES_DBG_CQ, "Create iWARP CQ%u completed, wait_event_timeout ret = %d.\n",
  1407. nescq->hw_cq.cq_number, ret);
  1408. if ((!ret) || (cqp_request->major_code)) {
  1409. nes_put_cqp_request(nesdev, cqp_request);
  1410. if (!context)
  1411. pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, mem,
  1412. nescq->hw_cq.cq_pbase);
  1413. else {
  1414. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size,
  1415. nespbl->pbl_vbase, nespbl->pbl_pbase);
  1416. kfree(nespbl);
  1417. }
  1418. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1419. kfree(nescq);
  1420. return ERR_PTR(-EIO);
  1421. }
  1422. nes_put_cqp_request(nesdev, cqp_request);
  1423. if (context) {
  1424. /* free the nespbl */
  1425. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
  1426. nespbl->pbl_pbase);
  1427. kfree(nespbl);
  1428. resp.cq_id = nescq->hw_cq.cq_number;
  1429. resp.cq_size = nescq->hw_cq.cq_size;
  1430. resp.mmap_db_index = 0;
  1431. if (ib_copy_to_udata(udata, &resp, sizeof resp - sizeof resp.reserved)) {
  1432. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1433. kfree(nescq);
  1434. return ERR_PTR(-EFAULT);
  1435. }
  1436. }
  1437. return &nescq->ibcq;
  1438. }
  1439. /**
  1440. * nes_destroy_cq
  1441. */
  1442. static int nes_destroy_cq(struct ib_cq *ib_cq)
  1443. {
  1444. struct nes_cq *nescq;
  1445. struct nes_device *nesdev;
  1446. struct nes_vnic *nesvnic;
  1447. struct nes_adapter *nesadapter;
  1448. struct nes_hw_cqp_wqe *cqp_wqe;
  1449. struct nes_cqp_request *cqp_request;
  1450. unsigned long flags;
  1451. u32 opcode = 0;
  1452. int ret;
  1453. if (ib_cq == NULL)
  1454. return 0;
  1455. nescq = to_nescq(ib_cq);
  1456. nesvnic = to_nesvnic(ib_cq->device);
  1457. nesdev = nesvnic->nesdev;
  1458. nesadapter = nesdev->nesadapter;
  1459. nes_debug(NES_DBG_CQ, "Destroy CQ%u\n", nescq->hw_cq.cq_number);
  1460. /* Send DestroyCQ request to CQP */
  1461. cqp_request = nes_get_cqp_request(nesdev);
  1462. if (cqp_request == NULL) {
  1463. nes_debug(NES_DBG_CQ, "Failed to get a cqp_request.\n");
  1464. return -ENOMEM;
  1465. }
  1466. cqp_request->waiting = 1;
  1467. cqp_wqe = &cqp_request->cqp_wqe;
  1468. opcode = NES_CQP_DESTROY_CQ | (nescq->hw_cq.cq_size << 16);
  1469. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  1470. if (nescq->virtual_cq == 1) {
  1471. nesadapter->free_256pbl++;
  1472. if (nesadapter->free_256pbl > nesadapter->max_256pbl) {
  1473. printk(KERN_ERR PFX "%s: free 256B PBLs(%u) has exceeded the max(%u)\n",
  1474. __func__, nesadapter->free_256pbl, nesadapter->max_256pbl);
  1475. }
  1476. } else if (nescq->virtual_cq == 2) {
  1477. nesadapter->free_4kpbl++;
  1478. if (nesadapter->free_4kpbl > nesadapter->max_4kpbl) {
  1479. printk(KERN_ERR PFX "%s: free 4K PBLs(%u) has exceeded the max(%u)\n",
  1480. __func__, nesadapter->free_4kpbl, nesadapter->max_4kpbl);
  1481. }
  1482. opcode |= NES_CQP_CQ_4KB_CHUNK;
  1483. }
  1484. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1485. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  1486. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
  1487. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX,
  1488. (nescq->hw_cq.cq_number | ((u32)PCI_FUNC(nesdev->pcidev->devfn) << 16)));
  1489. if (!nescq->mcrqf)
  1490. nes_free_resource(nesadapter, nesadapter->allocated_cqs, nescq->hw_cq.cq_number);
  1491. atomic_set(&cqp_request->refcount, 2);
  1492. nes_post_cqp_request(nesdev, cqp_request);
  1493. /* Wait for CQP */
  1494. nes_debug(NES_DBG_CQ, "Waiting for destroy iWARP CQ%u to complete.\n",
  1495. nescq->hw_cq.cq_number);
  1496. ret = wait_event_timeout(cqp_request->waitq, (0 != cqp_request->request_done),
  1497. NES_EVENT_TIMEOUT);
  1498. nes_debug(NES_DBG_CQ, "Destroy iWARP CQ%u completed, wait_event_timeout ret = %u,"
  1499. " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
  1500. nescq->hw_cq.cq_number, ret, cqp_request->major_code,
  1501. cqp_request->minor_code);
  1502. if (!ret) {
  1503. nes_debug(NES_DBG_CQ, "iWARP CQ%u destroy timeout expired\n",
  1504. nescq->hw_cq.cq_number);
  1505. ret = -ETIME;
  1506. } else if (cqp_request->major_code) {
  1507. nes_debug(NES_DBG_CQ, "iWARP CQ%u destroy failed\n",
  1508. nescq->hw_cq.cq_number);
  1509. ret = -EIO;
  1510. } else {
  1511. ret = 0;
  1512. }
  1513. nes_put_cqp_request(nesdev, cqp_request);
  1514. if (nescq->cq_mem_size)
  1515. pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size,
  1516. nescq->hw_cq.cq_vbase, nescq->hw_cq.cq_pbase);
  1517. kfree(nescq);
  1518. return ret;
  1519. }
  1520. /**
  1521. * root_256
  1522. */
  1523. static u32 root_256(struct nes_device *nesdev,
  1524. struct nes_root_vpbl *root_vpbl,
  1525. struct nes_root_vpbl *new_root,
  1526. u16 pbl_count_4k)
  1527. {
  1528. u64 leaf_pbl;
  1529. int i, j, k;
  1530. if (pbl_count_4k == 1) {
  1531. new_root->pbl_vbase = pci_alloc_consistent(nesdev->pcidev,
  1532. 512, &new_root->pbl_pbase);
  1533. if (new_root->pbl_vbase == NULL)
  1534. return 0;
  1535. leaf_pbl = (u64)root_vpbl->pbl_pbase;
  1536. for (i = 0; i < 16; i++) {
  1537. new_root->pbl_vbase[i].pa_low =
  1538. cpu_to_le32((u32)leaf_pbl);
  1539. new_root->pbl_vbase[i].pa_high =
  1540. cpu_to_le32((u32)((((u64)leaf_pbl) >> 32)));
  1541. leaf_pbl += 256;
  1542. }
  1543. } else {
  1544. for (i = 3; i >= 0; i--) {
  1545. j = i * 16;
  1546. root_vpbl->pbl_vbase[j] = root_vpbl->pbl_vbase[i];
  1547. leaf_pbl = le32_to_cpu(root_vpbl->pbl_vbase[j].pa_low) +
  1548. (((u64)le32_to_cpu(root_vpbl->pbl_vbase[j].pa_high))
  1549. << 32);
  1550. for (k = 1; k < 16; k++) {
  1551. leaf_pbl += 256;
  1552. root_vpbl->pbl_vbase[j + k].pa_low =
  1553. cpu_to_le32((u32)leaf_pbl);
  1554. root_vpbl->pbl_vbase[j + k].pa_high =
  1555. cpu_to_le32((u32)((((u64)leaf_pbl) >> 32)));
  1556. }
  1557. }
  1558. }
  1559. return 1;
  1560. }
  1561. /**
  1562. * nes_reg_mr
  1563. */
  1564. static int nes_reg_mr(struct nes_device *nesdev, struct nes_pd *nespd,
  1565. u32 stag, u64 region_length, struct nes_root_vpbl *root_vpbl,
  1566. dma_addr_t single_buffer, u16 pbl_count_4k,
  1567. u16 residual_page_count_4k, int acc, u64 *iova_start,
  1568. u16 *actual_pbl_cnt, u8 *used_4k_pbls)
  1569. {
  1570. struct nes_hw_cqp_wqe *cqp_wqe;
  1571. struct nes_cqp_request *cqp_request;
  1572. unsigned long flags;
  1573. int ret;
  1574. struct nes_adapter *nesadapter = nesdev->nesadapter;
  1575. uint pg_cnt = 0;
  1576. u16 pbl_count_256 = 0;
  1577. u16 pbl_count = 0;
  1578. u8 use_256_pbls = 0;
  1579. u8 use_4k_pbls = 0;
  1580. u16 use_two_level = (pbl_count_4k > 1) ? 1 : 0;
  1581. struct nes_root_vpbl new_root = { 0, NULL, NULL };
  1582. u32 opcode = 0;
  1583. u16 major_code;
  1584. /* Register the region with the adapter */
  1585. cqp_request = nes_get_cqp_request(nesdev);
  1586. if (cqp_request == NULL) {
  1587. nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n");
  1588. return -ENOMEM;
  1589. }
  1590. cqp_request->waiting = 1;
  1591. cqp_wqe = &cqp_request->cqp_wqe;
  1592. if (pbl_count_4k) {
  1593. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  1594. pg_cnt = ((pbl_count_4k - 1) * 512) + residual_page_count_4k;
  1595. pbl_count_256 = (pg_cnt + 31) / 32;
  1596. if (pg_cnt <= 32) {
  1597. if (pbl_count_256 <= nesadapter->free_256pbl)
  1598. use_256_pbls = 1;
  1599. else if (pbl_count_4k <= nesadapter->free_4kpbl)
  1600. use_4k_pbls = 1;
  1601. } else if (pg_cnt <= 2048) {
  1602. if (((pbl_count_4k + use_two_level) <= nesadapter->free_4kpbl) &&
  1603. (nesadapter->free_4kpbl > (nesadapter->max_4kpbl >> 1))) {
  1604. use_4k_pbls = 1;
  1605. } else if ((pbl_count_256 + 1) <= nesadapter->free_256pbl) {
  1606. use_256_pbls = 1;
  1607. use_two_level = 1;
  1608. } else if ((pbl_count_4k + use_two_level) <= nesadapter->free_4kpbl) {
  1609. use_4k_pbls = 1;
  1610. }
  1611. } else {
  1612. if ((pbl_count_4k + 1) <= nesadapter->free_4kpbl)
  1613. use_4k_pbls = 1;
  1614. }
  1615. if (use_256_pbls) {
  1616. pbl_count = pbl_count_256;
  1617. nesadapter->free_256pbl -= pbl_count + use_two_level;
  1618. } else if (use_4k_pbls) {
  1619. pbl_count = pbl_count_4k;
  1620. nesadapter->free_4kpbl -= pbl_count + use_two_level;
  1621. } else {
  1622. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1623. nes_debug(NES_DBG_MR, "Out of Pbls\n");
  1624. nes_free_cqp_request(nesdev, cqp_request);
  1625. return -ENOMEM;
  1626. }
  1627. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1628. }
  1629. if (use_256_pbls && use_two_level) {
  1630. if (root_256(nesdev, root_vpbl, &new_root, pbl_count_4k) == 1) {
  1631. if (new_root.pbl_pbase != 0)
  1632. root_vpbl = &new_root;
  1633. } else {
  1634. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  1635. nesadapter->free_256pbl += pbl_count_256 + use_two_level;
  1636. use_256_pbls = 0;
  1637. if (pbl_count_4k == 1)
  1638. use_two_level = 0;
  1639. pbl_count = pbl_count_4k;
  1640. if ((pbl_count_4k + use_two_level) <= nesadapter->free_4kpbl) {
  1641. nesadapter->free_4kpbl -= pbl_count + use_two_level;
  1642. use_4k_pbls = 1;
  1643. }
  1644. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1645. if (use_4k_pbls == 0)
  1646. return -ENOMEM;
  1647. }
  1648. }
  1649. opcode = NES_CQP_REGISTER_STAG | NES_CQP_STAG_RIGHTS_LOCAL_READ |
  1650. NES_CQP_STAG_VA_TO | NES_CQP_STAG_MR;
  1651. if (acc & IB_ACCESS_LOCAL_WRITE)
  1652. opcode |= NES_CQP_STAG_RIGHTS_LOCAL_WRITE;
  1653. if (acc & IB_ACCESS_REMOTE_WRITE)
  1654. opcode |= NES_CQP_STAG_RIGHTS_REMOTE_WRITE | NES_CQP_STAG_REM_ACC_EN;
  1655. if (acc & IB_ACCESS_REMOTE_READ)
  1656. opcode |= NES_CQP_STAG_RIGHTS_REMOTE_READ | NES_CQP_STAG_REM_ACC_EN;
  1657. if (acc & IB_ACCESS_MW_BIND)
  1658. opcode |= NES_CQP_STAG_RIGHTS_WINDOW_BIND | NES_CQP_STAG_REM_ACC_EN;
  1659. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  1660. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
  1661. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_VA_LOW_IDX, *iova_start);
  1662. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_LEN_LOW_IDX, region_length);
  1663. cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX] =
  1664. cpu_to_le32((u32)(region_length >> 8) & 0xff000000);
  1665. cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX] |=
  1666. cpu_to_le32(nespd->pd_id & 0x00007fff);
  1667. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag);
  1668. if (pbl_count == 0) {
  1669. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PA_LOW_IDX, single_buffer);
  1670. } else {
  1671. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PA_LOW_IDX, root_vpbl->pbl_pbase);
  1672. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX, pbl_count);
  1673. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PBL_LEN_IDX, (pg_cnt * 8));
  1674. if (use_4k_pbls)
  1675. cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(NES_CQP_STAG_PBL_BLK_SIZE);
  1676. }
  1677. barrier();
  1678. atomic_set(&cqp_request->refcount, 2);
  1679. nes_post_cqp_request(nesdev, cqp_request);
  1680. /* Wait for CQP */
  1681. ret = wait_event_timeout(cqp_request->waitq, (0 != cqp_request->request_done),
  1682. NES_EVENT_TIMEOUT);
  1683. nes_debug(NES_DBG_MR, "Register STag 0x%08X completed, wait_event_timeout ret = %u,"
  1684. " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
  1685. stag, ret, cqp_request->major_code, cqp_request->minor_code);
  1686. major_code = cqp_request->major_code;
  1687. nes_put_cqp_request(nesdev, cqp_request);
  1688. if ((!ret || major_code) && pbl_count != 0) {
  1689. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  1690. if (use_256_pbls)
  1691. nesadapter->free_256pbl += pbl_count + use_two_level;
  1692. else if (use_4k_pbls)
  1693. nesadapter->free_4kpbl += pbl_count + use_two_level;
  1694. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1695. }
  1696. if (new_root.pbl_pbase)
  1697. pci_free_consistent(nesdev->pcidev, 512, new_root.pbl_vbase,
  1698. new_root.pbl_pbase);
  1699. if (!ret)
  1700. return -ETIME;
  1701. else if (major_code)
  1702. return -EIO;
  1703. *actual_pbl_cnt = pbl_count + use_two_level;
  1704. *used_4k_pbls = use_4k_pbls;
  1705. return 0;
  1706. }
  1707. /**
  1708. * nes_reg_phys_mr
  1709. */
  1710. struct ib_mr *nes_reg_phys_mr(struct ib_pd *ib_pd, u64 addr, u64 size,
  1711. int acc, u64 *iova_start)
  1712. {
  1713. u64 region_length;
  1714. struct nes_pd *nespd = to_nespd(ib_pd);
  1715. struct nes_vnic *nesvnic = to_nesvnic(ib_pd->device);
  1716. struct nes_device *nesdev = nesvnic->nesdev;
  1717. struct nes_adapter *nesadapter = nesdev->nesadapter;
  1718. struct nes_mr *nesmr;
  1719. struct ib_mr *ibmr;
  1720. struct nes_vpbl vpbl;
  1721. struct nes_root_vpbl root_vpbl;
  1722. u32 stag;
  1723. unsigned long mask;
  1724. u32 stag_index = 0;
  1725. u32 next_stag_index = 0;
  1726. u32 driver_key = 0;
  1727. int err = 0;
  1728. int ret = 0;
  1729. u16 pbl_count = 0;
  1730. u8 single_page = 1;
  1731. u8 stag_key = 0;
  1732. region_length = 0;
  1733. vpbl.pbl_vbase = NULL;
  1734. root_vpbl.pbl_vbase = NULL;
  1735. root_vpbl.pbl_pbase = 0;
  1736. get_random_bytes(&next_stag_index, sizeof(next_stag_index));
  1737. stag_key = (u8)next_stag_index;
  1738. driver_key = 0;
  1739. next_stag_index >>= 8;
  1740. next_stag_index %= nesadapter->max_mr;
  1741. if ((addr ^ *iova_start) & ~PAGE_MASK)
  1742. return ERR_PTR(-EINVAL);
  1743. err = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs, nesadapter->max_mr,
  1744. &stag_index, &next_stag_index, NES_RESOURCE_PHYS_MR);
  1745. if (err) {
  1746. return ERR_PTR(err);
  1747. }
  1748. nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
  1749. if (!nesmr) {
  1750. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  1751. return ERR_PTR(-ENOMEM);
  1752. }
  1753. /* Allocate a 4K buffer for the PBL */
  1754. vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 4096,
  1755. &vpbl.pbl_pbase);
  1756. nes_debug(NES_DBG_MR, "Allocating leaf PBL, va = %p, pa = 0x%016lX\n",
  1757. vpbl.pbl_vbase, (unsigned long)vpbl.pbl_pbase);
  1758. if (!vpbl.pbl_vbase) {
  1759. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  1760. ibmr = ERR_PTR(-ENOMEM);
  1761. kfree(nesmr);
  1762. goto reg_phys_err;
  1763. }
  1764. mask = !size;
  1765. if (mask & ~PAGE_MASK) {
  1766. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  1767. nes_debug(NES_DBG_MR, "Invalid buffer addr or size\n");
  1768. ibmr = ERR_PTR(-EINVAL);
  1769. kfree(nesmr);
  1770. goto reg_phys_err;
  1771. }
  1772. region_length += size;
  1773. vpbl.pbl_vbase[0].pa_low = cpu_to_le32((u32)addr & PAGE_MASK);
  1774. vpbl.pbl_vbase[0].pa_high = cpu_to_le32((u32)((((u64)addr) >> 32)));
  1775. stag = stag_index << 8;
  1776. stag |= driver_key;
  1777. stag += (u32)stag_key;
  1778. nes_debug(NES_DBG_MR, "Registering STag 0x%08X, VA = 0x%016lX,"
  1779. " length = 0x%016lX, index = 0x%08X\n",
  1780. stag, (unsigned long)*iova_start, (unsigned long)region_length, stag_index);
  1781. /* Make the leaf PBL the root if only one PBL */
  1782. root_vpbl.pbl_pbase = vpbl.pbl_pbase;
  1783. if (single_page) {
  1784. pbl_count = 0;
  1785. } else {
  1786. pbl_count = 1;
  1787. }
  1788. ret = nes_reg_mr(nesdev, nespd, stag, region_length, &root_vpbl,
  1789. addr, pbl_count, 1, acc, iova_start,
  1790. &nesmr->pbls_used, &nesmr->pbl_4k);
  1791. if (ret == 0) {
  1792. nesmr->ibmr.rkey = stag;
  1793. nesmr->ibmr.lkey = stag;
  1794. nesmr->mode = IWNES_MEMREG_TYPE_MEM;
  1795. ibmr = &nesmr->ibmr;
  1796. } else {
  1797. kfree(nesmr);
  1798. ibmr = ERR_PTR(-ENOMEM);
  1799. }
  1800. reg_phys_err:
  1801. /* single PBL case */
  1802. pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase, vpbl.pbl_pbase);
  1803. return ibmr;
  1804. }
  1805. /**
  1806. * nes_get_dma_mr
  1807. */
  1808. static struct ib_mr *nes_get_dma_mr(struct ib_pd *pd, int acc)
  1809. {
  1810. u64 kva = 0;
  1811. nes_debug(NES_DBG_MR, "\n");
  1812. return nes_reg_phys_mr(pd, 0, 0xffffffffffULL, acc, &kva);
  1813. }
  1814. /**
  1815. * nes_reg_user_mr
  1816. */
  1817. static struct ib_mr *nes_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  1818. u64 virt, int acc, struct ib_udata *udata)
  1819. {
  1820. u64 iova_start;
  1821. __le64 *pbl;
  1822. u64 region_length;
  1823. dma_addr_t last_dma_addr = 0;
  1824. dma_addr_t first_dma_addr = 0;
  1825. struct nes_pd *nespd = to_nespd(pd);
  1826. struct nes_vnic *nesvnic = to_nesvnic(pd->device);
  1827. struct nes_device *nesdev = nesvnic->nesdev;
  1828. struct nes_adapter *nesadapter = nesdev->nesadapter;
  1829. struct ib_mr *ibmr = ERR_PTR(-EINVAL);
  1830. struct scatterlist *sg;
  1831. struct nes_ucontext *nes_ucontext;
  1832. struct nes_pbl *nespbl;
  1833. struct nes_mr *nesmr;
  1834. struct ib_umem *region;
  1835. struct nes_mem_reg_req req;
  1836. struct nes_vpbl vpbl;
  1837. struct nes_root_vpbl root_vpbl;
  1838. int entry, page_index;
  1839. int page_count = 0;
  1840. int err, pbl_depth = 0;
  1841. int chunk_pages;
  1842. int ret;
  1843. u32 stag;
  1844. u32 stag_index = 0;
  1845. u32 next_stag_index;
  1846. u32 driver_key;
  1847. u32 root_pbl_index = 0;
  1848. u32 cur_pbl_index = 0;
  1849. u32 skip_pages;
  1850. u16 pbl_count;
  1851. u8 single_page = 1;
  1852. u8 stag_key;
  1853. int first_page = 1;
  1854. region = ib_umem_get(pd->uobject->context, start, length, acc, 0);
  1855. if (IS_ERR(region)) {
  1856. return (struct ib_mr *)region;
  1857. }
  1858. nes_debug(NES_DBG_MR, "User base = 0x%lX, Virt base = 0x%lX, length = %u,"
  1859. " offset = %u, page size = %lu.\n",
  1860. (unsigned long int)start, (unsigned long int)virt, (u32)length,
  1861. ib_umem_offset(region), BIT(region->page_shift));
  1862. skip_pages = ((u32)ib_umem_offset(region)) >> 12;
  1863. if (ib_copy_from_udata(&req, udata, sizeof(req))) {
  1864. ib_umem_release(region);
  1865. return ERR_PTR(-EFAULT);
  1866. }
  1867. nes_debug(NES_DBG_MR, "Memory Registration type = %08X.\n", req.reg_type);
  1868. switch (req.reg_type) {
  1869. case IWNES_MEMREG_TYPE_MEM:
  1870. pbl_depth = 0;
  1871. region_length = 0;
  1872. vpbl.pbl_vbase = NULL;
  1873. root_vpbl.pbl_vbase = NULL;
  1874. root_vpbl.pbl_pbase = 0;
  1875. get_random_bytes(&next_stag_index, sizeof(next_stag_index));
  1876. stag_key = (u8)next_stag_index;
  1877. driver_key = next_stag_index & 0x70000000;
  1878. next_stag_index >>= 8;
  1879. next_stag_index %= nesadapter->max_mr;
  1880. err = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs,
  1881. nesadapter->max_mr, &stag_index, &next_stag_index, NES_RESOURCE_USER_MR);
  1882. if (err) {
  1883. ib_umem_release(region);
  1884. return ERR_PTR(err);
  1885. }
  1886. nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
  1887. if (!nesmr) {
  1888. ib_umem_release(region);
  1889. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  1890. return ERR_PTR(-ENOMEM);
  1891. }
  1892. nesmr->region = region;
  1893. for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) {
  1894. if (sg_dma_address(sg) & ~PAGE_MASK) {
  1895. ib_umem_release(region);
  1896. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  1897. nes_debug(NES_DBG_MR, "Unaligned Memory Buffer: 0x%x\n",
  1898. (unsigned int) sg_dma_address(sg));
  1899. ibmr = ERR_PTR(-EINVAL);
  1900. kfree(nesmr);
  1901. goto reg_user_mr_err;
  1902. }
  1903. if (!sg_dma_len(sg)) {
  1904. ib_umem_release(region);
  1905. nes_free_resource(nesadapter, nesadapter->allocated_mrs,
  1906. stag_index);
  1907. nes_debug(NES_DBG_MR, "Invalid Buffer Size\n");
  1908. ibmr = ERR_PTR(-EINVAL);
  1909. kfree(nesmr);
  1910. goto reg_user_mr_err;
  1911. }
  1912. region_length += sg_dma_len(sg);
  1913. chunk_pages = sg_dma_len(sg) >> 12;
  1914. region_length -= skip_pages << 12;
  1915. for (page_index = skip_pages; page_index < chunk_pages; page_index++) {
  1916. skip_pages = 0;
  1917. if ((page_count != 0) && (page_count << 12) - (ib_umem_offset(region) & (4096 - 1)) >= region->length)
  1918. goto enough_pages;
  1919. if ((page_count&0x01FF) == 0) {
  1920. if (page_count >= 1024 * 512) {
  1921. ib_umem_release(region);
  1922. nes_free_resource(nesadapter,
  1923. nesadapter->allocated_mrs, stag_index);
  1924. kfree(nesmr);
  1925. ibmr = ERR_PTR(-E2BIG);
  1926. goto reg_user_mr_err;
  1927. }
  1928. if (root_pbl_index == 1) {
  1929. root_vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev,
  1930. 8192, &root_vpbl.pbl_pbase);
  1931. nes_debug(NES_DBG_MR, "Allocating root PBL, va = %p, pa = 0x%08X\n",
  1932. root_vpbl.pbl_vbase, (unsigned int)root_vpbl.pbl_pbase);
  1933. if (!root_vpbl.pbl_vbase) {
  1934. ib_umem_release(region);
  1935. pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase,
  1936. vpbl.pbl_pbase);
  1937. nes_free_resource(nesadapter, nesadapter->allocated_mrs,
  1938. stag_index);
  1939. kfree(nesmr);
  1940. ibmr = ERR_PTR(-ENOMEM);
  1941. goto reg_user_mr_err;
  1942. }
  1943. root_vpbl.leaf_vpbl = kcalloc(1024,
  1944. sizeof(*root_vpbl.leaf_vpbl),
  1945. GFP_KERNEL);
  1946. if (!root_vpbl.leaf_vpbl) {
  1947. ib_umem_release(region);
  1948. pci_free_consistent(nesdev->pcidev, 8192, root_vpbl.pbl_vbase,
  1949. root_vpbl.pbl_pbase);
  1950. pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase,
  1951. vpbl.pbl_pbase);
  1952. nes_free_resource(nesadapter, nesadapter->allocated_mrs,
  1953. stag_index);
  1954. kfree(nesmr);
  1955. ibmr = ERR_PTR(-ENOMEM);
  1956. goto reg_user_mr_err;
  1957. }
  1958. root_vpbl.pbl_vbase[0].pa_low =
  1959. cpu_to_le32((u32)vpbl.pbl_pbase);
  1960. root_vpbl.pbl_vbase[0].pa_high =
  1961. cpu_to_le32((u32)((((u64)vpbl.pbl_pbase) >> 32)));
  1962. root_vpbl.leaf_vpbl[0] = vpbl;
  1963. }
  1964. vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 4096,
  1965. &vpbl.pbl_pbase);
  1966. nes_debug(NES_DBG_MR, "Allocating leaf PBL, va = %p, pa = 0x%08X\n",
  1967. vpbl.pbl_vbase, (unsigned int)vpbl.pbl_pbase);
  1968. if (!vpbl.pbl_vbase) {
  1969. ib_umem_release(region);
  1970. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  1971. ibmr = ERR_PTR(-ENOMEM);
  1972. kfree(nesmr);
  1973. goto reg_user_mr_err;
  1974. }
  1975. if (1 <= root_pbl_index) {
  1976. root_vpbl.pbl_vbase[root_pbl_index].pa_low =
  1977. cpu_to_le32((u32)vpbl.pbl_pbase);
  1978. root_vpbl.pbl_vbase[root_pbl_index].pa_high =
  1979. cpu_to_le32((u32)((((u64)vpbl.pbl_pbase)>>32)));
  1980. root_vpbl.leaf_vpbl[root_pbl_index] = vpbl;
  1981. }
  1982. root_pbl_index++;
  1983. cur_pbl_index = 0;
  1984. }
  1985. if (single_page) {
  1986. if (page_count != 0) {
  1987. if ((last_dma_addr+4096) !=
  1988. (sg_dma_address(sg)+
  1989. (page_index*4096)))
  1990. single_page = 0;
  1991. last_dma_addr = sg_dma_address(sg)+
  1992. (page_index*4096);
  1993. } else {
  1994. first_dma_addr = sg_dma_address(sg)+
  1995. (page_index*4096);
  1996. last_dma_addr = first_dma_addr;
  1997. }
  1998. }
  1999. vpbl.pbl_vbase[cur_pbl_index].pa_low =
  2000. cpu_to_le32((u32)(sg_dma_address(sg)+
  2001. (page_index*4096)));
  2002. vpbl.pbl_vbase[cur_pbl_index].pa_high =
  2003. cpu_to_le32((u32)((((u64)(sg_dma_address(sg)+
  2004. (page_index*4096))) >> 32)));
  2005. cur_pbl_index++;
  2006. page_count++;
  2007. }
  2008. }
  2009. enough_pages:
  2010. nes_debug(NES_DBG_MR, "calculating stag, stag_index=0x%08x, driver_key=0x%08x,"
  2011. " stag_key=0x%08x\n",
  2012. stag_index, driver_key, stag_key);
  2013. stag = stag_index << 8;
  2014. stag |= driver_key;
  2015. stag += (u32)stag_key;
  2016. iova_start = virt;
  2017. /* Make the leaf PBL the root if only one PBL */
  2018. if (root_pbl_index == 1) {
  2019. root_vpbl.pbl_pbase = vpbl.pbl_pbase;
  2020. }
  2021. if (single_page) {
  2022. pbl_count = 0;
  2023. } else {
  2024. pbl_count = root_pbl_index;
  2025. first_dma_addr = 0;
  2026. }
  2027. nes_debug(NES_DBG_MR, "Registering STag 0x%08X, VA = 0x%08X, length = 0x%08X,"
  2028. " index = 0x%08X, region->length=0x%08llx, pbl_count = %u\n",
  2029. stag, (unsigned int)iova_start,
  2030. (unsigned int)region_length, stag_index,
  2031. (unsigned long long)region->length, pbl_count);
  2032. ret = nes_reg_mr(nesdev, nespd, stag, region->length, &root_vpbl,
  2033. first_dma_addr, pbl_count, (u16)cur_pbl_index, acc,
  2034. &iova_start, &nesmr->pbls_used, &nesmr->pbl_4k);
  2035. nes_debug(NES_DBG_MR, "ret=%d\n", ret);
  2036. if (ret == 0) {
  2037. nesmr->ibmr.rkey = stag;
  2038. nesmr->ibmr.lkey = stag;
  2039. nesmr->mode = IWNES_MEMREG_TYPE_MEM;
  2040. ibmr = &nesmr->ibmr;
  2041. } else {
  2042. ib_umem_release(region);
  2043. kfree(nesmr);
  2044. ibmr = ERR_PTR(-ENOMEM);
  2045. }
  2046. reg_user_mr_err:
  2047. /* free the resources */
  2048. if (root_pbl_index == 1) {
  2049. pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase,
  2050. vpbl.pbl_pbase);
  2051. } else {
  2052. for (page_index=0; page_index<root_pbl_index; page_index++) {
  2053. pci_free_consistent(nesdev->pcidev, 4096,
  2054. root_vpbl.leaf_vpbl[page_index].pbl_vbase,
  2055. root_vpbl.leaf_vpbl[page_index].pbl_pbase);
  2056. }
  2057. kfree(root_vpbl.leaf_vpbl);
  2058. pci_free_consistent(nesdev->pcidev, 8192, root_vpbl.pbl_vbase,
  2059. root_vpbl.pbl_pbase);
  2060. }
  2061. nes_debug(NES_DBG_MR, "Leaving, ibmr=%p", ibmr);
  2062. return ibmr;
  2063. case IWNES_MEMREG_TYPE_QP:
  2064. case IWNES_MEMREG_TYPE_CQ:
  2065. if (!region->length) {
  2066. nes_debug(NES_DBG_MR, "Unable to register zero length region for CQ\n");
  2067. ib_umem_release(region);
  2068. return ERR_PTR(-EINVAL);
  2069. }
  2070. nespbl = kzalloc(sizeof(*nespbl), GFP_KERNEL);
  2071. if (!nespbl) {
  2072. ib_umem_release(region);
  2073. return ERR_PTR(-ENOMEM);
  2074. }
  2075. nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
  2076. if (!nesmr) {
  2077. ib_umem_release(region);
  2078. kfree(nespbl);
  2079. return ERR_PTR(-ENOMEM);
  2080. }
  2081. nesmr->region = region;
  2082. nes_ucontext = to_nesucontext(pd->uobject->context);
  2083. pbl_depth = region->length >> 12;
  2084. pbl_depth += (region->length & (4096-1)) ? 1 : 0;
  2085. nespbl->pbl_size = pbl_depth*sizeof(u64);
  2086. if (req.reg_type == IWNES_MEMREG_TYPE_QP) {
  2087. nes_debug(NES_DBG_MR, "Attempting to allocate QP PBL memory");
  2088. } else {
  2089. nes_debug(NES_DBG_MR, "Attempting to allocate CP PBL memory");
  2090. }
  2091. nes_debug(NES_DBG_MR, " %u bytes, %u entries.\n",
  2092. nespbl->pbl_size, pbl_depth);
  2093. pbl = pci_alloc_consistent(nesdev->pcidev, nespbl->pbl_size,
  2094. &nespbl->pbl_pbase);
  2095. if (!pbl) {
  2096. ib_umem_release(region);
  2097. kfree(nesmr);
  2098. kfree(nespbl);
  2099. nes_debug(NES_DBG_MR, "Unable to allocate PBL memory\n");
  2100. return ERR_PTR(-ENOMEM);
  2101. }
  2102. nespbl->pbl_vbase = (u64 *)pbl;
  2103. nespbl->user_base = start;
  2104. nes_debug(NES_DBG_MR, "Allocated PBL memory, %u bytes, pbl_pbase=%lx,"
  2105. " pbl_vbase=%p user_base=0x%lx\n",
  2106. nespbl->pbl_size, (unsigned long) nespbl->pbl_pbase,
  2107. (void *) nespbl->pbl_vbase, nespbl->user_base);
  2108. for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) {
  2109. chunk_pages = sg_dma_len(sg) >> 12;
  2110. chunk_pages += (sg_dma_len(sg) & (4096-1)) ? 1 : 0;
  2111. if (first_page) {
  2112. nespbl->page = sg_page(sg);
  2113. first_page = 0;
  2114. }
  2115. for (page_index = 0; page_index < chunk_pages; page_index++) {
  2116. ((__le32 *)pbl)[0] = cpu_to_le32((u32)
  2117. (sg_dma_address(sg)+
  2118. (page_index*4096)));
  2119. ((__le32 *)pbl)[1] = cpu_to_le32(((u64)
  2120. (sg_dma_address(sg)+
  2121. (page_index*4096)))>>32);
  2122. nes_debug(NES_DBG_MR, "pbl=%p, *pbl=0x%016llx, 0x%08x%08x\n", pbl,
  2123. (unsigned long long)*pbl,
  2124. le32_to_cpu(((__le32 *)pbl)[1]), le32_to_cpu(((__le32 *)pbl)[0]));
  2125. pbl++;
  2126. }
  2127. }
  2128. if (req.reg_type == IWNES_MEMREG_TYPE_QP) {
  2129. list_add_tail(&nespbl->list, &nes_ucontext->qp_reg_mem_list);
  2130. } else {
  2131. list_add_tail(&nespbl->list, &nes_ucontext->cq_reg_mem_list);
  2132. }
  2133. nesmr->ibmr.rkey = -1;
  2134. nesmr->ibmr.lkey = -1;
  2135. nesmr->mode = req.reg_type;
  2136. return &nesmr->ibmr;
  2137. }
  2138. ib_umem_release(region);
  2139. return ERR_PTR(-ENOSYS);
  2140. }
  2141. /**
  2142. * nes_dereg_mr
  2143. */
  2144. static int nes_dereg_mr(struct ib_mr *ib_mr)
  2145. {
  2146. struct nes_mr *nesmr = to_nesmr(ib_mr);
  2147. struct nes_vnic *nesvnic = to_nesvnic(ib_mr->device);
  2148. struct nes_device *nesdev = nesvnic->nesdev;
  2149. struct nes_adapter *nesadapter = nesdev->nesadapter;
  2150. struct nes_hw_cqp_wqe *cqp_wqe;
  2151. struct nes_cqp_request *cqp_request;
  2152. unsigned long flags;
  2153. int ret;
  2154. u16 major_code;
  2155. u16 minor_code;
  2156. if (nesmr->pages)
  2157. pci_free_consistent(nesdev->pcidev,
  2158. nesmr->max_pages * sizeof(u64),
  2159. nesmr->pages,
  2160. nesmr->paddr);
  2161. if (nesmr->region) {
  2162. ib_umem_release(nesmr->region);
  2163. }
  2164. if (nesmr->mode != IWNES_MEMREG_TYPE_MEM) {
  2165. kfree(nesmr);
  2166. return 0;
  2167. }
  2168. /* Deallocate the region with the adapter */
  2169. cqp_request = nes_get_cqp_request(nesdev);
  2170. if (cqp_request == NULL) {
  2171. nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n");
  2172. return -ENOMEM;
  2173. }
  2174. cqp_request->waiting = 1;
  2175. cqp_wqe = &cqp_request->cqp_wqe;
  2176. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  2177. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX,
  2178. NES_CQP_DEALLOCATE_STAG | NES_CQP_STAG_VA_TO |
  2179. NES_CQP_STAG_DEALLOC_PBLS | NES_CQP_STAG_MR);
  2180. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, ib_mr->rkey);
  2181. atomic_set(&cqp_request->refcount, 2);
  2182. nes_post_cqp_request(nesdev, cqp_request);
  2183. /* Wait for CQP */
  2184. nes_debug(NES_DBG_MR, "Waiting for deallocate STag 0x%08X completed\n", ib_mr->rkey);
  2185. ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0),
  2186. NES_EVENT_TIMEOUT);
  2187. nes_debug(NES_DBG_MR, "Deallocate STag 0x%08X completed, wait_event_timeout ret = %u,"
  2188. " CQP Major:Minor codes = 0x%04X:0x%04X\n",
  2189. ib_mr->rkey, ret, cqp_request->major_code, cqp_request->minor_code);
  2190. major_code = cqp_request->major_code;
  2191. minor_code = cqp_request->minor_code;
  2192. nes_put_cqp_request(nesdev, cqp_request);
  2193. if (!ret) {
  2194. nes_debug(NES_DBG_MR, "Timeout waiting to destroy STag,"
  2195. " ib_mr=%p, rkey = 0x%08X\n",
  2196. ib_mr, ib_mr->rkey);
  2197. return -ETIME;
  2198. } else if (major_code) {
  2199. nes_debug(NES_DBG_MR, "Error (0x%04X:0x%04X) while attempting"
  2200. " to destroy STag, ib_mr=%p, rkey = 0x%08X\n",
  2201. major_code, minor_code, ib_mr, ib_mr->rkey);
  2202. return -EIO;
  2203. }
  2204. if (nesmr->pbls_used != 0) {
  2205. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  2206. if (nesmr->pbl_4k) {
  2207. nesadapter->free_4kpbl += nesmr->pbls_used;
  2208. if (nesadapter->free_4kpbl > nesadapter->max_4kpbl)
  2209. printk(KERN_ERR PFX "free 4KB PBLs(%u) has "
  2210. "exceeded the max(%u)\n",
  2211. nesadapter->free_4kpbl,
  2212. nesadapter->max_4kpbl);
  2213. } else {
  2214. nesadapter->free_256pbl += nesmr->pbls_used;
  2215. if (nesadapter->free_256pbl > nesadapter->max_256pbl)
  2216. printk(KERN_ERR PFX "free 256B PBLs(%u) has "
  2217. "exceeded the max(%u)\n",
  2218. nesadapter->free_256pbl,
  2219. nesadapter->max_256pbl);
  2220. }
  2221. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  2222. }
  2223. nes_free_resource(nesadapter, nesadapter->allocated_mrs,
  2224. (ib_mr->rkey & 0x0fffff00) >> 8);
  2225. kfree(nesmr);
  2226. return 0;
  2227. }
  2228. /**
  2229. * show_rev
  2230. */
  2231. static ssize_t show_rev(struct device *dev, struct device_attribute *attr,
  2232. char *buf)
  2233. {
  2234. struct nes_ib_device *nesibdev =
  2235. container_of(dev, struct nes_ib_device, ibdev.dev);
  2236. struct nes_vnic *nesvnic = nesibdev->nesvnic;
  2237. nes_debug(NES_DBG_INIT, "\n");
  2238. return sprintf(buf, "%x\n", nesvnic->nesdev->nesadapter->hw_rev);
  2239. }
  2240. /**
  2241. * show_hca
  2242. */
  2243. static ssize_t show_hca(struct device *dev, struct device_attribute *attr,
  2244. char *buf)
  2245. {
  2246. nes_debug(NES_DBG_INIT, "\n");
  2247. return sprintf(buf, "NES020\n");
  2248. }
  2249. /**
  2250. * show_board
  2251. */
  2252. static ssize_t show_board(struct device *dev, struct device_attribute *attr,
  2253. char *buf)
  2254. {
  2255. nes_debug(NES_DBG_INIT, "\n");
  2256. return sprintf(buf, "%.*s\n", 32, "NES020 Board ID");
  2257. }
  2258. static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  2259. static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  2260. static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  2261. static struct device_attribute *nes_dev_attributes[] = {
  2262. &dev_attr_hw_rev,
  2263. &dev_attr_hca_type,
  2264. &dev_attr_board_id
  2265. };
  2266. /**
  2267. * nes_query_qp
  2268. */
  2269. static int nes_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  2270. int attr_mask, struct ib_qp_init_attr *init_attr)
  2271. {
  2272. struct nes_qp *nesqp = to_nesqp(ibqp);
  2273. nes_debug(NES_DBG_QP, "\n");
  2274. attr->qp_access_flags = 0;
  2275. attr->cap.max_send_wr = nesqp->hwqp.sq_size;
  2276. attr->cap.max_recv_wr = nesqp->hwqp.rq_size;
  2277. attr->cap.max_recv_sge = 1;
  2278. if (nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA)
  2279. attr->cap.max_inline_data = 0;
  2280. else
  2281. attr->cap.max_inline_data = 64;
  2282. init_attr->event_handler = nesqp->ibqp.event_handler;
  2283. init_attr->qp_context = nesqp->ibqp.qp_context;
  2284. init_attr->send_cq = nesqp->ibqp.send_cq;
  2285. init_attr->recv_cq = nesqp->ibqp.recv_cq;
  2286. init_attr->srq = nesqp->ibqp.srq;
  2287. init_attr->cap = attr->cap;
  2288. return 0;
  2289. }
  2290. /**
  2291. * nes_hw_modify_qp
  2292. */
  2293. int nes_hw_modify_qp(struct nes_device *nesdev, struct nes_qp *nesqp,
  2294. u32 next_iwarp_state, u32 termlen, u32 wait_completion)
  2295. {
  2296. struct nes_hw_cqp_wqe *cqp_wqe;
  2297. /* struct iw_cm_id *cm_id = nesqp->cm_id; */
  2298. /* struct iw_cm_event cm_event; */
  2299. struct nes_cqp_request *cqp_request;
  2300. int ret;
  2301. u16 major_code;
  2302. nes_debug(NES_DBG_MOD_QP, "QP%u, refcount=%d\n",
  2303. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount));
  2304. cqp_request = nes_get_cqp_request(nesdev);
  2305. if (cqp_request == NULL) {
  2306. nes_debug(NES_DBG_MOD_QP, "Failed to get a cqp_request.\n");
  2307. return -ENOMEM;
  2308. }
  2309. if (wait_completion) {
  2310. cqp_request->waiting = 1;
  2311. } else {
  2312. cqp_request->waiting = 0;
  2313. }
  2314. cqp_wqe = &cqp_request->cqp_wqe;
  2315. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX,
  2316. NES_CQP_MODIFY_QP | NES_CQP_QP_TYPE_IWARP | next_iwarp_state);
  2317. nes_debug(NES_DBG_MOD_QP, "using next_iwarp_state=%08x, wqe_words=%08x\n",
  2318. next_iwarp_state, le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX]));
  2319. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  2320. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, nesqp->hwqp.qp_id);
  2321. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, (u64)nesqp->nesqp_context_pbase);
  2322. /* If sending a terminate message, fill in the length (in words) */
  2323. if (((next_iwarp_state & NES_CQP_QP_IWARP_STATE_MASK) == NES_CQP_QP_IWARP_STATE_TERMINATE) &&
  2324. !(next_iwarp_state & NES_CQP_QP_TERM_DONT_SEND_TERM_MSG)) {
  2325. termlen = ((termlen + 3) >> 2) << NES_CQP_OP_TERMLEN_SHIFT;
  2326. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_NEW_MSS_IDX, termlen);
  2327. }
  2328. atomic_set(&cqp_request->refcount, 2);
  2329. nes_post_cqp_request(nesdev, cqp_request);
  2330. /* Wait for CQP */
  2331. if (wait_completion) {
  2332. /* nes_debug(NES_DBG_MOD_QP, "Waiting for modify iWARP QP%u to complete.\n",
  2333. nesqp->hwqp.qp_id); */
  2334. ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0),
  2335. NES_EVENT_TIMEOUT);
  2336. nes_debug(NES_DBG_MOD_QP, "Modify iwarp QP%u completed, wait_event_timeout ret=%u, "
  2337. "CQP Major:Minor codes = 0x%04X:0x%04X.\n",
  2338. nesqp->hwqp.qp_id, ret, cqp_request->major_code, cqp_request->minor_code);
  2339. major_code = cqp_request->major_code;
  2340. if (major_code) {
  2341. nes_debug(NES_DBG_MOD_QP, "Modify iwarp QP%u failed"
  2342. "CQP Major:Minor codes = 0x%04X:0x%04X, intended next state = 0x%08X.\n",
  2343. nesqp->hwqp.qp_id, cqp_request->major_code,
  2344. cqp_request->minor_code, next_iwarp_state);
  2345. }
  2346. nes_put_cqp_request(nesdev, cqp_request);
  2347. if (!ret)
  2348. return -ETIME;
  2349. else if (major_code)
  2350. return -EIO;
  2351. else
  2352. return 0;
  2353. } else {
  2354. return 0;
  2355. }
  2356. }
  2357. /**
  2358. * nes_modify_qp
  2359. */
  2360. int nes_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  2361. int attr_mask, struct ib_udata *udata)
  2362. {
  2363. struct nes_qp *nesqp = to_nesqp(ibqp);
  2364. struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
  2365. struct nes_device *nesdev = nesvnic->nesdev;
  2366. /* u32 cqp_head; */
  2367. /* u32 counter; */
  2368. u32 next_iwarp_state = 0;
  2369. int err;
  2370. unsigned long qplockflags;
  2371. int ret;
  2372. u16 original_last_aeq;
  2373. u8 issue_modify_qp = 0;
  2374. u8 dont_wait = 0;
  2375. nes_debug(NES_DBG_MOD_QP, "QP%u: QP State=%u, cur QP State=%u,"
  2376. " iwarp_state=0x%X, refcount=%d\n",
  2377. nesqp->hwqp.qp_id, attr->qp_state, nesqp->ibqp_state,
  2378. nesqp->iwarp_state, atomic_read(&nesqp->refcount));
  2379. spin_lock_irqsave(&nesqp->lock, qplockflags);
  2380. nes_debug(NES_DBG_MOD_QP, "QP%u: hw_iwarp_state=0x%X, hw_tcp_state=0x%X,"
  2381. " QP Access Flags=0x%X, attr_mask = 0x%0x\n",
  2382. nesqp->hwqp.qp_id, nesqp->hw_iwarp_state,
  2383. nesqp->hw_tcp_state, attr->qp_access_flags, attr_mask);
  2384. if (attr_mask & IB_QP_STATE) {
  2385. switch (attr->qp_state) {
  2386. case IB_QPS_INIT:
  2387. nes_debug(NES_DBG_MOD_QP, "QP%u: new state = init\n",
  2388. nesqp->hwqp.qp_id);
  2389. if (nesqp->iwarp_state > (u32)NES_CQP_QP_IWARP_STATE_IDLE) {
  2390. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2391. return -EINVAL;
  2392. }
  2393. next_iwarp_state = NES_CQP_QP_IWARP_STATE_IDLE;
  2394. issue_modify_qp = 1;
  2395. break;
  2396. case IB_QPS_RTR:
  2397. nes_debug(NES_DBG_MOD_QP, "QP%u: new state = rtr\n",
  2398. nesqp->hwqp.qp_id);
  2399. if (nesqp->iwarp_state>(u32)NES_CQP_QP_IWARP_STATE_IDLE) {
  2400. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2401. return -EINVAL;
  2402. }
  2403. next_iwarp_state = NES_CQP_QP_IWARP_STATE_IDLE;
  2404. issue_modify_qp = 1;
  2405. break;
  2406. case IB_QPS_RTS:
  2407. nes_debug(NES_DBG_MOD_QP, "QP%u: new state = rts\n",
  2408. nesqp->hwqp.qp_id);
  2409. if (nesqp->iwarp_state>(u32)NES_CQP_QP_IWARP_STATE_RTS) {
  2410. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2411. return -EINVAL;
  2412. }
  2413. if (nesqp->cm_id == NULL) {
  2414. nes_debug(NES_DBG_MOD_QP, "QP%u: Failing attempt to move QP to RTS without a CM_ID. \n",
  2415. nesqp->hwqp.qp_id );
  2416. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2417. return -EINVAL;
  2418. }
  2419. next_iwarp_state = NES_CQP_QP_IWARP_STATE_RTS;
  2420. if (nesqp->iwarp_state != NES_CQP_QP_IWARP_STATE_RTS)
  2421. next_iwarp_state |= NES_CQP_QP_CONTEXT_VALID |
  2422. NES_CQP_QP_ARP_VALID | NES_CQP_QP_ORD_VALID;
  2423. issue_modify_qp = 1;
  2424. nesqp->hw_tcp_state = NES_AEQE_TCP_STATE_ESTABLISHED;
  2425. nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_RTS;
  2426. nesqp->hte_added = 1;
  2427. break;
  2428. case IB_QPS_SQD:
  2429. issue_modify_qp = 1;
  2430. nes_debug(NES_DBG_MOD_QP, "QP%u: new state=closing. SQ head=%u, SQ tail=%u\n",
  2431. nesqp->hwqp.qp_id, nesqp->hwqp.sq_head, nesqp->hwqp.sq_tail);
  2432. if (nesqp->iwarp_state == (u32)NES_CQP_QP_IWARP_STATE_CLOSING) {
  2433. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2434. return 0;
  2435. } else {
  2436. if (nesqp->iwarp_state > (u32)NES_CQP_QP_IWARP_STATE_CLOSING) {
  2437. nes_debug(NES_DBG_MOD_QP, "QP%u: State change to closing"
  2438. " ignored due to current iWARP state\n",
  2439. nesqp->hwqp.qp_id);
  2440. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2441. return -EINVAL;
  2442. }
  2443. if (nesqp->hw_iwarp_state != NES_AEQE_IWARP_STATE_RTS) {
  2444. nes_debug(NES_DBG_MOD_QP, "QP%u: State change to closing"
  2445. " already done based on hw state.\n",
  2446. nesqp->hwqp.qp_id);
  2447. issue_modify_qp = 0;
  2448. }
  2449. switch (nesqp->hw_iwarp_state) {
  2450. case NES_AEQE_IWARP_STATE_CLOSING:
  2451. next_iwarp_state = NES_CQP_QP_IWARP_STATE_CLOSING;
  2452. break;
  2453. case NES_AEQE_IWARP_STATE_TERMINATE:
  2454. next_iwarp_state = NES_CQP_QP_IWARP_STATE_TERMINATE;
  2455. break;
  2456. case NES_AEQE_IWARP_STATE_ERROR:
  2457. next_iwarp_state = NES_CQP_QP_IWARP_STATE_ERROR;
  2458. break;
  2459. default:
  2460. next_iwarp_state = NES_CQP_QP_IWARP_STATE_CLOSING;
  2461. nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_CLOSING;
  2462. break;
  2463. }
  2464. }
  2465. break;
  2466. case IB_QPS_SQE:
  2467. nes_debug(NES_DBG_MOD_QP, "QP%u: new state = terminate\n",
  2468. nesqp->hwqp.qp_id);
  2469. if (nesqp->iwarp_state>=(u32)NES_CQP_QP_IWARP_STATE_TERMINATE) {
  2470. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2471. return -EINVAL;
  2472. }
  2473. /* next_iwarp_state = (NES_CQP_QP_IWARP_STATE_TERMINATE | 0x02000000); */
  2474. next_iwarp_state = NES_CQP_QP_IWARP_STATE_TERMINATE;
  2475. nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_TERMINATE;
  2476. issue_modify_qp = 1;
  2477. break;
  2478. case IB_QPS_ERR:
  2479. case IB_QPS_RESET:
  2480. if (nesqp->iwarp_state == (u32)NES_CQP_QP_IWARP_STATE_ERROR) {
  2481. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2482. return -EINVAL;
  2483. }
  2484. nes_debug(NES_DBG_MOD_QP, "QP%u: new state = error\n",
  2485. nesqp->hwqp.qp_id);
  2486. if (nesqp->term_flags)
  2487. del_timer(&nesqp->terminate_timer);
  2488. next_iwarp_state = NES_CQP_QP_IWARP_STATE_ERROR;
  2489. /* next_iwarp_state = (NES_CQP_QP_IWARP_STATE_TERMINATE | 0x02000000); */
  2490. if (nesqp->hte_added) {
  2491. nes_debug(NES_DBG_MOD_QP, "set CQP_QP_DEL_HTE\n");
  2492. next_iwarp_state |= NES_CQP_QP_DEL_HTE;
  2493. nesqp->hte_added = 0;
  2494. }
  2495. if ((nesqp->hw_tcp_state > NES_AEQE_TCP_STATE_CLOSED) &&
  2496. (nesdev->iw_status) &&
  2497. (nesqp->hw_tcp_state != NES_AEQE_TCP_STATE_TIME_WAIT)) {
  2498. next_iwarp_state |= NES_CQP_QP_RESET;
  2499. } else {
  2500. nes_debug(NES_DBG_MOD_QP, "QP%u NOT setting NES_CQP_QP_RESET since TCP state = %u\n",
  2501. nesqp->hwqp.qp_id, nesqp->hw_tcp_state);
  2502. dont_wait = 1;
  2503. }
  2504. issue_modify_qp = 1;
  2505. nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_ERROR;
  2506. break;
  2507. default:
  2508. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2509. return -EINVAL;
  2510. break;
  2511. }
  2512. nesqp->ibqp_state = attr->qp_state;
  2513. nesqp->iwarp_state = next_iwarp_state & NES_CQP_QP_IWARP_STATE_MASK;
  2514. nes_debug(NES_DBG_MOD_QP, "Change nesqp->iwarp_state=%08x\n",
  2515. nesqp->iwarp_state);
  2516. }
  2517. if (attr_mask & IB_QP_ACCESS_FLAGS) {
  2518. if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE) {
  2519. nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_RDMA_WRITE_EN |
  2520. NES_QPCONTEXT_MISC_RDMA_READ_EN);
  2521. issue_modify_qp = 1;
  2522. }
  2523. if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) {
  2524. nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_RDMA_WRITE_EN);
  2525. issue_modify_qp = 1;
  2526. }
  2527. if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) {
  2528. nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_RDMA_READ_EN);
  2529. issue_modify_qp = 1;
  2530. }
  2531. if (attr->qp_access_flags & IB_ACCESS_MW_BIND) {
  2532. nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_WBIND_EN);
  2533. issue_modify_qp = 1;
  2534. }
  2535. if (nesqp->user_mode) {
  2536. nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_RDMA_WRITE_EN |
  2537. NES_QPCONTEXT_MISC_RDMA_READ_EN);
  2538. issue_modify_qp = 1;
  2539. }
  2540. }
  2541. original_last_aeq = nesqp->last_aeq;
  2542. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2543. nes_debug(NES_DBG_MOD_QP, "issue_modify_qp=%u\n", issue_modify_qp);
  2544. ret = 0;
  2545. if (issue_modify_qp) {
  2546. nes_debug(NES_DBG_MOD_QP, "call nes_hw_modify_qp\n");
  2547. ret = nes_hw_modify_qp(nesdev, nesqp, next_iwarp_state, 0, 1);
  2548. if (ret)
  2549. nes_debug(NES_DBG_MOD_QP, "nes_hw_modify_qp (next_iwarp_state = 0x%08X)"
  2550. " failed for QP%u.\n",
  2551. next_iwarp_state, nesqp->hwqp.qp_id);
  2552. }
  2553. if ((issue_modify_qp) && (nesqp->ibqp_state > IB_QPS_RTS)) {
  2554. nes_debug(NES_DBG_MOD_QP, "QP%u Issued ModifyQP refcount (%d),"
  2555. " original_last_aeq = 0x%04X. last_aeq = 0x%04X.\n",
  2556. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
  2557. original_last_aeq, nesqp->last_aeq);
  2558. if (!ret || original_last_aeq != NES_AEQE_AEID_RDMAP_ROE_BAD_LLP_CLOSE) {
  2559. if (dont_wait) {
  2560. if (nesqp->cm_id && nesqp->hw_tcp_state != 0) {
  2561. nes_debug(NES_DBG_MOD_QP, "QP%u Queuing fake disconnect for QP refcount (%d),"
  2562. " original_last_aeq = 0x%04X. last_aeq = 0x%04X.\n",
  2563. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
  2564. original_last_aeq, nesqp->last_aeq);
  2565. /* this one is for the cm_disconnect thread */
  2566. spin_lock_irqsave(&nesqp->lock, qplockflags);
  2567. nesqp->hw_tcp_state = NES_AEQE_TCP_STATE_CLOSED;
  2568. nesqp->last_aeq = NES_AEQE_AEID_RESET_SENT;
  2569. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2570. nes_cm_disconn(nesqp);
  2571. } else {
  2572. nes_debug(NES_DBG_MOD_QP, "QP%u No fake disconnect, QP refcount=%d\n",
  2573. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount));
  2574. }
  2575. } else {
  2576. spin_lock_irqsave(&nesqp->lock, qplockflags);
  2577. if (nesqp->cm_id) {
  2578. /* These two are for the timer thread */
  2579. if (atomic_inc_return(&nesqp->close_timer_started) == 1) {
  2580. nesqp->cm_id->add_ref(nesqp->cm_id);
  2581. nes_debug(NES_DBG_MOD_QP, "QP%u Not decrementing QP refcount (%d),"
  2582. " need ae to finish up, original_last_aeq = 0x%04X."
  2583. " last_aeq = 0x%04X, scheduling timer.\n",
  2584. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
  2585. original_last_aeq, nesqp->last_aeq);
  2586. schedule_nes_timer(nesqp->cm_node, (struct sk_buff *) nesqp, NES_TIMER_TYPE_CLOSE, 1, 0);
  2587. }
  2588. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2589. } else {
  2590. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2591. nes_debug(NES_DBG_MOD_QP, "QP%u Not decrementing QP refcount (%d),"
  2592. " need ae to finish up, original_last_aeq = 0x%04X."
  2593. " last_aeq = 0x%04X.\n",
  2594. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
  2595. original_last_aeq, nesqp->last_aeq);
  2596. }
  2597. }
  2598. } else {
  2599. nes_debug(NES_DBG_MOD_QP, "QP%u Decrementing QP refcount (%d), No ae to finish up,"
  2600. " original_last_aeq = 0x%04X. last_aeq = 0x%04X.\n",
  2601. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
  2602. original_last_aeq, nesqp->last_aeq);
  2603. }
  2604. } else {
  2605. nes_debug(NES_DBG_MOD_QP, "QP%u Decrementing QP refcount (%d), No ae to finish up,"
  2606. " original_last_aeq = 0x%04X. last_aeq = 0x%04X.\n",
  2607. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
  2608. original_last_aeq, nesqp->last_aeq);
  2609. }
  2610. err = 0;
  2611. nes_debug(NES_DBG_MOD_QP, "QP%u Leaving, refcount=%d\n",
  2612. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount));
  2613. return err;
  2614. }
  2615. static inline void
  2616. fill_wqe_sg_send(struct nes_hw_qp_wqe *wqe, const struct ib_send_wr *ib_wr,
  2617. u32 uselkey)
  2618. {
  2619. int sge_index;
  2620. int total_payload_length = 0;
  2621. for (sge_index = 0; sge_index < ib_wr->num_sge; sge_index++) {
  2622. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_FRAG0_LOW_IDX+(sge_index*4),
  2623. ib_wr->sg_list[sge_index].addr);
  2624. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_LENGTH0_IDX + (sge_index*4),
  2625. ib_wr->sg_list[sge_index].length);
  2626. if (uselkey)
  2627. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_STAG0_IDX + (sge_index*4),
  2628. (ib_wr->sg_list[sge_index].lkey));
  2629. else
  2630. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_STAG0_IDX + (sge_index*4), 0);
  2631. total_payload_length += ib_wr->sg_list[sge_index].length;
  2632. }
  2633. nes_debug(NES_DBG_IW_TX, "UC UC UC, sending total_payload_length=%u \n",
  2634. total_payload_length);
  2635. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
  2636. total_payload_length);
  2637. }
  2638. /**
  2639. * nes_post_send
  2640. */
  2641. static int nes_post_send(struct ib_qp *ibqp, const struct ib_send_wr *ib_wr,
  2642. const struct ib_send_wr **bad_wr)
  2643. {
  2644. u64 u64temp;
  2645. unsigned long flags = 0;
  2646. struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
  2647. struct nes_device *nesdev = nesvnic->nesdev;
  2648. struct nes_qp *nesqp = to_nesqp(ibqp);
  2649. struct nes_hw_qp_wqe *wqe;
  2650. int err = 0;
  2651. u32 qsize = nesqp->hwqp.sq_size;
  2652. u32 head;
  2653. u32 wqe_misc = 0;
  2654. u32 wqe_count = 0;
  2655. u32 counter;
  2656. if (nesqp->ibqp_state > IB_QPS_RTS) {
  2657. err = -EINVAL;
  2658. goto out;
  2659. }
  2660. spin_lock_irqsave(&nesqp->lock, flags);
  2661. head = nesqp->hwqp.sq_head;
  2662. while (ib_wr) {
  2663. /* Check for QP error */
  2664. if (nesqp->term_flags) {
  2665. err = -EINVAL;
  2666. break;
  2667. }
  2668. /* Check for SQ overflow */
  2669. if (((head + (2 * qsize) - nesqp->hwqp.sq_tail) % qsize) == (qsize - 1)) {
  2670. err = -ENOMEM;
  2671. break;
  2672. }
  2673. wqe = &nesqp->hwqp.sq_vbase[head];
  2674. /* nes_debug(NES_DBG_IW_TX, "processing sq wqe for QP%u at %p, head = %u.\n",
  2675. nesqp->hwqp.qp_id, wqe, head); */
  2676. nes_fill_init_qp_wqe(wqe, nesqp, head);
  2677. u64temp = (u64)(ib_wr->wr_id);
  2678. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX,
  2679. u64temp);
  2680. switch (ib_wr->opcode) {
  2681. case IB_WR_SEND:
  2682. case IB_WR_SEND_WITH_INV:
  2683. if (IB_WR_SEND == ib_wr->opcode) {
  2684. if (ib_wr->send_flags & IB_SEND_SOLICITED)
  2685. wqe_misc = NES_IWARP_SQ_OP_SENDSE;
  2686. else
  2687. wqe_misc = NES_IWARP_SQ_OP_SEND;
  2688. } else {
  2689. if (ib_wr->send_flags & IB_SEND_SOLICITED)
  2690. wqe_misc = NES_IWARP_SQ_OP_SENDSEINV;
  2691. else
  2692. wqe_misc = NES_IWARP_SQ_OP_SENDINV;
  2693. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_INV_STAG_LOW_IDX,
  2694. ib_wr->ex.invalidate_rkey);
  2695. }
  2696. if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
  2697. err = -EINVAL;
  2698. break;
  2699. }
  2700. if (ib_wr->send_flags & IB_SEND_FENCE)
  2701. wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
  2702. if ((ib_wr->send_flags & IB_SEND_INLINE) &&
  2703. ((nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) == 0) &&
  2704. (ib_wr->sg_list[0].length <= 64)) {
  2705. memcpy(&wqe->wqe_words[NES_IWARP_SQ_WQE_IMM_DATA_START_IDX],
  2706. (void *)(unsigned long)ib_wr->sg_list[0].addr, ib_wr->sg_list[0].length);
  2707. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
  2708. ib_wr->sg_list[0].length);
  2709. wqe_misc |= NES_IWARP_SQ_WQE_IMM_DATA;
  2710. } else {
  2711. fill_wqe_sg_send(wqe, ib_wr, 1);
  2712. }
  2713. break;
  2714. case IB_WR_RDMA_WRITE:
  2715. wqe_misc = NES_IWARP_SQ_OP_RDMAW;
  2716. if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
  2717. nes_debug(NES_DBG_IW_TX, "Exceeded max sge, ib_wr=%u, max=%u\n",
  2718. ib_wr->num_sge, nesdev->nesadapter->max_sge);
  2719. err = -EINVAL;
  2720. break;
  2721. }
  2722. if (ib_wr->send_flags & IB_SEND_FENCE)
  2723. wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
  2724. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_STAG_IDX,
  2725. rdma_wr(ib_wr)->rkey);
  2726. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX,
  2727. rdma_wr(ib_wr)->remote_addr);
  2728. if ((ib_wr->send_flags & IB_SEND_INLINE) &&
  2729. ((nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) == 0) &&
  2730. (ib_wr->sg_list[0].length <= 64)) {
  2731. memcpy(&wqe->wqe_words[NES_IWARP_SQ_WQE_IMM_DATA_START_IDX],
  2732. (void *)(unsigned long)ib_wr->sg_list[0].addr, ib_wr->sg_list[0].length);
  2733. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
  2734. ib_wr->sg_list[0].length);
  2735. wqe_misc |= NES_IWARP_SQ_WQE_IMM_DATA;
  2736. } else {
  2737. fill_wqe_sg_send(wqe, ib_wr, 1);
  2738. }
  2739. wqe->wqe_words[NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX] =
  2740. wqe->wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX];
  2741. break;
  2742. case IB_WR_RDMA_READ:
  2743. case IB_WR_RDMA_READ_WITH_INV:
  2744. /* iWARP only supports 1 sge for RDMA reads */
  2745. if (ib_wr->num_sge > 1) {
  2746. nes_debug(NES_DBG_IW_TX, "Exceeded max sge, ib_wr=%u, max=1\n",
  2747. ib_wr->num_sge);
  2748. err = -EINVAL;
  2749. break;
  2750. }
  2751. if (ib_wr->opcode == IB_WR_RDMA_READ) {
  2752. wqe_misc = NES_IWARP_SQ_OP_RDMAR;
  2753. } else {
  2754. wqe_misc = NES_IWARP_SQ_OP_RDMAR_LOCINV;
  2755. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_INV_STAG_LOW_IDX,
  2756. ib_wr->ex.invalidate_rkey);
  2757. }
  2758. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX,
  2759. rdma_wr(ib_wr)->remote_addr);
  2760. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_STAG_IDX,
  2761. rdma_wr(ib_wr)->rkey);
  2762. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX,
  2763. ib_wr->sg_list->length);
  2764. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_FRAG0_LOW_IDX,
  2765. ib_wr->sg_list->addr);
  2766. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_STAG0_IDX,
  2767. ib_wr->sg_list->lkey);
  2768. break;
  2769. case IB_WR_LOCAL_INV:
  2770. wqe_misc = NES_IWARP_SQ_OP_LOCINV;
  2771. set_wqe_32bit_value(wqe->wqe_words,
  2772. NES_IWARP_SQ_LOCINV_WQE_INV_STAG_IDX,
  2773. ib_wr->ex.invalidate_rkey);
  2774. break;
  2775. case IB_WR_REG_MR:
  2776. {
  2777. struct nes_mr *mr = to_nesmr(reg_wr(ib_wr)->mr);
  2778. int page_shift = ilog2(reg_wr(ib_wr)->mr->page_size);
  2779. int flags = reg_wr(ib_wr)->access;
  2780. if (mr->npages > (NES_4K_PBL_CHUNK_SIZE / sizeof(u64))) {
  2781. nes_debug(NES_DBG_IW_TX, "SQ_FMR: bad page_list_len\n");
  2782. err = -EINVAL;
  2783. break;
  2784. }
  2785. wqe_misc = NES_IWARP_SQ_OP_FAST_REG;
  2786. set_wqe_64bit_value(wqe->wqe_words,
  2787. NES_IWARP_SQ_FMR_WQE_VA_FBO_LOW_IDX,
  2788. mr->ibmr.iova);
  2789. set_wqe_32bit_value(wqe->wqe_words,
  2790. NES_IWARP_SQ_FMR_WQE_LENGTH_LOW_IDX,
  2791. lower_32_bits(mr->ibmr.length));
  2792. set_wqe_32bit_value(wqe->wqe_words,
  2793. NES_IWARP_SQ_FMR_WQE_LENGTH_HIGH_IDX, 0);
  2794. set_wqe_32bit_value(wqe->wqe_words,
  2795. NES_IWARP_SQ_FMR_WQE_MR_STAG_IDX,
  2796. reg_wr(ib_wr)->key);
  2797. if (page_shift == 12) {
  2798. wqe_misc |= NES_IWARP_SQ_FMR_WQE_PAGE_SIZE_4K;
  2799. } else if (page_shift == 21) {
  2800. wqe_misc |= NES_IWARP_SQ_FMR_WQE_PAGE_SIZE_2M;
  2801. } else {
  2802. nes_debug(NES_DBG_IW_TX, "Invalid page shift,"
  2803. " ib_wr=%u, max=1\n", ib_wr->num_sge);
  2804. err = -EINVAL;
  2805. break;
  2806. }
  2807. /* Set access_flags */
  2808. wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_LOCAL_READ;
  2809. if (flags & IB_ACCESS_LOCAL_WRITE)
  2810. wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_LOCAL_WRITE;
  2811. if (flags & IB_ACCESS_REMOTE_WRITE)
  2812. wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_REMOTE_WRITE;
  2813. if (flags & IB_ACCESS_REMOTE_READ)
  2814. wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_REMOTE_READ;
  2815. if (flags & IB_ACCESS_MW_BIND)
  2816. wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_WINDOW_BIND;
  2817. /* Fill in PBL info: */
  2818. set_wqe_64bit_value(wqe->wqe_words,
  2819. NES_IWARP_SQ_FMR_WQE_PBL_ADDR_LOW_IDX,
  2820. mr->paddr);
  2821. set_wqe_32bit_value(wqe->wqe_words,
  2822. NES_IWARP_SQ_FMR_WQE_PBL_LENGTH_IDX,
  2823. mr->npages * 8);
  2824. nes_debug(NES_DBG_IW_TX, "SQ_REG_MR: iova_start: %llx, "
  2825. "length: %lld, rkey: %0x, pgl_paddr: %llx, "
  2826. "page_list_len: %u, wqe_misc: %x\n",
  2827. (unsigned long long) mr->ibmr.iova,
  2828. mr->ibmr.length,
  2829. reg_wr(ib_wr)->key,
  2830. (unsigned long long) mr->paddr,
  2831. mr->npages,
  2832. wqe_misc);
  2833. break;
  2834. }
  2835. default:
  2836. /* error */
  2837. err = -EINVAL;
  2838. break;
  2839. }
  2840. if (err)
  2841. break;
  2842. if ((ib_wr->send_flags & IB_SEND_SIGNALED) || nesqp->sig_all)
  2843. wqe_misc |= NES_IWARP_SQ_WQE_SIGNALED_COMPL;
  2844. wqe->wqe_words[NES_IWARP_SQ_WQE_MISC_IDX] = cpu_to_le32(wqe_misc);
  2845. ib_wr = ib_wr->next;
  2846. head++;
  2847. wqe_count++;
  2848. if (head >= qsize)
  2849. head = 0;
  2850. }
  2851. nesqp->hwqp.sq_head = head;
  2852. barrier();
  2853. while (wqe_count) {
  2854. counter = min(wqe_count, ((u32)255));
  2855. wqe_count -= counter;
  2856. nes_write32(nesdev->regs + NES_WQE_ALLOC,
  2857. (counter << 24) | 0x00800000 | nesqp->hwqp.qp_id);
  2858. }
  2859. spin_unlock_irqrestore(&nesqp->lock, flags);
  2860. out:
  2861. if (err)
  2862. *bad_wr = ib_wr;
  2863. return err;
  2864. }
  2865. /**
  2866. * nes_post_recv
  2867. */
  2868. static int nes_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *ib_wr,
  2869. const struct ib_recv_wr **bad_wr)
  2870. {
  2871. u64 u64temp;
  2872. unsigned long flags = 0;
  2873. struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
  2874. struct nes_device *nesdev = nesvnic->nesdev;
  2875. struct nes_qp *nesqp = to_nesqp(ibqp);
  2876. struct nes_hw_qp_wqe *wqe;
  2877. int err = 0;
  2878. int sge_index;
  2879. u32 qsize = nesqp->hwqp.rq_size;
  2880. u32 head;
  2881. u32 wqe_count = 0;
  2882. u32 counter;
  2883. u32 total_payload_length;
  2884. if (nesqp->ibqp_state > IB_QPS_RTS) {
  2885. err = -EINVAL;
  2886. goto out;
  2887. }
  2888. spin_lock_irqsave(&nesqp->lock, flags);
  2889. head = nesqp->hwqp.rq_head;
  2890. while (ib_wr) {
  2891. /* Check for QP error */
  2892. if (nesqp->term_flags) {
  2893. err = -EINVAL;
  2894. break;
  2895. }
  2896. if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
  2897. err = -EINVAL;
  2898. break;
  2899. }
  2900. /* Check for RQ overflow */
  2901. if (((head + (2 * qsize) - nesqp->hwqp.rq_tail) % qsize) == (qsize - 1)) {
  2902. err = -ENOMEM;
  2903. break;
  2904. }
  2905. nes_debug(NES_DBG_IW_RX, "ibwr sge count = %u.\n", ib_wr->num_sge);
  2906. wqe = &nesqp->hwqp.rq_vbase[head];
  2907. /* nes_debug(NES_DBG_IW_RX, "QP%u:processing rq wqe at %p, head = %u.\n",
  2908. nesqp->hwqp.qp_id, wqe, head); */
  2909. nes_fill_init_qp_wqe(wqe, nesqp, head);
  2910. u64temp = (u64)(ib_wr->wr_id);
  2911. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX,
  2912. u64temp);
  2913. total_payload_length = 0;
  2914. for (sge_index=0; sge_index < ib_wr->num_sge; sge_index++) {
  2915. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_RQ_WQE_FRAG0_LOW_IDX+(sge_index*4),
  2916. ib_wr->sg_list[sge_index].addr);
  2917. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_RQ_WQE_LENGTH0_IDX+(sge_index*4),
  2918. ib_wr->sg_list[sge_index].length);
  2919. set_wqe_32bit_value(wqe->wqe_words,NES_IWARP_RQ_WQE_STAG0_IDX+(sge_index*4),
  2920. ib_wr->sg_list[sge_index].lkey);
  2921. total_payload_length += ib_wr->sg_list[sge_index].length;
  2922. }
  2923. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_RQ_WQE_TOTAL_PAYLOAD_IDX,
  2924. total_payload_length);
  2925. ib_wr = ib_wr->next;
  2926. head++;
  2927. wqe_count++;
  2928. if (head >= qsize)
  2929. head = 0;
  2930. }
  2931. nesqp->hwqp.rq_head = head;
  2932. barrier();
  2933. while (wqe_count) {
  2934. counter = min(wqe_count, ((u32)255));
  2935. wqe_count -= counter;
  2936. nes_write32(nesdev->regs+NES_WQE_ALLOC, (counter<<24) | nesqp->hwqp.qp_id);
  2937. }
  2938. spin_unlock_irqrestore(&nesqp->lock, flags);
  2939. out:
  2940. if (err)
  2941. *bad_wr = ib_wr;
  2942. return err;
  2943. }
  2944. /**
  2945. * nes_drain_sq - drain sq
  2946. * @ibqp: pointer to ibqp
  2947. */
  2948. static void nes_drain_sq(struct ib_qp *ibqp)
  2949. {
  2950. struct nes_qp *nesqp = to_nesqp(ibqp);
  2951. if (nesqp->hwqp.sq_tail != nesqp->hwqp.sq_head)
  2952. wait_for_completion(&nesqp->sq_drained);
  2953. }
  2954. /**
  2955. * nes_drain_rq - drain rq
  2956. * @ibqp: pointer to ibqp
  2957. */
  2958. static void nes_drain_rq(struct ib_qp *ibqp)
  2959. {
  2960. struct nes_qp *nesqp = to_nesqp(ibqp);
  2961. if (nesqp->hwqp.rq_tail != nesqp->hwqp.rq_head)
  2962. wait_for_completion(&nesqp->rq_drained);
  2963. }
  2964. /**
  2965. * nes_poll_cq
  2966. */
  2967. static int nes_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *entry)
  2968. {
  2969. u64 u64temp;
  2970. u64 wrid;
  2971. unsigned long flags = 0;
  2972. struct nes_vnic *nesvnic = to_nesvnic(ibcq->device);
  2973. struct nes_device *nesdev = nesvnic->nesdev;
  2974. struct nes_cq *nescq = to_nescq(ibcq);
  2975. struct nes_qp *nesqp;
  2976. struct nes_hw_cqe cqe;
  2977. u32 head;
  2978. u32 wq_tail = 0;
  2979. u32 cq_size;
  2980. u32 cqe_count = 0;
  2981. u32 wqe_index;
  2982. u32 u32temp;
  2983. u32 move_cq_head = 1;
  2984. u32 err_code;
  2985. nes_debug(NES_DBG_CQ, "\n");
  2986. spin_lock_irqsave(&nescq->lock, flags);
  2987. head = nescq->hw_cq.cq_head;
  2988. cq_size = nescq->hw_cq.cq_size;
  2989. while (cqe_count < num_entries) {
  2990. if ((le32_to_cpu(nescq->hw_cq.cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX]) &
  2991. NES_CQE_VALID) == 0)
  2992. break;
  2993. /*
  2994. * Make sure we read CQ entry contents *after*
  2995. * we've checked the valid bit.
  2996. */
  2997. rmb();
  2998. cqe = nescq->hw_cq.cq_vbase[head];
  2999. u32temp = le32_to_cpu(cqe.cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX]);
  3000. wqe_index = u32temp & (nesdev->nesadapter->max_qp_wr - 1);
  3001. u32temp &= ~(NES_SW_CONTEXT_ALIGN-1);
  3002. /* parse CQE, get completion context from WQE (either rq or sq) */
  3003. u64temp = (((u64)(le32_to_cpu(cqe.cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX])))<<32) |
  3004. ((u64)u32temp);
  3005. if (u64temp) {
  3006. nesqp = (struct nes_qp *)(unsigned long)u64temp;
  3007. memset(entry, 0, sizeof *entry);
  3008. if (cqe.cqe_words[NES_CQE_ERROR_CODE_IDX] == 0) {
  3009. entry->status = IB_WC_SUCCESS;
  3010. } else {
  3011. err_code = le32_to_cpu(cqe.cqe_words[NES_CQE_ERROR_CODE_IDX]);
  3012. if (NES_IWARP_CQE_MAJOR_DRV == (err_code >> 16)) {
  3013. entry->status = err_code & 0x0000ffff;
  3014. /* The rest of the cqe's will be marked as flushed */
  3015. nescq->hw_cq.cq_vbase[head].cqe_words[NES_CQE_ERROR_CODE_IDX] =
  3016. cpu_to_le32((NES_IWARP_CQE_MAJOR_FLUSH << 16) |
  3017. NES_IWARP_CQE_MINOR_FLUSH);
  3018. } else
  3019. entry->status = IB_WC_WR_FLUSH_ERR;
  3020. }
  3021. entry->qp = &nesqp->ibqp;
  3022. entry->src_qp = nesqp->hwqp.qp_id;
  3023. if (le32_to_cpu(cqe.cqe_words[NES_CQE_OPCODE_IDX]) & NES_CQE_SQ) {
  3024. if (nesqp->skip_lsmm) {
  3025. nesqp->skip_lsmm = 0;
  3026. nesqp->hwqp.sq_tail++;
  3027. }
  3028. /* Working on a SQ Completion*/
  3029. wrid = (((u64)(cpu_to_le32((u32)nesqp->hwqp.sq_vbase[wqe_index].
  3030. wqe_words[NES_IWARP_SQ_WQE_COMP_SCRATCH_HIGH_IDX]))) << 32) |
  3031. ((u64)(cpu_to_le32((u32)nesqp->hwqp.sq_vbase[wqe_index].
  3032. wqe_words[NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX])));
  3033. entry->byte_len = le32_to_cpu(nesqp->hwqp.sq_vbase[wqe_index].
  3034. wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX]);
  3035. switch (le32_to_cpu(nesqp->hwqp.sq_vbase[wqe_index].
  3036. wqe_words[NES_IWARP_SQ_WQE_MISC_IDX]) & 0x3f) {
  3037. case NES_IWARP_SQ_OP_RDMAW:
  3038. nes_debug(NES_DBG_CQ, "Operation = RDMA WRITE.\n");
  3039. entry->opcode = IB_WC_RDMA_WRITE;
  3040. break;
  3041. case NES_IWARP_SQ_OP_RDMAR:
  3042. nes_debug(NES_DBG_CQ, "Operation = RDMA READ.\n");
  3043. entry->opcode = IB_WC_RDMA_READ;
  3044. entry->byte_len = le32_to_cpu(nesqp->hwqp.sq_vbase[wqe_index].
  3045. wqe_words[NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX]);
  3046. break;
  3047. case NES_IWARP_SQ_OP_SENDINV:
  3048. case NES_IWARP_SQ_OP_SENDSEINV:
  3049. case NES_IWARP_SQ_OP_SEND:
  3050. case NES_IWARP_SQ_OP_SENDSE:
  3051. nes_debug(NES_DBG_CQ, "Operation = Send.\n");
  3052. entry->opcode = IB_WC_SEND;
  3053. break;
  3054. case NES_IWARP_SQ_OP_LOCINV:
  3055. entry->opcode = IB_WC_LOCAL_INV;
  3056. break;
  3057. case NES_IWARP_SQ_OP_FAST_REG:
  3058. entry->opcode = IB_WC_REG_MR;
  3059. break;
  3060. }
  3061. nesqp->hwqp.sq_tail = (wqe_index+1)&(nesqp->hwqp.sq_size - 1);
  3062. if ((entry->status != IB_WC_SUCCESS) && (nesqp->hwqp.sq_tail != nesqp->hwqp.sq_head)) {
  3063. move_cq_head = 0;
  3064. wq_tail = nesqp->hwqp.sq_tail;
  3065. }
  3066. } else {
  3067. /* Working on a RQ Completion*/
  3068. entry->byte_len = le32_to_cpu(cqe.cqe_words[NES_CQE_PAYLOAD_LENGTH_IDX]);
  3069. wrid = ((u64)(le32_to_cpu(nesqp->hwqp.rq_vbase[wqe_index].wqe_words[NES_IWARP_RQ_WQE_COMP_SCRATCH_LOW_IDX]))) |
  3070. ((u64)(le32_to_cpu(nesqp->hwqp.rq_vbase[wqe_index].wqe_words[NES_IWARP_RQ_WQE_COMP_SCRATCH_HIGH_IDX]))<<32);
  3071. entry->opcode = IB_WC_RECV;
  3072. nesqp->hwqp.rq_tail = (wqe_index+1)&(nesqp->hwqp.rq_size - 1);
  3073. if ((entry->status != IB_WC_SUCCESS) && (nesqp->hwqp.rq_tail != nesqp->hwqp.rq_head)) {
  3074. move_cq_head = 0;
  3075. wq_tail = nesqp->hwqp.rq_tail;
  3076. }
  3077. }
  3078. if (nesqp->iwarp_state > NES_CQP_QP_IWARP_STATE_RTS) {
  3079. if (nesqp->hwqp.sq_tail == nesqp->hwqp.sq_head)
  3080. complete(&nesqp->sq_drained);
  3081. if (nesqp->hwqp.rq_tail == nesqp->hwqp.rq_head)
  3082. complete(&nesqp->rq_drained);
  3083. }
  3084. entry->wr_id = wrid;
  3085. entry++;
  3086. cqe_count++;
  3087. }
  3088. if (move_cq_head) {
  3089. nescq->hw_cq.cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX] = 0;
  3090. if (++head >= cq_size)
  3091. head = 0;
  3092. nescq->polled_completions++;
  3093. if ((nescq->polled_completions > (cq_size / 2)) ||
  3094. (nescq->polled_completions == 255)) {
  3095. nes_debug(NES_DBG_CQ, "CQ%u Issuing CQE Allocate since more than half of cqes"
  3096. " are pending %u of %u.\n",
  3097. nescq->hw_cq.cq_number, nescq->polled_completions, cq_size);
  3098. nes_write32(nesdev->regs+NES_CQE_ALLOC,
  3099. nescq->hw_cq.cq_number | (nescq->polled_completions << 16));
  3100. nescq->polled_completions = 0;
  3101. }
  3102. } else {
  3103. /* Update the wqe index and set status to flush */
  3104. wqe_index = le32_to_cpu(cqe.cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX]);
  3105. wqe_index = (wqe_index & (~(nesdev->nesadapter->max_qp_wr - 1))) | wq_tail;
  3106. nescq->hw_cq.cq_vbase[head].cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX] =
  3107. cpu_to_le32(wqe_index);
  3108. move_cq_head = 1; /* ready for next pass */
  3109. }
  3110. }
  3111. if (nescq->polled_completions) {
  3112. nes_write32(nesdev->regs+NES_CQE_ALLOC,
  3113. nescq->hw_cq.cq_number | (nescq->polled_completions << 16));
  3114. nescq->polled_completions = 0;
  3115. }
  3116. nescq->hw_cq.cq_head = head;
  3117. nes_debug(NES_DBG_CQ, "Reporting %u completions for CQ%u.\n",
  3118. cqe_count, nescq->hw_cq.cq_number);
  3119. spin_unlock_irqrestore(&nescq->lock, flags);
  3120. return cqe_count;
  3121. }
  3122. /**
  3123. * nes_req_notify_cq
  3124. */
  3125. static int nes_req_notify_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags notify_flags)
  3126. {
  3127. struct nes_vnic *nesvnic = to_nesvnic(ibcq->device);
  3128. struct nes_device *nesdev = nesvnic->nesdev;
  3129. struct nes_cq *nescq = to_nescq(ibcq);
  3130. u32 cq_arm;
  3131. nes_debug(NES_DBG_CQ, "Requesting notification for CQ%u.\n",
  3132. nescq->hw_cq.cq_number);
  3133. cq_arm = nescq->hw_cq.cq_number;
  3134. if ((notify_flags & IB_CQ_SOLICITED_MASK) == IB_CQ_NEXT_COMP)
  3135. cq_arm |= NES_CQE_ALLOC_NOTIFY_NEXT;
  3136. else if ((notify_flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED)
  3137. cq_arm |= NES_CQE_ALLOC_NOTIFY_SE;
  3138. else
  3139. return -EINVAL;
  3140. nes_write32(nesdev->regs+NES_CQE_ALLOC, cq_arm);
  3141. nes_read32(nesdev->regs+NES_CQE_ALLOC);
  3142. return 0;
  3143. }
  3144. static int nes_port_immutable(struct ib_device *ibdev, u8 port_num,
  3145. struct ib_port_immutable *immutable)
  3146. {
  3147. struct ib_port_attr attr;
  3148. int err;
  3149. immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
  3150. err = nes_query_port(ibdev, port_num, &attr);
  3151. if (err)
  3152. return err;
  3153. immutable->pkey_tbl_len = attr.pkey_tbl_len;
  3154. immutable->gid_tbl_len = attr.gid_tbl_len;
  3155. return 0;
  3156. }
  3157. static void get_dev_fw_str(struct ib_device *dev, char *str)
  3158. {
  3159. struct nes_ib_device *nesibdev =
  3160. container_of(dev, struct nes_ib_device, ibdev);
  3161. struct nes_vnic *nesvnic = nesibdev->nesvnic;
  3162. nes_debug(NES_DBG_INIT, "\n");
  3163. snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u",
  3164. (nesvnic->nesdev->nesadapter->firmware_version >> 16),
  3165. (nesvnic->nesdev->nesadapter->firmware_version & 0x000000ff));
  3166. }
  3167. /**
  3168. * nes_init_ofa_device
  3169. */
  3170. struct nes_ib_device *nes_init_ofa_device(struct net_device *netdev)
  3171. {
  3172. struct nes_ib_device *nesibdev;
  3173. struct nes_vnic *nesvnic = netdev_priv(netdev);
  3174. struct nes_device *nesdev = nesvnic->nesdev;
  3175. nesibdev = (struct nes_ib_device *)ib_alloc_device(sizeof(struct nes_ib_device));
  3176. if (nesibdev == NULL) {
  3177. return NULL;
  3178. }
  3179. strlcpy(nesibdev->ibdev.name, "nes%d", IB_DEVICE_NAME_MAX);
  3180. nesibdev->ibdev.owner = THIS_MODULE;
  3181. nesibdev->ibdev.node_type = RDMA_NODE_RNIC;
  3182. memset(&nesibdev->ibdev.node_guid, 0, sizeof(nesibdev->ibdev.node_guid));
  3183. memcpy(&nesibdev->ibdev.node_guid, netdev->dev_addr, 6);
  3184. nesibdev->ibdev.uverbs_cmd_mask =
  3185. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  3186. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  3187. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  3188. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  3189. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  3190. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  3191. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  3192. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  3193. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  3194. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  3195. (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
  3196. (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
  3197. (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
  3198. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  3199. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  3200. (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
  3201. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  3202. (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
  3203. (1ull << IB_USER_VERBS_CMD_BIND_MW) |
  3204. (1ull << IB_USER_VERBS_CMD_DEALLOC_MW) |
  3205. (1ull << IB_USER_VERBS_CMD_POST_RECV) |
  3206. (1ull << IB_USER_VERBS_CMD_POST_SEND);
  3207. nesibdev->ibdev.phys_port_cnt = 1;
  3208. nesibdev->ibdev.num_comp_vectors = 1;
  3209. nesibdev->ibdev.dev.parent = &nesdev->pcidev->dev;
  3210. nesibdev->ibdev.query_device = nes_query_device;
  3211. nesibdev->ibdev.query_port = nes_query_port;
  3212. nesibdev->ibdev.query_pkey = nes_query_pkey;
  3213. nesibdev->ibdev.query_gid = nes_query_gid;
  3214. nesibdev->ibdev.alloc_ucontext = nes_alloc_ucontext;
  3215. nesibdev->ibdev.dealloc_ucontext = nes_dealloc_ucontext;
  3216. nesibdev->ibdev.mmap = nes_mmap;
  3217. nesibdev->ibdev.alloc_pd = nes_alloc_pd;
  3218. nesibdev->ibdev.dealloc_pd = nes_dealloc_pd;
  3219. nesibdev->ibdev.create_qp = nes_create_qp;
  3220. nesibdev->ibdev.modify_qp = nes_modify_qp;
  3221. nesibdev->ibdev.query_qp = nes_query_qp;
  3222. nesibdev->ibdev.destroy_qp = nes_destroy_qp;
  3223. nesibdev->ibdev.create_cq = nes_create_cq;
  3224. nesibdev->ibdev.destroy_cq = nes_destroy_cq;
  3225. nesibdev->ibdev.poll_cq = nes_poll_cq;
  3226. nesibdev->ibdev.get_dma_mr = nes_get_dma_mr;
  3227. nesibdev->ibdev.reg_user_mr = nes_reg_user_mr;
  3228. nesibdev->ibdev.dereg_mr = nes_dereg_mr;
  3229. nesibdev->ibdev.alloc_mw = nes_alloc_mw;
  3230. nesibdev->ibdev.dealloc_mw = nes_dealloc_mw;
  3231. nesibdev->ibdev.alloc_mr = nes_alloc_mr;
  3232. nesibdev->ibdev.map_mr_sg = nes_map_mr_sg;
  3233. nesibdev->ibdev.req_notify_cq = nes_req_notify_cq;
  3234. nesibdev->ibdev.post_send = nes_post_send;
  3235. nesibdev->ibdev.post_recv = nes_post_recv;
  3236. nesibdev->ibdev.drain_sq = nes_drain_sq;
  3237. nesibdev->ibdev.drain_rq = nes_drain_rq;
  3238. nesibdev->ibdev.iwcm = kzalloc(sizeof(*nesibdev->ibdev.iwcm), GFP_KERNEL);
  3239. if (nesibdev->ibdev.iwcm == NULL) {
  3240. ib_dealloc_device(&nesibdev->ibdev);
  3241. return NULL;
  3242. }
  3243. nesibdev->ibdev.iwcm->add_ref = nes_add_ref;
  3244. nesibdev->ibdev.iwcm->rem_ref = nes_rem_ref;
  3245. nesibdev->ibdev.iwcm->get_qp = nes_get_qp;
  3246. nesibdev->ibdev.iwcm->connect = nes_connect;
  3247. nesibdev->ibdev.iwcm->accept = nes_accept;
  3248. nesibdev->ibdev.iwcm->reject = nes_reject;
  3249. nesibdev->ibdev.iwcm->create_listen = nes_create_listen;
  3250. nesibdev->ibdev.iwcm->destroy_listen = nes_destroy_listen;
  3251. nesibdev->ibdev.get_port_immutable = nes_port_immutable;
  3252. nesibdev->ibdev.get_dev_fw_str = get_dev_fw_str;
  3253. memcpy(nesibdev->ibdev.iwcm->ifname, netdev->name,
  3254. sizeof(nesibdev->ibdev.iwcm->ifname));
  3255. return nesibdev;
  3256. }
  3257. /**
  3258. * nes_handle_delayed_event
  3259. */
  3260. static void nes_handle_delayed_event(struct timer_list *t)
  3261. {
  3262. struct nes_vnic *nesvnic = from_timer(nesvnic, t, event_timer);
  3263. if (nesvnic->delayed_event != nesvnic->last_dispatched_event) {
  3264. struct ib_event event;
  3265. event.device = &nesvnic->nesibdev->ibdev;
  3266. if (!event.device)
  3267. goto stop_timer;
  3268. event.event = nesvnic->delayed_event;
  3269. event.element.port_num = nesvnic->logical_port + 1;
  3270. ib_dispatch_event(&event);
  3271. }
  3272. stop_timer:
  3273. nesvnic->event_timer.function = NULL;
  3274. }
  3275. void nes_port_ibevent(struct nes_vnic *nesvnic)
  3276. {
  3277. struct nes_ib_device *nesibdev = nesvnic->nesibdev;
  3278. struct nes_device *nesdev = nesvnic->nesdev;
  3279. struct ib_event event;
  3280. event.device = &nesibdev->ibdev;
  3281. event.element.port_num = nesvnic->logical_port + 1;
  3282. event.event = nesdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
  3283. if (!nesvnic->event_timer.function) {
  3284. ib_dispatch_event(&event);
  3285. nesvnic->last_dispatched_event = event.event;
  3286. nesvnic->event_timer.function = nes_handle_delayed_event;
  3287. nesvnic->event_timer.expires = jiffies + NES_EVENT_DELAY;
  3288. add_timer(&nesvnic->event_timer);
  3289. } else {
  3290. mod_timer(&nesvnic->event_timer, jiffies + NES_EVENT_DELAY);
  3291. }
  3292. nesvnic->delayed_event = event.event;
  3293. }
  3294. /**
  3295. * nes_destroy_ofa_device
  3296. */
  3297. void nes_destroy_ofa_device(struct nes_ib_device *nesibdev)
  3298. {
  3299. if (nesibdev == NULL)
  3300. return;
  3301. nes_unregister_ofa_device(nesibdev);
  3302. kfree(nesibdev->ibdev.iwcm);
  3303. ib_dealloc_device(&nesibdev->ibdev);
  3304. }
  3305. /**
  3306. * nes_register_ofa_device
  3307. */
  3308. int nes_register_ofa_device(struct nes_ib_device *nesibdev)
  3309. {
  3310. struct nes_vnic *nesvnic = nesibdev->nesvnic;
  3311. struct nes_device *nesdev = nesvnic->nesdev;
  3312. struct nes_adapter *nesadapter = nesdev->nesadapter;
  3313. int i, ret;
  3314. nesvnic->nesibdev->ibdev.driver_id = RDMA_DRIVER_NES;
  3315. ret = ib_register_device(&nesvnic->nesibdev->ibdev, NULL);
  3316. if (ret) {
  3317. return ret;
  3318. }
  3319. /* Get the resources allocated to this device */
  3320. nesibdev->max_cq = (nesadapter->max_cq-NES_FIRST_QPN) / nesadapter->port_count;
  3321. nesibdev->max_mr = nesadapter->max_mr / nesadapter->port_count;
  3322. nesibdev->max_qp = (nesadapter->max_qp-NES_FIRST_QPN) / nesadapter->port_count;
  3323. nesibdev->max_pd = nesadapter->max_pd / nesadapter->port_count;
  3324. for (i = 0; i < ARRAY_SIZE(nes_dev_attributes); ++i) {
  3325. ret = device_create_file(&nesibdev->ibdev.dev, nes_dev_attributes[i]);
  3326. if (ret) {
  3327. while (i > 0) {
  3328. i--;
  3329. device_remove_file(&nesibdev->ibdev.dev,
  3330. nes_dev_attributes[i]);
  3331. }
  3332. ib_unregister_device(&nesibdev->ibdev);
  3333. return ret;
  3334. }
  3335. }
  3336. nesvnic->of_device_registered = 1;
  3337. return 0;
  3338. }
  3339. /**
  3340. * nes_unregister_ofa_device
  3341. */
  3342. static void nes_unregister_ofa_device(struct nes_ib_device *nesibdev)
  3343. {
  3344. struct nes_vnic *nesvnic = nesibdev->nesvnic;
  3345. int i;
  3346. for (i = 0; i < ARRAY_SIZE(nes_dev_attributes); ++i) {
  3347. device_remove_file(&nesibdev->ibdev.dev, nes_dev_attributes[i]);
  3348. }
  3349. if (nesvnic->of_device_registered) {
  3350. ib_unregister_device(&nesibdev->ibdev);
  3351. }
  3352. nesvnic->of_device_registered = 0;
  3353. }