nes.c 31 KB

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  1. /*
  2. * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
  3. * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/module.h>
  34. #include <linux/moduleparam.h>
  35. #include <linux/netdevice.h>
  36. #include <linux/etherdevice.h>
  37. #include <linux/ethtool.h>
  38. #include <linux/mii.h>
  39. #include <linux/if_vlan.h>
  40. #include <linux/crc32.h>
  41. #include <linux/in.h>
  42. #include <linux/fs.h>
  43. #include <linux/init.h>
  44. #include <linux/if_arp.h>
  45. #include <linux/highmem.h>
  46. #include <linux/slab.h>
  47. #include <asm/io.h>
  48. #include <asm/irq.h>
  49. #include <asm/byteorder.h>
  50. #include <rdma/ib_smi.h>
  51. #include <rdma/ib_verbs.h>
  52. #include <rdma/ib_pack.h>
  53. #include <rdma/iw_cm.h>
  54. #include "nes.h"
  55. #include <net/netevent.h>
  56. #include <net/neighbour.h>
  57. #include <linux/route.h>
  58. #include <net/ip_fib.h>
  59. MODULE_AUTHOR("NetEffect");
  60. MODULE_DESCRIPTION("NetEffect RNIC Low-level iWARP Driver");
  61. MODULE_LICENSE("Dual BSD/GPL");
  62. int interrupt_mod_interval = 0;
  63. /* Interoperability */
  64. int mpa_version = 1;
  65. module_param(mpa_version, int, 0644);
  66. MODULE_PARM_DESC(mpa_version, "MPA version to be used int MPA Req/Resp (0 or 1)");
  67. /* Interoperability */
  68. int disable_mpa_crc = 0;
  69. module_param(disable_mpa_crc, int, 0644);
  70. MODULE_PARM_DESC(disable_mpa_crc, "Disable checking of MPA CRC");
  71. unsigned int nes_drv_opt = NES_DRV_OPT_DISABLE_INT_MOD | NES_DRV_OPT_ENABLE_PAU;
  72. module_param(nes_drv_opt, int, 0644);
  73. MODULE_PARM_DESC(nes_drv_opt, "Driver option parameters");
  74. unsigned int nes_debug_level = 0;
  75. module_param_named(debug_level, nes_debug_level, uint, 0644);
  76. MODULE_PARM_DESC(debug_level, "Enable debug output level");
  77. unsigned int wqm_quanta = 0x10000;
  78. module_param(wqm_quanta, int, 0644);
  79. MODULE_PARM_DESC(wqm_quanta, "WQM quanta");
  80. static bool limit_maxrdreqsz;
  81. module_param(limit_maxrdreqsz, bool, 0644);
  82. MODULE_PARM_DESC(limit_maxrdreqsz, "Limit max read request size to 256 Bytes");
  83. LIST_HEAD(nes_adapter_list);
  84. static LIST_HEAD(nes_dev_list);
  85. atomic_t qps_destroyed;
  86. static unsigned int ee_flsh_adapter;
  87. static unsigned int sysfs_nonidx_addr;
  88. static unsigned int sysfs_idx_addr;
  89. static const struct pci_device_id nes_pci_table[] = {
  90. { PCI_VDEVICE(NETEFFECT, PCI_DEVICE_ID_NETEFFECT_NE020), },
  91. { PCI_VDEVICE(NETEFFECT, PCI_DEVICE_ID_NETEFFECT_NE020_KR), },
  92. {0}
  93. };
  94. MODULE_DEVICE_TABLE(pci, nes_pci_table);
  95. static int nes_inetaddr_event(struct notifier_block *, unsigned long, void *);
  96. static int nes_net_event(struct notifier_block *, unsigned long, void *);
  97. static int nes_notifiers_registered;
  98. static struct notifier_block nes_inetaddr_notifier = {
  99. .notifier_call = nes_inetaddr_event
  100. };
  101. static struct notifier_block nes_net_notifier = {
  102. .notifier_call = nes_net_event
  103. };
  104. /**
  105. * nes_inetaddr_event
  106. */
  107. static int nes_inetaddr_event(struct notifier_block *notifier,
  108. unsigned long event, void *ptr)
  109. {
  110. struct in_ifaddr *ifa = ptr;
  111. struct net_device *event_netdev = ifa->ifa_dev->dev;
  112. struct nes_device *nesdev;
  113. struct net_device *netdev;
  114. struct net_device *upper_dev;
  115. struct nes_vnic *nesvnic;
  116. unsigned int is_bonded;
  117. nes_debug(NES_DBG_NETDEV, "nes_inetaddr_event: ip address %pI4, netmask %pI4.\n",
  118. &ifa->ifa_address, &ifa->ifa_mask);
  119. list_for_each_entry(nesdev, &nes_dev_list, list) {
  120. nes_debug(NES_DBG_NETDEV, "Nesdev list entry = 0x%p. (%s)\n",
  121. nesdev, nesdev->netdev[0]->name);
  122. netdev = nesdev->netdev[0];
  123. nesvnic = netdev_priv(netdev);
  124. upper_dev = netdev_master_upper_dev_get(netdev);
  125. is_bonded = netif_is_bond_slave(netdev) &&
  126. (upper_dev == event_netdev);
  127. if ((netdev == event_netdev) || is_bonded) {
  128. if (nesvnic->rdma_enabled == 0) {
  129. nes_debug(NES_DBG_NETDEV, "Returning without processing event for %s since"
  130. " RDMA is not enabled.\n",
  131. netdev->name);
  132. return NOTIFY_OK;
  133. }
  134. /* we have ifa->ifa_address/mask here if we need it */
  135. switch (event) {
  136. case NETDEV_DOWN:
  137. nes_debug(NES_DBG_NETDEV, "event:DOWN\n");
  138. nes_write_indexed(nesdev,
  139. NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)), 0);
  140. nes_manage_arp_cache(netdev, netdev->dev_addr,
  141. ntohl(nesvnic->local_ipaddr), NES_ARP_DELETE);
  142. nesvnic->local_ipaddr = 0;
  143. if (is_bonded)
  144. continue;
  145. else
  146. return NOTIFY_OK;
  147. break;
  148. case NETDEV_UP:
  149. nes_debug(NES_DBG_NETDEV, "event:UP\n");
  150. if (nesvnic->local_ipaddr != 0) {
  151. nes_debug(NES_DBG_NETDEV, "Interface already has local_ipaddr\n");
  152. return NOTIFY_OK;
  153. }
  154. /* fall through */
  155. case NETDEV_CHANGEADDR:
  156. /* Add the address to the IP table */
  157. if (upper_dev) {
  158. struct in_device *in;
  159. rcu_read_lock();
  160. in = __in_dev_get_rcu(upper_dev);
  161. nesvnic->local_ipaddr = in->ifa_list->ifa_address;
  162. rcu_read_unlock();
  163. } else {
  164. nesvnic->local_ipaddr = ifa->ifa_address;
  165. }
  166. nes_write_indexed(nesdev,
  167. NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)),
  168. ntohl(nesvnic->local_ipaddr));
  169. nes_manage_arp_cache(netdev, netdev->dev_addr,
  170. ntohl(nesvnic->local_ipaddr), NES_ARP_ADD);
  171. if (is_bonded)
  172. continue;
  173. else
  174. return NOTIFY_OK;
  175. break;
  176. default:
  177. break;
  178. }
  179. }
  180. }
  181. return NOTIFY_DONE;
  182. }
  183. /**
  184. * nes_net_event
  185. */
  186. static int nes_net_event(struct notifier_block *notifier,
  187. unsigned long event, void *ptr)
  188. {
  189. struct neighbour *neigh = ptr;
  190. struct nes_device *nesdev;
  191. struct net_device *netdev;
  192. struct nes_vnic *nesvnic;
  193. switch (event) {
  194. case NETEVENT_NEIGH_UPDATE:
  195. list_for_each_entry(nesdev, &nes_dev_list, list) {
  196. /* nes_debug(NES_DBG_NETDEV, "Nesdev list entry = 0x%p.\n", nesdev); */
  197. netdev = nesdev->netdev[0];
  198. nesvnic = netdev_priv(netdev);
  199. if (netdev == neigh->dev) {
  200. if (nesvnic->rdma_enabled == 0) {
  201. nes_debug(NES_DBG_NETDEV, "Skipping device %s since no RDMA\n",
  202. netdev->name);
  203. } else {
  204. if (neigh->nud_state & NUD_VALID) {
  205. nes_manage_arp_cache(neigh->dev, neigh->ha,
  206. ntohl(*(__be32 *)neigh->primary_key), NES_ARP_ADD);
  207. } else {
  208. nes_manage_arp_cache(neigh->dev, neigh->ha,
  209. ntohl(*(__be32 *)neigh->primary_key), NES_ARP_DELETE);
  210. }
  211. }
  212. return NOTIFY_OK;
  213. }
  214. }
  215. break;
  216. default:
  217. nes_debug(NES_DBG_NETDEV, "NETEVENT_ %lu undefined\n", event);
  218. break;
  219. }
  220. return NOTIFY_DONE;
  221. }
  222. /**
  223. * nes_add_ref
  224. */
  225. void nes_add_ref(struct ib_qp *ibqp)
  226. {
  227. struct nes_qp *nesqp;
  228. nesqp = to_nesqp(ibqp);
  229. nes_debug(NES_DBG_QP, "Bumping refcount for QP%u. Pre-inc value = %u\n",
  230. ibqp->qp_num, atomic_read(&nesqp->refcount));
  231. atomic_inc(&nesqp->refcount);
  232. }
  233. static void nes_cqp_rem_ref_callback(struct nes_device *nesdev, struct nes_cqp_request *cqp_request)
  234. {
  235. unsigned long flags;
  236. struct nes_qp *nesqp = cqp_request->cqp_callback_pointer;
  237. struct nes_adapter *nesadapter = nesdev->nesadapter;
  238. atomic_inc(&qps_destroyed);
  239. /* Free the control structures */
  240. if (nesqp->pbl_vbase) {
  241. pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size,
  242. nesqp->hwqp.q2_vbase, nesqp->hwqp.q2_pbase);
  243. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  244. nesadapter->free_256pbl++;
  245. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  246. pci_free_consistent(nesdev->pcidev, 256, nesqp->pbl_vbase, nesqp->pbl_pbase);
  247. nesqp->pbl_vbase = NULL;
  248. } else {
  249. pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size,
  250. nesqp->hwqp.sq_vbase, nesqp->hwqp.sq_pbase);
  251. }
  252. nes_free_resource(nesadapter, nesadapter->allocated_qps, nesqp->hwqp.qp_id);
  253. nesadapter->qp_table[nesqp->hwqp.qp_id-NES_FIRST_QPN] = NULL;
  254. kfree(nesqp->allocated_buffer);
  255. }
  256. /**
  257. * nes_rem_ref
  258. */
  259. void nes_rem_ref(struct ib_qp *ibqp)
  260. {
  261. u64 u64temp;
  262. struct nes_qp *nesqp;
  263. struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
  264. struct nes_device *nesdev = nesvnic->nesdev;
  265. struct nes_hw_cqp_wqe *cqp_wqe;
  266. struct nes_cqp_request *cqp_request;
  267. u32 opcode;
  268. nesqp = to_nesqp(ibqp);
  269. if (atomic_read(&nesqp->refcount) == 0) {
  270. printk(KERN_INFO PFX "%s: Reference count already 0 for QP%d, last aeq = 0x%04X.\n",
  271. __func__, ibqp->qp_num, nesqp->last_aeq);
  272. BUG();
  273. }
  274. if (atomic_dec_and_test(&nesqp->refcount)) {
  275. if (nesqp->pau_mode)
  276. nes_destroy_pau_qp(nesdev, nesqp);
  277. /* Destroy the QP */
  278. cqp_request = nes_get_cqp_request(nesdev);
  279. if (cqp_request == NULL) {
  280. nes_debug(NES_DBG_QP, "Failed to get a cqp_request.\n");
  281. return;
  282. }
  283. cqp_request->waiting = 0;
  284. cqp_request->callback = 1;
  285. cqp_request->cqp_callback = nes_cqp_rem_ref_callback;
  286. cqp_request->cqp_callback_pointer = nesqp;
  287. cqp_wqe = &cqp_request->cqp_wqe;
  288. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  289. opcode = NES_CQP_DESTROY_QP | NES_CQP_QP_TYPE_IWARP;
  290. if (nesqp->hte_added) {
  291. opcode |= NES_CQP_QP_DEL_HTE;
  292. nesqp->hte_added = 0;
  293. }
  294. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
  295. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, nesqp->hwqp.qp_id);
  296. u64temp = (u64)nesqp->nesqp_context_pbase;
  297. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp);
  298. nes_post_cqp_request(nesdev, cqp_request);
  299. }
  300. }
  301. /**
  302. * nes_get_qp
  303. */
  304. struct ib_qp *nes_get_qp(struct ib_device *device, int qpn)
  305. {
  306. struct nes_vnic *nesvnic = to_nesvnic(device);
  307. struct nes_device *nesdev = nesvnic->nesdev;
  308. struct nes_adapter *nesadapter = nesdev->nesadapter;
  309. if ((qpn < NES_FIRST_QPN) || (qpn >= (NES_FIRST_QPN + nesadapter->max_qp)))
  310. return NULL;
  311. return &nesadapter->qp_table[qpn - NES_FIRST_QPN]->ibqp;
  312. }
  313. /**
  314. * nes_print_macaddr
  315. */
  316. static void nes_print_macaddr(struct net_device *netdev)
  317. {
  318. nes_debug(NES_DBG_INIT, "%s: %pM, IRQ %u\n",
  319. netdev->name, netdev->dev_addr, netdev->irq);
  320. }
  321. /**
  322. * nes_interrupt - handle interrupts
  323. */
  324. static irqreturn_t nes_interrupt(int irq, void *dev_id)
  325. {
  326. struct nes_device *nesdev = (struct nes_device *)dev_id;
  327. int handled = 0;
  328. u32 int_mask;
  329. u32 int_req;
  330. u32 int_stat;
  331. u32 intf_int_stat;
  332. u32 timer_stat;
  333. if (nesdev->msi_enabled) {
  334. /* No need to read the interrupt pending register if msi is enabled */
  335. handled = 1;
  336. } else {
  337. if (unlikely(nesdev->nesadapter->hw_rev == NE020_REV)) {
  338. /* Master interrupt enable provides synchronization for kicking off bottom half
  339. when interrupt sharing is going on */
  340. int_mask = nes_read32(nesdev->regs + NES_INT_MASK);
  341. if (int_mask & 0x80000000) {
  342. /* Check interrupt status to see if this might be ours */
  343. int_stat = nes_read32(nesdev->regs + NES_INT_STAT);
  344. int_req = nesdev->int_req;
  345. if (int_stat&int_req) {
  346. /* if interesting CEQ or AEQ is pending, claim the interrupt */
  347. if ((int_stat&int_req) & (~(NES_INT_TIMER|NES_INT_INTF))) {
  348. handled = 1;
  349. } else {
  350. if (((int_stat & int_req) & NES_INT_TIMER) == NES_INT_TIMER) {
  351. /* Timer might be running but might be for another function */
  352. timer_stat = nes_read32(nesdev->regs + NES_TIMER_STAT);
  353. if ((timer_stat & nesdev->timer_int_req) != 0) {
  354. handled = 1;
  355. }
  356. }
  357. if ((((int_stat & int_req) & NES_INT_INTF) == NES_INT_INTF) &&
  358. (handled == 0)) {
  359. intf_int_stat = nes_read32(nesdev->regs+NES_INTF_INT_STAT);
  360. if ((intf_int_stat & nesdev->intf_int_req) != 0) {
  361. handled = 1;
  362. }
  363. }
  364. }
  365. if (handled) {
  366. nes_write32(nesdev->regs+NES_INT_MASK, int_mask & (~0x80000000));
  367. int_mask = nes_read32(nesdev->regs+NES_INT_MASK);
  368. /* Save off the status to save an additional read */
  369. nesdev->int_stat = int_stat;
  370. nesdev->napi_isr_ran = 1;
  371. }
  372. }
  373. }
  374. } else {
  375. handled = nes_read32(nesdev->regs+NES_INT_PENDING);
  376. }
  377. }
  378. if (handled) {
  379. if (nes_napi_isr(nesdev) == 0) {
  380. tasklet_schedule(&nesdev->dpc_tasklet);
  381. }
  382. return IRQ_HANDLED;
  383. } else {
  384. return IRQ_NONE;
  385. }
  386. }
  387. /**
  388. * nes_probe - Device initialization
  389. */
  390. static int nes_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
  391. {
  392. struct net_device *netdev = NULL;
  393. struct nes_device *nesdev = NULL;
  394. int ret = 0;
  395. void __iomem *mmio_regs = NULL;
  396. u8 hw_rev;
  397. assert(pcidev != NULL);
  398. assert(ent != NULL);
  399. printk(KERN_INFO PFX "NetEffect RNIC driver v%s loading. (%s)\n",
  400. DRV_VERSION, pci_name(pcidev));
  401. ret = pci_enable_device(pcidev);
  402. if (ret) {
  403. printk(KERN_ERR PFX "Unable to enable PCI device. (%s)\n", pci_name(pcidev));
  404. goto bail0;
  405. }
  406. nes_debug(NES_DBG_INIT, "BAR0 (@0x%08lX) size = 0x%lX bytes\n",
  407. (long unsigned int)pci_resource_start(pcidev, BAR_0),
  408. (long unsigned int)pci_resource_len(pcidev, BAR_0));
  409. nes_debug(NES_DBG_INIT, "BAR1 (@0x%08lX) size = 0x%lX bytes\n",
  410. (long unsigned int)pci_resource_start(pcidev, BAR_1),
  411. (long unsigned int)pci_resource_len(pcidev, BAR_1));
  412. /* Make sure PCI base addr are MMIO */
  413. if (!(pci_resource_flags(pcidev, BAR_0) & IORESOURCE_MEM) ||
  414. !(pci_resource_flags(pcidev, BAR_1) & IORESOURCE_MEM)) {
  415. printk(KERN_ERR PFX "PCI regions not an MMIO resource\n");
  416. ret = -ENODEV;
  417. goto bail1;
  418. }
  419. /* Reserve PCI I/O and memory resources */
  420. ret = pci_request_regions(pcidev, DRV_NAME);
  421. if (ret) {
  422. printk(KERN_ERR PFX "Unable to request regions. (%s)\n", pci_name(pcidev));
  423. goto bail1;
  424. }
  425. if ((sizeof(dma_addr_t) > 4)) {
  426. ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
  427. if (ret < 0) {
  428. printk(KERN_ERR PFX "64b DMA mask configuration failed\n");
  429. goto bail2;
  430. }
  431. ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
  432. if (ret) {
  433. printk(KERN_ERR PFX "64b DMA consistent mask configuration failed\n");
  434. goto bail2;
  435. }
  436. } else {
  437. ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
  438. if (ret < 0) {
  439. printk(KERN_ERR PFX "32b DMA mask configuration failed\n");
  440. goto bail2;
  441. }
  442. ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
  443. if (ret) {
  444. printk(KERN_ERR PFX "32b DMA consistent mask configuration failed\n");
  445. goto bail2;
  446. }
  447. }
  448. pci_set_master(pcidev);
  449. /* Allocate hardware structure */
  450. nesdev = kzalloc(sizeof(struct nes_device), GFP_KERNEL);
  451. if (!nesdev) {
  452. ret = -ENOMEM;
  453. goto bail2;
  454. }
  455. nes_debug(NES_DBG_INIT, "Allocated nes device at %p\n", nesdev);
  456. nesdev->pcidev = pcidev;
  457. pci_set_drvdata(pcidev, nesdev);
  458. pci_read_config_byte(pcidev, 0x0008, &hw_rev);
  459. nes_debug(NES_DBG_INIT, "hw_rev=%u\n", hw_rev);
  460. spin_lock_init(&nesdev->indexed_regs_lock);
  461. /* Remap the PCI registers in adapter BAR0 to kernel VA space */
  462. mmio_regs = ioremap_nocache(pci_resource_start(pcidev, BAR_0),
  463. pci_resource_len(pcidev, BAR_0));
  464. if (mmio_regs == NULL) {
  465. printk(KERN_ERR PFX "Unable to remap BAR0\n");
  466. ret = -EIO;
  467. goto bail3;
  468. }
  469. nesdev->regs = mmio_regs;
  470. nesdev->index_reg = 0x50 + (PCI_FUNC(pcidev->devfn)*8) + mmio_regs;
  471. /* Ensure interrupts are disabled */
  472. nes_write32(nesdev->regs+NES_INT_MASK, 0x7fffffff);
  473. if (nes_drv_opt & NES_DRV_OPT_ENABLE_MSI) {
  474. if (!pci_enable_msi(nesdev->pcidev)) {
  475. nesdev->msi_enabled = 1;
  476. nes_debug(NES_DBG_INIT, "MSI is enabled for device %s\n",
  477. pci_name(pcidev));
  478. } else {
  479. nes_debug(NES_DBG_INIT, "MSI is disabled by linux for device %s\n",
  480. pci_name(pcidev));
  481. }
  482. } else {
  483. nes_debug(NES_DBG_INIT, "MSI not requested due to driver options for device %s\n",
  484. pci_name(pcidev));
  485. }
  486. nesdev->csr_start = pci_resource_start(nesdev->pcidev, BAR_0);
  487. nesdev->doorbell_region = pci_resource_start(nesdev->pcidev, BAR_1);
  488. /* Init the adapter */
  489. nesdev->nesadapter = nes_init_adapter(nesdev, hw_rev);
  490. if (!nesdev->nesadapter) {
  491. printk(KERN_ERR PFX "Unable to initialize adapter.\n");
  492. ret = -ENOMEM;
  493. goto bail5;
  494. }
  495. nesdev->nesadapter->et_rx_coalesce_usecs_irq = interrupt_mod_interval;
  496. nesdev->nesadapter->wqm_quanta = wqm_quanta;
  497. /* nesdev->base_doorbell_index =
  498. nesdev->nesadapter->pd_config_base[PCI_FUNC(nesdev->pcidev->devfn)]; */
  499. nesdev->base_doorbell_index = 1;
  500. nesdev->doorbell_start = nesdev->nesadapter->doorbell_start;
  501. if (nesdev->nesadapter->phy_type[0] == NES_PHY_TYPE_PUMA_1G) {
  502. switch (PCI_FUNC(nesdev->pcidev->devfn) %
  503. nesdev->nesadapter->port_count) {
  504. case 1:
  505. nesdev->mac_index = 2;
  506. break;
  507. case 2:
  508. nesdev->mac_index = 1;
  509. break;
  510. case 3:
  511. nesdev->mac_index = 3;
  512. break;
  513. case 0:
  514. default:
  515. nesdev->mac_index = 0;
  516. }
  517. } else {
  518. nesdev->mac_index = PCI_FUNC(nesdev->pcidev->devfn) %
  519. nesdev->nesadapter->port_count;
  520. }
  521. if ((limit_maxrdreqsz ||
  522. ((nesdev->nesadapter->phy_type[0] == NES_PHY_TYPE_GLADIUS) &&
  523. (hw_rev == NE020_REV1))) &&
  524. (pcie_get_readrq(pcidev) > 256)) {
  525. if (pcie_set_readrq(pcidev, 256))
  526. printk(KERN_ERR PFX "Unable to set max read request"
  527. " to 256 bytes\n");
  528. else
  529. nes_debug(NES_DBG_INIT, "Max read request size set"
  530. " to 256 bytes\n");
  531. }
  532. tasklet_init(&nesdev->dpc_tasklet, nes_dpc, (unsigned long)nesdev);
  533. /* bring up the Control QP */
  534. if (nes_init_cqp(nesdev)) {
  535. ret = -ENODEV;
  536. goto bail6;
  537. }
  538. /* Arm the CCQ */
  539. nes_write32(nesdev->regs+NES_CQE_ALLOC, NES_CQE_ALLOC_NOTIFY_NEXT |
  540. PCI_FUNC(nesdev->pcidev->devfn));
  541. nes_read32(nesdev->regs+NES_CQE_ALLOC);
  542. /* Enable the interrupts */
  543. nesdev->int_req = (0x101 << PCI_FUNC(nesdev->pcidev->devfn)) |
  544. (1 << (PCI_FUNC(nesdev->pcidev->devfn)+16));
  545. if (PCI_FUNC(nesdev->pcidev->devfn) < 4) {
  546. nesdev->int_req |= (1 << (PCI_FUNC(nesdev->mac_index)+24));
  547. }
  548. /* TODO: This really should be the first driver to load, not function 0 */
  549. if (PCI_FUNC(nesdev->pcidev->devfn) == 0) {
  550. /* pick up PCI and critical errors if the first driver to load */
  551. nesdev->intf_int_req = NES_INTF_INT_PCIERR | NES_INTF_INT_CRITERR;
  552. nesdev->int_req |= NES_INT_INTF;
  553. } else {
  554. nesdev->intf_int_req = 0;
  555. }
  556. nesdev->intf_int_req |= (1 << (PCI_FUNC(nesdev->pcidev->devfn)+16));
  557. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS0, 0);
  558. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS1, 0);
  559. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS2, 0x00001265);
  560. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS4, 0x18021804);
  561. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS3, 0x17801790);
  562. /* deal with both periodic and one_shot */
  563. nesdev->timer_int_req = 0x101 << PCI_FUNC(nesdev->pcidev->devfn);
  564. nesdev->nesadapter->timer_int_req |= nesdev->timer_int_req;
  565. nes_debug(NES_DBG_INIT, "setting int_req for function %u, nesdev = 0x%04X, adapter = 0x%04X\n",
  566. PCI_FUNC(nesdev->pcidev->devfn),
  567. nesdev->timer_int_req, nesdev->nesadapter->timer_int_req);
  568. nes_write32(nesdev->regs+NES_INTF_INT_MASK, ~(nesdev->intf_int_req));
  569. list_add_tail(&nesdev->list, &nes_dev_list);
  570. /* Request an interrupt line for the driver */
  571. ret = request_irq(pcidev->irq, nes_interrupt, IRQF_SHARED, DRV_NAME, nesdev);
  572. if (ret) {
  573. printk(KERN_ERR PFX "%s: requested IRQ %u is busy\n",
  574. pci_name(pcidev), pcidev->irq);
  575. goto bail65;
  576. }
  577. nes_write32(nesdev->regs+NES_INT_MASK, ~nesdev->int_req);
  578. if (nes_notifiers_registered == 0) {
  579. register_inetaddr_notifier(&nes_inetaddr_notifier);
  580. register_netevent_notifier(&nes_net_notifier);
  581. }
  582. nes_notifiers_registered++;
  583. INIT_DELAYED_WORK(&nesdev->work, nes_recheck_link_status);
  584. /* Initialize network devices */
  585. netdev = nes_netdev_init(nesdev, mmio_regs);
  586. if (netdev == NULL) {
  587. ret = -ENOMEM;
  588. goto bail7;
  589. }
  590. /* Register network device */
  591. ret = register_netdev(netdev);
  592. if (ret) {
  593. printk(KERN_ERR PFX "Unable to register netdev, ret = %d\n", ret);
  594. nes_netdev_destroy(netdev);
  595. goto bail7;
  596. }
  597. nes_print_macaddr(netdev);
  598. nesdev->netdev_count++;
  599. nesdev->nesadapter->netdev_count++;
  600. printk(KERN_INFO PFX "%s: NetEffect RNIC driver successfully loaded.\n",
  601. pci_name(pcidev));
  602. return 0;
  603. bail7:
  604. printk(KERN_ERR PFX "bail7\n");
  605. while (nesdev->netdev_count > 0) {
  606. nesdev->netdev_count--;
  607. nesdev->nesadapter->netdev_count--;
  608. unregister_netdev(nesdev->netdev[nesdev->netdev_count]);
  609. nes_netdev_destroy(nesdev->netdev[nesdev->netdev_count]);
  610. }
  611. nes_debug(NES_DBG_INIT, "netdev_count=%d, nesadapter->netdev_count=%d\n",
  612. nesdev->netdev_count, nesdev->nesadapter->netdev_count);
  613. nes_notifiers_registered--;
  614. if (nes_notifiers_registered == 0) {
  615. unregister_netevent_notifier(&nes_net_notifier);
  616. unregister_inetaddr_notifier(&nes_inetaddr_notifier);
  617. }
  618. list_del(&nesdev->list);
  619. nes_destroy_cqp(nesdev);
  620. bail65:
  621. printk(KERN_ERR PFX "bail65\n");
  622. free_irq(pcidev->irq, nesdev);
  623. if (nesdev->msi_enabled) {
  624. pci_disable_msi(pcidev);
  625. }
  626. bail6:
  627. printk(KERN_ERR PFX "bail6\n");
  628. tasklet_kill(&nesdev->dpc_tasklet);
  629. /* Deallocate the Adapter Structure */
  630. nes_destroy_adapter(nesdev->nesadapter);
  631. bail5:
  632. printk(KERN_ERR PFX "bail5\n");
  633. iounmap(nesdev->regs);
  634. bail3:
  635. printk(KERN_ERR PFX "bail3\n");
  636. kfree(nesdev);
  637. bail2:
  638. pci_release_regions(pcidev);
  639. bail1:
  640. pci_disable_device(pcidev);
  641. bail0:
  642. return ret;
  643. }
  644. /**
  645. * nes_remove - unload from kernel
  646. */
  647. static void nes_remove(struct pci_dev *pcidev)
  648. {
  649. struct nes_device *nesdev = pci_get_drvdata(pcidev);
  650. struct net_device *netdev;
  651. int netdev_index = 0;
  652. unsigned long flags;
  653. if (nesdev->netdev_count) {
  654. netdev = nesdev->netdev[netdev_index];
  655. if (netdev) {
  656. netif_stop_queue(netdev);
  657. unregister_netdev(netdev);
  658. nes_netdev_destroy(netdev);
  659. nesdev->netdev[netdev_index] = NULL;
  660. nesdev->netdev_count--;
  661. nesdev->nesadapter->netdev_count--;
  662. }
  663. }
  664. nes_notifiers_registered--;
  665. if (nes_notifiers_registered == 0) {
  666. unregister_netevent_notifier(&nes_net_notifier);
  667. unregister_inetaddr_notifier(&nes_inetaddr_notifier);
  668. }
  669. list_del(&nesdev->list);
  670. nes_destroy_cqp(nesdev);
  671. free_irq(pcidev->irq, nesdev);
  672. tasklet_kill(&nesdev->dpc_tasklet);
  673. spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags);
  674. if (nesdev->link_recheck) {
  675. spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags);
  676. cancel_delayed_work_sync(&nesdev->work);
  677. } else {
  678. spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags);
  679. }
  680. /* Deallocate the Adapter Structure */
  681. nes_destroy_adapter(nesdev->nesadapter);
  682. if (nesdev->msi_enabled) {
  683. pci_disable_msi(pcidev);
  684. }
  685. iounmap(nesdev->regs);
  686. kfree(nesdev);
  687. /* nes_debug(NES_DBG_SHUTDOWN, "calling pci_release_regions.\n"); */
  688. pci_release_regions(pcidev);
  689. pci_disable_device(pcidev);
  690. pci_set_drvdata(pcidev, NULL);
  691. }
  692. static ssize_t adapter_show(struct device_driver *ddp, char *buf)
  693. {
  694. unsigned int devfn = 0xffffffff;
  695. unsigned char bus_number = 0xff;
  696. unsigned int i = 0;
  697. struct nes_device *nesdev;
  698. list_for_each_entry(nesdev, &nes_dev_list, list) {
  699. if (i == ee_flsh_adapter) {
  700. devfn = nesdev->pcidev->devfn;
  701. bus_number = nesdev->pcidev->bus->number;
  702. break;
  703. }
  704. i++;
  705. }
  706. return snprintf(buf, PAGE_SIZE, "%x:%x\n", bus_number, devfn);
  707. }
  708. static ssize_t adapter_store(struct device_driver *ddp,
  709. const char *buf, size_t count)
  710. {
  711. char *p = (char *)buf;
  712. ee_flsh_adapter = simple_strtoul(p, &p, 10);
  713. return strnlen(buf, count);
  714. }
  715. static ssize_t eeprom_cmd_show(struct device_driver *ddp, char *buf)
  716. {
  717. u32 eeprom_cmd = 0xdead;
  718. u32 i = 0;
  719. struct nes_device *nesdev;
  720. list_for_each_entry(nesdev, &nes_dev_list, list) {
  721. if (i == ee_flsh_adapter) {
  722. eeprom_cmd = nes_read32(nesdev->regs + NES_EEPROM_COMMAND);
  723. break;
  724. }
  725. i++;
  726. }
  727. return snprintf(buf, PAGE_SIZE, "0x%x\n", eeprom_cmd);
  728. }
  729. static ssize_t eeprom_cmd_store(struct device_driver *ddp,
  730. const char *buf, size_t count)
  731. {
  732. char *p = (char *)buf;
  733. u32 val;
  734. u32 i = 0;
  735. struct nes_device *nesdev;
  736. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  737. val = simple_strtoul(p, &p, 16);
  738. list_for_each_entry(nesdev, &nes_dev_list, list) {
  739. if (i == ee_flsh_adapter) {
  740. nes_write32(nesdev->regs + NES_EEPROM_COMMAND, val);
  741. break;
  742. }
  743. i++;
  744. }
  745. }
  746. return strnlen(buf, count);
  747. }
  748. static ssize_t eeprom_data_show(struct device_driver *ddp, char *buf)
  749. {
  750. u32 eeprom_data = 0xdead;
  751. u32 i = 0;
  752. struct nes_device *nesdev;
  753. list_for_each_entry(nesdev, &nes_dev_list, list) {
  754. if (i == ee_flsh_adapter) {
  755. eeprom_data = nes_read32(nesdev->regs + NES_EEPROM_DATA);
  756. break;
  757. }
  758. i++;
  759. }
  760. return snprintf(buf, PAGE_SIZE, "0x%x\n", eeprom_data);
  761. }
  762. static ssize_t eeprom_data_store(struct device_driver *ddp,
  763. const char *buf, size_t count)
  764. {
  765. char *p = (char *)buf;
  766. u32 val;
  767. u32 i = 0;
  768. struct nes_device *nesdev;
  769. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  770. val = simple_strtoul(p, &p, 16);
  771. list_for_each_entry(nesdev, &nes_dev_list, list) {
  772. if (i == ee_flsh_adapter) {
  773. nes_write32(nesdev->regs + NES_EEPROM_DATA, val);
  774. break;
  775. }
  776. i++;
  777. }
  778. }
  779. return strnlen(buf, count);
  780. }
  781. static ssize_t flash_cmd_show(struct device_driver *ddp, char *buf)
  782. {
  783. u32 flash_cmd = 0xdead;
  784. u32 i = 0;
  785. struct nes_device *nesdev;
  786. list_for_each_entry(nesdev, &nes_dev_list, list) {
  787. if (i == ee_flsh_adapter) {
  788. flash_cmd = nes_read32(nesdev->regs + NES_FLASH_COMMAND);
  789. break;
  790. }
  791. i++;
  792. }
  793. return snprintf(buf, PAGE_SIZE, "0x%x\n", flash_cmd);
  794. }
  795. static ssize_t flash_cmd_store(struct device_driver *ddp,
  796. const char *buf, size_t count)
  797. {
  798. char *p = (char *)buf;
  799. u32 val;
  800. u32 i = 0;
  801. struct nes_device *nesdev;
  802. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  803. val = simple_strtoul(p, &p, 16);
  804. list_for_each_entry(nesdev, &nes_dev_list, list) {
  805. if (i == ee_flsh_adapter) {
  806. nes_write32(nesdev->regs + NES_FLASH_COMMAND, val);
  807. break;
  808. }
  809. i++;
  810. }
  811. }
  812. return strnlen(buf, count);
  813. }
  814. static ssize_t flash_data_show(struct device_driver *ddp, char *buf)
  815. {
  816. u32 flash_data = 0xdead;
  817. u32 i = 0;
  818. struct nes_device *nesdev;
  819. list_for_each_entry(nesdev, &nes_dev_list, list) {
  820. if (i == ee_flsh_adapter) {
  821. flash_data = nes_read32(nesdev->regs + NES_FLASH_DATA);
  822. break;
  823. }
  824. i++;
  825. }
  826. return snprintf(buf, PAGE_SIZE, "0x%x\n", flash_data);
  827. }
  828. static ssize_t flash_data_store(struct device_driver *ddp,
  829. const char *buf, size_t count)
  830. {
  831. char *p = (char *)buf;
  832. u32 val;
  833. u32 i = 0;
  834. struct nes_device *nesdev;
  835. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  836. val = simple_strtoul(p, &p, 16);
  837. list_for_each_entry(nesdev, &nes_dev_list, list) {
  838. if (i == ee_flsh_adapter) {
  839. nes_write32(nesdev->regs + NES_FLASH_DATA, val);
  840. break;
  841. }
  842. i++;
  843. }
  844. }
  845. return strnlen(buf, count);
  846. }
  847. static ssize_t nonidx_addr_show(struct device_driver *ddp, char *buf)
  848. {
  849. return snprintf(buf, PAGE_SIZE, "0x%x\n", sysfs_nonidx_addr);
  850. }
  851. static ssize_t nonidx_addr_store(struct device_driver *ddp,
  852. const char *buf, size_t count)
  853. {
  854. char *p = (char *)buf;
  855. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X')
  856. sysfs_nonidx_addr = simple_strtoul(p, &p, 16);
  857. return strnlen(buf, count);
  858. }
  859. static ssize_t nonidx_data_show(struct device_driver *ddp, char *buf)
  860. {
  861. u32 nonidx_data = 0xdead;
  862. u32 i = 0;
  863. struct nes_device *nesdev;
  864. list_for_each_entry(nesdev, &nes_dev_list, list) {
  865. if (i == ee_flsh_adapter) {
  866. nonidx_data = nes_read32(nesdev->regs + sysfs_nonidx_addr);
  867. break;
  868. }
  869. i++;
  870. }
  871. return snprintf(buf, PAGE_SIZE, "0x%x\n", nonidx_data);
  872. }
  873. static ssize_t nonidx_data_store(struct device_driver *ddp,
  874. const char *buf, size_t count)
  875. {
  876. char *p = (char *)buf;
  877. u32 val;
  878. u32 i = 0;
  879. struct nes_device *nesdev;
  880. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  881. val = simple_strtoul(p, &p, 16);
  882. list_for_each_entry(nesdev, &nes_dev_list, list) {
  883. if (i == ee_flsh_adapter) {
  884. nes_write32(nesdev->regs + sysfs_nonidx_addr, val);
  885. break;
  886. }
  887. i++;
  888. }
  889. }
  890. return strnlen(buf, count);
  891. }
  892. static ssize_t idx_addr_show(struct device_driver *ddp, char *buf)
  893. {
  894. return snprintf(buf, PAGE_SIZE, "0x%x\n", sysfs_idx_addr);
  895. }
  896. static ssize_t idx_addr_store(struct device_driver *ddp,
  897. const char *buf, size_t count)
  898. {
  899. char *p = (char *)buf;
  900. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X')
  901. sysfs_idx_addr = simple_strtoul(p, &p, 16);
  902. return strnlen(buf, count);
  903. }
  904. static ssize_t idx_data_show(struct device_driver *ddp, char *buf)
  905. {
  906. u32 idx_data = 0xdead;
  907. u32 i = 0;
  908. struct nes_device *nesdev;
  909. list_for_each_entry(nesdev, &nes_dev_list, list) {
  910. if (i == ee_flsh_adapter) {
  911. idx_data = nes_read_indexed(nesdev, sysfs_idx_addr);
  912. break;
  913. }
  914. i++;
  915. }
  916. return snprintf(buf, PAGE_SIZE, "0x%x\n", idx_data);
  917. }
  918. static ssize_t idx_data_store(struct device_driver *ddp,
  919. const char *buf, size_t count)
  920. {
  921. char *p = (char *)buf;
  922. u32 val;
  923. u32 i = 0;
  924. struct nes_device *nesdev;
  925. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  926. val = simple_strtoul(p, &p, 16);
  927. list_for_each_entry(nesdev, &nes_dev_list, list) {
  928. if (i == ee_flsh_adapter) {
  929. nes_write_indexed(nesdev, sysfs_idx_addr, val);
  930. break;
  931. }
  932. i++;
  933. }
  934. }
  935. return strnlen(buf, count);
  936. }
  937. static ssize_t wqm_quanta_show(struct device_driver *ddp, char *buf)
  938. {
  939. u32 wqm_quanta_value = 0xdead;
  940. u32 i = 0;
  941. struct nes_device *nesdev;
  942. list_for_each_entry(nesdev, &nes_dev_list, list) {
  943. if (i == ee_flsh_adapter) {
  944. wqm_quanta_value = nesdev->nesadapter->wqm_quanta;
  945. break;
  946. }
  947. i++;
  948. }
  949. return snprintf(buf, PAGE_SIZE, "0x%X\n", wqm_quanta_value);
  950. }
  951. static ssize_t wqm_quanta_store(struct device_driver *ddp, const char *buf,
  952. size_t count)
  953. {
  954. unsigned long wqm_quanta_value;
  955. u32 wqm_config1;
  956. u32 i = 0;
  957. struct nes_device *nesdev;
  958. if (kstrtoul(buf, 0, &wqm_quanta_value) < 0)
  959. return -EINVAL;
  960. list_for_each_entry(nesdev, &nes_dev_list, list) {
  961. if (i == ee_flsh_adapter) {
  962. nesdev->nesadapter->wqm_quanta = wqm_quanta_value;
  963. wqm_config1 = nes_read_indexed(nesdev,
  964. NES_IDX_WQM_CONFIG1);
  965. nes_write_indexed(nesdev, NES_IDX_WQM_CONFIG1,
  966. ((wqm_quanta_value << 1) |
  967. (wqm_config1 & 0x00000001)));
  968. break;
  969. }
  970. i++;
  971. }
  972. return strnlen(buf, count);
  973. }
  974. static DRIVER_ATTR_RW(adapter);
  975. static DRIVER_ATTR_RW(eeprom_cmd);
  976. static DRIVER_ATTR_RW(eeprom_data);
  977. static DRIVER_ATTR_RW(flash_cmd);
  978. static DRIVER_ATTR_RW(flash_data);
  979. static DRIVER_ATTR_RW(nonidx_addr);
  980. static DRIVER_ATTR_RW(nonidx_data);
  981. static DRIVER_ATTR_RW(idx_addr);
  982. static DRIVER_ATTR_RW(idx_data);
  983. static DRIVER_ATTR_RW(wqm_quanta);
  984. static struct attribute *nes_attrs[] = {
  985. &driver_attr_adapter.attr,
  986. &driver_attr_eeprom_cmd.attr,
  987. &driver_attr_eeprom_data.attr,
  988. &driver_attr_flash_cmd.attr,
  989. &driver_attr_flash_data.attr,
  990. &driver_attr_nonidx_addr.attr,
  991. &driver_attr_nonidx_data.attr,
  992. &driver_attr_idx_addr.attr,
  993. &driver_attr_idx_data.attr,
  994. &driver_attr_wqm_quanta.attr,
  995. NULL,
  996. };
  997. ATTRIBUTE_GROUPS(nes);
  998. static struct pci_driver nes_pci_driver = {
  999. .name = DRV_NAME,
  1000. .id_table = nes_pci_table,
  1001. .probe = nes_probe,
  1002. .remove = nes_remove,
  1003. .groups = nes_groups,
  1004. };
  1005. /**
  1006. * nes_init_module - module initialization entry point
  1007. */
  1008. static int __init nes_init_module(void)
  1009. {
  1010. int retval;
  1011. retval = nes_cm_start();
  1012. if (retval) {
  1013. printk(KERN_ERR PFX "Unable to start NetEffect iWARP CM.\n");
  1014. return retval;
  1015. }
  1016. return pci_register_driver(&nes_pci_driver);
  1017. }
  1018. /**
  1019. * nes_exit_module - module unload entry point
  1020. */
  1021. static void __exit nes_exit_module(void)
  1022. {
  1023. nes_cm_stop();
  1024. pci_unregister_driver(&nes_pci_driver);
  1025. }
  1026. module_init(nes_init_module);
  1027. module_exit(nes_exit_module);