mad.c 18 KB

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  1. /*
  2. * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/mlx5/cmd.h>
  33. #include <linux/mlx5/vport.h>
  34. #include <rdma/ib_mad.h>
  35. #include <rdma/ib_smi.h>
  36. #include <rdma/ib_pma.h>
  37. #include "mlx5_ib.h"
  38. enum {
  39. MLX5_IB_VENDOR_CLASS1 = 0x9,
  40. MLX5_IB_VENDOR_CLASS2 = 0xa
  41. };
  42. static bool can_do_mad_ifc(struct mlx5_ib_dev *dev, u8 port_num,
  43. struct ib_mad *in_mad)
  44. {
  45. if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED &&
  46. in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
  47. return true;
  48. return dev->mdev->port_caps[port_num - 1].has_smi;
  49. }
  50. int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey, int ignore_bkey,
  51. u8 port, const struct ib_wc *in_wc, const struct ib_grh *in_grh,
  52. const void *in_mad, void *response_mad)
  53. {
  54. u8 op_modifier = 0;
  55. if (!can_do_mad_ifc(dev, port, (struct ib_mad *)in_mad))
  56. return -EPERM;
  57. /* Key check traps can't be generated unless we have in_wc to
  58. * tell us where to send the trap.
  59. */
  60. if (ignore_mkey || !in_wc)
  61. op_modifier |= 0x1;
  62. if (ignore_bkey || !in_wc)
  63. op_modifier |= 0x2;
  64. return mlx5_core_mad_ifc(dev->mdev, in_mad, response_mad, op_modifier, port);
  65. }
  66. static int process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
  67. const struct ib_wc *in_wc, const struct ib_grh *in_grh,
  68. const struct ib_mad *in_mad, struct ib_mad *out_mad)
  69. {
  70. u16 slid;
  71. int err;
  72. slid = in_wc ? ib_lid_cpu16(in_wc->slid) : be16_to_cpu(IB_LID_PERMISSIVE);
  73. if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0)
  74. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
  75. if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
  76. in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
  77. if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
  78. in_mad->mad_hdr.method != IB_MGMT_METHOD_SET &&
  79. in_mad->mad_hdr.method != IB_MGMT_METHOD_TRAP_REPRESS)
  80. return IB_MAD_RESULT_SUCCESS;
  81. /* Don't process SMInfo queries -- the SMA can't handle them.
  82. */
  83. if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
  84. return IB_MAD_RESULT_SUCCESS;
  85. } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
  86. in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS1 ||
  87. in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS2 ||
  88. in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
  89. if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
  90. in_mad->mad_hdr.method != IB_MGMT_METHOD_SET)
  91. return IB_MAD_RESULT_SUCCESS;
  92. } else {
  93. return IB_MAD_RESULT_SUCCESS;
  94. }
  95. err = mlx5_MAD_IFC(to_mdev(ibdev),
  96. mad_flags & IB_MAD_IGNORE_MKEY,
  97. mad_flags & IB_MAD_IGNORE_BKEY,
  98. port_num, in_wc, in_grh, in_mad, out_mad);
  99. if (err)
  100. return IB_MAD_RESULT_FAILURE;
  101. /* set return bit in status of directed route responses */
  102. if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
  103. out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
  104. if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
  105. /* no response for trap repress */
  106. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
  107. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
  108. }
  109. static void pma_cnt_ext_assign(struct ib_pma_portcounters_ext *pma_cnt_ext,
  110. void *out)
  111. {
  112. #define MLX5_SUM_CNT(p, cntr1, cntr2) \
  113. (MLX5_GET64(query_vport_counter_out, p, cntr1) + \
  114. MLX5_GET64(query_vport_counter_out, p, cntr2))
  115. pma_cnt_ext->port_xmit_data =
  116. cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.octets,
  117. transmitted_ib_multicast.octets) >> 2);
  118. pma_cnt_ext->port_rcv_data =
  119. cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.octets,
  120. received_ib_multicast.octets) >> 2);
  121. pma_cnt_ext->port_xmit_packets =
  122. cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.packets,
  123. transmitted_ib_multicast.packets));
  124. pma_cnt_ext->port_rcv_packets =
  125. cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.packets,
  126. received_ib_multicast.packets));
  127. pma_cnt_ext->port_unicast_xmit_packets =
  128. MLX5_GET64_BE(query_vport_counter_out,
  129. out, transmitted_ib_unicast.packets);
  130. pma_cnt_ext->port_unicast_rcv_packets =
  131. MLX5_GET64_BE(query_vport_counter_out,
  132. out, received_ib_unicast.packets);
  133. pma_cnt_ext->port_multicast_xmit_packets =
  134. MLX5_GET64_BE(query_vport_counter_out,
  135. out, transmitted_ib_multicast.packets);
  136. pma_cnt_ext->port_multicast_rcv_packets =
  137. MLX5_GET64_BE(query_vport_counter_out,
  138. out, received_ib_multicast.packets);
  139. }
  140. static void pma_cnt_assign(struct ib_pma_portcounters *pma_cnt,
  141. void *out)
  142. {
  143. /* Traffic counters will be reported in
  144. * their 64bit form via ib_pma_portcounters_ext by default.
  145. */
  146. void *out_pma = MLX5_ADDR_OF(ppcnt_reg, out,
  147. counter_set);
  148. #define MLX5_ASSIGN_PMA_CNTR(counter_var, counter_name) { \
  149. counter_var = MLX5_GET_BE(typeof(counter_var), \
  150. ib_port_cntrs_grp_data_layout, \
  151. out_pma, counter_name); \
  152. }
  153. MLX5_ASSIGN_PMA_CNTR(pma_cnt->symbol_error_counter,
  154. symbol_error_counter);
  155. MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_error_recovery_counter,
  156. link_error_recovery_counter);
  157. MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_downed_counter,
  158. link_downed_counter);
  159. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_errors,
  160. port_rcv_errors);
  161. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_remphys_errors,
  162. port_rcv_remote_physical_errors);
  163. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_switch_relay_errors,
  164. port_rcv_switch_relay_errors);
  165. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_discards,
  166. port_xmit_discards);
  167. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_constraint_errors,
  168. port_xmit_constraint_errors);
  169. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_wait,
  170. port_xmit_wait);
  171. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_constraint_errors,
  172. port_rcv_constraint_errors);
  173. MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_overrun_errors,
  174. link_overrun_errors);
  175. MLX5_ASSIGN_PMA_CNTR(pma_cnt->vl15_dropped,
  176. vl_15_dropped);
  177. }
  178. static int process_pma_cmd(struct mlx5_ib_dev *dev, u8 port_num,
  179. const struct ib_mad *in_mad, struct ib_mad *out_mad)
  180. {
  181. struct mlx5_core_dev *mdev;
  182. bool native_port = true;
  183. u8 mdev_port_num;
  184. void *out_cnt;
  185. int err;
  186. mdev = mlx5_ib_get_native_port_mdev(dev, port_num, &mdev_port_num);
  187. if (!mdev) {
  188. /* Fail to get the native port, likely due to 2nd port is still
  189. * unaffiliated. In such case default to 1st port and attached
  190. * PF device.
  191. */
  192. native_port = false;
  193. mdev = dev->mdev;
  194. mdev_port_num = 1;
  195. }
  196. /* Declaring support of extended counters */
  197. if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO) {
  198. struct ib_class_port_info cpi = {};
  199. cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
  200. memcpy((out_mad->data + 40), &cpi, sizeof(cpi));
  201. err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
  202. goto done;
  203. }
  204. if (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT) {
  205. struct ib_pma_portcounters_ext *pma_cnt_ext =
  206. (struct ib_pma_portcounters_ext *)(out_mad->data + 40);
  207. int sz = MLX5_ST_SZ_BYTES(query_vport_counter_out);
  208. out_cnt = kvzalloc(sz, GFP_KERNEL);
  209. if (!out_cnt) {
  210. err = IB_MAD_RESULT_FAILURE;
  211. goto done;
  212. }
  213. err = mlx5_core_query_vport_counter(mdev, 0, 0,
  214. mdev_port_num, out_cnt, sz);
  215. if (!err)
  216. pma_cnt_ext_assign(pma_cnt_ext, out_cnt);
  217. } else {
  218. struct ib_pma_portcounters *pma_cnt =
  219. (struct ib_pma_portcounters *)(out_mad->data + 40);
  220. int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
  221. out_cnt = kvzalloc(sz, GFP_KERNEL);
  222. if (!out_cnt) {
  223. err = IB_MAD_RESULT_FAILURE;
  224. goto done;
  225. }
  226. err = mlx5_core_query_ib_ppcnt(mdev, mdev_port_num,
  227. out_cnt, sz);
  228. if (!err)
  229. pma_cnt_assign(pma_cnt, out_cnt);
  230. }
  231. kvfree(out_cnt);
  232. err = err ? IB_MAD_RESULT_FAILURE :
  233. IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
  234. done:
  235. if (native_port)
  236. mlx5_ib_put_native_port_mdev(dev, port_num);
  237. return err;
  238. }
  239. int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
  240. const struct ib_wc *in_wc, const struct ib_grh *in_grh,
  241. const struct ib_mad_hdr *in, size_t in_mad_size,
  242. struct ib_mad_hdr *out, size_t *out_mad_size,
  243. u16 *out_mad_pkey_index)
  244. {
  245. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  246. const struct ib_mad *in_mad = (const struct ib_mad *)in;
  247. struct ib_mad *out_mad = (struct ib_mad *)out;
  248. int ret;
  249. if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
  250. *out_mad_size != sizeof(*out_mad)))
  251. return IB_MAD_RESULT_FAILURE;
  252. memset(out_mad->data, 0, sizeof(out_mad->data));
  253. if (MLX5_CAP_GEN(dev->mdev, vport_counters) &&
  254. in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
  255. in_mad->mad_hdr.method == IB_MGMT_METHOD_GET) {
  256. ret = process_pma_cmd(dev, port_num, in_mad, out_mad);
  257. } else {
  258. ret = process_mad(ibdev, mad_flags, port_num, in_wc, in_grh,
  259. in_mad, out_mad);
  260. }
  261. return ret;
  262. }
  263. int mlx5_query_ext_port_caps(struct mlx5_ib_dev *dev, u8 port)
  264. {
  265. struct ib_smp *in_mad = NULL;
  266. struct ib_smp *out_mad = NULL;
  267. int err = -ENOMEM;
  268. u16 packet_error;
  269. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  270. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  271. if (!in_mad || !out_mad)
  272. goto out;
  273. init_query_mad(in_mad);
  274. in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
  275. in_mad->attr_mod = cpu_to_be32(port);
  276. err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
  277. packet_error = be16_to_cpu(out_mad->status);
  278. dev->mdev->port_caps[port - 1].ext_port_cap = (!err && !packet_error) ?
  279. MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO : 0;
  280. out:
  281. kfree(in_mad);
  282. kfree(out_mad);
  283. return err;
  284. }
  285. int mlx5_query_mad_ifc_smp_attr_node_info(struct ib_device *ibdev,
  286. struct ib_smp *out_mad)
  287. {
  288. struct ib_smp *in_mad = NULL;
  289. int err = -ENOMEM;
  290. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  291. if (!in_mad)
  292. return -ENOMEM;
  293. init_query_mad(in_mad);
  294. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  295. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad,
  296. out_mad);
  297. kfree(in_mad);
  298. return err;
  299. }
  300. int mlx5_query_mad_ifc_system_image_guid(struct ib_device *ibdev,
  301. __be64 *sys_image_guid)
  302. {
  303. struct ib_smp *out_mad = NULL;
  304. int err = -ENOMEM;
  305. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  306. if (!out_mad)
  307. return -ENOMEM;
  308. err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
  309. if (err)
  310. goto out;
  311. memcpy(sys_image_guid, out_mad->data + 4, 8);
  312. out:
  313. kfree(out_mad);
  314. return err;
  315. }
  316. int mlx5_query_mad_ifc_max_pkeys(struct ib_device *ibdev,
  317. u16 *max_pkeys)
  318. {
  319. struct ib_smp *out_mad = NULL;
  320. int err = -ENOMEM;
  321. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  322. if (!out_mad)
  323. return -ENOMEM;
  324. err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
  325. if (err)
  326. goto out;
  327. *max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
  328. out:
  329. kfree(out_mad);
  330. return err;
  331. }
  332. int mlx5_query_mad_ifc_vendor_id(struct ib_device *ibdev,
  333. u32 *vendor_id)
  334. {
  335. struct ib_smp *out_mad = NULL;
  336. int err = -ENOMEM;
  337. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  338. if (!out_mad)
  339. return -ENOMEM;
  340. err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
  341. if (err)
  342. goto out;
  343. *vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & 0xffff;
  344. out:
  345. kfree(out_mad);
  346. return err;
  347. }
  348. int mlx5_query_mad_ifc_node_desc(struct mlx5_ib_dev *dev, char *node_desc)
  349. {
  350. struct ib_smp *in_mad = NULL;
  351. struct ib_smp *out_mad = NULL;
  352. int err = -ENOMEM;
  353. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  354. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  355. if (!in_mad || !out_mad)
  356. goto out;
  357. init_query_mad(in_mad);
  358. in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
  359. err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
  360. if (err)
  361. goto out;
  362. memcpy(node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
  363. out:
  364. kfree(in_mad);
  365. kfree(out_mad);
  366. return err;
  367. }
  368. int mlx5_query_mad_ifc_node_guid(struct mlx5_ib_dev *dev, __be64 *node_guid)
  369. {
  370. struct ib_smp *in_mad = NULL;
  371. struct ib_smp *out_mad = NULL;
  372. int err = -ENOMEM;
  373. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  374. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  375. if (!in_mad || !out_mad)
  376. goto out;
  377. init_query_mad(in_mad);
  378. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  379. err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
  380. if (err)
  381. goto out;
  382. memcpy(node_guid, out_mad->data + 12, 8);
  383. out:
  384. kfree(in_mad);
  385. kfree(out_mad);
  386. return err;
  387. }
  388. int mlx5_query_mad_ifc_pkey(struct ib_device *ibdev, u8 port, u16 index,
  389. u16 *pkey)
  390. {
  391. struct ib_smp *in_mad = NULL;
  392. struct ib_smp *out_mad = NULL;
  393. int err = -ENOMEM;
  394. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  395. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  396. if (!in_mad || !out_mad)
  397. goto out;
  398. init_query_mad(in_mad);
  399. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  400. in_mad->attr_mod = cpu_to_be32(index / 32);
  401. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
  402. out_mad);
  403. if (err)
  404. goto out;
  405. *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
  406. out:
  407. kfree(in_mad);
  408. kfree(out_mad);
  409. return err;
  410. }
  411. int mlx5_query_mad_ifc_gids(struct ib_device *ibdev, u8 port, int index,
  412. union ib_gid *gid)
  413. {
  414. struct ib_smp *in_mad = NULL;
  415. struct ib_smp *out_mad = NULL;
  416. int err = -ENOMEM;
  417. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  418. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  419. if (!in_mad || !out_mad)
  420. goto out;
  421. init_query_mad(in_mad);
  422. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  423. in_mad->attr_mod = cpu_to_be32(port);
  424. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
  425. out_mad);
  426. if (err)
  427. goto out;
  428. memcpy(gid->raw, out_mad->data + 8, 8);
  429. init_query_mad(in_mad);
  430. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  431. in_mad->attr_mod = cpu_to_be32(index / 8);
  432. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
  433. out_mad);
  434. if (err)
  435. goto out;
  436. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
  437. out:
  438. kfree(in_mad);
  439. kfree(out_mad);
  440. return err;
  441. }
  442. int mlx5_query_mad_ifc_port(struct ib_device *ibdev, u8 port,
  443. struct ib_port_attr *props)
  444. {
  445. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  446. struct mlx5_core_dev *mdev = dev->mdev;
  447. struct ib_smp *in_mad = NULL;
  448. struct ib_smp *out_mad = NULL;
  449. int ext_active_speed;
  450. int err = -ENOMEM;
  451. if (port < 1 || port > dev->num_ports) {
  452. mlx5_ib_warn(dev, "invalid port number %d\n", port);
  453. return -EINVAL;
  454. }
  455. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  456. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  457. if (!in_mad || !out_mad)
  458. goto out;
  459. /* props being zeroed by the caller, avoid zeroing it here */
  460. init_query_mad(in_mad);
  461. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  462. in_mad->attr_mod = cpu_to_be32(port);
  463. err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
  464. if (err) {
  465. mlx5_ib_warn(dev, "err %d\n", err);
  466. goto out;
  467. }
  468. props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
  469. props->lmc = out_mad->data[34] & 0x7;
  470. props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
  471. props->sm_sl = out_mad->data[36] & 0xf;
  472. props->state = out_mad->data[32] & 0xf;
  473. props->phys_state = out_mad->data[33] >> 4;
  474. props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
  475. props->gid_tbl_len = out_mad->data[50];
  476. props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
  477. props->pkey_tbl_len = mdev->port_caps[port - 1].pkey_table_len;
  478. props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
  479. props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
  480. props->active_width = out_mad->data[31] & 0xf;
  481. props->active_speed = out_mad->data[35] >> 4;
  482. props->max_mtu = out_mad->data[41] & 0xf;
  483. props->active_mtu = out_mad->data[36] >> 4;
  484. props->subnet_timeout = out_mad->data[51] & 0x1f;
  485. props->max_vl_num = out_mad->data[37] >> 4;
  486. props->init_type_reply = out_mad->data[41] >> 4;
  487. /* Check if extended speeds (EDR/FDR/...) are supported */
  488. if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
  489. ext_active_speed = out_mad->data[62] >> 4;
  490. switch (ext_active_speed) {
  491. case 1:
  492. props->active_speed = 16; /* FDR */
  493. break;
  494. case 2:
  495. props->active_speed = 32; /* EDR */
  496. break;
  497. }
  498. }
  499. /* If reported active speed is QDR, check if is FDR-10 */
  500. if (props->active_speed == 4) {
  501. if (mdev->port_caps[port - 1].ext_port_cap &
  502. MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
  503. init_query_mad(in_mad);
  504. in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
  505. in_mad->attr_mod = cpu_to_be32(port);
  506. err = mlx5_MAD_IFC(dev, 1, 1, port,
  507. NULL, NULL, in_mad, out_mad);
  508. if (err)
  509. goto out;
  510. /* Checking LinkSpeedActive for FDR-10 */
  511. if (out_mad->data[15] & 0x1)
  512. props->active_speed = 8;
  513. }
  514. }
  515. out:
  516. kfree(in_mad);
  517. kfree(out_mad);
  518. return err;
  519. }