bmc150_magn.c 26 KB

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  1. /*
  2. * Bosch BMC150 three-axis magnetic field sensor driver
  3. *
  4. * Copyright (c) 2015, Intel Corporation.
  5. *
  6. * This code is based on bmm050_api.c authored by contact@bosch.sensortec.com:
  7. *
  8. * (C) Copyright 2011~2014 Bosch Sensortec GmbH All Rights Reserved
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms and conditions of the GNU General Public License,
  12. * version 2, as published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope it will be useful, but WITHOUT
  15. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  17. * more details.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/i2c.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/delay.h>
  23. #include <linux/slab.h>
  24. #include <linux/acpi.h>
  25. #include <linux/pm.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/iio/iio.h>
  28. #include <linux/iio/sysfs.h>
  29. #include <linux/iio/buffer.h>
  30. #include <linux/iio/events.h>
  31. #include <linux/iio/trigger.h>
  32. #include <linux/iio/trigger_consumer.h>
  33. #include <linux/iio/triggered_buffer.h>
  34. #include <linux/regmap.h>
  35. #include "bmc150_magn.h"
  36. #define BMC150_MAGN_DRV_NAME "bmc150_magn"
  37. #define BMC150_MAGN_IRQ_NAME "bmc150_magn_event"
  38. #define BMC150_MAGN_REG_CHIP_ID 0x40
  39. #define BMC150_MAGN_CHIP_ID_VAL 0x32
  40. #define BMC150_MAGN_REG_X_L 0x42
  41. #define BMC150_MAGN_REG_X_M 0x43
  42. #define BMC150_MAGN_REG_Y_L 0x44
  43. #define BMC150_MAGN_REG_Y_M 0x45
  44. #define BMC150_MAGN_SHIFT_XY_L 3
  45. #define BMC150_MAGN_REG_Z_L 0x46
  46. #define BMC150_MAGN_REG_Z_M 0x47
  47. #define BMC150_MAGN_SHIFT_Z_L 1
  48. #define BMC150_MAGN_REG_RHALL_L 0x48
  49. #define BMC150_MAGN_REG_RHALL_M 0x49
  50. #define BMC150_MAGN_SHIFT_RHALL_L 2
  51. #define BMC150_MAGN_REG_INT_STATUS 0x4A
  52. #define BMC150_MAGN_REG_POWER 0x4B
  53. #define BMC150_MAGN_MASK_POWER_CTL BIT(0)
  54. #define BMC150_MAGN_REG_OPMODE_ODR 0x4C
  55. #define BMC150_MAGN_MASK_OPMODE GENMASK(2, 1)
  56. #define BMC150_MAGN_SHIFT_OPMODE 1
  57. #define BMC150_MAGN_MODE_NORMAL 0x00
  58. #define BMC150_MAGN_MODE_FORCED 0x01
  59. #define BMC150_MAGN_MODE_SLEEP 0x03
  60. #define BMC150_MAGN_MASK_ODR GENMASK(5, 3)
  61. #define BMC150_MAGN_SHIFT_ODR 3
  62. #define BMC150_MAGN_REG_INT 0x4D
  63. #define BMC150_MAGN_REG_INT_DRDY 0x4E
  64. #define BMC150_MAGN_MASK_DRDY_EN BIT(7)
  65. #define BMC150_MAGN_SHIFT_DRDY_EN 7
  66. #define BMC150_MAGN_MASK_DRDY_INT3 BIT(6)
  67. #define BMC150_MAGN_MASK_DRDY_Z_EN BIT(5)
  68. #define BMC150_MAGN_MASK_DRDY_Y_EN BIT(4)
  69. #define BMC150_MAGN_MASK_DRDY_X_EN BIT(3)
  70. #define BMC150_MAGN_MASK_DRDY_DR_POLARITY BIT(2)
  71. #define BMC150_MAGN_MASK_DRDY_LATCHING BIT(1)
  72. #define BMC150_MAGN_MASK_DRDY_INT3_POLARITY BIT(0)
  73. #define BMC150_MAGN_REG_LOW_THRESH 0x4F
  74. #define BMC150_MAGN_REG_HIGH_THRESH 0x50
  75. #define BMC150_MAGN_REG_REP_XY 0x51
  76. #define BMC150_MAGN_REG_REP_Z 0x52
  77. #define BMC150_MAGN_REG_REP_DATAMASK GENMASK(7, 0)
  78. #define BMC150_MAGN_REG_TRIM_START 0x5D
  79. #define BMC150_MAGN_REG_TRIM_END 0x71
  80. #define BMC150_MAGN_XY_OVERFLOW_VAL -4096
  81. #define BMC150_MAGN_Z_OVERFLOW_VAL -16384
  82. /* Time from SUSPEND to SLEEP */
  83. #define BMC150_MAGN_START_UP_TIME_MS 3
  84. #define BMC150_MAGN_AUTO_SUSPEND_DELAY_MS 2000
  85. #define BMC150_MAGN_REGVAL_TO_REPXY(regval) (((regval) * 2) + 1)
  86. #define BMC150_MAGN_REGVAL_TO_REPZ(regval) ((regval) + 1)
  87. #define BMC150_MAGN_REPXY_TO_REGVAL(rep) (((rep) - 1) / 2)
  88. #define BMC150_MAGN_REPZ_TO_REGVAL(rep) ((rep) - 1)
  89. enum bmc150_magn_axis {
  90. AXIS_X,
  91. AXIS_Y,
  92. AXIS_Z,
  93. RHALL,
  94. AXIS_XYZ_MAX = RHALL,
  95. AXIS_XYZR_MAX,
  96. };
  97. enum bmc150_magn_power_modes {
  98. BMC150_MAGN_POWER_MODE_SUSPEND,
  99. BMC150_MAGN_POWER_MODE_SLEEP,
  100. BMC150_MAGN_POWER_MODE_NORMAL,
  101. };
  102. struct bmc150_magn_trim_regs {
  103. s8 x1;
  104. s8 y1;
  105. __le16 reserved1;
  106. u8 reserved2;
  107. __le16 z4;
  108. s8 x2;
  109. s8 y2;
  110. __le16 reserved3;
  111. __le16 z2;
  112. __le16 z1;
  113. __le16 xyz1;
  114. __le16 z3;
  115. s8 xy2;
  116. u8 xy1;
  117. } __packed;
  118. struct bmc150_magn_data {
  119. struct device *dev;
  120. /*
  121. * 1. Protect this structure.
  122. * 2. Serialize sequences that power on/off the device and access HW.
  123. */
  124. struct mutex mutex;
  125. struct regmap *regmap;
  126. /* 4 x 32 bits for x, y z, 4 bytes align, 64 bits timestamp */
  127. s32 buffer[6];
  128. struct iio_trigger *dready_trig;
  129. bool dready_trigger_on;
  130. int max_odr;
  131. int irq;
  132. };
  133. static const struct {
  134. int freq;
  135. u8 reg_val;
  136. } bmc150_magn_samp_freq_table[] = { {2, 0x01},
  137. {6, 0x02},
  138. {8, 0x03},
  139. {10, 0x00},
  140. {15, 0x04},
  141. {20, 0x05},
  142. {25, 0x06},
  143. {30, 0x07} };
  144. enum bmc150_magn_presets {
  145. LOW_POWER_PRESET,
  146. REGULAR_PRESET,
  147. ENHANCED_REGULAR_PRESET,
  148. HIGH_ACCURACY_PRESET
  149. };
  150. static const struct bmc150_magn_preset {
  151. u8 rep_xy;
  152. u8 rep_z;
  153. u8 odr;
  154. } bmc150_magn_presets_table[] = {
  155. [LOW_POWER_PRESET] = {3, 3, 10},
  156. [REGULAR_PRESET] = {9, 15, 10},
  157. [ENHANCED_REGULAR_PRESET] = {15, 27, 10},
  158. [HIGH_ACCURACY_PRESET] = {47, 83, 20},
  159. };
  160. #define BMC150_MAGN_DEFAULT_PRESET REGULAR_PRESET
  161. static bool bmc150_magn_is_writeable_reg(struct device *dev, unsigned int reg)
  162. {
  163. switch (reg) {
  164. case BMC150_MAGN_REG_POWER:
  165. case BMC150_MAGN_REG_OPMODE_ODR:
  166. case BMC150_MAGN_REG_INT:
  167. case BMC150_MAGN_REG_INT_DRDY:
  168. case BMC150_MAGN_REG_LOW_THRESH:
  169. case BMC150_MAGN_REG_HIGH_THRESH:
  170. case BMC150_MAGN_REG_REP_XY:
  171. case BMC150_MAGN_REG_REP_Z:
  172. return true;
  173. default:
  174. return false;
  175. };
  176. }
  177. static bool bmc150_magn_is_volatile_reg(struct device *dev, unsigned int reg)
  178. {
  179. switch (reg) {
  180. case BMC150_MAGN_REG_X_L:
  181. case BMC150_MAGN_REG_X_M:
  182. case BMC150_MAGN_REG_Y_L:
  183. case BMC150_MAGN_REG_Y_M:
  184. case BMC150_MAGN_REG_Z_L:
  185. case BMC150_MAGN_REG_Z_M:
  186. case BMC150_MAGN_REG_RHALL_L:
  187. case BMC150_MAGN_REG_RHALL_M:
  188. case BMC150_MAGN_REG_INT_STATUS:
  189. return true;
  190. default:
  191. return false;
  192. }
  193. }
  194. const struct regmap_config bmc150_magn_regmap_config = {
  195. .reg_bits = 8,
  196. .val_bits = 8,
  197. .max_register = BMC150_MAGN_REG_TRIM_END,
  198. .cache_type = REGCACHE_RBTREE,
  199. .writeable_reg = bmc150_magn_is_writeable_reg,
  200. .volatile_reg = bmc150_magn_is_volatile_reg,
  201. };
  202. EXPORT_SYMBOL(bmc150_magn_regmap_config);
  203. static int bmc150_magn_set_power_mode(struct bmc150_magn_data *data,
  204. enum bmc150_magn_power_modes mode,
  205. bool state)
  206. {
  207. int ret;
  208. switch (mode) {
  209. case BMC150_MAGN_POWER_MODE_SUSPEND:
  210. ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_POWER,
  211. BMC150_MAGN_MASK_POWER_CTL, !state);
  212. if (ret < 0)
  213. return ret;
  214. usleep_range(BMC150_MAGN_START_UP_TIME_MS * 1000, 20000);
  215. return 0;
  216. case BMC150_MAGN_POWER_MODE_SLEEP:
  217. return regmap_update_bits(data->regmap,
  218. BMC150_MAGN_REG_OPMODE_ODR,
  219. BMC150_MAGN_MASK_OPMODE,
  220. BMC150_MAGN_MODE_SLEEP <<
  221. BMC150_MAGN_SHIFT_OPMODE);
  222. case BMC150_MAGN_POWER_MODE_NORMAL:
  223. return regmap_update_bits(data->regmap,
  224. BMC150_MAGN_REG_OPMODE_ODR,
  225. BMC150_MAGN_MASK_OPMODE,
  226. BMC150_MAGN_MODE_NORMAL <<
  227. BMC150_MAGN_SHIFT_OPMODE);
  228. }
  229. return -EINVAL;
  230. }
  231. static int bmc150_magn_set_power_state(struct bmc150_magn_data *data, bool on)
  232. {
  233. #ifdef CONFIG_PM
  234. int ret;
  235. if (on) {
  236. ret = pm_runtime_get_sync(data->dev);
  237. } else {
  238. pm_runtime_mark_last_busy(data->dev);
  239. ret = pm_runtime_put_autosuspend(data->dev);
  240. }
  241. if (ret < 0) {
  242. dev_err(data->dev,
  243. "failed to change power state to %d\n", on);
  244. if (on)
  245. pm_runtime_put_noidle(data->dev);
  246. return ret;
  247. }
  248. #endif
  249. return 0;
  250. }
  251. static int bmc150_magn_get_odr(struct bmc150_magn_data *data, int *val)
  252. {
  253. int ret, reg_val;
  254. u8 i, odr_val;
  255. ret = regmap_read(data->regmap, BMC150_MAGN_REG_OPMODE_ODR, &reg_val);
  256. if (ret < 0)
  257. return ret;
  258. odr_val = (reg_val & BMC150_MAGN_MASK_ODR) >> BMC150_MAGN_SHIFT_ODR;
  259. for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++)
  260. if (bmc150_magn_samp_freq_table[i].reg_val == odr_val) {
  261. *val = bmc150_magn_samp_freq_table[i].freq;
  262. return 0;
  263. }
  264. return -EINVAL;
  265. }
  266. static int bmc150_magn_set_odr(struct bmc150_magn_data *data, int val)
  267. {
  268. int ret;
  269. u8 i;
  270. for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
  271. if (bmc150_magn_samp_freq_table[i].freq == val) {
  272. ret = regmap_update_bits(data->regmap,
  273. BMC150_MAGN_REG_OPMODE_ODR,
  274. BMC150_MAGN_MASK_ODR,
  275. bmc150_magn_samp_freq_table[i].
  276. reg_val <<
  277. BMC150_MAGN_SHIFT_ODR);
  278. if (ret < 0)
  279. return ret;
  280. return 0;
  281. }
  282. }
  283. return -EINVAL;
  284. }
  285. static int bmc150_magn_set_max_odr(struct bmc150_magn_data *data, int rep_xy,
  286. int rep_z, int odr)
  287. {
  288. int ret, reg_val, max_odr;
  289. if (rep_xy <= 0) {
  290. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
  291. &reg_val);
  292. if (ret < 0)
  293. return ret;
  294. rep_xy = BMC150_MAGN_REGVAL_TO_REPXY(reg_val);
  295. }
  296. if (rep_z <= 0) {
  297. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
  298. &reg_val);
  299. if (ret < 0)
  300. return ret;
  301. rep_z = BMC150_MAGN_REGVAL_TO_REPZ(reg_val);
  302. }
  303. if (odr <= 0) {
  304. ret = bmc150_magn_get_odr(data, &odr);
  305. if (ret < 0)
  306. return ret;
  307. }
  308. /* the maximum selectable read-out frequency from datasheet */
  309. max_odr = 1000000 / (145 * rep_xy + 500 * rep_z + 980);
  310. if (odr > max_odr) {
  311. dev_err(data->dev,
  312. "Can't set oversampling with sampling freq %d\n",
  313. odr);
  314. return -EINVAL;
  315. }
  316. data->max_odr = max_odr;
  317. return 0;
  318. }
  319. static s32 bmc150_magn_compensate_x(struct bmc150_magn_trim_regs *tregs, s16 x,
  320. u16 rhall)
  321. {
  322. s16 val;
  323. u16 xyz1 = le16_to_cpu(tregs->xyz1);
  324. if (x == BMC150_MAGN_XY_OVERFLOW_VAL)
  325. return S32_MIN;
  326. if (!rhall)
  327. rhall = xyz1;
  328. val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
  329. val = ((s16)((((s32)x) * ((((((((s32)tregs->xy2) * ((((s32)val) *
  330. ((s32)val)) >> 7)) + (((s32)val) *
  331. ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
  332. ((s32)(((s16)tregs->x2) + ((s16)0xA0)))) >> 12)) >> 13)) +
  333. (((s16)tregs->x1) << 3);
  334. return (s32)val;
  335. }
  336. static s32 bmc150_magn_compensate_y(struct bmc150_magn_trim_regs *tregs, s16 y,
  337. u16 rhall)
  338. {
  339. s16 val;
  340. u16 xyz1 = le16_to_cpu(tregs->xyz1);
  341. if (y == BMC150_MAGN_XY_OVERFLOW_VAL)
  342. return S32_MIN;
  343. if (!rhall)
  344. rhall = xyz1;
  345. val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
  346. val = ((s16)((((s32)y) * ((((((((s32)tregs->xy2) * ((((s32)val) *
  347. ((s32)val)) >> 7)) + (((s32)val) *
  348. ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
  349. ((s32)(((s16)tregs->y2) + ((s16)0xA0)))) >> 12)) >> 13)) +
  350. (((s16)tregs->y1) << 3);
  351. return (s32)val;
  352. }
  353. static s32 bmc150_magn_compensate_z(struct bmc150_magn_trim_regs *tregs, s16 z,
  354. u16 rhall)
  355. {
  356. s32 val;
  357. u16 xyz1 = le16_to_cpu(tregs->xyz1);
  358. u16 z1 = le16_to_cpu(tregs->z1);
  359. s16 z2 = le16_to_cpu(tregs->z2);
  360. s16 z3 = le16_to_cpu(tregs->z3);
  361. s16 z4 = le16_to_cpu(tregs->z4);
  362. if (z == BMC150_MAGN_Z_OVERFLOW_VAL)
  363. return S32_MIN;
  364. val = (((((s32)(z - z4)) << 15) - ((((s32)z3) * ((s32)(((s16)rhall) -
  365. ((s16)xyz1)))) >> 2)) / (z2 + ((s16)(((((s32)z1) *
  366. ((((s16)rhall) << 1))) + (1 << 15)) >> 16))));
  367. return val;
  368. }
  369. static int bmc150_magn_read_xyz(struct bmc150_magn_data *data, s32 *buffer)
  370. {
  371. int ret;
  372. __le16 values[AXIS_XYZR_MAX];
  373. s16 raw_x, raw_y, raw_z;
  374. u16 rhall;
  375. struct bmc150_magn_trim_regs tregs;
  376. ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_X_L,
  377. values, sizeof(values));
  378. if (ret < 0)
  379. return ret;
  380. raw_x = (s16)le16_to_cpu(values[AXIS_X]) >> BMC150_MAGN_SHIFT_XY_L;
  381. raw_y = (s16)le16_to_cpu(values[AXIS_Y]) >> BMC150_MAGN_SHIFT_XY_L;
  382. raw_z = (s16)le16_to_cpu(values[AXIS_Z]) >> BMC150_MAGN_SHIFT_Z_L;
  383. rhall = le16_to_cpu(values[RHALL]) >> BMC150_MAGN_SHIFT_RHALL_L;
  384. ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_TRIM_START,
  385. &tregs, sizeof(tregs));
  386. if (ret < 0)
  387. return ret;
  388. buffer[AXIS_X] = bmc150_magn_compensate_x(&tregs, raw_x, rhall);
  389. buffer[AXIS_Y] = bmc150_magn_compensate_y(&tregs, raw_y, rhall);
  390. buffer[AXIS_Z] = bmc150_magn_compensate_z(&tregs, raw_z, rhall);
  391. return 0;
  392. }
  393. static int bmc150_magn_read_raw(struct iio_dev *indio_dev,
  394. struct iio_chan_spec const *chan,
  395. int *val, int *val2, long mask)
  396. {
  397. struct bmc150_magn_data *data = iio_priv(indio_dev);
  398. int ret, tmp;
  399. s32 values[AXIS_XYZ_MAX];
  400. switch (mask) {
  401. case IIO_CHAN_INFO_RAW:
  402. if (iio_buffer_enabled(indio_dev))
  403. return -EBUSY;
  404. mutex_lock(&data->mutex);
  405. ret = bmc150_magn_set_power_state(data, true);
  406. if (ret < 0) {
  407. mutex_unlock(&data->mutex);
  408. return ret;
  409. }
  410. ret = bmc150_magn_read_xyz(data, values);
  411. if (ret < 0) {
  412. bmc150_magn_set_power_state(data, false);
  413. mutex_unlock(&data->mutex);
  414. return ret;
  415. }
  416. *val = values[chan->scan_index];
  417. ret = bmc150_magn_set_power_state(data, false);
  418. if (ret < 0) {
  419. mutex_unlock(&data->mutex);
  420. return ret;
  421. }
  422. mutex_unlock(&data->mutex);
  423. return IIO_VAL_INT;
  424. case IIO_CHAN_INFO_SCALE:
  425. /*
  426. * The API/driver performs an off-chip temperature
  427. * compensation and outputs x/y/z magnetic field data in
  428. * 16 LSB/uT to the upper application layer.
  429. */
  430. *val = 0;
  431. *val2 = 625;
  432. return IIO_VAL_INT_PLUS_MICRO;
  433. case IIO_CHAN_INFO_SAMP_FREQ:
  434. ret = bmc150_magn_get_odr(data, val);
  435. if (ret < 0)
  436. return ret;
  437. return IIO_VAL_INT;
  438. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  439. switch (chan->channel2) {
  440. case IIO_MOD_X:
  441. case IIO_MOD_Y:
  442. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
  443. &tmp);
  444. if (ret < 0)
  445. return ret;
  446. *val = BMC150_MAGN_REGVAL_TO_REPXY(tmp);
  447. return IIO_VAL_INT;
  448. case IIO_MOD_Z:
  449. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
  450. &tmp);
  451. if (ret < 0)
  452. return ret;
  453. *val = BMC150_MAGN_REGVAL_TO_REPZ(tmp);
  454. return IIO_VAL_INT;
  455. default:
  456. return -EINVAL;
  457. }
  458. default:
  459. return -EINVAL;
  460. }
  461. }
  462. static int bmc150_magn_write_raw(struct iio_dev *indio_dev,
  463. struct iio_chan_spec const *chan,
  464. int val, int val2, long mask)
  465. {
  466. struct bmc150_magn_data *data = iio_priv(indio_dev);
  467. int ret;
  468. switch (mask) {
  469. case IIO_CHAN_INFO_SAMP_FREQ:
  470. if (val > data->max_odr)
  471. return -EINVAL;
  472. mutex_lock(&data->mutex);
  473. ret = bmc150_magn_set_odr(data, val);
  474. mutex_unlock(&data->mutex);
  475. return ret;
  476. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  477. switch (chan->channel2) {
  478. case IIO_MOD_X:
  479. case IIO_MOD_Y:
  480. if (val < 1 || val > 511)
  481. return -EINVAL;
  482. mutex_lock(&data->mutex);
  483. ret = bmc150_magn_set_max_odr(data, val, 0, 0);
  484. if (ret < 0) {
  485. mutex_unlock(&data->mutex);
  486. return ret;
  487. }
  488. ret = regmap_update_bits(data->regmap,
  489. BMC150_MAGN_REG_REP_XY,
  490. BMC150_MAGN_REG_REP_DATAMASK,
  491. BMC150_MAGN_REPXY_TO_REGVAL
  492. (val));
  493. mutex_unlock(&data->mutex);
  494. return ret;
  495. case IIO_MOD_Z:
  496. if (val < 1 || val > 256)
  497. return -EINVAL;
  498. mutex_lock(&data->mutex);
  499. ret = bmc150_magn_set_max_odr(data, 0, val, 0);
  500. if (ret < 0) {
  501. mutex_unlock(&data->mutex);
  502. return ret;
  503. }
  504. ret = regmap_update_bits(data->regmap,
  505. BMC150_MAGN_REG_REP_Z,
  506. BMC150_MAGN_REG_REP_DATAMASK,
  507. BMC150_MAGN_REPZ_TO_REGVAL
  508. (val));
  509. mutex_unlock(&data->mutex);
  510. return ret;
  511. default:
  512. return -EINVAL;
  513. }
  514. default:
  515. return -EINVAL;
  516. }
  517. }
  518. static ssize_t bmc150_magn_show_samp_freq_avail(struct device *dev,
  519. struct device_attribute *attr,
  520. char *buf)
  521. {
  522. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  523. struct bmc150_magn_data *data = iio_priv(indio_dev);
  524. size_t len = 0;
  525. u8 i;
  526. for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
  527. if (bmc150_magn_samp_freq_table[i].freq > data->max_odr)
  528. break;
  529. len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
  530. bmc150_magn_samp_freq_table[i].freq);
  531. }
  532. /* replace last space with a newline */
  533. buf[len - 1] = '\n';
  534. return len;
  535. }
  536. static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(bmc150_magn_show_samp_freq_avail);
  537. static struct attribute *bmc150_magn_attributes[] = {
  538. &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
  539. NULL,
  540. };
  541. static const struct attribute_group bmc150_magn_attrs_group = {
  542. .attrs = bmc150_magn_attributes,
  543. };
  544. #define BMC150_MAGN_CHANNEL(_axis) { \
  545. .type = IIO_MAGN, \
  546. .modified = 1, \
  547. .channel2 = IIO_MOD_##_axis, \
  548. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  549. BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
  550. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
  551. BIT(IIO_CHAN_INFO_SCALE), \
  552. .scan_index = AXIS_##_axis, \
  553. .scan_type = { \
  554. .sign = 's', \
  555. .realbits = 32, \
  556. .storagebits = 32, \
  557. .endianness = IIO_LE \
  558. }, \
  559. }
  560. static const struct iio_chan_spec bmc150_magn_channels[] = {
  561. BMC150_MAGN_CHANNEL(X),
  562. BMC150_MAGN_CHANNEL(Y),
  563. BMC150_MAGN_CHANNEL(Z),
  564. IIO_CHAN_SOFT_TIMESTAMP(3),
  565. };
  566. static const struct iio_info bmc150_magn_info = {
  567. .attrs = &bmc150_magn_attrs_group,
  568. .read_raw = bmc150_magn_read_raw,
  569. .write_raw = bmc150_magn_write_raw,
  570. };
  571. static const unsigned long bmc150_magn_scan_masks[] = {
  572. BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
  573. 0};
  574. static irqreturn_t bmc150_magn_trigger_handler(int irq, void *p)
  575. {
  576. struct iio_poll_func *pf = p;
  577. struct iio_dev *indio_dev = pf->indio_dev;
  578. struct bmc150_magn_data *data = iio_priv(indio_dev);
  579. int ret;
  580. mutex_lock(&data->mutex);
  581. ret = bmc150_magn_read_xyz(data, data->buffer);
  582. if (ret < 0)
  583. goto err;
  584. iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
  585. pf->timestamp);
  586. err:
  587. mutex_unlock(&data->mutex);
  588. iio_trigger_notify_done(indio_dev->trig);
  589. return IRQ_HANDLED;
  590. }
  591. static int bmc150_magn_init(struct bmc150_magn_data *data)
  592. {
  593. int ret, chip_id;
  594. struct bmc150_magn_preset preset;
  595. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND,
  596. false);
  597. if (ret < 0) {
  598. dev_err(data->dev,
  599. "Failed to bring up device from suspend mode\n");
  600. return ret;
  601. }
  602. ret = regmap_read(data->regmap, BMC150_MAGN_REG_CHIP_ID, &chip_id);
  603. if (ret < 0) {
  604. dev_err(data->dev, "Failed reading chip id\n");
  605. goto err_poweroff;
  606. }
  607. if (chip_id != BMC150_MAGN_CHIP_ID_VAL) {
  608. dev_err(data->dev, "Invalid chip id 0x%x\n", chip_id);
  609. ret = -ENODEV;
  610. goto err_poweroff;
  611. }
  612. dev_dbg(data->dev, "Chip id %x\n", chip_id);
  613. preset = bmc150_magn_presets_table[BMC150_MAGN_DEFAULT_PRESET];
  614. ret = bmc150_magn_set_odr(data, preset.odr);
  615. if (ret < 0) {
  616. dev_err(data->dev, "Failed to set ODR to %d\n",
  617. preset.odr);
  618. goto err_poweroff;
  619. }
  620. ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_XY,
  621. BMC150_MAGN_REPXY_TO_REGVAL(preset.rep_xy));
  622. if (ret < 0) {
  623. dev_err(data->dev, "Failed to set REP XY to %d\n",
  624. preset.rep_xy);
  625. goto err_poweroff;
  626. }
  627. ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_Z,
  628. BMC150_MAGN_REPZ_TO_REGVAL(preset.rep_z));
  629. if (ret < 0) {
  630. dev_err(data->dev, "Failed to set REP Z to %d\n",
  631. preset.rep_z);
  632. goto err_poweroff;
  633. }
  634. ret = bmc150_magn_set_max_odr(data, preset.rep_xy, preset.rep_z,
  635. preset.odr);
  636. if (ret < 0)
  637. goto err_poweroff;
  638. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
  639. true);
  640. if (ret < 0) {
  641. dev_err(data->dev, "Failed to power on device\n");
  642. goto err_poweroff;
  643. }
  644. return 0;
  645. err_poweroff:
  646. bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
  647. return ret;
  648. }
  649. static int bmc150_magn_reset_intr(struct bmc150_magn_data *data)
  650. {
  651. int tmp;
  652. /*
  653. * Data Ready (DRDY) is always cleared after
  654. * readout of data registers ends.
  655. */
  656. return regmap_read(data->regmap, BMC150_MAGN_REG_X_L, &tmp);
  657. }
  658. static int bmc150_magn_trig_try_reen(struct iio_trigger *trig)
  659. {
  660. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  661. struct bmc150_magn_data *data = iio_priv(indio_dev);
  662. int ret;
  663. if (!data->dready_trigger_on)
  664. return 0;
  665. mutex_lock(&data->mutex);
  666. ret = bmc150_magn_reset_intr(data);
  667. mutex_unlock(&data->mutex);
  668. return ret;
  669. }
  670. static int bmc150_magn_data_rdy_trigger_set_state(struct iio_trigger *trig,
  671. bool state)
  672. {
  673. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  674. struct bmc150_magn_data *data = iio_priv(indio_dev);
  675. int ret = 0;
  676. mutex_lock(&data->mutex);
  677. if (state == data->dready_trigger_on)
  678. goto err_unlock;
  679. ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_INT_DRDY,
  680. BMC150_MAGN_MASK_DRDY_EN,
  681. state << BMC150_MAGN_SHIFT_DRDY_EN);
  682. if (ret < 0)
  683. goto err_unlock;
  684. data->dready_trigger_on = state;
  685. if (state) {
  686. ret = bmc150_magn_reset_intr(data);
  687. if (ret < 0)
  688. goto err_unlock;
  689. }
  690. mutex_unlock(&data->mutex);
  691. return 0;
  692. err_unlock:
  693. mutex_unlock(&data->mutex);
  694. return ret;
  695. }
  696. static const struct iio_trigger_ops bmc150_magn_trigger_ops = {
  697. .set_trigger_state = bmc150_magn_data_rdy_trigger_set_state,
  698. .try_reenable = bmc150_magn_trig_try_reen,
  699. };
  700. static int bmc150_magn_buffer_preenable(struct iio_dev *indio_dev)
  701. {
  702. struct bmc150_magn_data *data = iio_priv(indio_dev);
  703. return bmc150_magn_set_power_state(data, true);
  704. }
  705. static int bmc150_magn_buffer_postdisable(struct iio_dev *indio_dev)
  706. {
  707. struct bmc150_magn_data *data = iio_priv(indio_dev);
  708. return bmc150_magn_set_power_state(data, false);
  709. }
  710. static const struct iio_buffer_setup_ops bmc150_magn_buffer_setup_ops = {
  711. .preenable = bmc150_magn_buffer_preenable,
  712. .postenable = iio_triggered_buffer_postenable,
  713. .predisable = iio_triggered_buffer_predisable,
  714. .postdisable = bmc150_magn_buffer_postdisable,
  715. };
  716. static const char *bmc150_magn_match_acpi_device(struct device *dev)
  717. {
  718. const struct acpi_device_id *id;
  719. id = acpi_match_device(dev->driver->acpi_match_table, dev);
  720. if (!id)
  721. return NULL;
  722. return dev_name(dev);
  723. }
  724. int bmc150_magn_probe(struct device *dev, struct regmap *regmap,
  725. int irq, const char *name)
  726. {
  727. struct bmc150_magn_data *data;
  728. struct iio_dev *indio_dev;
  729. int ret;
  730. indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
  731. if (!indio_dev)
  732. return -ENOMEM;
  733. data = iio_priv(indio_dev);
  734. dev_set_drvdata(dev, indio_dev);
  735. data->regmap = regmap;
  736. data->irq = irq;
  737. data->dev = dev;
  738. if (!name && ACPI_HANDLE(dev))
  739. name = bmc150_magn_match_acpi_device(dev);
  740. mutex_init(&data->mutex);
  741. ret = bmc150_magn_init(data);
  742. if (ret < 0)
  743. return ret;
  744. indio_dev->dev.parent = dev;
  745. indio_dev->channels = bmc150_magn_channels;
  746. indio_dev->num_channels = ARRAY_SIZE(bmc150_magn_channels);
  747. indio_dev->available_scan_masks = bmc150_magn_scan_masks;
  748. indio_dev->name = name;
  749. indio_dev->modes = INDIO_DIRECT_MODE;
  750. indio_dev->info = &bmc150_magn_info;
  751. if (irq > 0) {
  752. data->dready_trig = devm_iio_trigger_alloc(dev,
  753. "%s-dev%d",
  754. indio_dev->name,
  755. indio_dev->id);
  756. if (!data->dready_trig) {
  757. ret = -ENOMEM;
  758. dev_err(dev, "iio trigger alloc failed\n");
  759. goto err_poweroff;
  760. }
  761. data->dready_trig->dev.parent = dev;
  762. data->dready_trig->ops = &bmc150_magn_trigger_ops;
  763. iio_trigger_set_drvdata(data->dready_trig, indio_dev);
  764. ret = iio_trigger_register(data->dready_trig);
  765. if (ret) {
  766. dev_err(dev, "iio trigger register failed\n");
  767. goto err_poweroff;
  768. }
  769. ret = request_threaded_irq(irq,
  770. iio_trigger_generic_data_rdy_poll,
  771. NULL,
  772. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  773. BMC150_MAGN_IRQ_NAME,
  774. data->dready_trig);
  775. if (ret < 0) {
  776. dev_err(dev, "request irq %d failed\n", irq);
  777. goto err_trigger_unregister;
  778. }
  779. }
  780. ret = iio_triggered_buffer_setup(indio_dev,
  781. iio_pollfunc_store_time,
  782. bmc150_magn_trigger_handler,
  783. &bmc150_magn_buffer_setup_ops);
  784. if (ret < 0) {
  785. dev_err(dev, "iio triggered buffer setup failed\n");
  786. goto err_free_irq;
  787. }
  788. ret = pm_runtime_set_active(dev);
  789. if (ret)
  790. goto err_buffer_cleanup;
  791. pm_runtime_enable(dev);
  792. pm_runtime_set_autosuspend_delay(dev,
  793. BMC150_MAGN_AUTO_SUSPEND_DELAY_MS);
  794. pm_runtime_use_autosuspend(dev);
  795. ret = iio_device_register(indio_dev);
  796. if (ret < 0) {
  797. dev_err(dev, "unable to register iio device\n");
  798. goto err_buffer_cleanup;
  799. }
  800. dev_dbg(dev, "Registered device %s\n", name);
  801. return 0;
  802. err_buffer_cleanup:
  803. iio_triggered_buffer_cleanup(indio_dev);
  804. err_free_irq:
  805. if (irq > 0)
  806. free_irq(irq, data->dready_trig);
  807. err_trigger_unregister:
  808. if (data->dready_trig)
  809. iio_trigger_unregister(data->dready_trig);
  810. err_poweroff:
  811. bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
  812. return ret;
  813. }
  814. EXPORT_SYMBOL(bmc150_magn_probe);
  815. int bmc150_magn_remove(struct device *dev)
  816. {
  817. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  818. struct bmc150_magn_data *data = iio_priv(indio_dev);
  819. iio_device_unregister(indio_dev);
  820. pm_runtime_disable(dev);
  821. pm_runtime_set_suspended(dev);
  822. pm_runtime_put_noidle(dev);
  823. iio_triggered_buffer_cleanup(indio_dev);
  824. if (data->irq > 0)
  825. free_irq(data->irq, data->dready_trig);
  826. if (data->dready_trig)
  827. iio_trigger_unregister(data->dready_trig);
  828. mutex_lock(&data->mutex);
  829. bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
  830. mutex_unlock(&data->mutex);
  831. return 0;
  832. }
  833. EXPORT_SYMBOL(bmc150_magn_remove);
  834. #ifdef CONFIG_PM
  835. static int bmc150_magn_runtime_suspend(struct device *dev)
  836. {
  837. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  838. struct bmc150_magn_data *data = iio_priv(indio_dev);
  839. int ret;
  840. mutex_lock(&data->mutex);
  841. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
  842. true);
  843. mutex_unlock(&data->mutex);
  844. if (ret < 0) {
  845. dev_err(dev, "powering off device failed\n");
  846. return ret;
  847. }
  848. return 0;
  849. }
  850. /*
  851. * Should be called with data->mutex held.
  852. */
  853. static int bmc150_magn_runtime_resume(struct device *dev)
  854. {
  855. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  856. struct bmc150_magn_data *data = iio_priv(indio_dev);
  857. return bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
  858. true);
  859. }
  860. #endif
  861. #ifdef CONFIG_PM_SLEEP
  862. static int bmc150_magn_suspend(struct device *dev)
  863. {
  864. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  865. struct bmc150_magn_data *data = iio_priv(indio_dev);
  866. int ret;
  867. mutex_lock(&data->mutex);
  868. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
  869. true);
  870. mutex_unlock(&data->mutex);
  871. return ret;
  872. }
  873. static int bmc150_magn_resume(struct device *dev)
  874. {
  875. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  876. struct bmc150_magn_data *data = iio_priv(indio_dev);
  877. int ret;
  878. mutex_lock(&data->mutex);
  879. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
  880. true);
  881. mutex_unlock(&data->mutex);
  882. return ret;
  883. }
  884. #endif
  885. const struct dev_pm_ops bmc150_magn_pm_ops = {
  886. SET_SYSTEM_SLEEP_PM_OPS(bmc150_magn_suspend, bmc150_magn_resume)
  887. SET_RUNTIME_PM_OPS(bmc150_magn_runtime_suspend,
  888. bmc150_magn_runtime_resume, NULL)
  889. };
  890. EXPORT_SYMBOL(bmc150_magn_pm_ops);
  891. MODULE_AUTHOR("Irina Tirdea <irina.tirdea@intel.com>");
  892. MODULE_LICENSE("GPL v2");
  893. MODULE_DESCRIPTION("BMC150 magnetometer core driver");