st_uvis25_core.c 8.3 KB

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  1. /*
  2. * STMicroelectronics uvis25 sensor driver
  3. *
  4. * Copyright 2017 STMicroelectronics Inc.
  5. *
  6. * Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
  7. *
  8. * Licensed under the GPL-2.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/device.h>
  13. #include <linux/iio/sysfs.h>
  14. #include <linux/delay.h>
  15. #include <linux/pm.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/irqreturn.h>
  18. #include <linux/iio/trigger.h>
  19. #include <linux/iio/trigger_consumer.h>
  20. #include <linux/iio/triggered_buffer.h>
  21. #include <linux/iio/buffer.h>
  22. #include <linux/regmap.h>
  23. #include "st_uvis25.h"
  24. #define ST_UVIS25_REG_WHOAMI_ADDR 0x0f
  25. #define ST_UVIS25_REG_WHOAMI_VAL 0xca
  26. #define ST_UVIS25_REG_CTRL1_ADDR 0x20
  27. #define ST_UVIS25_REG_ODR_MASK BIT(0)
  28. #define ST_UVIS25_REG_BDU_MASK BIT(1)
  29. #define ST_UVIS25_REG_CTRL2_ADDR 0x21
  30. #define ST_UVIS25_REG_BOOT_MASK BIT(7)
  31. #define ST_UVIS25_REG_CTRL3_ADDR 0x22
  32. #define ST_UVIS25_REG_HL_MASK BIT(7)
  33. #define ST_UVIS25_REG_STATUS_ADDR 0x27
  34. #define ST_UVIS25_REG_UV_DA_MASK BIT(0)
  35. #define ST_UVIS25_REG_OUT_ADDR 0x28
  36. static const struct iio_chan_spec st_uvis25_channels[] = {
  37. {
  38. .type = IIO_UVINDEX,
  39. .address = ST_UVIS25_REG_OUT_ADDR,
  40. .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
  41. .scan_index = 0,
  42. .scan_type = {
  43. .sign = 'u',
  44. .realbits = 8,
  45. .storagebits = 8,
  46. },
  47. },
  48. IIO_CHAN_SOFT_TIMESTAMP(1),
  49. };
  50. static int st_uvis25_check_whoami(struct st_uvis25_hw *hw)
  51. {
  52. int err, data;
  53. err = regmap_read(hw->regmap, ST_UVIS25_REG_WHOAMI_ADDR, &data);
  54. if (err < 0) {
  55. dev_err(regmap_get_device(hw->regmap),
  56. "failed to read whoami register\n");
  57. return err;
  58. }
  59. if (data != ST_UVIS25_REG_WHOAMI_VAL) {
  60. dev_err(regmap_get_device(hw->regmap),
  61. "wrong whoami {%02x vs %02x}\n",
  62. data, ST_UVIS25_REG_WHOAMI_VAL);
  63. return -ENODEV;
  64. }
  65. return 0;
  66. }
  67. static int st_uvis25_set_enable(struct st_uvis25_hw *hw, bool enable)
  68. {
  69. int err;
  70. err = regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL1_ADDR,
  71. ST_UVIS25_REG_ODR_MASK, enable);
  72. if (err < 0)
  73. return err;
  74. hw->enabled = enable;
  75. return 0;
  76. }
  77. static int st_uvis25_read_oneshot(struct st_uvis25_hw *hw, u8 addr, int *val)
  78. {
  79. int err;
  80. err = st_uvis25_set_enable(hw, true);
  81. if (err < 0)
  82. return err;
  83. msleep(1500);
  84. /*
  85. * in order to avoid possible race conditions with interrupt
  86. * generation, disable the sensor first and then poll output
  87. * register. That sequence guarantees the interrupt will be reset
  88. * when irq line is unmasked
  89. */
  90. err = st_uvis25_set_enable(hw, false);
  91. if (err < 0)
  92. return err;
  93. err = regmap_read(hw->regmap, addr, val);
  94. return err < 0 ? err : IIO_VAL_INT;
  95. }
  96. static int st_uvis25_read_raw(struct iio_dev *iio_dev,
  97. struct iio_chan_spec const *ch,
  98. int *val, int *val2, long mask)
  99. {
  100. int ret;
  101. ret = iio_device_claim_direct_mode(iio_dev);
  102. if (ret)
  103. return ret;
  104. switch (mask) {
  105. case IIO_CHAN_INFO_PROCESSED: {
  106. struct st_uvis25_hw *hw = iio_priv(iio_dev);
  107. /*
  108. * mask irq line during oneshot read since the sensor
  109. * does not export the capability to disable data-ready line
  110. * in the register map and it is enabled by default.
  111. * If the line is unmasked during read_raw() it will be set
  112. * active and never reset since the trigger is disabled
  113. */
  114. if (hw->irq > 0)
  115. disable_irq(hw->irq);
  116. ret = st_uvis25_read_oneshot(hw, ch->address, val);
  117. if (hw->irq > 0)
  118. enable_irq(hw->irq);
  119. break;
  120. }
  121. default:
  122. ret = -EINVAL;
  123. break;
  124. }
  125. iio_device_release_direct_mode(iio_dev);
  126. return ret;
  127. }
  128. static irqreturn_t st_uvis25_trigger_handler_thread(int irq, void *private)
  129. {
  130. struct st_uvis25_hw *hw = private;
  131. int err, status;
  132. err = regmap_read(hw->regmap, ST_UVIS25_REG_STATUS_ADDR, &status);
  133. if (err < 0)
  134. return IRQ_HANDLED;
  135. if (!(status & ST_UVIS25_REG_UV_DA_MASK))
  136. return IRQ_NONE;
  137. iio_trigger_poll_chained(hw->trig);
  138. return IRQ_HANDLED;
  139. }
  140. static int st_uvis25_allocate_trigger(struct iio_dev *iio_dev)
  141. {
  142. struct st_uvis25_hw *hw = iio_priv(iio_dev);
  143. struct device *dev = regmap_get_device(hw->regmap);
  144. bool irq_active_low = false;
  145. unsigned long irq_type;
  146. int err;
  147. irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq));
  148. switch (irq_type) {
  149. case IRQF_TRIGGER_HIGH:
  150. case IRQF_TRIGGER_RISING:
  151. break;
  152. case IRQF_TRIGGER_LOW:
  153. case IRQF_TRIGGER_FALLING:
  154. irq_active_low = true;
  155. break;
  156. default:
  157. dev_info(dev, "mode %lx unsupported\n", irq_type);
  158. return -EINVAL;
  159. }
  160. err = regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL3_ADDR,
  161. ST_UVIS25_REG_HL_MASK, irq_active_low);
  162. if (err < 0)
  163. return err;
  164. err = devm_request_threaded_irq(dev, hw->irq, NULL,
  165. st_uvis25_trigger_handler_thread,
  166. irq_type | IRQF_ONESHOT,
  167. iio_dev->name, hw);
  168. if (err) {
  169. dev_err(dev, "failed to request trigger irq %d\n",
  170. hw->irq);
  171. return err;
  172. }
  173. hw->trig = devm_iio_trigger_alloc(dev, "%s-trigger",
  174. iio_dev->name);
  175. if (!hw->trig)
  176. return -ENOMEM;
  177. iio_trigger_set_drvdata(hw->trig, iio_dev);
  178. hw->trig->dev.parent = dev;
  179. return devm_iio_trigger_register(dev, hw->trig);
  180. }
  181. static int st_uvis25_buffer_preenable(struct iio_dev *iio_dev)
  182. {
  183. return st_uvis25_set_enable(iio_priv(iio_dev), true);
  184. }
  185. static int st_uvis25_buffer_postdisable(struct iio_dev *iio_dev)
  186. {
  187. return st_uvis25_set_enable(iio_priv(iio_dev), false);
  188. }
  189. static const struct iio_buffer_setup_ops st_uvis25_buffer_ops = {
  190. .preenable = st_uvis25_buffer_preenable,
  191. .postenable = iio_triggered_buffer_postenable,
  192. .predisable = iio_triggered_buffer_predisable,
  193. .postdisable = st_uvis25_buffer_postdisable,
  194. };
  195. static irqreturn_t st_uvis25_buffer_handler_thread(int irq, void *p)
  196. {
  197. u8 buffer[ALIGN(sizeof(u8), sizeof(s64)) + sizeof(s64)];
  198. struct iio_poll_func *pf = p;
  199. struct iio_dev *iio_dev = pf->indio_dev;
  200. struct st_uvis25_hw *hw = iio_priv(iio_dev);
  201. int err;
  202. err = regmap_read(hw->regmap, ST_UVIS25_REG_OUT_ADDR, (int *)buffer);
  203. if (err < 0)
  204. goto out;
  205. iio_push_to_buffers_with_timestamp(iio_dev, buffer,
  206. iio_get_time_ns(iio_dev));
  207. out:
  208. iio_trigger_notify_done(hw->trig);
  209. return IRQ_HANDLED;
  210. }
  211. static int st_uvis25_allocate_buffer(struct iio_dev *iio_dev)
  212. {
  213. struct st_uvis25_hw *hw = iio_priv(iio_dev);
  214. return devm_iio_triggered_buffer_setup(regmap_get_device(hw->regmap),
  215. iio_dev, NULL,
  216. st_uvis25_buffer_handler_thread,
  217. &st_uvis25_buffer_ops);
  218. }
  219. static const struct iio_info st_uvis25_info = {
  220. .read_raw = st_uvis25_read_raw,
  221. };
  222. static int st_uvis25_init_sensor(struct st_uvis25_hw *hw)
  223. {
  224. int err;
  225. err = regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL2_ADDR,
  226. ST_UVIS25_REG_BOOT_MASK, 1);
  227. if (err < 0)
  228. return err;
  229. msleep(2000);
  230. return regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL1_ADDR,
  231. ST_UVIS25_REG_BDU_MASK, 1);
  232. }
  233. int st_uvis25_probe(struct device *dev, int irq, struct regmap *regmap)
  234. {
  235. struct st_uvis25_hw *hw;
  236. struct iio_dev *iio_dev;
  237. int err;
  238. iio_dev = devm_iio_device_alloc(dev, sizeof(*hw));
  239. if (!iio_dev)
  240. return -ENOMEM;
  241. dev_set_drvdata(dev, (void *)iio_dev);
  242. hw = iio_priv(iio_dev);
  243. hw->irq = irq;
  244. hw->regmap = regmap;
  245. err = st_uvis25_check_whoami(hw);
  246. if (err < 0)
  247. return err;
  248. iio_dev->modes = INDIO_DIRECT_MODE;
  249. iio_dev->dev.parent = dev;
  250. iio_dev->channels = st_uvis25_channels;
  251. iio_dev->num_channels = ARRAY_SIZE(st_uvis25_channels);
  252. iio_dev->name = ST_UVIS25_DEV_NAME;
  253. iio_dev->info = &st_uvis25_info;
  254. err = st_uvis25_init_sensor(hw);
  255. if (err < 0)
  256. return err;
  257. if (hw->irq > 0) {
  258. err = st_uvis25_allocate_buffer(iio_dev);
  259. if (err < 0)
  260. return err;
  261. err = st_uvis25_allocate_trigger(iio_dev);
  262. if (err)
  263. return err;
  264. }
  265. return devm_iio_device_register(dev, iio_dev);
  266. }
  267. EXPORT_SYMBOL(st_uvis25_probe);
  268. static int __maybe_unused st_uvis25_suspend(struct device *dev)
  269. {
  270. struct iio_dev *iio_dev = dev_get_drvdata(dev);
  271. struct st_uvis25_hw *hw = iio_priv(iio_dev);
  272. return regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL1_ADDR,
  273. ST_UVIS25_REG_ODR_MASK, 0);
  274. }
  275. static int __maybe_unused st_uvis25_resume(struct device *dev)
  276. {
  277. struct iio_dev *iio_dev = dev_get_drvdata(dev);
  278. struct st_uvis25_hw *hw = iio_priv(iio_dev);
  279. if (hw->enabled)
  280. return regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL1_ADDR,
  281. ST_UVIS25_REG_ODR_MASK, 1);
  282. return 0;
  283. }
  284. const struct dev_pm_ops st_uvis25_pm_ops = {
  285. SET_SYSTEM_SLEEP_PM_OPS(st_uvis25_suspend, st_uvis25_resume)
  286. };
  287. EXPORT_SYMBOL(st_uvis25_pm_ops);
  288. MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>");
  289. MODULE_DESCRIPTION("STMicroelectronics uvis25 sensor driver");
  290. MODULE_LICENSE("GPL v2");