afe4404.c 17 KB

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  1. /*
  2. * AFE4404 Heart Rate Monitors and Low-Cost Pulse Oximeters
  3. *
  4. * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
  5. * Andrew F. Davis <afd@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. */
  16. #include <linux/device.h>
  17. #include <linux/err.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/i2c.h>
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/regmap.h>
  23. #include <linux/sysfs.h>
  24. #include <linux/regulator/consumer.h>
  25. #include <linux/iio/iio.h>
  26. #include <linux/iio/sysfs.h>
  27. #include <linux/iio/buffer.h>
  28. #include <linux/iio/trigger.h>
  29. #include <linux/iio/triggered_buffer.h>
  30. #include <linux/iio/trigger_consumer.h>
  31. #include "afe440x.h"
  32. #define AFE4404_DRIVER_NAME "afe4404"
  33. /* AFE4404 registers */
  34. #define AFE4404_TIA_GAIN_SEP 0x20
  35. #define AFE4404_TIA_GAIN 0x21
  36. #define AFE4404_PROG_TG_STC 0x34
  37. #define AFE4404_PROG_TG_ENDC 0x35
  38. #define AFE4404_LED3LEDSTC 0x36
  39. #define AFE4404_LED3LEDENDC 0x37
  40. #define AFE4404_CLKDIV_PRF 0x39
  41. #define AFE4404_OFFDAC 0x3a
  42. #define AFE4404_DEC 0x3d
  43. #define AFE4404_AVG_LED2_ALED2VAL 0x3f
  44. #define AFE4404_AVG_LED1_ALED1VAL 0x40
  45. /* AFE4404 CONTROL2 register fields */
  46. #define AFE440X_CONTROL2_OSC_ENABLE BIT(9)
  47. enum afe4404_fields {
  48. /* Gains */
  49. F_TIA_GAIN_SEP, F_TIA_CF_SEP,
  50. F_TIA_GAIN, TIA_CF,
  51. /* LED Current */
  52. F_ILED1, F_ILED2, F_ILED3,
  53. /* Offset DAC */
  54. F_OFFDAC_AMB2, F_OFFDAC_LED1, F_OFFDAC_AMB1, F_OFFDAC_LED2,
  55. /* sentinel */
  56. F_MAX_FIELDS
  57. };
  58. static const struct reg_field afe4404_reg_fields[] = {
  59. /* Gains */
  60. [F_TIA_GAIN_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 0, 2),
  61. [F_TIA_CF_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 3, 5),
  62. [F_TIA_GAIN] = REG_FIELD(AFE4404_TIA_GAIN, 0, 2),
  63. [TIA_CF] = REG_FIELD(AFE4404_TIA_GAIN, 3, 5),
  64. /* LED Current */
  65. [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 5),
  66. [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 6, 11),
  67. [F_ILED3] = REG_FIELD(AFE440X_LEDCNTRL, 12, 17),
  68. /* Offset DAC */
  69. [F_OFFDAC_AMB2] = REG_FIELD(AFE4404_OFFDAC, 0, 4),
  70. [F_OFFDAC_LED1] = REG_FIELD(AFE4404_OFFDAC, 5, 9),
  71. [F_OFFDAC_AMB1] = REG_FIELD(AFE4404_OFFDAC, 10, 14),
  72. [F_OFFDAC_LED2] = REG_FIELD(AFE4404_OFFDAC, 15, 19),
  73. };
  74. /**
  75. * struct afe4404_data - AFE4404 device instance data
  76. * @dev: Device structure
  77. * @regmap: Register map of the device
  78. * @fields: Register fields of the device
  79. * @regulator: Pointer to the regulator for the IC
  80. * @trig: IIO trigger for this device
  81. * @irq: ADC_RDY line interrupt number
  82. */
  83. struct afe4404_data {
  84. struct device *dev;
  85. struct regmap *regmap;
  86. struct regmap_field *fields[F_MAX_FIELDS];
  87. struct regulator *regulator;
  88. struct iio_trigger *trig;
  89. int irq;
  90. };
  91. enum afe4404_chan_id {
  92. LED2 = 1,
  93. ALED2,
  94. LED1,
  95. ALED1,
  96. LED2_ALED2,
  97. LED1_ALED1,
  98. };
  99. static const unsigned int afe4404_channel_values[] = {
  100. [LED2] = AFE440X_LED2VAL,
  101. [ALED2] = AFE440X_ALED2VAL,
  102. [LED1] = AFE440X_LED1VAL,
  103. [ALED1] = AFE440X_ALED1VAL,
  104. [LED2_ALED2] = AFE440X_LED2_ALED2VAL,
  105. [LED1_ALED1] = AFE440X_LED1_ALED1VAL,
  106. };
  107. static const unsigned int afe4404_channel_leds[] = {
  108. [LED2] = F_ILED2,
  109. [ALED2] = F_ILED3,
  110. [LED1] = F_ILED1,
  111. };
  112. static const unsigned int afe4404_channel_offdacs[] = {
  113. [LED2] = F_OFFDAC_LED2,
  114. [ALED2] = F_OFFDAC_AMB2,
  115. [LED1] = F_OFFDAC_LED1,
  116. [ALED1] = F_OFFDAC_AMB1,
  117. };
  118. static const struct iio_chan_spec afe4404_channels[] = {
  119. /* ADC values */
  120. AFE440X_INTENSITY_CHAN(LED2, BIT(IIO_CHAN_INFO_OFFSET)),
  121. AFE440X_INTENSITY_CHAN(ALED2, BIT(IIO_CHAN_INFO_OFFSET)),
  122. AFE440X_INTENSITY_CHAN(LED1, BIT(IIO_CHAN_INFO_OFFSET)),
  123. AFE440X_INTENSITY_CHAN(ALED1, BIT(IIO_CHAN_INFO_OFFSET)),
  124. AFE440X_INTENSITY_CHAN(LED2_ALED2, 0),
  125. AFE440X_INTENSITY_CHAN(LED1_ALED1, 0),
  126. /* LED current */
  127. AFE440X_CURRENT_CHAN(LED2),
  128. AFE440X_CURRENT_CHAN(ALED2),
  129. AFE440X_CURRENT_CHAN(LED1),
  130. };
  131. static const struct afe440x_val_table afe4404_res_table[] = {
  132. { .integer = 500000, .fract = 0 },
  133. { .integer = 250000, .fract = 0 },
  134. { .integer = 100000, .fract = 0 },
  135. { .integer = 50000, .fract = 0 },
  136. { .integer = 25000, .fract = 0 },
  137. { .integer = 10000, .fract = 0 },
  138. { .integer = 1000000, .fract = 0 },
  139. { .integer = 2000000, .fract = 0 },
  140. };
  141. AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4404_res_table);
  142. static const struct afe440x_val_table afe4404_cap_table[] = {
  143. { .integer = 0, .fract = 5000 },
  144. { .integer = 0, .fract = 2500 },
  145. { .integer = 0, .fract = 10000 },
  146. { .integer = 0, .fract = 7500 },
  147. { .integer = 0, .fract = 20000 },
  148. { .integer = 0, .fract = 17500 },
  149. { .integer = 0, .fract = 25000 },
  150. { .integer = 0, .fract = 22500 },
  151. };
  152. AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4404_cap_table);
  153. static ssize_t afe440x_show_register(struct device *dev,
  154. struct device_attribute *attr,
  155. char *buf)
  156. {
  157. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  158. struct afe4404_data *afe = iio_priv(indio_dev);
  159. struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
  160. unsigned int reg_val;
  161. int vals[2];
  162. int ret;
  163. ret = regmap_field_read(afe->fields[afe440x_attr->field], &reg_val);
  164. if (ret)
  165. return ret;
  166. if (reg_val >= afe440x_attr->table_size)
  167. return -EINVAL;
  168. vals[0] = afe440x_attr->val_table[reg_val].integer;
  169. vals[1] = afe440x_attr->val_table[reg_val].fract;
  170. return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals);
  171. }
  172. static ssize_t afe440x_store_register(struct device *dev,
  173. struct device_attribute *attr,
  174. const char *buf, size_t count)
  175. {
  176. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  177. struct afe4404_data *afe = iio_priv(indio_dev);
  178. struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
  179. int val, integer, fract, ret;
  180. ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract);
  181. if (ret)
  182. return ret;
  183. for (val = 0; val < afe440x_attr->table_size; val++)
  184. if (afe440x_attr->val_table[val].integer == integer &&
  185. afe440x_attr->val_table[val].fract == fract)
  186. break;
  187. if (val == afe440x_attr->table_size)
  188. return -EINVAL;
  189. ret = regmap_field_write(afe->fields[afe440x_attr->field], val);
  190. if (ret)
  191. return ret;
  192. return count;
  193. }
  194. static AFE440X_ATTR(in_intensity1_resistance, F_TIA_GAIN_SEP, afe4404_res_table);
  195. static AFE440X_ATTR(in_intensity1_capacitance, F_TIA_CF_SEP, afe4404_cap_table);
  196. static AFE440X_ATTR(in_intensity2_resistance, F_TIA_GAIN_SEP, afe4404_res_table);
  197. static AFE440X_ATTR(in_intensity2_capacitance, F_TIA_CF_SEP, afe4404_cap_table);
  198. static AFE440X_ATTR(in_intensity3_resistance, F_TIA_GAIN, afe4404_res_table);
  199. static AFE440X_ATTR(in_intensity3_capacitance, TIA_CF, afe4404_cap_table);
  200. static AFE440X_ATTR(in_intensity4_resistance, F_TIA_GAIN, afe4404_res_table);
  201. static AFE440X_ATTR(in_intensity4_capacitance, TIA_CF, afe4404_cap_table);
  202. static struct attribute *afe440x_attributes[] = {
  203. &dev_attr_in_intensity_resistance_available.attr,
  204. &dev_attr_in_intensity_capacitance_available.attr,
  205. &afe440x_attr_in_intensity1_resistance.dev_attr.attr,
  206. &afe440x_attr_in_intensity1_capacitance.dev_attr.attr,
  207. &afe440x_attr_in_intensity2_resistance.dev_attr.attr,
  208. &afe440x_attr_in_intensity2_capacitance.dev_attr.attr,
  209. &afe440x_attr_in_intensity3_resistance.dev_attr.attr,
  210. &afe440x_attr_in_intensity3_capacitance.dev_attr.attr,
  211. &afe440x_attr_in_intensity4_resistance.dev_attr.attr,
  212. &afe440x_attr_in_intensity4_capacitance.dev_attr.attr,
  213. NULL
  214. };
  215. static const struct attribute_group afe440x_attribute_group = {
  216. .attrs = afe440x_attributes
  217. };
  218. static int afe4404_read_raw(struct iio_dev *indio_dev,
  219. struct iio_chan_spec const *chan,
  220. int *val, int *val2, long mask)
  221. {
  222. struct afe4404_data *afe = iio_priv(indio_dev);
  223. unsigned int value_reg = afe4404_channel_values[chan->address];
  224. unsigned int led_field = afe4404_channel_leds[chan->address];
  225. unsigned int offdac_field = afe4404_channel_offdacs[chan->address];
  226. int ret;
  227. switch (chan->type) {
  228. case IIO_INTENSITY:
  229. switch (mask) {
  230. case IIO_CHAN_INFO_RAW:
  231. ret = regmap_read(afe->regmap, value_reg, val);
  232. if (ret)
  233. return ret;
  234. return IIO_VAL_INT;
  235. case IIO_CHAN_INFO_OFFSET:
  236. ret = regmap_field_read(afe->fields[offdac_field], val);
  237. if (ret)
  238. return ret;
  239. return IIO_VAL_INT;
  240. }
  241. break;
  242. case IIO_CURRENT:
  243. switch (mask) {
  244. case IIO_CHAN_INFO_RAW:
  245. ret = regmap_field_read(afe->fields[led_field], val);
  246. if (ret)
  247. return ret;
  248. return IIO_VAL_INT;
  249. case IIO_CHAN_INFO_SCALE:
  250. *val = 0;
  251. *val2 = 800000;
  252. return IIO_VAL_INT_PLUS_MICRO;
  253. }
  254. break;
  255. default:
  256. break;
  257. }
  258. return -EINVAL;
  259. }
  260. static int afe4404_write_raw(struct iio_dev *indio_dev,
  261. struct iio_chan_spec const *chan,
  262. int val, int val2, long mask)
  263. {
  264. struct afe4404_data *afe = iio_priv(indio_dev);
  265. unsigned int led_field = afe4404_channel_leds[chan->address];
  266. unsigned int offdac_field = afe4404_channel_offdacs[chan->address];
  267. switch (chan->type) {
  268. case IIO_INTENSITY:
  269. switch (mask) {
  270. case IIO_CHAN_INFO_OFFSET:
  271. return regmap_field_write(afe->fields[offdac_field], val);
  272. }
  273. break;
  274. case IIO_CURRENT:
  275. switch (mask) {
  276. case IIO_CHAN_INFO_RAW:
  277. return regmap_field_write(afe->fields[led_field], val);
  278. }
  279. break;
  280. default:
  281. break;
  282. }
  283. return -EINVAL;
  284. }
  285. static const struct iio_info afe4404_iio_info = {
  286. .attrs = &afe440x_attribute_group,
  287. .read_raw = afe4404_read_raw,
  288. .write_raw = afe4404_write_raw,
  289. };
  290. static irqreturn_t afe4404_trigger_handler(int irq, void *private)
  291. {
  292. struct iio_poll_func *pf = private;
  293. struct iio_dev *indio_dev = pf->indio_dev;
  294. struct afe4404_data *afe = iio_priv(indio_dev);
  295. int ret, bit, i = 0;
  296. s32 buffer[10];
  297. for_each_set_bit(bit, indio_dev->active_scan_mask,
  298. indio_dev->masklength) {
  299. ret = regmap_read(afe->regmap, afe4404_channel_values[bit],
  300. &buffer[i++]);
  301. if (ret)
  302. goto err;
  303. }
  304. iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp);
  305. err:
  306. iio_trigger_notify_done(indio_dev->trig);
  307. return IRQ_HANDLED;
  308. }
  309. static const struct iio_trigger_ops afe4404_trigger_ops = {
  310. };
  311. /* Default timings from data-sheet */
  312. #define AFE4404_TIMING_PAIRS \
  313. { AFE440X_PRPCOUNT, 39999 }, \
  314. { AFE440X_LED2LEDSTC, 0 }, \
  315. { AFE440X_LED2LEDENDC, 398 }, \
  316. { AFE440X_LED2STC, 80 }, \
  317. { AFE440X_LED2ENDC, 398 }, \
  318. { AFE440X_ADCRSTSTCT0, 5600 }, \
  319. { AFE440X_ADCRSTENDCT0, 5606 }, \
  320. { AFE440X_LED2CONVST, 5607 }, \
  321. { AFE440X_LED2CONVEND, 6066 }, \
  322. { AFE4404_LED3LEDSTC, 400 }, \
  323. { AFE4404_LED3LEDENDC, 798 }, \
  324. { AFE440X_ALED2STC, 480 }, \
  325. { AFE440X_ALED2ENDC, 798 }, \
  326. { AFE440X_ADCRSTSTCT1, 6068 }, \
  327. { AFE440X_ADCRSTENDCT1, 6074 }, \
  328. { AFE440X_ALED2CONVST, 6075 }, \
  329. { AFE440X_ALED2CONVEND, 6534 }, \
  330. { AFE440X_LED1LEDSTC, 800 }, \
  331. { AFE440X_LED1LEDENDC, 1198 }, \
  332. { AFE440X_LED1STC, 880 }, \
  333. { AFE440X_LED1ENDC, 1198 }, \
  334. { AFE440X_ADCRSTSTCT2, 6536 }, \
  335. { AFE440X_ADCRSTENDCT2, 6542 }, \
  336. { AFE440X_LED1CONVST, 6543 }, \
  337. { AFE440X_LED1CONVEND, 7003 }, \
  338. { AFE440X_ALED1STC, 1280 }, \
  339. { AFE440X_ALED1ENDC, 1598 }, \
  340. { AFE440X_ADCRSTSTCT3, 7005 }, \
  341. { AFE440X_ADCRSTENDCT3, 7011 }, \
  342. { AFE440X_ALED1CONVST, 7012 }, \
  343. { AFE440X_ALED1CONVEND, 7471 }, \
  344. { AFE440X_PDNCYCLESTC, 7671 }, \
  345. { AFE440X_PDNCYCLEENDC, 39199 }
  346. static const struct reg_sequence afe4404_reg_sequences[] = {
  347. AFE4404_TIMING_PAIRS,
  348. { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN },
  349. { AFE4404_TIA_GAIN_SEP, AFE440X_TIAGAIN_ENSEPGAIN },
  350. { AFE440X_CONTROL2, AFE440X_CONTROL2_OSC_ENABLE },
  351. };
  352. static const struct regmap_range afe4404_yes_ranges[] = {
  353. regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL),
  354. regmap_reg_range(AFE4404_AVG_LED2_ALED2VAL, AFE4404_AVG_LED1_ALED1VAL),
  355. };
  356. static const struct regmap_access_table afe4404_volatile_table = {
  357. .yes_ranges = afe4404_yes_ranges,
  358. .n_yes_ranges = ARRAY_SIZE(afe4404_yes_ranges),
  359. };
  360. static const struct regmap_config afe4404_regmap_config = {
  361. .reg_bits = 8,
  362. .val_bits = 24,
  363. .max_register = AFE4404_AVG_LED1_ALED1VAL,
  364. .cache_type = REGCACHE_RBTREE,
  365. .volatile_table = &afe4404_volatile_table,
  366. };
  367. static const struct of_device_id afe4404_of_match[] = {
  368. { .compatible = "ti,afe4404", },
  369. { /* sentinel */ }
  370. };
  371. MODULE_DEVICE_TABLE(of, afe4404_of_match);
  372. static int __maybe_unused afe4404_suspend(struct device *dev)
  373. {
  374. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  375. struct afe4404_data *afe = iio_priv(indio_dev);
  376. int ret;
  377. ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
  378. AFE440X_CONTROL2_PDN_AFE,
  379. AFE440X_CONTROL2_PDN_AFE);
  380. if (ret)
  381. return ret;
  382. ret = regulator_disable(afe->regulator);
  383. if (ret) {
  384. dev_err(dev, "Unable to disable regulator\n");
  385. return ret;
  386. }
  387. return 0;
  388. }
  389. static int __maybe_unused afe4404_resume(struct device *dev)
  390. {
  391. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  392. struct afe4404_data *afe = iio_priv(indio_dev);
  393. int ret;
  394. ret = regulator_enable(afe->regulator);
  395. if (ret) {
  396. dev_err(dev, "Unable to enable regulator\n");
  397. return ret;
  398. }
  399. ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
  400. AFE440X_CONTROL2_PDN_AFE, 0);
  401. if (ret)
  402. return ret;
  403. return 0;
  404. }
  405. static SIMPLE_DEV_PM_OPS(afe4404_pm_ops, afe4404_suspend, afe4404_resume);
  406. static int afe4404_probe(struct i2c_client *client,
  407. const struct i2c_device_id *id)
  408. {
  409. struct iio_dev *indio_dev;
  410. struct afe4404_data *afe;
  411. int i, ret;
  412. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*afe));
  413. if (!indio_dev)
  414. return -ENOMEM;
  415. afe = iio_priv(indio_dev);
  416. i2c_set_clientdata(client, indio_dev);
  417. afe->dev = &client->dev;
  418. afe->irq = client->irq;
  419. afe->regmap = devm_regmap_init_i2c(client, &afe4404_regmap_config);
  420. if (IS_ERR(afe->regmap)) {
  421. dev_err(afe->dev, "Unable to allocate register map\n");
  422. return PTR_ERR(afe->regmap);
  423. }
  424. for (i = 0; i < F_MAX_FIELDS; i++) {
  425. afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap,
  426. afe4404_reg_fields[i]);
  427. if (IS_ERR(afe->fields[i])) {
  428. dev_err(afe->dev, "Unable to allocate regmap fields\n");
  429. return PTR_ERR(afe->fields[i]);
  430. }
  431. }
  432. afe->regulator = devm_regulator_get(afe->dev, "tx_sup");
  433. if (IS_ERR(afe->regulator)) {
  434. dev_err(afe->dev, "Unable to get regulator\n");
  435. return PTR_ERR(afe->regulator);
  436. }
  437. ret = regulator_enable(afe->regulator);
  438. if (ret) {
  439. dev_err(afe->dev, "Unable to enable regulator\n");
  440. return ret;
  441. }
  442. ret = regmap_write(afe->regmap, AFE440X_CONTROL0,
  443. AFE440X_CONTROL0_SW_RESET);
  444. if (ret) {
  445. dev_err(afe->dev, "Unable to reset device\n");
  446. goto disable_reg;
  447. }
  448. ret = regmap_multi_reg_write(afe->regmap, afe4404_reg_sequences,
  449. ARRAY_SIZE(afe4404_reg_sequences));
  450. if (ret) {
  451. dev_err(afe->dev, "Unable to set register defaults\n");
  452. goto disable_reg;
  453. }
  454. indio_dev->modes = INDIO_DIRECT_MODE;
  455. indio_dev->dev.parent = afe->dev;
  456. indio_dev->channels = afe4404_channels;
  457. indio_dev->num_channels = ARRAY_SIZE(afe4404_channels);
  458. indio_dev->name = AFE4404_DRIVER_NAME;
  459. indio_dev->info = &afe4404_iio_info;
  460. if (afe->irq > 0) {
  461. afe->trig = devm_iio_trigger_alloc(afe->dev,
  462. "%s-dev%d",
  463. indio_dev->name,
  464. indio_dev->id);
  465. if (!afe->trig) {
  466. dev_err(afe->dev, "Unable to allocate IIO trigger\n");
  467. ret = -ENOMEM;
  468. goto disable_reg;
  469. }
  470. iio_trigger_set_drvdata(afe->trig, indio_dev);
  471. afe->trig->ops = &afe4404_trigger_ops;
  472. afe->trig->dev.parent = afe->dev;
  473. ret = iio_trigger_register(afe->trig);
  474. if (ret) {
  475. dev_err(afe->dev, "Unable to register IIO trigger\n");
  476. goto disable_reg;
  477. }
  478. ret = devm_request_threaded_irq(afe->dev, afe->irq,
  479. iio_trigger_generic_data_rdy_poll,
  480. NULL, IRQF_ONESHOT,
  481. AFE4404_DRIVER_NAME,
  482. afe->trig);
  483. if (ret) {
  484. dev_err(afe->dev, "Unable to request IRQ\n");
  485. goto disable_reg;
  486. }
  487. }
  488. ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
  489. afe4404_trigger_handler, NULL);
  490. if (ret) {
  491. dev_err(afe->dev, "Unable to setup buffer\n");
  492. goto unregister_trigger;
  493. }
  494. ret = iio_device_register(indio_dev);
  495. if (ret) {
  496. dev_err(afe->dev, "Unable to register IIO device\n");
  497. goto unregister_triggered_buffer;
  498. }
  499. return 0;
  500. unregister_triggered_buffer:
  501. iio_triggered_buffer_cleanup(indio_dev);
  502. unregister_trigger:
  503. if (afe->irq > 0)
  504. iio_trigger_unregister(afe->trig);
  505. disable_reg:
  506. regulator_disable(afe->regulator);
  507. return ret;
  508. }
  509. static int afe4404_remove(struct i2c_client *client)
  510. {
  511. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  512. struct afe4404_data *afe = iio_priv(indio_dev);
  513. int ret;
  514. iio_device_unregister(indio_dev);
  515. iio_triggered_buffer_cleanup(indio_dev);
  516. if (afe->irq > 0)
  517. iio_trigger_unregister(afe->trig);
  518. ret = regulator_disable(afe->regulator);
  519. if (ret) {
  520. dev_err(afe->dev, "Unable to disable regulator\n");
  521. return ret;
  522. }
  523. return 0;
  524. }
  525. static const struct i2c_device_id afe4404_ids[] = {
  526. { "afe4404", 0 },
  527. { /* sentinel */ }
  528. };
  529. MODULE_DEVICE_TABLE(i2c, afe4404_ids);
  530. static struct i2c_driver afe4404_i2c_driver = {
  531. .driver = {
  532. .name = AFE4404_DRIVER_NAME,
  533. .of_match_table = afe4404_of_match,
  534. .pm = &afe4404_pm_ops,
  535. },
  536. .probe = afe4404_probe,
  537. .remove = afe4404_remove,
  538. .id_table = afe4404_ids,
  539. };
  540. module_i2c_driver(afe4404_i2c_driver);
  541. MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
  542. MODULE_DESCRIPTION("TI AFE4404 Heart Rate Monitor and Pulse Oximeter AFE");
  543. MODULE_LICENSE("GPL v2");