axp20x_adc.c 19 KB

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  1. /* ADC driver for AXP20X and AXP22X PMICs
  2. *
  3. * Copyright (c) 2016 Free Electrons NextThing Co.
  4. * Quentin Schulz <quentin.schulz@free-electrons.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it under
  7. * the terms of the GNU General Public License version 2 as published by the
  8. * Free Software Foundation.
  9. */
  10. #include <linux/completion.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/io.h>
  13. #include <linux/module.h>
  14. #include <linux/of.h>
  15. #include <linux/of_device.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/pm_runtime.h>
  18. #include <linux/regmap.h>
  19. #include <linux/thermal.h>
  20. #include <linux/iio/iio.h>
  21. #include <linux/iio/driver.h>
  22. #include <linux/iio/machine.h>
  23. #include <linux/mfd/axp20x.h>
  24. #define AXP20X_ADC_EN1_MASK GENMASK(7, 0)
  25. #define AXP20X_ADC_EN2_MASK (GENMASK(3, 2) | BIT(7))
  26. #define AXP22X_ADC_EN1_MASK (GENMASK(7, 5) | BIT(0))
  27. #define AXP20X_GPIO10_IN_RANGE_GPIO0 BIT(0)
  28. #define AXP20X_GPIO10_IN_RANGE_GPIO1 BIT(1)
  29. #define AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(x) ((x) & BIT(0))
  30. #define AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(x) (((x) & BIT(0)) << 1)
  31. #define AXP20X_ADC_RATE_MASK GENMASK(7, 6)
  32. #define AXP813_V_I_ADC_RATE_MASK GENMASK(5, 4)
  33. #define AXP813_ADC_RATE_MASK (AXP20X_ADC_RATE_MASK | AXP813_V_I_ADC_RATE_MASK)
  34. #define AXP20X_ADC_RATE_HZ(x) ((ilog2((x) / 25) << 6) & AXP20X_ADC_RATE_MASK)
  35. #define AXP22X_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 6) & AXP20X_ADC_RATE_MASK)
  36. #define AXP813_TS_GPIO0_ADC_RATE_HZ(x) AXP20X_ADC_RATE_HZ(x)
  37. #define AXP813_V_I_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 4) & AXP813_V_I_ADC_RATE_MASK)
  38. #define AXP813_ADC_RATE_HZ(x) (AXP20X_ADC_RATE_HZ(x) | AXP813_V_I_ADC_RATE_HZ(x))
  39. #define AXP20X_ADC_CHANNEL(_channel, _name, _type, _reg) \
  40. { \
  41. .type = _type, \
  42. .indexed = 1, \
  43. .channel = _channel, \
  44. .address = _reg, \
  45. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  46. BIT(IIO_CHAN_INFO_SCALE), \
  47. .datasheet_name = _name, \
  48. }
  49. #define AXP20X_ADC_CHANNEL_OFFSET(_channel, _name, _type, _reg) \
  50. { \
  51. .type = _type, \
  52. .indexed = 1, \
  53. .channel = _channel, \
  54. .address = _reg, \
  55. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  56. BIT(IIO_CHAN_INFO_SCALE) |\
  57. BIT(IIO_CHAN_INFO_OFFSET),\
  58. .datasheet_name = _name, \
  59. }
  60. struct axp_data;
  61. struct axp20x_adc_iio {
  62. struct regmap *regmap;
  63. struct axp_data *data;
  64. };
  65. enum axp20x_adc_channel_v {
  66. AXP20X_ACIN_V = 0,
  67. AXP20X_VBUS_V,
  68. AXP20X_TS_IN,
  69. AXP20X_GPIO0_V,
  70. AXP20X_GPIO1_V,
  71. AXP20X_IPSOUT_V,
  72. AXP20X_BATT_V,
  73. };
  74. enum axp20x_adc_channel_i {
  75. AXP20X_ACIN_I = 0,
  76. AXP20X_VBUS_I,
  77. AXP20X_BATT_CHRG_I,
  78. AXP20X_BATT_DISCHRG_I,
  79. };
  80. enum axp22x_adc_channel_v {
  81. AXP22X_TS_IN = 0,
  82. AXP22X_BATT_V,
  83. };
  84. enum axp22x_adc_channel_i {
  85. AXP22X_BATT_CHRG_I = 1,
  86. AXP22X_BATT_DISCHRG_I,
  87. };
  88. enum axp813_adc_channel_v {
  89. AXP813_TS_IN = 0,
  90. AXP813_GPIO0_V,
  91. AXP813_BATT_V,
  92. };
  93. static struct iio_map axp20x_maps[] = {
  94. {
  95. .consumer_dev_name = "axp20x-usb-power-supply",
  96. .consumer_channel = "vbus_v",
  97. .adc_channel_label = "vbus_v",
  98. }, {
  99. .consumer_dev_name = "axp20x-usb-power-supply",
  100. .consumer_channel = "vbus_i",
  101. .adc_channel_label = "vbus_i",
  102. }, {
  103. .consumer_dev_name = "axp20x-ac-power-supply",
  104. .consumer_channel = "acin_v",
  105. .adc_channel_label = "acin_v",
  106. }, {
  107. .consumer_dev_name = "axp20x-ac-power-supply",
  108. .consumer_channel = "acin_i",
  109. .adc_channel_label = "acin_i",
  110. }, {
  111. .consumer_dev_name = "axp20x-battery-power-supply",
  112. .consumer_channel = "batt_v",
  113. .adc_channel_label = "batt_v",
  114. }, {
  115. .consumer_dev_name = "axp20x-battery-power-supply",
  116. .consumer_channel = "batt_chrg_i",
  117. .adc_channel_label = "batt_chrg_i",
  118. }, {
  119. .consumer_dev_name = "axp20x-battery-power-supply",
  120. .consumer_channel = "batt_dischrg_i",
  121. .adc_channel_label = "batt_dischrg_i",
  122. }, { /* sentinel */ }
  123. };
  124. static struct iio_map axp22x_maps[] = {
  125. {
  126. .consumer_dev_name = "axp20x-battery-power-supply",
  127. .consumer_channel = "batt_v",
  128. .adc_channel_label = "batt_v",
  129. }, {
  130. .consumer_dev_name = "axp20x-battery-power-supply",
  131. .consumer_channel = "batt_chrg_i",
  132. .adc_channel_label = "batt_chrg_i",
  133. }, {
  134. .consumer_dev_name = "axp20x-battery-power-supply",
  135. .consumer_channel = "batt_dischrg_i",
  136. .adc_channel_label = "batt_dischrg_i",
  137. }, { /* sentinel */ }
  138. };
  139. /*
  140. * Channels are mapped by physical system. Their channels share the same index.
  141. * i.e. acin_i is in_current0_raw and acin_v is in_voltage0_raw.
  142. * The only exception is for the battery. batt_v will be in_voltage6_raw and
  143. * charge current in_current6_raw and discharge current will be in_current7_raw.
  144. */
  145. static const struct iio_chan_spec axp20x_adc_channels[] = {
  146. AXP20X_ADC_CHANNEL(AXP20X_ACIN_V, "acin_v", IIO_VOLTAGE,
  147. AXP20X_ACIN_V_ADC_H),
  148. AXP20X_ADC_CHANNEL(AXP20X_ACIN_I, "acin_i", IIO_CURRENT,
  149. AXP20X_ACIN_I_ADC_H),
  150. AXP20X_ADC_CHANNEL(AXP20X_VBUS_V, "vbus_v", IIO_VOLTAGE,
  151. AXP20X_VBUS_V_ADC_H),
  152. AXP20X_ADC_CHANNEL(AXP20X_VBUS_I, "vbus_i", IIO_CURRENT,
  153. AXP20X_VBUS_I_ADC_H),
  154. {
  155. .type = IIO_TEMP,
  156. .address = AXP20X_TEMP_ADC_H,
  157. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  158. BIT(IIO_CHAN_INFO_SCALE) |
  159. BIT(IIO_CHAN_INFO_OFFSET),
  160. .datasheet_name = "pmic_temp",
  161. },
  162. AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO0_V, "gpio0_v", IIO_VOLTAGE,
  163. AXP20X_GPIO0_V_ADC_H),
  164. AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO1_V, "gpio1_v", IIO_VOLTAGE,
  165. AXP20X_GPIO1_V_ADC_H),
  166. AXP20X_ADC_CHANNEL(AXP20X_IPSOUT_V, "ipsout_v", IIO_VOLTAGE,
  167. AXP20X_IPSOUT_V_HIGH_H),
  168. AXP20X_ADC_CHANNEL(AXP20X_BATT_V, "batt_v", IIO_VOLTAGE,
  169. AXP20X_BATT_V_H),
  170. AXP20X_ADC_CHANNEL(AXP20X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
  171. AXP20X_BATT_CHRG_I_H),
  172. AXP20X_ADC_CHANNEL(AXP20X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
  173. AXP20X_BATT_DISCHRG_I_H),
  174. };
  175. static const struct iio_chan_spec axp22x_adc_channels[] = {
  176. {
  177. .type = IIO_TEMP,
  178. .address = AXP22X_PMIC_TEMP_H,
  179. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  180. BIT(IIO_CHAN_INFO_SCALE) |
  181. BIT(IIO_CHAN_INFO_OFFSET),
  182. .datasheet_name = "pmic_temp",
  183. },
  184. AXP20X_ADC_CHANNEL(AXP22X_BATT_V, "batt_v", IIO_VOLTAGE,
  185. AXP20X_BATT_V_H),
  186. AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
  187. AXP20X_BATT_CHRG_I_H),
  188. AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
  189. AXP20X_BATT_DISCHRG_I_H),
  190. };
  191. static const struct iio_chan_spec axp813_adc_channels[] = {
  192. {
  193. .type = IIO_TEMP,
  194. .address = AXP22X_PMIC_TEMP_H,
  195. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  196. BIT(IIO_CHAN_INFO_SCALE) |
  197. BIT(IIO_CHAN_INFO_OFFSET),
  198. .datasheet_name = "pmic_temp",
  199. },
  200. AXP20X_ADC_CHANNEL(AXP813_GPIO0_V, "gpio0_v", IIO_VOLTAGE,
  201. AXP288_GP_ADC_H),
  202. AXP20X_ADC_CHANNEL(AXP813_BATT_V, "batt_v", IIO_VOLTAGE,
  203. AXP20X_BATT_V_H),
  204. AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
  205. AXP20X_BATT_CHRG_I_H),
  206. AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
  207. AXP20X_BATT_DISCHRG_I_H),
  208. };
  209. static int axp20x_adc_raw(struct iio_dev *indio_dev,
  210. struct iio_chan_spec const *chan, int *val)
  211. {
  212. struct axp20x_adc_iio *info = iio_priv(indio_dev);
  213. int size = 12;
  214. /*
  215. * N.B.: Unlike the Chinese datasheets tell, the charging current is
  216. * stored on 12 bits, not 13 bits. Only discharging current is on 13
  217. * bits.
  218. */
  219. if (chan->type == IIO_CURRENT && chan->channel == AXP20X_BATT_DISCHRG_I)
  220. size = 13;
  221. else
  222. size = 12;
  223. *val = axp20x_read_variable_width(info->regmap, chan->address, size);
  224. if (*val < 0)
  225. return *val;
  226. return IIO_VAL_INT;
  227. }
  228. static int axp22x_adc_raw(struct iio_dev *indio_dev,
  229. struct iio_chan_spec const *chan, int *val)
  230. {
  231. struct axp20x_adc_iio *info = iio_priv(indio_dev);
  232. int size;
  233. /*
  234. * N.B.: Unlike the Chinese datasheets tell, the charging current is
  235. * stored on 12 bits, not 13 bits. Only discharging current is on 13
  236. * bits.
  237. */
  238. if (chan->type == IIO_CURRENT && chan->channel == AXP22X_BATT_DISCHRG_I)
  239. size = 13;
  240. else
  241. size = 12;
  242. *val = axp20x_read_variable_width(info->regmap, chan->address, size);
  243. if (*val < 0)
  244. return *val;
  245. return IIO_VAL_INT;
  246. }
  247. static int axp813_adc_raw(struct iio_dev *indio_dev,
  248. struct iio_chan_spec const *chan, int *val)
  249. {
  250. struct axp20x_adc_iio *info = iio_priv(indio_dev);
  251. *val = axp20x_read_variable_width(info->regmap, chan->address, 12);
  252. if (*val < 0)
  253. return *val;
  254. return IIO_VAL_INT;
  255. }
  256. static int axp20x_adc_scale_voltage(int channel, int *val, int *val2)
  257. {
  258. switch (channel) {
  259. case AXP20X_ACIN_V:
  260. case AXP20X_VBUS_V:
  261. *val = 1;
  262. *val2 = 700000;
  263. return IIO_VAL_INT_PLUS_MICRO;
  264. case AXP20X_GPIO0_V:
  265. case AXP20X_GPIO1_V:
  266. *val = 0;
  267. *val2 = 500000;
  268. return IIO_VAL_INT_PLUS_MICRO;
  269. case AXP20X_BATT_V:
  270. *val = 1;
  271. *val2 = 100000;
  272. return IIO_VAL_INT_PLUS_MICRO;
  273. case AXP20X_IPSOUT_V:
  274. *val = 1;
  275. *val2 = 400000;
  276. return IIO_VAL_INT_PLUS_MICRO;
  277. default:
  278. return -EINVAL;
  279. }
  280. }
  281. static int axp813_adc_scale_voltage(int channel, int *val, int *val2)
  282. {
  283. switch (channel) {
  284. case AXP813_GPIO0_V:
  285. *val = 0;
  286. *val2 = 800000;
  287. return IIO_VAL_INT_PLUS_MICRO;
  288. case AXP813_BATT_V:
  289. *val = 1;
  290. *val2 = 100000;
  291. return IIO_VAL_INT_PLUS_MICRO;
  292. default:
  293. return -EINVAL;
  294. }
  295. }
  296. static int axp20x_adc_scale_current(int channel, int *val, int *val2)
  297. {
  298. switch (channel) {
  299. case AXP20X_ACIN_I:
  300. *val = 0;
  301. *val2 = 625000;
  302. return IIO_VAL_INT_PLUS_MICRO;
  303. case AXP20X_VBUS_I:
  304. *val = 0;
  305. *val2 = 375000;
  306. return IIO_VAL_INT_PLUS_MICRO;
  307. case AXP20X_BATT_DISCHRG_I:
  308. case AXP20X_BATT_CHRG_I:
  309. *val = 0;
  310. *val2 = 500000;
  311. return IIO_VAL_INT_PLUS_MICRO;
  312. default:
  313. return -EINVAL;
  314. }
  315. }
  316. static int axp20x_adc_scale(struct iio_chan_spec const *chan, int *val,
  317. int *val2)
  318. {
  319. switch (chan->type) {
  320. case IIO_VOLTAGE:
  321. return axp20x_adc_scale_voltage(chan->channel, val, val2);
  322. case IIO_CURRENT:
  323. return axp20x_adc_scale_current(chan->channel, val, val2);
  324. case IIO_TEMP:
  325. *val = 100;
  326. return IIO_VAL_INT;
  327. default:
  328. return -EINVAL;
  329. }
  330. }
  331. static int axp22x_adc_scale(struct iio_chan_spec const *chan, int *val,
  332. int *val2)
  333. {
  334. switch (chan->type) {
  335. case IIO_VOLTAGE:
  336. if (chan->channel != AXP22X_BATT_V)
  337. return -EINVAL;
  338. *val = 1;
  339. *val2 = 100000;
  340. return IIO_VAL_INT_PLUS_MICRO;
  341. case IIO_CURRENT:
  342. *val = 0;
  343. *val2 = 500000;
  344. return IIO_VAL_INT_PLUS_MICRO;
  345. case IIO_TEMP:
  346. *val = 100;
  347. return IIO_VAL_INT;
  348. default:
  349. return -EINVAL;
  350. }
  351. }
  352. static int axp813_adc_scale(struct iio_chan_spec const *chan, int *val,
  353. int *val2)
  354. {
  355. switch (chan->type) {
  356. case IIO_VOLTAGE:
  357. return axp813_adc_scale_voltage(chan->channel, val, val2);
  358. case IIO_CURRENT:
  359. *val = 1;
  360. return IIO_VAL_INT;
  361. case IIO_TEMP:
  362. *val = 100;
  363. return IIO_VAL_INT;
  364. default:
  365. return -EINVAL;
  366. }
  367. }
  368. static int axp20x_adc_offset_voltage(struct iio_dev *indio_dev, int channel,
  369. int *val)
  370. {
  371. struct axp20x_adc_iio *info = iio_priv(indio_dev);
  372. int ret;
  373. ret = regmap_read(info->regmap, AXP20X_GPIO10_IN_RANGE, val);
  374. if (ret < 0)
  375. return ret;
  376. switch (channel) {
  377. case AXP20X_GPIO0_V:
  378. *val &= AXP20X_GPIO10_IN_RANGE_GPIO0;
  379. break;
  380. case AXP20X_GPIO1_V:
  381. *val &= AXP20X_GPIO10_IN_RANGE_GPIO1;
  382. break;
  383. default:
  384. return -EINVAL;
  385. }
  386. *val = *val ? 700000 : 0;
  387. return IIO_VAL_INT;
  388. }
  389. static int axp20x_adc_offset(struct iio_dev *indio_dev,
  390. struct iio_chan_spec const *chan, int *val)
  391. {
  392. switch (chan->type) {
  393. case IIO_VOLTAGE:
  394. return axp20x_adc_offset_voltage(indio_dev, chan->channel, val);
  395. case IIO_TEMP:
  396. *val = -1447;
  397. return IIO_VAL_INT;
  398. default:
  399. return -EINVAL;
  400. }
  401. }
  402. static int axp20x_read_raw(struct iio_dev *indio_dev,
  403. struct iio_chan_spec const *chan, int *val,
  404. int *val2, long mask)
  405. {
  406. switch (mask) {
  407. case IIO_CHAN_INFO_OFFSET:
  408. return axp20x_adc_offset(indio_dev, chan, val);
  409. case IIO_CHAN_INFO_SCALE:
  410. return axp20x_adc_scale(chan, val, val2);
  411. case IIO_CHAN_INFO_RAW:
  412. return axp20x_adc_raw(indio_dev, chan, val);
  413. default:
  414. return -EINVAL;
  415. }
  416. }
  417. static int axp22x_read_raw(struct iio_dev *indio_dev,
  418. struct iio_chan_spec const *chan, int *val,
  419. int *val2, long mask)
  420. {
  421. switch (mask) {
  422. case IIO_CHAN_INFO_OFFSET:
  423. *val = -2677;
  424. return IIO_VAL_INT;
  425. case IIO_CHAN_INFO_SCALE:
  426. return axp22x_adc_scale(chan, val, val2);
  427. case IIO_CHAN_INFO_RAW:
  428. return axp22x_adc_raw(indio_dev, chan, val);
  429. default:
  430. return -EINVAL;
  431. }
  432. }
  433. static int axp813_read_raw(struct iio_dev *indio_dev,
  434. struct iio_chan_spec const *chan, int *val,
  435. int *val2, long mask)
  436. {
  437. switch (mask) {
  438. case IIO_CHAN_INFO_OFFSET:
  439. *val = -2667;
  440. return IIO_VAL_INT;
  441. case IIO_CHAN_INFO_SCALE:
  442. return axp813_adc_scale(chan, val, val2);
  443. case IIO_CHAN_INFO_RAW:
  444. return axp813_adc_raw(indio_dev, chan, val);
  445. default:
  446. return -EINVAL;
  447. }
  448. }
  449. static int axp20x_write_raw(struct iio_dev *indio_dev,
  450. struct iio_chan_spec const *chan, int val, int val2,
  451. long mask)
  452. {
  453. struct axp20x_adc_iio *info = iio_priv(indio_dev);
  454. unsigned int reg, regval;
  455. /*
  456. * The AXP20X PMIC allows the user to choose between 0V and 0.7V offsets
  457. * for (independently) GPIO0 and GPIO1 when in ADC mode.
  458. */
  459. if (mask != IIO_CHAN_INFO_OFFSET)
  460. return -EINVAL;
  461. if (val != 0 && val != 700000)
  462. return -EINVAL;
  463. val = val ? 1 : 0;
  464. switch (chan->channel) {
  465. case AXP20X_GPIO0_V:
  466. reg = AXP20X_GPIO10_IN_RANGE_GPIO0;
  467. regval = AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(val);
  468. break;
  469. case AXP20X_GPIO1_V:
  470. reg = AXP20X_GPIO10_IN_RANGE_GPIO1;
  471. regval = AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(val);
  472. break;
  473. default:
  474. return -EINVAL;
  475. }
  476. return regmap_update_bits(info->regmap, AXP20X_GPIO10_IN_RANGE, reg,
  477. regval);
  478. }
  479. static const struct iio_info axp20x_adc_iio_info = {
  480. .read_raw = axp20x_read_raw,
  481. .write_raw = axp20x_write_raw,
  482. };
  483. static const struct iio_info axp22x_adc_iio_info = {
  484. .read_raw = axp22x_read_raw,
  485. };
  486. static const struct iio_info axp813_adc_iio_info = {
  487. .read_raw = axp813_read_raw,
  488. };
  489. static int axp20x_adc_rate(struct axp20x_adc_iio *info, int rate)
  490. {
  491. return regmap_update_bits(info->regmap, AXP20X_ADC_RATE,
  492. AXP20X_ADC_RATE_MASK,
  493. AXP20X_ADC_RATE_HZ(rate));
  494. }
  495. static int axp22x_adc_rate(struct axp20x_adc_iio *info, int rate)
  496. {
  497. return regmap_update_bits(info->regmap, AXP20X_ADC_RATE,
  498. AXP20X_ADC_RATE_MASK,
  499. AXP22X_ADC_RATE_HZ(rate));
  500. }
  501. static int axp813_adc_rate(struct axp20x_adc_iio *info, int rate)
  502. {
  503. return regmap_update_bits(info->regmap, AXP813_ADC_RATE,
  504. AXP813_ADC_RATE_MASK,
  505. AXP813_ADC_RATE_HZ(rate));
  506. }
  507. struct axp_data {
  508. const struct iio_info *iio_info;
  509. int num_channels;
  510. struct iio_chan_spec const *channels;
  511. unsigned long adc_en1_mask;
  512. int (*adc_rate)(struct axp20x_adc_iio *info,
  513. int rate);
  514. bool adc_en2;
  515. struct iio_map *maps;
  516. };
  517. static const struct axp_data axp20x_data = {
  518. .iio_info = &axp20x_adc_iio_info,
  519. .num_channels = ARRAY_SIZE(axp20x_adc_channels),
  520. .channels = axp20x_adc_channels,
  521. .adc_en1_mask = AXP20X_ADC_EN1_MASK,
  522. .adc_rate = axp20x_adc_rate,
  523. .adc_en2 = true,
  524. .maps = axp20x_maps,
  525. };
  526. static const struct axp_data axp22x_data = {
  527. .iio_info = &axp22x_adc_iio_info,
  528. .num_channels = ARRAY_SIZE(axp22x_adc_channels),
  529. .channels = axp22x_adc_channels,
  530. .adc_en1_mask = AXP22X_ADC_EN1_MASK,
  531. .adc_rate = axp22x_adc_rate,
  532. .adc_en2 = false,
  533. .maps = axp22x_maps,
  534. };
  535. static const struct axp_data axp813_data = {
  536. .iio_info = &axp813_adc_iio_info,
  537. .num_channels = ARRAY_SIZE(axp813_adc_channels),
  538. .channels = axp813_adc_channels,
  539. .adc_en1_mask = AXP22X_ADC_EN1_MASK,
  540. .adc_rate = axp813_adc_rate,
  541. .adc_en2 = false,
  542. .maps = axp22x_maps,
  543. };
  544. static const struct of_device_id axp20x_adc_of_match[] = {
  545. { .compatible = "x-powers,axp209-adc", .data = (void *)&axp20x_data, },
  546. { .compatible = "x-powers,axp221-adc", .data = (void *)&axp22x_data, },
  547. { .compatible = "x-powers,axp813-adc", .data = (void *)&axp813_data, },
  548. { /* sentinel */ }
  549. };
  550. MODULE_DEVICE_TABLE(of, axp20x_adc_of_match);
  551. static const struct platform_device_id axp20x_adc_id_match[] = {
  552. { .name = "axp20x-adc", .driver_data = (kernel_ulong_t)&axp20x_data, },
  553. { .name = "axp22x-adc", .driver_data = (kernel_ulong_t)&axp22x_data, },
  554. { .name = "axp813-adc", .driver_data = (kernel_ulong_t)&axp813_data, },
  555. { /* sentinel */ },
  556. };
  557. MODULE_DEVICE_TABLE(platform, axp20x_adc_id_match);
  558. static int axp20x_probe(struct platform_device *pdev)
  559. {
  560. struct axp20x_adc_iio *info;
  561. struct iio_dev *indio_dev;
  562. struct axp20x_dev *axp20x_dev;
  563. int ret;
  564. axp20x_dev = dev_get_drvdata(pdev->dev.parent);
  565. indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
  566. if (!indio_dev)
  567. return -ENOMEM;
  568. info = iio_priv(indio_dev);
  569. platform_set_drvdata(pdev, indio_dev);
  570. info->regmap = axp20x_dev->regmap;
  571. indio_dev->dev.parent = &pdev->dev;
  572. indio_dev->dev.of_node = pdev->dev.of_node;
  573. indio_dev->modes = INDIO_DIRECT_MODE;
  574. if (!pdev->dev.of_node) {
  575. const struct platform_device_id *id;
  576. id = platform_get_device_id(pdev);
  577. info->data = (struct axp_data *)id->driver_data;
  578. } else {
  579. struct device *dev = &pdev->dev;
  580. info->data = (struct axp_data *)of_device_get_match_data(dev);
  581. }
  582. indio_dev->name = platform_get_device_id(pdev)->name;
  583. indio_dev->info = info->data->iio_info;
  584. indio_dev->num_channels = info->data->num_channels;
  585. indio_dev->channels = info->data->channels;
  586. /* Enable the ADCs on IP */
  587. regmap_write(info->regmap, AXP20X_ADC_EN1, info->data->adc_en1_mask);
  588. if (info->data->adc_en2)
  589. /* Enable GPIO0/1 and internal temperature ADCs */
  590. regmap_update_bits(info->regmap, AXP20X_ADC_EN2,
  591. AXP20X_ADC_EN2_MASK, AXP20X_ADC_EN2_MASK);
  592. /* Configure ADCs rate */
  593. info->data->adc_rate(info, 100);
  594. ret = iio_map_array_register(indio_dev, info->data->maps);
  595. if (ret < 0) {
  596. dev_err(&pdev->dev, "failed to register IIO maps: %d\n", ret);
  597. goto fail_map;
  598. }
  599. ret = iio_device_register(indio_dev);
  600. if (ret < 0) {
  601. dev_err(&pdev->dev, "could not register the device\n");
  602. goto fail_register;
  603. }
  604. return 0;
  605. fail_register:
  606. iio_map_array_unregister(indio_dev);
  607. fail_map:
  608. regmap_write(info->regmap, AXP20X_ADC_EN1, 0);
  609. if (info->data->adc_en2)
  610. regmap_write(info->regmap, AXP20X_ADC_EN2, 0);
  611. return ret;
  612. }
  613. static int axp20x_remove(struct platform_device *pdev)
  614. {
  615. struct iio_dev *indio_dev = platform_get_drvdata(pdev);
  616. struct axp20x_adc_iio *info = iio_priv(indio_dev);
  617. iio_device_unregister(indio_dev);
  618. iio_map_array_unregister(indio_dev);
  619. regmap_write(info->regmap, AXP20X_ADC_EN1, 0);
  620. if (info->data->adc_en2)
  621. regmap_write(info->regmap, AXP20X_ADC_EN2, 0);
  622. return 0;
  623. }
  624. static struct platform_driver axp20x_adc_driver = {
  625. .driver = {
  626. .name = "axp20x-adc",
  627. .of_match_table = of_match_ptr(axp20x_adc_of_match),
  628. },
  629. .id_table = axp20x_adc_id_match,
  630. .probe = axp20x_probe,
  631. .remove = axp20x_remove,
  632. };
  633. module_platform_driver(axp20x_adc_driver);
  634. MODULE_DESCRIPTION("ADC driver for AXP20X and AXP22X PMICs");
  635. MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
  636. MODULE_LICENSE("GPL");