zx_hdmi_regs.h 2.1 KB

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  1. /*
  2. * Copyright 2016 Linaro Ltd.
  3. * Copyright 2016 ZTE Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. */
  10. #ifndef __ZX_HDMI_REGS_H__
  11. #define __ZX_HDMI_REGS_H__
  12. #define FUNC_SEL 0x000b
  13. #define FUNC_HDMI_EN BIT(0)
  14. #define CLKPWD 0x000d
  15. #define CLKPWD_PDIDCK BIT(2)
  16. #define P2T_CTRL 0x0066
  17. #define P2T_DC_PKT_EN BIT(7)
  18. #define L1_INTR_STAT 0x007e
  19. #define L1_INTR_STAT_INTR1 BIT(0)
  20. #define INTR1_STAT 0x008f
  21. #define INTR1_MASK 0x0095
  22. #define INTR1_MONITOR_DETECT (BIT(5) | BIT(6))
  23. #define ZX_DDC_ADDR 0x00ed
  24. #define ZX_DDC_SEGM 0x00ee
  25. #define ZX_DDC_OFFSET 0x00ef
  26. #define ZX_DDC_DIN_CNT1 0x00f0
  27. #define ZX_DDC_DIN_CNT2 0x00f1
  28. #define ZX_DDC_CMD 0x00f3
  29. #define DDC_CMD_MASK 0xf
  30. #define DDC_CMD_CLEAR_FIFO 0x9
  31. #define DDC_CMD_SEQUENTIAL_READ 0x2
  32. #define ZX_DDC_DATA 0x00f4
  33. #define ZX_DDC_DOUT_CNT 0x00f5
  34. #define DDC_DOUT_CNT_MASK 0x1f
  35. #define TEST_TXCTRL 0x00f7
  36. #define TEST_TXCTRL_HDMI_MODE BIT(1)
  37. #define HDMICTL4 0x0235
  38. #define TPI_HPD_RSEN 0x063b
  39. #define TPI_HPD_CONNECTION (BIT(1) | BIT(2))
  40. #define TPI_INFO_FSEL 0x06bf
  41. #define FSEL_AVI 0
  42. #define FSEL_GBD 1
  43. #define FSEL_AUDIO 2
  44. #define FSEL_SPD 3
  45. #define FSEL_MPEG 4
  46. #define FSEL_VSIF 5
  47. #define TPI_INFO_B0 0x06c0
  48. #define TPI_INFO_EN 0x06df
  49. #define TPI_INFO_TRANS_EN BIT(7)
  50. #define TPI_INFO_TRANS_RPT BIT(6)
  51. #define TPI_DDC_MASTER_EN 0x06f8
  52. #define HW_DDC_MASTER BIT(7)
  53. #define N_SVAL1 0xa03
  54. #define N_SVAL2 0xa04
  55. #define N_SVAL3 0xa05
  56. #define AUD_EN 0xa13
  57. #define AUD_IN_EN BIT(0)
  58. #define AUD_MODE 0xa14
  59. #define SPDIF_EN BIT(1)
  60. #define TPI_AUD_CONFIG 0xa62
  61. #define SPDIF_SAMPLE_SIZE_SHIFT 6
  62. #define SPDIF_SAMPLE_SIZE_MASK (0x3 << SPDIF_SAMPLE_SIZE_SHIFT)
  63. #define SPDIF_SAMPLE_SIZE_16BIT (0x1 << SPDIF_SAMPLE_SIZE_SHIFT)
  64. #define SPDIF_SAMPLE_SIZE_20BIT (0x2 << SPDIF_SAMPLE_SIZE_SHIFT)
  65. #define SPDIF_SAMPLE_SIZE_24BIT (0x3 << SPDIF_SAMPLE_SIZE_SHIFT)
  66. #define TPI_AUD_MUTE BIT(4)
  67. #endif /* __ZX_HDMI_REGS_H__ */