gk104.c 5.7 KB

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  1. /*
  2. * Copyright 2015 Karol Herbst <nouveau@karolherbst.de>
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Karol Herbst <nouveau@karolherbst.de>
  23. */
  24. #include "priv.h"
  25. static int
  26. gk104_pcie_version_supported(struct nvkm_pci *pci)
  27. {
  28. return (nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x4) == 0x4 ? 2 : 1;
  29. }
  30. static void
  31. gk104_pcie_set_cap_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
  32. {
  33. struct nvkm_device *device = pci->subdev.device;
  34. switch (speed) {
  35. case NVKM_PCIE_SPEED_2_5:
  36. gf100_pcie_set_cap_speed(pci, false);
  37. nvkm_mask(device, 0x8c1c0, 0x30000, 0x10000);
  38. break;
  39. case NVKM_PCIE_SPEED_5_0:
  40. gf100_pcie_set_cap_speed(pci, true);
  41. nvkm_mask(device, 0x8c1c0, 0x30000, 0x20000);
  42. break;
  43. case NVKM_PCIE_SPEED_8_0:
  44. gf100_pcie_set_cap_speed(pci, true);
  45. nvkm_mask(device, 0x8c1c0, 0x30000, 0x30000);
  46. break;
  47. }
  48. }
  49. static enum nvkm_pcie_speed
  50. gk104_pcie_cap_speed(struct nvkm_pci *pci)
  51. {
  52. int speed = gf100_pcie_cap_speed(pci);
  53. if (speed == 0)
  54. return NVKM_PCIE_SPEED_2_5;
  55. if (speed >= 1) {
  56. int speed2 = nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x30000;
  57. switch (speed2) {
  58. case 0x00000:
  59. case 0x10000:
  60. return NVKM_PCIE_SPEED_2_5;
  61. case 0x20000:
  62. return NVKM_PCIE_SPEED_5_0;
  63. case 0x30000:
  64. return NVKM_PCIE_SPEED_8_0;
  65. }
  66. }
  67. return -EINVAL;
  68. }
  69. static void
  70. gk104_pcie_set_lnkctl_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
  71. {
  72. u8 reg_v = 0;
  73. switch (speed) {
  74. case NVKM_PCIE_SPEED_2_5:
  75. reg_v = 1;
  76. break;
  77. case NVKM_PCIE_SPEED_5_0:
  78. reg_v = 2;
  79. break;
  80. case NVKM_PCIE_SPEED_8_0:
  81. reg_v = 3;
  82. break;
  83. }
  84. nvkm_pci_mask(pci, 0xa8, 0x3, reg_v);
  85. }
  86. static enum nvkm_pcie_speed
  87. gk104_pcie_lnkctl_speed(struct nvkm_pci *pci)
  88. {
  89. u8 reg_v = nvkm_pci_rd32(pci, 0xa8) & 0x3;
  90. switch (reg_v) {
  91. case 0:
  92. case 1:
  93. return NVKM_PCIE_SPEED_2_5;
  94. case 2:
  95. return NVKM_PCIE_SPEED_5_0;
  96. case 3:
  97. return NVKM_PCIE_SPEED_8_0;
  98. }
  99. return -1;
  100. }
  101. static enum nvkm_pcie_speed
  102. gk104_pcie_max_speed(struct nvkm_pci *pci)
  103. {
  104. u32 max_speed = nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x300000;
  105. switch (max_speed) {
  106. case 0x000000:
  107. return NVKM_PCIE_SPEED_8_0;
  108. case 0x100000:
  109. return NVKM_PCIE_SPEED_5_0;
  110. case 0x200000:
  111. return NVKM_PCIE_SPEED_2_5;
  112. }
  113. return NVKM_PCIE_SPEED_2_5;
  114. }
  115. static void
  116. gk104_pcie_set_link_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
  117. {
  118. struct nvkm_device *device = pci->subdev.device;
  119. u32 mask_value;
  120. switch (speed) {
  121. case NVKM_PCIE_SPEED_8_0:
  122. mask_value = 0x00000;
  123. break;
  124. case NVKM_PCIE_SPEED_5_0:
  125. mask_value = 0x40000;
  126. break;
  127. case NVKM_PCIE_SPEED_2_5:
  128. default:
  129. mask_value = 0x80000;
  130. break;
  131. }
  132. nvkm_mask(device, 0x8c040, 0xc0000, mask_value);
  133. nvkm_mask(device, 0x8c040, 0x1, 0x1);
  134. }
  135. static int
  136. gk104_pcie_init(struct nvkm_pci * pci)
  137. {
  138. enum nvkm_pcie_speed lnkctl_speed, max_speed, cap_speed;
  139. struct nvkm_subdev *subdev = &pci->subdev;
  140. if (gf100_pcie_version(pci) < 2)
  141. return 0;
  142. lnkctl_speed = gk104_pcie_lnkctl_speed(pci);
  143. max_speed = gk104_pcie_max_speed(pci);
  144. cap_speed = gk104_pcie_cap_speed(pci);
  145. if (cap_speed != max_speed) {
  146. nvkm_trace(subdev, "adjusting cap to max speed\n");
  147. gk104_pcie_set_cap_speed(pci, max_speed);
  148. cap_speed = gk104_pcie_cap_speed(pci);
  149. if (cap_speed != max_speed)
  150. nvkm_warn(subdev, "failed to adjust cap speed\n");
  151. }
  152. if (lnkctl_speed != max_speed) {
  153. nvkm_debug(subdev, "adjusting lnkctl to max speed\n");
  154. gk104_pcie_set_lnkctl_speed(pci, max_speed);
  155. lnkctl_speed = gk104_pcie_lnkctl_speed(pci);
  156. if (lnkctl_speed != max_speed)
  157. nvkm_error(subdev, "failed to adjust lnkctl speed\n");
  158. }
  159. return 0;
  160. }
  161. static int
  162. gk104_pcie_set_link(struct nvkm_pci *pci, enum nvkm_pcie_speed speed, u8 width)
  163. {
  164. struct nvkm_subdev *subdev = &pci->subdev;
  165. enum nvkm_pcie_speed lnk_ctl_speed = gk104_pcie_lnkctl_speed(pci);
  166. enum nvkm_pcie_speed lnk_cap_speed = gk104_pcie_cap_speed(pci);
  167. if (speed > lnk_cap_speed) {
  168. speed = lnk_cap_speed;
  169. nvkm_warn(subdev, "dropping requested speed due too low cap"
  170. " speed\n");
  171. }
  172. if (speed > lnk_ctl_speed) {
  173. speed = lnk_ctl_speed;
  174. nvkm_warn(subdev, "dropping requested speed due too low"
  175. " lnkctl speed\n");
  176. }
  177. gk104_pcie_set_link_speed(pci, speed);
  178. return 0;
  179. }
  180. static const struct nvkm_pci_func
  181. gk104_pci_func = {
  182. .init = g84_pci_init,
  183. .rd32 = nv40_pci_rd32,
  184. .wr08 = nv40_pci_wr08,
  185. .wr32 = nv40_pci_wr32,
  186. .msi_rearm = nv40_pci_msi_rearm,
  187. .pcie.init = gk104_pcie_init,
  188. .pcie.set_link = gk104_pcie_set_link,
  189. .pcie.max_speed = gk104_pcie_max_speed,
  190. .pcie.cur_speed = g84_pcie_cur_speed,
  191. .pcie.set_version = gf100_pcie_set_version,
  192. .pcie.version = gf100_pcie_version,
  193. .pcie.version_supported = gk104_pcie_version_supported,
  194. };
  195. int
  196. gk104_pci_new(struct nvkm_device *device, int index, struct nvkm_pci **ppci)
  197. {
  198. return nvkm_pci_new_(&gk104_pci_func, device, index, ppci);
  199. }