ipuv3-plane.c 23 KB

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  1. /*
  2. * i.MX IPUv3 DP Overlay Planes
  3. *
  4. * Copyright (C) 2013 Philipp Zabel, Pengutronix
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version 2
  9. * of the License, or (at your option) any later version.
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <drm/drmP.h>
  16. #include <drm/drm_atomic.h>
  17. #include <drm/drm_atomic_helper.h>
  18. #include <drm/drm_fb_cma_helper.h>
  19. #include <drm/drm_gem_cma_helper.h>
  20. #include <drm/drm_gem_framebuffer_helper.h>
  21. #include <drm/drm_plane_helper.h>
  22. #include "video/imx-ipu-v3.h"
  23. #include "imx-drm.h"
  24. #include "ipuv3-plane.h"
  25. struct ipu_plane_state {
  26. struct drm_plane_state base;
  27. bool use_pre;
  28. };
  29. static inline struct ipu_plane_state *
  30. to_ipu_plane_state(struct drm_plane_state *p)
  31. {
  32. return container_of(p, struct ipu_plane_state, base);
  33. }
  34. static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
  35. {
  36. return container_of(p, struct ipu_plane, base);
  37. }
  38. static const uint32_t ipu_plane_formats[] = {
  39. DRM_FORMAT_ARGB1555,
  40. DRM_FORMAT_XRGB1555,
  41. DRM_FORMAT_ABGR1555,
  42. DRM_FORMAT_XBGR1555,
  43. DRM_FORMAT_RGBA5551,
  44. DRM_FORMAT_BGRA5551,
  45. DRM_FORMAT_ARGB4444,
  46. DRM_FORMAT_ARGB8888,
  47. DRM_FORMAT_XRGB8888,
  48. DRM_FORMAT_ABGR8888,
  49. DRM_FORMAT_XBGR8888,
  50. DRM_FORMAT_RGBA8888,
  51. DRM_FORMAT_RGBX8888,
  52. DRM_FORMAT_BGRA8888,
  53. DRM_FORMAT_BGRX8888,
  54. DRM_FORMAT_UYVY,
  55. DRM_FORMAT_VYUY,
  56. DRM_FORMAT_YUYV,
  57. DRM_FORMAT_YVYU,
  58. DRM_FORMAT_YUV420,
  59. DRM_FORMAT_YVU420,
  60. DRM_FORMAT_YUV422,
  61. DRM_FORMAT_YVU422,
  62. DRM_FORMAT_YUV444,
  63. DRM_FORMAT_YVU444,
  64. DRM_FORMAT_NV12,
  65. DRM_FORMAT_NV16,
  66. DRM_FORMAT_RGB565,
  67. DRM_FORMAT_RGB565_A8,
  68. DRM_FORMAT_BGR565_A8,
  69. DRM_FORMAT_RGB888_A8,
  70. DRM_FORMAT_BGR888_A8,
  71. DRM_FORMAT_RGBX8888_A8,
  72. DRM_FORMAT_BGRX8888_A8,
  73. };
  74. static const uint64_t ipu_format_modifiers[] = {
  75. DRM_FORMAT_MOD_LINEAR,
  76. DRM_FORMAT_MOD_INVALID
  77. };
  78. static const uint64_t pre_format_modifiers[] = {
  79. DRM_FORMAT_MOD_LINEAR,
  80. DRM_FORMAT_MOD_VIVANTE_TILED,
  81. DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
  82. DRM_FORMAT_MOD_INVALID
  83. };
  84. int ipu_plane_irq(struct ipu_plane *ipu_plane)
  85. {
  86. return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
  87. IPU_IRQ_EOF);
  88. }
  89. static inline unsigned long
  90. drm_plane_state_to_eba(struct drm_plane_state *state, int plane)
  91. {
  92. struct drm_framebuffer *fb = state->fb;
  93. struct drm_gem_cma_object *cma_obj;
  94. int x = state->src.x1 >> 16;
  95. int y = state->src.y1 >> 16;
  96. cma_obj = drm_fb_cma_get_gem_obj(fb, plane);
  97. BUG_ON(!cma_obj);
  98. return cma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y +
  99. fb->format->cpp[plane] * x;
  100. }
  101. static inline unsigned long
  102. drm_plane_state_to_ubo(struct drm_plane_state *state)
  103. {
  104. struct drm_framebuffer *fb = state->fb;
  105. struct drm_gem_cma_object *cma_obj;
  106. unsigned long eba = drm_plane_state_to_eba(state, 0);
  107. int x = state->src.x1 >> 16;
  108. int y = state->src.y1 >> 16;
  109. cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
  110. BUG_ON(!cma_obj);
  111. x /= drm_format_horz_chroma_subsampling(fb->format->format);
  112. y /= drm_format_vert_chroma_subsampling(fb->format->format);
  113. return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y +
  114. fb->format->cpp[1] * x - eba;
  115. }
  116. static inline unsigned long
  117. drm_plane_state_to_vbo(struct drm_plane_state *state)
  118. {
  119. struct drm_framebuffer *fb = state->fb;
  120. struct drm_gem_cma_object *cma_obj;
  121. unsigned long eba = drm_plane_state_to_eba(state, 0);
  122. int x = state->src.x1 >> 16;
  123. int y = state->src.y1 >> 16;
  124. cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
  125. BUG_ON(!cma_obj);
  126. x /= drm_format_horz_chroma_subsampling(fb->format->format);
  127. y /= drm_format_vert_chroma_subsampling(fb->format->format);
  128. return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y +
  129. fb->format->cpp[2] * x - eba;
  130. }
  131. void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
  132. {
  133. if (!IS_ERR_OR_NULL(ipu_plane->dp))
  134. ipu_dp_put(ipu_plane->dp);
  135. if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
  136. ipu_dmfc_put(ipu_plane->dmfc);
  137. if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
  138. ipu_idmac_put(ipu_plane->ipu_ch);
  139. if (!IS_ERR_OR_NULL(ipu_plane->alpha_ch))
  140. ipu_idmac_put(ipu_plane->alpha_ch);
  141. }
  142. int ipu_plane_get_resources(struct ipu_plane *ipu_plane)
  143. {
  144. int ret;
  145. int alpha_ch;
  146. ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
  147. if (IS_ERR(ipu_plane->ipu_ch)) {
  148. ret = PTR_ERR(ipu_plane->ipu_ch);
  149. DRM_ERROR("failed to get idmac channel: %d\n", ret);
  150. return ret;
  151. }
  152. alpha_ch = ipu_channel_alpha_channel(ipu_plane->dma);
  153. if (alpha_ch >= 0) {
  154. ipu_plane->alpha_ch = ipu_idmac_get(ipu_plane->ipu, alpha_ch);
  155. if (IS_ERR(ipu_plane->alpha_ch)) {
  156. ret = PTR_ERR(ipu_plane->alpha_ch);
  157. DRM_ERROR("failed to get alpha idmac channel %d: %d\n",
  158. alpha_ch, ret);
  159. return ret;
  160. }
  161. }
  162. ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
  163. if (IS_ERR(ipu_plane->dmfc)) {
  164. ret = PTR_ERR(ipu_plane->dmfc);
  165. DRM_ERROR("failed to get dmfc: ret %d\n", ret);
  166. goto err_out;
  167. }
  168. if (ipu_plane->dp_flow >= 0) {
  169. ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
  170. if (IS_ERR(ipu_plane->dp)) {
  171. ret = PTR_ERR(ipu_plane->dp);
  172. DRM_ERROR("failed to get dp flow: %d\n", ret);
  173. goto err_out;
  174. }
  175. }
  176. return 0;
  177. err_out:
  178. ipu_plane_put_resources(ipu_plane);
  179. return ret;
  180. }
  181. static bool ipu_plane_separate_alpha(struct ipu_plane *ipu_plane)
  182. {
  183. switch (ipu_plane->base.state->fb->format->format) {
  184. case DRM_FORMAT_RGB565_A8:
  185. case DRM_FORMAT_BGR565_A8:
  186. case DRM_FORMAT_RGB888_A8:
  187. case DRM_FORMAT_BGR888_A8:
  188. case DRM_FORMAT_RGBX8888_A8:
  189. case DRM_FORMAT_BGRX8888_A8:
  190. return true;
  191. default:
  192. return false;
  193. }
  194. }
  195. static void ipu_plane_enable(struct ipu_plane *ipu_plane)
  196. {
  197. if (ipu_plane->dp)
  198. ipu_dp_enable(ipu_plane->ipu);
  199. ipu_dmfc_enable_channel(ipu_plane->dmfc);
  200. ipu_idmac_enable_channel(ipu_plane->ipu_ch);
  201. if (ipu_plane_separate_alpha(ipu_plane))
  202. ipu_idmac_enable_channel(ipu_plane->alpha_ch);
  203. if (ipu_plane->dp)
  204. ipu_dp_enable_channel(ipu_plane->dp);
  205. }
  206. void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
  207. {
  208. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  209. ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
  210. if (ipu_plane->dp && disable_dp_channel)
  211. ipu_dp_disable_channel(ipu_plane->dp, false);
  212. ipu_idmac_disable_channel(ipu_plane->ipu_ch);
  213. if (ipu_plane->alpha_ch)
  214. ipu_idmac_disable_channel(ipu_plane->alpha_ch);
  215. ipu_dmfc_disable_channel(ipu_plane->dmfc);
  216. if (ipu_plane->dp)
  217. ipu_dp_disable(ipu_plane->ipu);
  218. if (ipu_prg_present(ipu_plane->ipu))
  219. ipu_prg_channel_disable(ipu_plane->ipu_ch);
  220. }
  221. void ipu_plane_disable_deferred(struct drm_plane *plane)
  222. {
  223. struct ipu_plane *ipu_plane = to_ipu_plane(plane);
  224. if (ipu_plane->disabling) {
  225. ipu_plane->disabling = false;
  226. ipu_plane_disable(ipu_plane, false);
  227. }
  228. }
  229. EXPORT_SYMBOL_GPL(ipu_plane_disable_deferred);
  230. static void ipu_plane_destroy(struct drm_plane *plane)
  231. {
  232. struct ipu_plane *ipu_plane = to_ipu_plane(plane);
  233. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  234. drm_plane_cleanup(plane);
  235. kfree(ipu_plane);
  236. }
  237. static void ipu_plane_state_reset(struct drm_plane *plane)
  238. {
  239. struct ipu_plane_state *ipu_state;
  240. if (plane->state) {
  241. ipu_state = to_ipu_plane_state(plane->state);
  242. __drm_atomic_helper_plane_destroy_state(plane->state);
  243. kfree(ipu_state);
  244. }
  245. ipu_state = kzalloc(sizeof(*ipu_state), GFP_KERNEL);
  246. if (ipu_state) {
  247. ipu_state->base.plane = plane;
  248. ipu_state->base.rotation = DRM_MODE_ROTATE_0;
  249. }
  250. plane->state = &ipu_state->base;
  251. }
  252. static struct drm_plane_state *
  253. ipu_plane_duplicate_state(struct drm_plane *plane)
  254. {
  255. struct ipu_plane_state *state;
  256. if (WARN_ON(!plane->state))
  257. return NULL;
  258. state = kmalloc(sizeof(*state), GFP_KERNEL);
  259. if (state)
  260. __drm_atomic_helper_plane_duplicate_state(plane, &state->base);
  261. return &state->base;
  262. }
  263. static void ipu_plane_destroy_state(struct drm_plane *plane,
  264. struct drm_plane_state *state)
  265. {
  266. struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
  267. __drm_atomic_helper_plane_destroy_state(state);
  268. kfree(ipu_state);
  269. }
  270. static bool ipu_plane_format_mod_supported(struct drm_plane *plane,
  271. uint32_t format, uint64_t modifier)
  272. {
  273. struct ipu_soc *ipu = to_ipu_plane(plane)->ipu;
  274. /* linear is supported for all planes and formats */
  275. if (modifier == DRM_FORMAT_MOD_LINEAR)
  276. return true;
  277. /* without a PRG there are no supported modifiers */
  278. if (!ipu_prg_present(ipu))
  279. return false;
  280. return ipu_prg_format_supported(ipu, format, modifier);
  281. }
  282. static const struct drm_plane_funcs ipu_plane_funcs = {
  283. .update_plane = drm_atomic_helper_update_plane,
  284. .disable_plane = drm_atomic_helper_disable_plane,
  285. .destroy = ipu_plane_destroy,
  286. .reset = ipu_plane_state_reset,
  287. .atomic_duplicate_state = ipu_plane_duplicate_state,
  288. .atomic_destroy_state = ipu_plane_destroy_state,
  289. .format_mod_supported = ipu_plane_format_mod_supported,
  290. };
  291. static int ipu_plane_atomic_check(struct drm_plane *plane,
  292. struct drm_plane_state *state)
  293. {
  294. struct drm_plane_state *old_state = plane->state;
  295. struct drm_crtc_state *crtc_state;
  296. struct device *dev = plane->dev->dev;
  297. struct drm_framebuffer *fb = state->fb;
  298. struct drm_framebuffer *old_fb = old_state->fb;
  299. unsigned long eba, ubo, vbo, old_ubo, old_vbo, alpha_eba;
  300. bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);
  301. int hsub, vsub;
  302. int ret;
  303. /* Ok to disable */
  304. if (!fb)
  305. return 0;
  306. if (!state->crtc)
  307. return -EINVAL;
  308. crtc_state =
  309. drm_atomic_get_existing_crtc_state(state->state, state->crtc);
  310. if (WARN_ON(!crtc_state))
  311. return -EINVAL;
  312. ret = drm_atomic_helper_check_plane_state(state, crtc_state,
  313. DRM_PLANE_HELPER_NO_SCALING,
  314. DRM_PLANE_HELPER_NO_SCALING,
  315. can_position, true);
  316. if (ret)
  317. return ret;
  318. /* nothing to check when disabling or disabled */
  319. if (!crtc_state->enable)
  320. return 0;
  321. switch (plane->type) {
  322. case DRM_PLANE_TYPE_PRIMARY:
  323. /* full plane minimum width is 13 pixels */
  324. if (drm_rect_width(&state->dst) < 13)
  325. return -EINVAL;
  326. break;
  327. case DRM_PLANE_TYPE_OVERLAY:
  328. break;
  329. default:
  330. dev_warn(dev, "Unsupported plane type %d\n", plane->type);
  331. return -EINVAL;
  332. }
  333. if (drm_rect_height(&state->dst) < 2)
  334. return -EINVAL;
  335. /*
  336. * We support resizing active plane or changing its format by
  337. * forcing CRTC mode change in plane's ->atomic_check callback
  338. * and disabling all affected active planes in CRTC's ->atomic_disable
  339. * callback. The planes will be reenabled in plane's ->atomic_update
  340. * callback.
  341. */
  342. if (old_fb &&
  343. (drm_rect_width(&state->dst) != drm_rect_width(&old_state->dst) ||
  344. drm_rect_height(&state->dst) != drm_rect_height(&old_state->dst) ||
  345. fb->format != old_fb->format))
  346. crtc_state->mode_changed = true;
  347. eba = drm_plane_state_to_eba(state, 0);
  348. if (eba & 0x7)
  349. return -EINVAL;
  350. if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
  351. return -EINVAL;
  352. if (old_fb && fb->pitches[0] != old_fb->pitches[0])
  353. crtc_state->mode_changed = true;
  354. switch (fb->format->format) {
  355. case DRM_FORMAT_YUV420:
  356. case DRM_FORMAT_YVU420:
  357. case DRM_FORMAT_YUV422:
  358. case DRM_FORMAT_YVU422:
  359. case DRM_FORMAT_YUV444:
  360. case DRM_FORMAT_YVU444:
  361. /*
  362. * Multiplanar formats have to meet the following restrictions:
  363. * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
  364. * - EBA, UBO and VBO are a multiple of 8
  365. * - UBO and VBO are unsigned and not larger than 0xfffff8
  366. * - Only EBA may be changed while scanout is active
  367. * - The strides of U and V planes must be identical.
  368. */
  369. vbo = drm_plane_state_to_vbo(state);
  370. if (vbo & 0x7 || vbo > 0xfffff8)
  371. return -EINVAL;
  372. if (old_fb && (fb->format == old_fb->format)) {
  373. old_vbo = drm_plane_state_to_vbo(old_state);
  374. if (vbo != old_vbo)
  375. crtc_state->mode_changed = true;
  376. }
  377. if (fb->pitches[1] != fb->pitches[2])
  378. return -EINVAL;
  379. /* fall-through */
  380. case DRM_FORMAT_NV12:
  381. case DRM_FORMAT_NV16:
  382. ubo = drm_plane_state_to_ubo(state);
  383. if (ubo & 0x7 || ubo > 0xfffff8)
  384. return -EINVAL;
  385. if (old_fb && (fb->format == old_fb->format)) {
  386. old_ubo = drm_plane_state_to_ubo(old_state);
  387. if (ubo != old_ubo)
  388. crtc_state->mode_changed = true;
  389. }
  390. if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
  391. return -EINVAL;
  392. if (old_fb && old_fb->pitches[1] != fb->pitches[1])
  393. crtc_state->mode_changed = true;
  394. /*
  395. * The x/y offsets must be even in case of horizontal/vertical
  396. * chroma subsampling.
  397. */
  398. hsub = drm_format_horz_chroma_subsampling(fb->format->format);
  399. vsub = drm_format_vert_chroma_subsampling(fb->format->format);
  400. if (((state->src.x1 >> 16) & (hsub - 1)) ||
  401. ((state->src.y1 >> 16) & (vsub - 1)))
  402. return -EINVAL;
  403. break;
  404. case DRM_FORMAT_RGB565_A8:
  405. case DRM_FORMAT_BGR565_A8:
  406. case DRM_FORMAT_RGB888_A8:
  407. case DRM_FORMAT_BGR888_A8:
  408. case DRM_FORMAT_RGBX8888_A8:
  409. case DRM_FORMAT_BGRX8888_A8:
  410. alpha_eba = drm_plane_state_to_eba(state, 1);
  411. if (alpha_eba & 0x7)
  412. return -EINVAL;
  413. if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
  414. return -EINVAL;
  415. if (old_fb && old_fb->pitches[1] != fb->pitches[1])
  416. crtc_state->mode_changed = true;
  417. break;
  418. }
  419. return 0;
  420. }
  421. static void ipu_plane_atomic_disable(struct drm_plane *plane,
  422. struct drm_plane_state *old_state)
  423. {
  424. struct ipu_plane *ipu_plane = to_ipu_plane(plane);
  425. if (ipu_plane->dp)
  426. ipu_dp_disable_channel(ipu_plane->dp, true);
  427. ipu_plane->disabling = true;
  428. }
  429. static int ipu_chan_assign_axi_id(int ipu_chan)
  430. {
  431. switch (ipu_chan) {
  432. case IPUV3_CHANNEL_MEM_BG_SYNC:
  433. return 1;
  434. case IPUV3_CHANNEL_MEM_FG_SYNC:
  435. return 2;
  436. case IPUV3_CHANNEL_MEM_DC_SYNC:
  437. return 3;
  438. default:
  439. return 0;
  440. }
  441. }
  442. static void ipu_calculate_bursts(u32 width, u32 cpp, u32 stride,
  443. u8 *burstsize, u8 *num_bursts)
  444. {
  445. const unsigned int width_bytes = width * cpp;
  446. unsigned int npb, bursts;
  447. /* Maximum number of pixels per burst without overshooting stride */
  448. for (npb = 64 / cpp; npb > 0; --npb) {
  449. if (round_up(width_bytes, npb * cpp) <= stride)
  450. break;
  451. }
  452. *burstsize = npb;
  453. /* Maximum number of consecutive bursts without overshooting stride */
  454. for (bursts = 8; bursts > 1; bursts /= 2) {
  455. if (round_up(width_bytes, npb * cpp * bursts) <= stride)
  456. break;
  457. }
  458. *num_bursts = bursts;
  459. }
  460. static void ipu_plane_atomic_update(struct drm_plane *plane,
  461. struct drm_plane_state *old_state)
  462. {
  463. struct ipu_plane *ipu_plane = to_ipu_plane(plane);
  464. struct drm_plane_state *state = plane->state;
  465. struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
  466. struct drm_crtc_state *crtc_state = state->crtc->state;
  467. struct drm_framebuffer *fb = state->fb;
  468. struct drm_rect *dst = &state->dst;
  469. unsigned long eba, ubo, vbo;
  470. unsigned long alpha_eba = 0;
  471. enum ipu_color_space ics;
  472. unsigned int axi_id = 0;
  473. const struct drm_format_info *info;
  474. u8 burstsize, num_bursts;
  475. u32 width, height;
  476. int active;
  477. if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG)
  478. ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);
  479. eba = drm_plane_state_to_eba(state, 0);
  480. /*
  481. * Configure PRG channel and attached PRE, this changes the EBA to an
  482. * internal SRAM location.
  483. */
  484. if (ipu_state->use_pre) {
  485. axi_id = ipu_chan_assign_axi_id(ipu_plane->dma);
  486. ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id,
  487. drm_rect_width(&state->src) >> 16,
  488. drm_rect_height(&state->src) >> 16,
  489. fb->pitches[0], fb->format->format,
  490. fb->modifier, &eba);
  491. }
  492. if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state)) {
  493. /* nothing to do if PRE is used */
  494. if (ipu_state->use_pre)
  495. return;
  496. active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
  497. ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
  498. ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
  499. if (ipu_plane_separate_alpha(ipu_plane)) {
  500. active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch);
  501. ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active,
  502. alpha_eba);
  503. ipu_idmac_select_buffer(ipu_plane->alpha_ch, !active);
  504. }
  505. return;
  506. }
  507. ics = ipu_drm_fourcc_to_colorspace(fb->format->format);
  508. switch (ipu_plane->dp_flow) {
  509. case IPU_DP_FLOW_SYNC_BG:
  510. ipu_dp_setup_channel(ipu_plane->dp, ics, IPUV3_COLORSPACE_RGB);
  511. ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
  512. break;
  513. case IPU_DP_FLOW_SYNC_FG:
  514. ipu_dp_setup_channel(ipu_plane->dp, ics,
  515. IPUV3_COLORSPACE_UNKNOWN);
  516. /* Enable local alpha on partial plane */
  517. switch (fb->format->format) {
  518. case DRM_FORMAT_ARGB1555:
  519. case DRM_FORMAT_ABGR1555:
  520. case DRM_FORMAT_RGBA5551:
  521. case DRM_FORMAT_BGRA5551:
  522. case DRM_FORMAT_ARGB4444:
  523. case DRM_FORMAT_ARGB8888:
  524. case DRM_FORMAT_ABGR8888:
  525. case DRM_FORMAT_RGBA8888:
  526. case DRM_FORMAT_BGRA8888:
  527. case DRM_FORMAT_RGB565_A8:
  528. case DRM_FORMAT_BGR565_A8:
  529. case DRM_FORMAT_RGB888_A8:
  530. case DRM_FORMAT_BGR888_A8:
  531. case DRM_FORMAT_RGBX8888_A8:
  532. case DRM_FORMAT_BGRX8888_A8:
  533. ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
  534. break;
  535. default:
  536. ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
  537. break;
  538. }
  539. }
  540. ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(dst));
  541. width = drm_rect_width(&state->src) >> 16;
  542. height = drm_rect_height(&state->src) >> 16;
  543. info = drm_format_info(fb->format->format);
  544. ipu_calculate_bursts(width, info->cpp[0], fb->pitches[0],
  545. &burstsize, &num_bursts);
  546. ipu_cpmem_zero(ipu_plane->ipu_ch);
  547. ipu_cpmem_set_resolution(ipu_plane->ipu_ch, width, height);
  548. ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->format->format);
  549. ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, burstsize);
  550. ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
  551. ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
  552. ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
  553. ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);
  554. switch (fb->format->format) {
  555. case DRM_FORMAT_YUV420:
  556. case DRM_FORMAT_YVU420:
  557. case DRM_FORMAT_YUV422:
  558. case DRM_FORMAT_YVU422:
  559. case DRM_FORMAT_YUV444:
  560. case DRM_FORMAT_YVU444:
  561. ubo = drm_plane_state_to_ubo(state);
  562. vbo = drm_plane_state_to_vbo(state);
  563. if (fb->format->format == DRM_FORMAT_YVU420 ||
  564. fb->format->format == DRM_FORMAT_YVU422 ||
  565. fb->format->format == DRM_FORMAT_YVU444)
  566. swap(ubo, vbo);
  567. ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
  568. fb->pitches[1], ubo, vbo);
  569. dev_dbg(ipu_plane->base.dev->dev,
  570. "phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
  571. state->src.x1 >> 16, state->src.y1 >> 16);
  572. break;
  573. case DRM_FORMAT_NV12:
  574. case DRM_FORMAT_NV16:
  575. ubo = drm_plane_state_to_ubo(state);
  576. ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
  577. fb->pitches[1], ubo, ubo);
  578. dev_dbg(ipu_plane->base.dev->dev,
  579. "phy = %lu %lu, x = %d, y = %d", eba, ubo,
  580. state->src.x1 >> 16, state->src.y1 >> 16);
  581. break;
  582. case DRM_FORMAT_RGB565_A8:
  583. case DRM_FORMAT_BGR565_A8:
  584. case DRM_FORMAT_RGB888_A8:
  585. case DRM_FORMAT_BGR888_A8:
  586. case DRM_FORMAT_RGBX8888_A8:
  587. case DRM_FORMAT_BGRX8888_A8:
  588. alpha_eba = drm_plane_state_to_eba(state, 1);
  589. num_bursts = 0;
  590. dev_dbg(ipu_plane->base.dev->dev, "phys = %lu %lu, x = %d, y = %d",
  591. eba, alpha_eba, state->src.x1 >> 16, state->src.y1 >> 16);
  592. ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, 16);
  593. ipu_cpmem_zero(ipu_plane->alpha_ch);
  594. ipu_cpmem_set_resolution(ipu_plane->alpha_ch,
  595. drm_rect_width(&state->src) >> 16,
  596. drm_rect_height(&state->src) >> 16);
  597. ipu_cpmem_set_format_passthrough(ipu_plane->alpha_ch, 8);
  598. ipu_cpmem_set_high_priority(ipu_plane->alpha_ch);
  599. ipu_idmac_set_double_buffer(ipu_plane->alpha_ch, 1);
  600. ipu_cpmem_set_stride(ipu_plane->alpha_ch, fb->pitches[1]);
  601. ipu_cpmem_set_burstsize(ipu_plane->alpha_ch, 16);
  602. ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 0, alpha_eba);
  603. ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 1, alpha_eba);
  604. break;
  605. default:
  606. dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
  607. eba, state->src.x1 >> 16, state->src.y1 >> 16);
  608. break;
  609. }
  610. ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
  611. ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
  612. ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts);
  613. ipu_plane_enable(ipu_plane);
  614. }
  615. static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
  616. .prepare_fb = drm_gem_fb_prepare_fb,
  617. .atomic_check = ipu_plane_atomic_check,
  618. .atomic_disable = ipu_plane_atomic_disable,
  619. .atomic_update = ipu_plane_atomic_update,
  620. };
  621. int ipu_planes_assign_pre(struct drm_device *dev,
  622. struct drm_atomic_state *state)
  623. {
  624. struct drm_crtc_state *old_crtc_state, *crtc_state;
  625. struct drm_plane_state *plane_state;
  626. struct ipu_plane_state *ipu_state;
  627. struct ipu_plane *ipu_plane;
  628. struct drm_plane *plane;
  629. struct drm_crtc *crtc;
  630. int available_pres = ipu_prg_max_active_channels();
  631. int ret, i;
  632. for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
  633. ret = drm_atomic_add_affected_planes(state, crtc);
  634. if (ret)
  635. return ret;
  636. }
  637. /*
  638. * We are going over the planes in 2 passes: first we assign PREs to
  639. * planes with a tiling modifier, which need the PREs to resolve into
  640. * linear. Any failure to assign a PRE there is fatal. In the second
  641. * pass we try to assign PREs to linear FBs, to improve memory access
  642. * patterns for them. Failure at this point is non-fatal, as we can
  643. * scan out linear FBs without a PRE.
  644. */
  645. for_each_new_plane_in_state(state, plane, plane_state, i) {
  646. ipu_state = to_ipu_plane_state(plane_state);
  647. ipu_plane = to_ipu_plane(plane);
  648. if (!plane_state->fb) {
  649. ipu_state->use_pre = false;
  650. continue;
  651. }
  652. if (!(plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) ||
  653. plane_state->fb->modifier == DRM_FORMAT_MOD_LINEAR)
  654. continue;
  655. if (!ipu_prg_present(ipu_plane->ipu) || !available_pres)
  656. return -EINVAL;
  657. if (!ipu_prg_format_supported(ipu_plane->ipu,
  658. plane_state->fb->format->format,
  659. plane_state->fb->modifier))
  660. return -EINVAL;
  661. ipu_state->use_pre = true;
  662. available_pres--;
  663. }
  664. for_each_new_plane_in_state(state, plane, plane_state, i) {
  665. ipu_state = to_ipu_plane_state(plane_state);
  666. ipu_plane = to_ipu_plane(plane);
  667. if (!plane_state->fb) {
  668. ipu_state->use_pre = false;
  669. continue;
  670. }
  671. if ((plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) &&
  672. plane_state->fb->modifier != DRM_FORMAT_MOD_LINEAR)
  673. continue;
  674. /* make sure that modifier is initialized */
  675. plane_state->fb->modifier = DRM_FORMAT_MOD_LINEAR;
  676. if (ipu_prg_present(ipu_plane->ipu) && available_pres &&
  677. ipu_prg_format_supported(ipu_plane->ipu,
  678. plane_state->fb->format->format,
  679. plane_state->fb->modifier)) {
  680. ipu_state->use_pre = true;
  681. available_pres--;
  682. } else {
  683. ipu_state->use_pre = false;
  684. }
  685. }
  686. return 0;
  687. }
  688. EXPORT_SYMBOL_GPL(ipu_planes_assign_pre);
  689. struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
  690. int dma, int dp, unsigned int possible_crtcs,
  691. enum drm_plane_type type)
  692. {
  693. struct ipu_plane *ipu_plane;
  694. const uint64_t *modifiers = ipu_format_modifiers;
  695. int ret;
  696. DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
  697. dma, dp, possible_crtcs);
  698. ipu_plane = kzalloc(sizeof(*ipu_plane), GFP_KERNEL);
  699. if (!ipu_plane) {
  700. DRM_ERROR("failed to allocate plane\n");
  701. return ERR_PTR(-ENOMEM);
  702. }
  703. ipu_plane->ipu = ipu;
  704. ipu_plane->dma = dma;
  705. ipu_plane->dp_flow = dp;
  706. if (ipu_prg_present(ipu))
  707. modifiers = pre_format_modifiers;
  708. ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
  709. &ipu_plane_funcs, ipu_plane_formats,
  710. ARRAY_SIZE(ipu_plane_formats),
  711. modifiers, type, NULL);
  712. if (ret) {
  713. DRM_ERROR("failed to initialize plane\n");
  714. kfree(ipu_plane);
  715. return ERR_PTR(ret);
  716. }
  717. drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
  718. return ipu_plane;
  719. }