intel_atomic_plane.c 9.0 KB

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  1. /*
  2. * Copyright © 2014 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. */
  23. /**
  24. * DOC: atomic plane helpers
  25. *
  26. * The functions here are used by the atomic plane helper functions to
  27. * implement legacy plane updates (i.e., drm_plane->update_plane() and
  28. * drm_plane->disable_plane()). This allows plane updates to use the
  29. * atomic state infrastructure and perform plane updates as separate
  30. * prepare/check/commit/cleanup steps.
  31. */
  32. #include <drm/drmP.h>
  33. #include <drm/drm_atomic_helper.h>
  34. #include <drm/drm_plane_helper.h>
  35. #include "intel_drv.h"
  36. /**
  37. * intel_create_plane_state - create plane state object
  38. * @plane: drm plane
  39. *
  40. * Allocates a fresh plane state for the given plane and sets some of
  41. * the state values to sensible initial values.
  42. *
  43. * Returns: A newly allocated plane state, or NULL on failure
  44. */
  45. struct intel_plane_state *
  46. intel_create_plane_state(struct drm_plane *plane)
  47. {
  48. struct intel_plane_state *state;
  49. state = kzalloc(sizeof(*state), GFP_KERNEL);
  50. if (!state)
  51. return NULL;
  52. state->base.plane = plane;
  53. state->base.rotation = DRM_MODE_ROTATE_0;
  54. return state;
  55. }
  56. /**
  57. * intel_plane_duplicate_state - duplicate plane state
  58. * @plane: drm plane
  59. *
  60. * Allocates and returns a copy of the plane state (both common and
  61. * Intel-specific) for the specified plane.
  62. *
  63. * Returns: The newly allocated plane state, or NULL on failure.
  64. */
  65. struct drm_plane_state *
  66. intel_plane_duplicate_state(struct drm_plane *plane)
  67. {
  68. struct drm_plane_state *state;
  69. struct intel_plane_state *intel_state;
  70. intel_state = kmemdup(plane->state, sizeof(*intel_state), GFP_KERNEL);
  71. if (!intel_state)
  72. return NULL;
  73. state = &intel_state->base;
  74. __drm_atomic_helper_plane_duplicate_state(plane, state);
  75. intel_state->vma = NULL;
  76. intel_state->flags = 0;
  77. return state;
  78. }
  79. /**
  80. * intel_plane_destroy_state - destroy plane state
  81. * @plane: drm plane
  82. * @state: state object to destroy
  83. *
  84. * Destroys the plane state (both common and Intel-specific) for the
  85. * specified plane.
  86. */
  87. void
  88. intel_plane_destroy_state(struct drm_plane *plane,
  89. struct drm_plane_state *state)
  90. {
  91. WARN_ON(to_intel_plane_state(state)->vma);
  92. drm_atomic_helper_plane_destroy_state(plane, state);
  93. }
  94. int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_state,
  95. struct intel_crtc_state *crtc_state,
  96. const struct intel_plane_state *old_plane_state,
  97. struct intel_plane_state *intel_state)
  98. {
  99. struct drm_plane *plane = intel_state->base.plane;
  100. struct drm_i915_private *dev_priv = to_i915(plane->dev);
  101. struct drm_plane_state *state = &intel_state->base;
  102. struct intel_plane *intel_plane = to_intel_plane(plane);
  103. const struct drm_display_mode *adjusted_mode =
  104. &crtc_state->base.adjusted_mode;
  105. int ret;
  106. if (!intel_state->base.crtc && !old_plane_state->base.crtc)
  107. return 0;
  108. if (state->fb && drm_rotation_90_or_270(state->rotation)) {
  109. struct drm_format_name_buf format_name;
  110. if (state->fb->modifier != I915_FORMAT_MOD_Y_TILED &&
  111. state->fb->modifier != I915_FORMAT_MOD_Yf_TILED) {
  112. DRM_DEBUG_KMS("Y/Yf tiling required for 90/270!\n");
  113. return -EINVAL;
  114. }
  115. /*
  116. * 90/270 is not allowed with RGB64 16:16:16:16,
  117. * RGB 16-bit 5:6:5, and Indexed 8-bit.
  118. * TBD: Add RGB64 case once its added in supported format list.
  119. */
  120. switch (state->fb->format->format) {
  121. case DRM_FORMAT_C8:
  122. case DRM_FORMAT_RGB565:
  123. DRM_DEBUG_KMS("Unsupported pixel format %s for 90/270!\n",
  124. drm_get_format_name(state->fb->format->format,
  125. &format_name));
  126. return -EINVAL;
  127. default:
  128. break;
  129. }
  130. }
  131. /* CHV ignores the mirror bit when the rotate bit is set :( */
  132. if (IS_CHERRYVIEW(dev_priv) &&
  133. state->rotation & DRM_MODE_ROTATE_180 &&
  134. state->rotation & DRM_MODE_REFLECT_X) {
  135. DRM_DEBUG_KMS("Cannot rotate and reflect at the same time\n");
  136. return -EINVAL;
  137. }
  138. intel_state->base.visible = false;
  139. ret = intel_plane->check_plane(intel_plane, crtc_state, intel_state);
  140. if (ret)
  141. return ret;
  142. /*
  143. * Y-tiling is not supported in IF-ID Interlace mode in
  144. * GEN9 and above.
  145. */
  146. if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
  147. adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
  148. if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
  149. state->fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
  150. DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
  151. return -EINVAL;
  152. }
  153. }
  154. /* FIXME pre-g4x don't work like this */
  155. if (state->visible)
  156. crtc_state->active_planes |= BIT(intel_plane->id);
  157. else
  158. crtc_state->active_planes &= ~BIT(intel_plane->id);
  159. if (state->visible && state->fb->format->format == DRM_FORMAT_NV12)
  160. crtc_state->nv12_planes |= BIT(intel_plane->id);
  161. else
  162. crtc_state->nv12_planes &= ~BIT(intel_plane->id);
  163. return intel_plane_atomic_calc_changes(old_crtc_state,
  164. &crtc_state->base,
  165. old_plane_state,
  166. state);
  167. }
  168. static int intel_plane_atomic_check(struct drm_plane *plane,
  169. struct drm_plane_state *new_plane_state)
  170. {
  171. struct drm_atomic_state *state = new_plane_state->state;
  172. const struct drm_plane_state *old_plane_state =
  173. drm_atomic_get_old_plane_state(state, plane);
  174. struct drm_crtc *crtc = new_plane_state->crtc ?: old_plane_state->crtc;
  175. const struct drm_crtc_state *old_crtc_state;
  176. struct drm_crtc_state *new_crtc_state;
  177. if (!crtc)
  178. return 0;
  179. old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
  180. new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
  181. return intel_plane_atomic_check_with_state(to_intel_crtc_state(old_crtc_state),
  182. to_intel_crtc_state(new_crtc_state),
  183. to_intel_plane_state(old_plane_state),
  184. to_intel_plane_state(new_plane_state));
  185. }
  186. static void intel_plane_atomic_update(struct drm_plane *plane,
  187. struct drm_plane_state *old_state)
  188. {
  189. struct intel_atomic_state *state = to_intel_atomic_state(old_state->state);
  190. struct intel_plane *intel_plane = to_intel_plane(plane);
  191. const struct intel_plane_state *new_plane_state =
  192. intel_atomic_get_new_plane_state(state, intel_plane);
  193. struct drm_crtc *crtc = new_plane_state->base.crtc ?: old_state->crtc;
  194. if (new_plane_state->base.visible) {
  195. const struct intel_crtc_state *new_crtc_state =
  196. intel_atomic_get_new_crtc_state(state, to_intel_crtc(crtc));
  197. trace_intel_update_plane(plane,
  198. to_intel_crtc(crtc));
  199. intel_plane->update_plane(intel_plane,
  200. new_crtc_state, new_plane_state);
  201. } else {
  202. trace_intel_disable_plane(plane,
  203. to_intel_crtc(crtc));
  204. intel_plane->disable_plane(intel_plane, to_intel_crtc(crtc));
  205. }
  206. }
  207. const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
  208. .prepare_fb = intel_prepare_plane_fb,
  209. .cleanup_fb = intel_cleanup_plane_fb,
  210. .atomic_check = intel_plane_atomic_check,
  211. .atomic_update = intel_plane_atomic_update,
  212. };
  213. /**
  214. * intel_plane_atomic_get_property - fetch plane property value
  215. * @plane: plane to fetch property for
  216. * @state: state containing the property value
  217. * @property: property to look up
  218. * @val: pointer to write property value into
  219. *
  220. * The DRM core does not store shadow copies of properties for
  221. * atomic-capable drivers. This entrypoint is used to fetch
  222. * the current value of a driver-specific plane property.
  223. */
  224. int
  225. intel_plane_atomic_get_property(struct drm_plane *plane,
  226. const struct drm_plane_state *state,
  227. struct drm_property *property,
  228. uint64_t *val)
  229. {
  230. DRM_DEBUG_KMS("Unknown property [PROP:%d:%s]\n",
  231. property->base.id, property->name);
  232. return -EINVAL;
  233. }
  234. /**
  235. * intel_plane_atomic_set_property - set plane property value
  236. * @plane: plane to set property for
  237. * @state: state to update property value in
  238. * @property: property to set
  239. * @val: value to set property to
  240. *
  241. * Writes the specified property value for a plane into the provided atomic
  242. * state object.
  243. *
  244. * Returns 0 on success, -EINVAL on unrecognized properties
  245. */
  246. int
  247. intel_plane_atomic_set_property(struct drm_plane *plane,
  248. struct drm_plane_state *state,
  249. struct drm_property *property,
  250. uint64_t val)
  251. {
  252. DRM_DEBUG_KMS("Unknown property [PROP:%d:%s]\n",
  253. property->base.id, property->name);
  254. return -EINVAL;
  255. }