gpio-pcf857x.c 13 KB

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  1. /*
  2. * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
  3. *
  4. * Copyright (C) 2007 David Brownell
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/gpio/driver.h>
  21. #include <linux/i2c.h>
  22. #include <linux/platform_data/pcf857x.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/irqdomain.h>
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/of.h>
  29. #include <linux/of_device.h>
  30. #include <linux/slab.h>
  31. #include <linux/spinlock.h>
  32. static const struct i2c_device_id pcf857x_id[] = {
  33. { "pcf8574", 8 },
  34. { "pcf8574a", 8 },
  35. { "pca8574", 8 },
  36. { "pca9670", 8 },
  37. { "pca9672", 8 },
  38. { "pca9674", 8 },
  39. { "pcf8575", 16 },
  40. { "pca8575", 16 },
  41. { "pca9671", 16 },
  42. { "pca9673", 16 },
  43. { "pca9675", 16 },
  44. { "max7328", 8 },
  45. { "max7329", 8 },
  46. { }
  47. };
  48. MODULE_DEVICE_TABLE(i2c, pcf857x_id);
  49. #ifdef CONFIG_OF
  50. static const struct of_device_id pcf857x_of_table[] = {
  51. { .compatible = "nxp,pcf8574" },
  52. { .compatible = "nxp,pcf8574a" },
  53. { .compatible = "nxp,pca8574" },
  54. { .compatible = "nxp,pca9670" },
  55. { .compatible = "nxp,pca9672" },
  56. { .compatible = "nxp,pca9674" },
  57. { .compatible = "nxp,pcf8575" },
  58. { .compatible = "nxp,pca8575" },
  59. { .compatible = "nxp,pca9671" },
  60. { .compatible = "nxp,pca9673" },
  61. { .compatible = "nxp,pca9675" },
  62. { .compatible = "maxim,max7328" },
  63. { .compatible = "maxim,max7329" },
  64. { }
  65. };
  66. MODULE_DEVICE_TABLE(of, pcf857x_of_table);
  67. #endif
  68. /*
  69. * The pcf857x, pca857x, and pca967x chips only expose one read and one
  70. * write register. Writing a "one" bit (to match the reset state) lets
  71. * that pin be used as an input; it's not an open-drain model, but acts
  72. * a bit like one. This is described as "quasi-bidirectional"; read the
  73. * chip documentation for details.
  74. *
  75. * Many other I2C GPIO expander chips (like the pca953x models) have
  76. * more complex register models and more conventional circuitry using
  77. * push/pull drivers. They often use the same 0x20..0x27 addresses as
  78. * pcf857x parts, making the "legacy" I2C driver model problematic.
  79. */
  80. struct pcf857x {
  81. struct gpio_chip chip;
  82. struct irq_chip irqchip;
  83. struct i2c_client *client;
  84. struct mutex lock; /* protect 'out' */
  85. unsigned out; /* software latch */
  86. unsigned status; /* current status */
  87. unsigned int irq_parent;
  88. unsigned irq_enabled; /* enabled irqs */
  89. int (*write)(struct i2c_client *client, unsigned data);
  90. int (*read)(struct i2c_client *client);
  91. };
  92. /*-------------------------------------------------------------------------*/
  93. /* Talk to 8-bit I/O expander */
  94. static int i2c_write_le8(struct i2c_client *client, unsigned data)
  95. {
  96. return i2c_smbus_write_byte(client, data);
  97. }
  98. static int i2c_read_le8(struct i2c_client *client)
  99. {
  100. return (int)i2c_smbus_read_byte(client);
  101. }
  102. /* Talk to 16-bit I/O expander */
  103. static int i2c_write_le16(struct i2c_client *client, unsigned word)
  104. {
  105. u8 buf[2] = { word & 0xff, word >> 8, };
  106. int status;
  107. status = i2c_master_send(client, buf, 2);
  108. return (status < 0) ? status : 0;
  109. }
  110. static int i2c_read_le16(struct i2c_client *client)
  111. {
  112. u8 buf[2];
  113. int status;
  114. status = i2c_master_recv(client, buf, 2);
  115. if (status < 0)
  116. return status;
  117. return (buf[1] << 8) | buf[0];
  118. }
  119. /*-------------------------------------------------------------------------*/
  120. static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
  121. {
  122. struct pcf857x *gpio = gpiochip_get_data(chip);
  123. int status;
  124. mutex_lock(&gpio->lock);
  125. gpio->out |= (1 << offset);
  126. status = gpio->write(gpio->client, gpio->out);
  127. mutex_unlock(&gpio->lock);
  128. return status;
  129. }
  130. static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
  131. {
  132. struct pcf857x *gpio = gpiochip_get_data(chip);
  133. int value;
  134. value = gpio->read(gpio->client);
  135. return (value < 0) ? value : !!(value & (1 << offset));
  136. }
  137. static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
  138. {
  139. struct pcf857x *gpio = gpiochip_get_data(chip);
  140. unsigned bit = 1 << offset;
  141. int status;
  142. mutex_lock(&gpio->lock);
  143. if (value)
  144. gpio->out |= bit;
  145. else
  146. gpio->out &= ~bit;
  147. status = gpio->write(gpio->client, gpio->out);
  148. mutex_unlock(&gpio->lock);
  149. return status;
  150. }
  151. static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
  152. {
  153. pcf857x_output(chip, offset, value);
  154. }
  155. /*-------------------------------------------------------------------------*/
  156. static irqreturn_t pcf857x_irq(int irq, void *data)
  157. {
  158. struct pcf857x *gpio = data;
  159. unsigned long change, i, status;
  160. status = gpio->read(gpio->client);
  161. /*
  162. * call the interrupt handler iff gpio is used as
  163. * interrupt source, just to avoid bad irqs
  164. */
  165. mutex_lock(&gpio->lock);
  166. change = (gpio->status ^ status) & gpio->irq_enabled;
  167. gpio->status = status;
  168. mutex_unlock(&gpio->lock);
  169. for_each_set_bit(i, &change, gpio->chip.ngpio)
  170. handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i));
  171. return IRQ_HANDLED;
  172. }
  173. /*
  174. * NOP functions
  175. */
  176. static void noop(struct irq_data *data) { }
  177. static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on)
  178. {
  179. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  180. int error = 0;
  181. if (gpio->irq_parent) {
  182. error = irq_set_irq_wake(gpio->irq_parent, on);
  183. if (error) {
  184. dev_dbg(&gpio->client->dev,
  185. "irq %u doesn't support irq_set_wake\n",
  186. gpio->irq_parent);
  187. gpio->irq_parent = 0;
  188. }
  189. }
  190. return error;
  191. }
  192. static void pcf857x_irq_enable(struct irq_data *data)
  193. {
  194. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  195. gpio->irq_enabled |= (1 << data->hwirq);
  196. }
  197. static void pcf857x_irq_disable(struct irq_data *data)
  198. {
  199. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  200. gpio->irq_enabled &= ~(1 << data->hwirq);
  201. }
  202. static void pcf857x_irq_bus_lock(struct irq_data *data)
  203. {
  204. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  205. mutex_lock(&gpio->lock);
  206. }
  207. static void pcf857x_irq_bus_sync_unlock(struct irq_data *data)
  208. {
  209. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  210. mutex_unlock(&gpio->lock);
  211. }
  212. /*-------------------------------------------------------------------------*/
  213. static int pcf857x_probe(struct i2c_client *client,
  214. const struct i2c_device_id *id)
  215. {
  216. struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
  217. struct device_node *np = client->dev.of_node;
  218. struct pcf857x *gpio;
  219. unsigned int n_latch = 0;
  220. int status;
  221. if (IS_ENABLED(CONFIG_OF) && np)
  222. of_property_read_u32(np, "lines-initial-states", &n_latch);
  223. else if (pdata)
  224. n_latch = pdata->n_latch;
  225. else
  226. dev_dbg(&client->dev, "no platform data\n");
  227. /* Allocate, initialize, and register this gpio_chip. */
  228. gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
  229. if (!gpio)
  230. return -ENOMEM;
  231. mutex_init(&gpio->lock);
  232. gpio->chip.base = pdata ? pdata->gpio_base : -1;
  233. gpio->chip.can_sleep = true;
  234. gpio->chip.parent = &client->dev;
  235. gpio->chip.owner = THIS_MODULE;
  236. gpio->chip.get = pcf857x_get;
  237. gpio->chip.set = pcf857x_set;
  238. gpio->chip.direction_input = pcf857x_input;
  239. gpio->chip.direction_output = pcf857x_output;
  240. gpio->chip.ngpio = id->driver_data;
  241. /* NOTE: the OnSemi jlc1562b is also largely compatible with
  242. * these parts, notably for output. It has a low-resolution
  243. * DAC instead of pin change IRQs; and its inputs can be the
  244. * result of comparators.
  245. */
  246. /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
  247. * 9670, 9672, 9764, and 9764a use quite a variety.
  248. *
  249. * NOTE: we don't distinguish here between *4 and *4a parts.
  250. */
  251. if (gpio->chip.ngpio == 8) {
  252. gpio->write = i2c_write_le8;
  253. gpio->read = i2c_read_le8;
  254. if (!i2c_check_functionality(client->adapter,
  255. I2C_FUNC_SMBUS_BYTE))
  256. status = -EIO;
  257. /* fail if there's no chip present */
  258. else
  259. status = i2c_smbus_read_byte(client);
  260. /* '75/'75c addresses are 0x20..0x27, just like the '74;
  261. * the '75c doesn't have a current source pulling high.
  262. * 9671, 9673, and 9765 use quite a variety of addresses.
  263. *
  264. * NOTE: we don't distinguish here between '75 and '75c parts.
  265. */
  266. } else if (gpio->chip.ngpio == 16) {
  267. gpio->write = i2c_write_le16;
  268. gpio->read = i2c_read_le16;
  269. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  270. status = -EIO;
  271. /* fail if there's no chip present */
  272. else
  273. status = i2c_read_le16(client);
  274. } else {
  275. dev_dbg(&client->dev, "unsupported number of gpios\n");
  276. status = -EINVAL;
  277. }
  278. if (status < 0)
  279. goto fail;
  280. gpio->chip.label = client->name;
  281. gpio->client = client;
  282. i2c_set_clientdata(client, gpio);
  283. /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
  284. * We can't actually know whether a pin is configured (a) as output
  285. * and driving the signal low, or (b) as input and reporting a low
  286. * value ... without knowing the last value written since the chip
  287. * came out of reset (if any). We can't read the latched output.
  288. *
  289. * In short, the only reliable solution for setting up pin direction
  290. * is to do it explicitly. The setup() method can do that, but it
  291. * may cause transient glitching since it can't know the last value
  292. * written (some pins may need to be driven low).
  293. *
  294. * Using n_latch avoids that trouble. When left initialized to zero,
  295. * our software copy of the "latch" then matches the chip's all-ones
  296. * reset state. Otherwise it flags pins to be driven low.
  297. */
  298. gpio->out = ~n_latch;
  299. gpio->status = gpio->out;
  300. status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio);
  301. if (status < 0)
  302. goto fail;
  303. /* Enable irqchip if we have an interrupt */
  304. if (client->irq) {
  305. gpio->irqchip.name = "pcf857x",
  306. gpio->irqchip.irq_enable = pcf857x_irq_enable,
  307. gpio->irqchip.irq_disable = pcf857x_irq_disable,
  308. gpio->irqchip.irq_ack = noop,
  309. gpio->irqchip.irq_mask = noop,
  310. gpio->irqchip.irq_unmask = noop,
  311. gpio->irqchip.irq_set_wake = pcf857x_irq_set_wake,
  312. gpio->irqchip.irq_bus_lock = pcf857x_irq_bus_lock,
  313. gpio->irqchip.irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock,
  314. status = gpiochip_irqchip_add_nested(&gpio->chip,
  315. &gpio->irqchip,
  316. 0, handle_level_irq,
  317. IRQ_TYPE_NONE);
  318. if (status) {
  319. dev_err(&client->dev, "cannot add irqchip\n");
  320. goto fail;
  321. }
  322. status = devm_request_threaded_irq(&client->dev, client->irq,
  323. NULL, pcf857x_irq, IRQF_ONESHOT |
  324. IRQF_TRIGGER_FALLING | IRQF_SHARED,
  325. dev_name(&client->dev), gpio);
  326. if (status)
  327. goto fail;
  328. gpiochip_set_nested_irqchip(&gpio->chip, &gpio->irqchip,
  329. client->irq);
  330. gpio->irq_parent = client->irq;
  331. }
  332. /* Let platform code set up the GPIOs and their users.
  333. * Now is the first time anyone could use them.
  334. */
  335. if (pdata && pdata->setup) {
  336. status = pdata->setup(client,
  337. gpio->chip.base, gpio->chip.ngpio,
  338. pdata->context);
  339. if (status < 0)
  340. dev_warn(&client->dev, "setup --> %d\n", status);
  341. }
  342. dev_info(&client->dev, "probed\n");
  343. return 0;
  344. fail:
  345. dev_dbg(&client->dev, "probe error %d for '%s'\n", status,
  346. client->name);
  347. return status;
  348. }
  349. static int pcf857x_remove(struct i2c_client *client)
  350. {
  351. struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
  352. struct pcf857x *gpio = i2c_get_clientdata(client);
  353. int status = 0;
  354. if (pdata && pdata->teardown) {
  355. status = pdata->teardown(client,
  356. gpio->chip.base, gpio->chip.ngpio,
  357. pdata->context);
  358. if (status < 0) {
  359. dev_err(&client->dev, "%s --> %d\n",
  360. "teardown", status);
  361. return status;
  362. }
  363. }
  364. return status;
  365. }
  366. static void pcf857x_shutdown(struct i2c_client *client)
  367. {
  368. struct pcf857x *gpio = i2c_get_clientdata(client);
  369. /* Drive all the I/O lines high */
  370. gpio->write(gpio->client, BIT(gpio->chip.ngpio) - 1);
  371. }
  372. static struct i2c_driver pcf857x_driver = {
  373. .driver = {
  374. .name = "pcf857x",
  375. .of_match_table = of_match_ptr(pcf857x_of_table),
  376. },
  377. .probe = pcf857x_probe,
  378. .remove = pcf857x_remove,
  379. .shutdown = pcf857x_shutdown,
  380. .id_table = pcf857x_id,
  381. };
  382. static int __init pcf857x_init(void)
  383. {
  384. return i2c_add_driver(&pcf857x_driver);
  385. }
  386. /* register after i2c postcore initcall and before
  387. * subsys initcalls that may rely on these GPIOs
  388. */
  389. subsys_initcall(pcf857x_init);
  390. static void __exit pcf857x_exit(void)
  391. {
  392. i2c_del_driver(&pcf857x_driver);
  393. }
  394. module_exit(pcf857x_exit);
  395. MODULE_LICENSE("GPL");
  396. MODULE_AUTHOR("David Brownell");