gpio-74x164.c 5.0 KB

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  1. /*
  2. * 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
  3. *
  4. * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
  5. * Copyright (C) 2010 Miguel Gaio <miguel.gaio@efixo.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/mutex.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/gpio/driver.h>
  15. #include <linux/gpio/consumer.h>
  16. #include <linux/slab.h>
  17. #include <linux/module.h>
  18. #define GEN_74X164_NUMBER_GPIOS 8
  19. struct gen_74x164_chip {
  20. struct gpio_chip gpio_chip;
  21. struct mutex lock;
  22. struct gpio_desc *gpiod_oe;
  23. u32 registers;
  24. /*
  25. * Since the registers are chained, every byte sent will make
  26. * the previous byte shift to the next register in the
  27. * chain. Thus, the first byte sent will end up in the last
  28. * register at the end of the transfer. So, to have a logical
  29. * numbering, store the bytes in reverse order.
  30. */
  31. u8 buffer[];
  32. };
  33. static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
  34. {
  35. return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer,
  36. chip->registers);
  37. }
  38. static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
  39. {
  40. struct gen_74x164_chip *chip = gpiochip_get_data(gc);
  41. u8 bank = chip->registers - 1 - offset / 8;
  42. u8 pin = offset % 8;
  43. int ret;
  44. mutex_lock(&chip->lock);
  45. ret = (chip->buffer[bank] >> pin) & 0x1;
  46. mutex_unlock(&chip->lock);
  47. return ret;
  48. }
  49. static void gen_74x164_set_value(struct gpio_chip *gc,
  50. unsigned offset, int val)
  51. {
  52. struct gen_74x164_chip *chip = gpiochip_get_data(gc);
  53. u8 bank = chip->registers - 1 - offset / 8;
  54. u8 pin = offset % 8;
  55. mutex_lock(&chip->lock);
  56. if (val)
  57. chip->buffer[bank] |= (1 << pin);
  58. else
  59. chip->buffer[bank] &= ~(1 << pin);
  60. __gen_74x164_write_config(chip);
  61. mutex_unlock(&chip->lock);
  62. }
  63. static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask,
  64. unsigned long *bits)
  65. {
  66. struct gen_74x164_chip *chip = gpiochip_get_data(gc);
  67. unsigned int i, idx, shift;
  68. u8 bank, bankmask;
  69. mutex_lock(&chip->lock);
  70. for (i = 0, bank = chip->registers - 1; i < chip->registers;
  71. i++, bank--) {
  72. idx = i / sizeof(*mask);
  73. shift = i % sizeof(*mask) * BITS_PER_BYTE;
  74. bankmask = mask[idx] >> shift;
  75. if (!bankmask)
  76. continue;
  77. chip->buffer[bank] &= ~bankmask;
  78. chip->buffer[bank] |= bankmask & (bits[idx] >> shift);
  79. }
  80. __gen_74x164_write_config(chip);
  81. mutex_unlock(&chip->lock);
  82. }
  83. static int gen_74x164_direction_output(struct gpio_chip *gc,
  84. unsigned offset, int val)
  85. {
  86. gen_74x164_set_value(gc, offset, val);
  87. return 0;
  88. }
  89. static int gen_74x164_probe(struct spi_device *spi)
  90. {
  91. struct gen_74x164_chip *chip;
  92. u32 nregs;
  93. int ret;
  94. /*
  95. * bits_per_word cannot be configured in platform data
  96. */
  97. spi->bits_per_word = 8;
  98. ret = spi_setup(spi);
  99. if (ret < 0)
  100. return ret;
  101. if (of_property_read_u32(spi->dev.of_node, "registers-number",
  102. &nregs)) {
  103. dev_err(&spi->dev,
  104. "Missing registers-number property in the DT.\n");
  105. return -EINVAL;
  106. }
  107. chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL);
  108. if (!chip)
  109. return -ENOMEM;
  110. chip->gpiod_oe = devm_gpiod_get_optional(&spi->dev, "enable",
  111. GPIOD_OUT_LOW);
  112. if (IS_ERR(chip->gpiod_oe))
  113. return PTR_ERR(chip->gpiod_oe);
  114. gpiod_set_value_cansleep(chip->gpiod_oe, 1);
  115. spi_set_drvdata(spi, chip);
  116. chip->gpio_chip.label = spi->modalias;
  117. chip->gpio_chip.direction_output = gen_74x164_direction_output;
  118. chip->gpio_chip.get = gen_74x164_get_value;
  119. chip->gpio_chip.set = gen_74x164_set_value;
  120. chip->gpio_chip.set_multiple = gen_74x164_set_multiple;
  121. chip->gpio_chip.base = -1;
  122. chip->registers = nregs;
  123. chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
  124. chip->gpio_chip.can_sleep = true;
  125. chip->gpio_chip.parent = &spi->dev;
  126. chip->gpio_chip.owner = THIS_MODULE;
  127. mutex_init(&chip->lock);
  128. ret = __gen_74x164_write_config(chip);
  129. if (ret) {
  130. dev_err(&spi->dev, "Failed writing: %d\n", ret);
  131. goto exit_destroy;
  132. }
  133. ret = gpiochip_add_data(&chip->gpio_chip, chip);
  134. if (!ret)
  135. return 0;
  136. exit_destroy:
  137. mutex_destroy(&chip->lock);
  138. return ret;
  139. }
  140. static int gen_74x164_remove(struct spi_device *spi)
  141. {
  142. struct gen_74x164_chip *chip = spi_get_drvdata(spi);
  143. gpiod_set_value_cansleep(chip->gpiod_oe, 0);
  144. gpiochip_remove(&chip->gpio_chip);
  145. mutex_destroy(&chip->lock);
  146. return 0;
  147. }
  148. static const struct of_device_id gen_74x164_dt_ids[] = {
  149. { .compatible = "fairchild,74hc595" },
  150. { .compatible = "nxp,74lvc594" },
  151. {},
  152. };
  153. MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids);
  154. static struct spi_driver gen_74x164_driver = {
  155. .driver = {
  156. .name = "74x164",
  157. .of_match_table = gen_74x164_dt_ids,
  158. },
  159. .probe = gen_74x164_probe,
  160. .remove = gen_74x164_remove,
  161. };
  162. module_spi_driver(gen_74x164_driver);
  163. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
  164. MODULE_AUTHOR("Miguel Gaio <miguel.gaio@efixo.com>");
  165. MODULE_DESCRIPTION("GPIO expander driver for 74X164 8-bits shift register");
  166. MODULE_LICENSE("GPL v2");