edac_mc_sysfs.c 27 KB

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  1. /*
  2. * edac_mc kernel module
  3. * (C) 2005-2007 Linux Networx (http://lnxi.com)
  4. *
  5. * This file may be distributed under the terms of the
  6. * GNU General Public License.
  7. *
  8. * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
  9. *
  10. * (c) 2012-2013 - Mauro Carvalho Chehab
  11. * The entire API were re-written, and ported to use struct device
  12. *
  13. */
  14. #include <linux/ctype.h>
  15. #include <linux/slab.h>
  16. #include <linux/edac.h>
  17. #include <linux/bug.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/uaccess.h>
  20. #include "edac_mc.h"
  21. #include "edac_module.h"
  22. /* MC EDAC Controls, setable by module parameter, and sysfs */
  23. static int edac_mc_log_ue = 1;
  24. static int edac_mc_log_ce = 1;
  25. static int edac_mc_panic_on_ue;
  26. static unsigned int edac_mc_poll_msec = 1000;
  27. /* Getter functions for above */
  28. int edac_mc_get_log_ue(void)
  29. {
  30. return edac_mc_log_ue;
  31. }
  32. int edac_mc_get_log_ce(void)
  33. {
  34. return edac_mc_log_ce;
  35. }
  36. int edac_mc_get_panic_on_ue(void)
  37. {
  38. return edac_mc_panic_on_ue;
  39. }
  40. /* this is temporary */
  41. unsigned int edac_mc_get_poll_msec(void)
  42. {
  43. return edac_mc_poll_msec;
  44. }
  45. static int edac_set_poll_msec(const char *val, const struct kernel_param *kp)
  46. {
  47. unsigned int i;
  48. int ret;
  49. if (!val)
  50. return -EINVAL;
  51. ret = kstrtouint(val, 0, &i);
  52. if (ret)
  53. return ret;
  54. if (i < 1000)
  55. return -EINVAL;
  56. *((unsigned int *)kp->arg) = i;
  57. /* notify edac_mc engine to reset the poll period */
  58. edac_mc_reset_delay_period(i);
  59. return 0;
  60. }
  61. /* Parameter declarations for above */
  62. module_param(edac_mc_panic_on_ue, int, 0644);
  63. MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
  64. module_param(edac_mc_log_ue, int, 0644);
  65. MODULE_PARM_DESC(edac_mc_log_ue,
  66. "Log uncorrectable error to console: 0=off 1=on");
  67. module_param(edac_mc_log_ce, int, 0644);
  68. MODULE_PARM_DESC(edac_mc_log_ce,
  69. "Log correctable error to console: 0=off 1=on");
  70. module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_uint,
  71. &edac_mc_poll_msec, 0644);
  72. MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
  73. static struct device *mci_pdev;
  74. /*
  75. * various constants for Memory Controllers
  76. */
  77. static const char * const dev_types[] = {
  78. [DEV_UNKNOWN] = "Unknown",
  79. [DEV_X1] = "x1",
  80. [DEV_X2] = "x2",
  81. [DEV_X4] = "x4",
  82. [DEV_X8] = "x8",
  83. [DEV_X16] = "x16",
  84. [DEV_X32] = "x32",
  85. [DEV_X64] = "x64"
  86. };
  87. static const char * const edac_caps[] = {
  88. [EDAC_UNKNOWN] = "Unknown",
  89. [EDAC_NONE] = "None",
  90. [EDAC_RESERVED] = "Reserved",
  91. [EDAC_PARITY] = "PARITY",
  92. [EDAC_EC] = "EC",
  93. [EDAC_SECDED] = "SECDED",
  94. [EDAC_S2ECD2ED] = "S2ECD2ED",
  95. [EDAC_S4ECD4ED] = "S4ECD4ED",
  96. [EDAC_S8ECD8ED] = "S8ECD8ED",
  97. [EDAC_S16ECD16ED] = "S16ECD16ED"
  98. };
  99. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  100. /*
  101. * EDAC sysfs CSROW data structures and methods
  102. */
  103. #define to_csrow(k) container_of(k, struct csrow_info, dev)
  104. /*
  105. * We need it to avoid namespace conflicts between the legacy API
  106. * and the per-dimm/per-rank one
  107. */
  108. #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
  109. static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
  110. struct dev_ch_attribute {
  111. struct device_attribute attr;
  112. int channel;
  113. };
  114. #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
  115. static struct dev_ch_attribute dev_attr_legacy_##_name = \
  116. { __ATTR(_name, _mode, _show, _store), (_var) }
  117. #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
  118. /* Set of more default csrow<id> attribute show/store functions */
  119. static ssize_t csrow_ue_count_show(struct device *dev,
  120. struct device_attribute *mattr, char *data)
  121. {
  122. struct csrow_info *csrow = to_csrow(dev);
  123. return sprintf(data, "%u\n", csrow->ue_count);
  124. }
  125. static ssize_t csrow_ce_count_show(struct device *dev,
  126. struct device_attribute *mattr, char *data)
  127. {
  128. struct csrow_info *csrow = to_csrow(dev);
  129. return sprintf(data, "%u\n", csrow->ce_count);
  130. }
  131. static ssize_t csrow_size_show(struct device *dev,
  132. struct device_attribute *mattr, char *data)
  133. {
  134. struct csrow_info *csrow = to_csrow(dev);
  135. int i;
  136. u32 nr_pages = 0;
  137. for (i = 0; i < csrow->nr_channels; i++)
  138. nr_pages += csrow->channels[i]->dimm->nr_pages;
  139. return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
  140. }
  141. static ssize_t csrow_mem_type_show(struct device *dev,
  142. struct device_attribute *mattr, char *data)
  143. {
  144. struct csrow_info *csrow = to_csrow(dev);
  145. return sprintf(data, "%s\n", edac_mem_types[csrow->channels[0]->dimm->mtype]);
  146. }
  147. static ssize_t csrow_dev_type_show(struct device *dev,
  148. struct device_attribute *mattr, char *data)
  149. {
  150. struct csrow_info *csrow = to_csrow(dev);
  151. return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]);
  152. }
  153. static ssize_t csrow_edac_mode_show(struct device *dev,
  154. struct device_attribute *mattr,
  155. char *data)
  156. {
  157. struct csrow_info *csrow = to_csrow(dev);
  158. return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]);
  159. }
  160. /* show/store functions for DIMM Label attributes */
  161. static ssize_t channel_dimm_label_show(struct device *dev,
  162. struct device_attribute *mattr,
  163. char *data)
  164. {
  165. struct csrow_info *csrow = to_csrow(dev);
  166. unsigned chan = to_channel(mattr);
  167. struct rank_info *rank = csrow->channels[chan];
  168. /* if field has not been initialized, there is nothing to send */
  169. if (!rank->dimm->label[0])
  170. return 0;
  171. return snprintf(data, sizeof(rank->dimm->label) + 1, "%s\n",
  172. rank->dimm->label);
  173. }
  174. static ssize_t channel_dimm_label_store(struct device *dev,
  175. struct device_attribute *mattr,
  176. const char *data, size_t count)
  177. {
  178. struct csrow_info *csrow = to_csrow(dev);
  179. unsigned chan = to_channel(mattr);
  180. struct rank_info *rank = csrow->channels[chan];
  181. size_t copy_count = count;
  182. if (count == 0)
  183. return -EINVAL;
  184. if (data[count - 1] == '\0' || data[count - 1] == '\n')
  185. copy_count -= 1;
  186. if (copy_count == 0 || copy_count >= sizeof(rank->dimm->label))
  187. return -EINVAL;
  188. strncpy(rank->dimm->label, data, copy_count);
  189. rank->dimm->label[copy_count] = '\0';
  190. return count;
  191. }
  192. /* show function for dynamic chX_ce_count attribute */
  193. static ssize_t channel_ce_count_show(struct device *dev,
  194. struct device_attribute *mattr, char *data)
  195. {
  196. struct csrow_info *csrow = to_csrow(dev);
  197. unsigned chan = to_channel(mattr);
  198. struct rank_info *rank = csrow->channels[chan];
  199. return sprintf(data, "%u\n", rank->ce_count);
  200. }
  201. /* cwrow<id>/attribute files */
  202. DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
  203. DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
  204. DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
  205. DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
  206. DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
  207. DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
  208. /* default attributes of the CSROW<id> object */
  209. static struct attribute *csrow_attrs[] = {
  210. &dev_attr_legacy_dev_type.attr,
  211. &dev_attr_legacy_mem_type.attr,
  212. &dev_attr_legacy_edac_mode.attr,
  213. &dev_attr_legacy_size_mb.attr,
  214. &dev_attr_legacy_ue_count.attr,
  215. &dev_attr_legacy_ce_count.attr,
  216. NULL,
  217. };
  218. static const struct attribute_group csrow_attr_grp = {
  219. .attrs = csrow_attrs,
  220. };
  221. static const struct attribute_group *csrow_attr_groups[] = {
  222. &csrow_attr_grp,
  223. NULL
  224. };
  225. static void csrow_attr_release(struct device *dev)
  226. {
  227. struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
  228. edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
  229. kfree(csrow);
  230. }
  231. static const struct device_type csrow_attr_type = {
  232. .groups = csrow_attr_groups,
  233. .release = csrow_attr_release,
  234. };
  235. /*
  236. * possible dynamic channel DIMM Label attribute files
  237. *
  238. */
  239. DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
  240. channel_dimm_label_show, channel_dimm_label_store, 0);
  241. DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
  242. channel_dimm_label_show, channel_dimm_label_store, 1);
  243. DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
  244. channel_dimm_label_show, channel_dimm_label_store, 2);
  245. DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
  246. channel_dimm_label_show, channel_dimm_label_store, 3);
  247. DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
  248. channel_dimm_label_show, channel_dimm_label_store, 4);
  249. DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
  250. channel_dimm_label_show, channel_dimm_label_store, 5);
  251. DEVICE_CHANNEL(ch6_dimm_label, S_IRUGO | S_IWUSR,
  252. channel_dimm_label_show, channel_dimm_label_store, 6);
  253. DEVICE_CHANNEL(ch7_dimm_label, S_IRUGO | S_IWUSR,
  254. channel_dimm_label_show, channel_dimm_label_store, 7);
  255. /* Total possible dynamic DIMM Label attribute file table */
  256. static struct attribute *dynamic_csrow_dimm_attr[] = {
  257. &dev_attr_legacy_ch0_dimm_label.attr.attr,
  258. &dev_attr_legacy_ch1_dimm_label.attr.attr,
  259. &dev_attr_legacy_ch2_dimm_label.attr.attr,
  260. &dev_attr_legacy_ch3_dimm_label.attr.attr,
  261. &dev_attr_legacy_ch4_dimm_label.attr.attr,
  262. &dev_attr_legacy_ch5_dimm_label.attr.attr,
  263. &dev_attr_legacy_ch6_dimm_label.attr.attr,
  264. &dev_attr_legacy_ch7_dimm_label.attr.attr,
  265. NULL
  266. };
  267. /* possible dynamic channel ce_count attribute files */
  268. DEVICE_CHANNEL(ch0_ce_count, S_IRUGO,
  269. channel_ce_count_show, NULL, 0);
  270. DEVICE_CHANNEL(ch1_ce_count, S_IRUGO,
  271. channel_ce_count_show, NULL, 1);
  272. DEVICE_CHANNEL(ch2_ce_count, S_IRUGO,
  273. channel_ce_count_show, NULL, 2);
  274. DEVICE_CHANNEL(ch3_ce_count, S_IRUGO,
  275. channel_ce_count_show, NULL, 3);
  276. DEVICE_CHANNEL(ch4_ce_count, S_IRUGO,
  277. channel_ce_count_show, NULL, 4);
  278. DEVICE_CHANNEL(ch5_ce_count, S_IRUGO,
  279. channel_ce_count_show, NULL, 5);
  280. DEVICE_CHANNEL(ch6_ce_count, S_IRUGO,
  281. channel_ce_count_show, NULL, 6);
  282. DEVICE_CHANNEL(ch7_ce_count, S_IRUGO,
  283. channel_ce_count_show, NULL, 7);
  284. /* Total possible dynamic ce_count attribute file table */
  285. static struct attribute *dynamic_csrow_ce_count_attr[] = {
  286. &dev_attr_legacy_ch0_ce_count.attr.attr,
  287. &dev_attr_legacy_ch1_ce_count.attr.attr,
  288. &dev_attr_legacy_ch2_ce_count.attr.attr,
  289. &dev_attr_legacy_ch3_ce_count.attr.attr,
  290. &dev_attr_legacy_ch4_ce_count.attr.attr,
  291. &dev_attr_legacy_ch5_ce_count.attr.attr,
  292. &dev_attr_legacy_ch6_ce_count.attr.attr,
  293. &dev_attr_legacy_ch7_ce_count.attr.attr,
  294. NULL
  295. };
  296. static umode_t csrow_dev_is_visible(struct kobject *kobj,
  297. struct attribute *attr, int idx)
  298. {
  299. struct device *dev = kobj_to_dev(kobj);
  300. struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
  301. if (idx >= csrow->nr_channels)
  302. return 0;
  303. if (idx >= ARRAY_SIZE(dynamic_csrow_ce_count_attr) - 1) {
  304. WARN_ONCE(1, "idx: %d\n", idx);
  305. return 0;
  306. }
  307. /* Only expose populated DIMMs */
  308. if (!csrow->channels[idx]->dimm->nr_pages)
  309. return 0;
  310. return attr->mode;
  311. }
  312. static const struct attribute_group csrow_dev_dimm_group = {
  313. .attrs = dynamic_csrow_dimm_attr,
  314. .is_visible = csrow_dev_is_visible,
  315. };
  316. static const struct attribute_group csrow_dev_ce_count_group = {
  317. .attrs = dynamic_csrow_ce_count_attr,
  318. .is_visible = csrow_dev_is_visible,
  319. };
  320. static const struct attribute_group *csrow_dev_groups[] = {
  321. &csrow_dev_dimm_group,
  322. &csrow_dev_ce_count_group,
  323. NULL
  324. };
  325. static inline int nr_pages_per_csrow(struct csrow_info *csrow)
  326. {
  327. int chan, nr_pages = 0;
  328. for (chan = 0; chan < csrow->nr_channels; chan++)
  329. nr_pages += csrow->channels[chan]->dimm->nr_pages;
  330. return nr_pages;
  331. }
  332. /* Create a CSROW object under specifed edac_mc_device */
  333. static int edac_create_csrow_object(struct mem_ctl_info *mci,
  334. struct csrow_info *csrow, int index)
  335. {
  336. int err;
  337. csrow->dev.type = &csrow_attr_type;
  338. csrow->dev.bus = mci->bus;
  339. csrow->dev.groups = csrow_dev_groups;
  340. device_initialize(&csrow->dev);
  341. csrow->dev.parent = &mci->dev;
  342. csrow->mci = mci;
  343. dev_set_name(&csrow->dev, "csrow%d", index);
  344. dev_set_drvdata(&csrow->dev, csrow);
  345. edac_dbg(0, "creating (virtual) csrow node %s\n",
  346. dev_name(&csrow->dev));
  347. err = device_add(&csrow->dev);
  348. if (err)
  349. put_device(&csrow->dev);
  350. return err;
  351. }
  352. /* Create a CSROW object under specifed edac_mc_device */
  353. static int edac_create_csrow_objects(struct mem_ctl_info *mci)
  354. {
  355. int err, i;
  356. struct csrow_info *csrow;
  357. for (i = 0; i < mci->nr_csrows; i++) {
  358. csrow = mci->csrows[i];
  359. if (!nr_pages_per_csrow(csrow))
  360. continue;
  361. err = edac_create_csrow_object(mci, mci->csrows[i], i);
  362. if (err < 0) {
  363. edac_dbg(1,
  364. "failure: create csrow objects for csrow %d\n",
  365. i);
  366. goto error;
  367. }
  368. }
  369. return 0;
  370. error:
  371. for (--i; i >= 0; i--) {
  372. csrow = mci->csrows[i];
  373. if (!nr_pages_per_csrow(csrow))
  374. continue;
  375. put_device(&mci->csrows[i]->dev);
  376. }
  377. return err;
  378. }
  379. static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
  380. {
  381. int i;
  382. struct csrow_info *csrow;
  383. for (i = mci->nr_csrows - 1; i >= 0; i--) {
  384. csrow = mci->csrows[i];
  385. if (!nr_pages_per_csrow(csrow))
  386. continue;
  387. device_unregister(&mci->csrows[i]->dev);
  388. }
  389. }
  390. #endif
  391. /*
  392. * Per-dimm (or per-rank) devices
  393. */
  394. #define to_dimm(k) container_of(k, struct dimm_info, dev)
  395. /* show/store functions for DIMM Label attributes */
  396. static ssize_t dimmdev_location_show(struct device *dev,
  397. struct device_attribute *mattr, char *data)
  398. {
  399. struct dimm_info *dimm = to_dimm(dev);
  400. return edac_dimm_info_location(dimm, data, PAGE_SIZE);
  401. }
  402. static ssize_t dimmdev_label_show(struct device *dev,
  403. struct device_attribute *mattr, char *data)
  404. {
  405. struct dimm_info *dimm = to_dimm(dev);
  406. /* if field has not been initialized, there is nothing to send */
  407. if (!dimm->label[0])
  408. return 0;
  409. return snprintf(data, sizeof(dimm->label) + 1, "%s\n", dimm->label);
  410. }
  411. static ssize_t dimmdev_label_store(struct device *dev,
  412. struct device_attribute *mattr,
  413. const char *data,
  414. size_t count)
  415. {
  416. struct dimm_info *dimm = to_dimm(dev);
  417. size_t copy_count = count;
  418. if (count == 0)
  419. return -EINVAL;
  420. if (data[count - 1] == '\0' || data[count - 1] == '\n')
  421. copy_count -= 1;
  422. if (copy_count == 0 || copy_count >= sizeof(dimm->label))
  423. return -EINVAL;
  424. strncpy(dimm->label, data, copy_count);
  425. dimm->label[copy_count] = '\0';
  426. return count;
  427. }
  428. static ssize_t dimmdev_size_show(struct device *dev,
  429. struct device_attribute *mattr, char *data)
  430. {
  431. struct dimm_info *dimm = to_dimm(dev);
  432. return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
  433. }
  434. static ssize_t dimmdev_mem_type_show(struct device *dev,
  435. struct device_attribute *mattr, char *data)
  436. {
  437. struct dimm_info *dimm = to_dimm(dev);
  438. return sprintf(data, "%s\n", edac_mem_types[dimm->mtype]);
  439. }
  440. static ssize_t dimmdev_dev_type_show(struct device *dev,
  441. struct device_attribute *mattr, char *data)
  442. {
  443. struct dimm_info *dimm = to_dimm(dev);
  444. return sprintf(data, "%s\n", dev_types[dimm->dtype]);
  445. }
  446. static ssize_t dimmdev_edac_mode_show(struct device *dev,
  447. struct device_attribute *mattr,
  448. char *data)
  449. {
  450. struct dimm_info *dimm = to_dimm(dev);
  451. return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
  452. }
  453. static ssize_t dimmdev_ce_count_show(struct device *dev,
  454. struct device_attribute *mattr,
  455. char *data)
  456. {
  457. struct dimm_info *dimm = to_dimm(dev);
  458. u32 count;
  459. int off;
  460. off = EDAC_DIMM_OFF(dimm->mci->layers,
  461. dimm->mci->n_layers,
  462. dimm->location[0],
  463. dimm->location[1],
  464. dimm->location[2]);
  465. count = dimm->mci->ce_per_layer[dimm->mci->n_layers-1][off];
  466. return sprintf(data, "%u\n", count);
  467. }
  468. static ssize_t dimmdev_ue_count_show(struct device *dev,
  469. struct device_attribute *mattr,
  470. char *data)
  471. {
  472. struct dimm_info *dimm = to_dimm(dev);
  473. u32 count;
  474. int off;
  475. off = EDAC_DIMM_OFF(dimm->mci->layers,
  476. dimm->mci->n_layers,
  477. dimm->location[0],
  478. dimm->location[1],
  479. dimm->location[2]);
  480. count = dimm->mci->ue_per_layer[dimm->mci->n_layers-1][off];
  481. return sprintf(data, "%u\n", count);
  482. }
  483. /* dimm/rank attribute files */
  484. static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
  485. dimmdev_label_show, dimmdev_label_store);
  486. static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
  487. static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
  488. static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
  489. static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
  490. static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
  491. static DEVICE_ATTR(dimm_ce_count, S_IRUGO, dimmdev_ce_count_show, NULL);
  492. static DEVICE_ATTR(dimm_ue_count, S_IRUGO, dimmdev_ue_count_show, NULL);
  493. /* attributes of the dimm<id>/rank<id> object */
  494. static struct attribute *dimm_attrs[] = {
  495. &dev_attr_dimm_label.attr,
  496. &dev_attr_dimm_location.attr,
  497. &dev_attr_size.attr,
  498. &dev_attr_dimm_mem_type.attr,
  499. &dev_attr_dimm_dev_type.attr,
  500. &dev_attr_dimm_edac_mode.attr,
  501. &dev_attr_dimm_ce_count.attr,
  502. &dev_attr_dimm_ue_count.attr,
  503. NULL,
  504. };
  505. static const struct attribute_group dimm_attr_grp = {
  506. .attrs = dimm_attrs,
  507. };
  508. static const struct attribute_group *dimm_attr_groups[] = {
  509. &dimm_attr_grp,
  510. NULL
  511. };
  512. static void dimm_attr_release(struct device *dev)
  513. {
  514. struct dimm_info *dimm = container_of(dev, struct dimm_info, dev);
  515. edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev));
  516. kfree(dimm);
  517. }
  518. static const struct device_type dimm_attr_type = {
  519. .groups = dimm_attr_groups,
  520. .release = dimm_attr_release,
  521. };
  522. /* Create a DIMM object under specifed memory controller device */
  523. static int edac_create_dimm_object(struct mem_ctl_info *mci,
  524. struct dimm_info *dimm,
  525. int index)
  526. {
  527. int err;
  528. dimm->mci = mci;
  529. dimm->dev.type = &dimm_attr_type;
  530. dimm->dev.bus = mci->bus;
  531. device_initialize(&dimm->dev);
  532. dimm->dev.parent = &mci->dev;
  533. if (mci->csbased)
  534. dev_set_name(&dimm->dev, "rank%d", index);
  535. else
  536. dev_set_name(&dimm->dev, "dimm%d", index);
  537. dev_set_drvdata(&dimm->dev, dimm);
  538. pm_runtime_forbid(&mci->dev);
  539. err = device_add(&dimm->dev);
  540. edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm->dev));
  541. return err;
  542. }
  543. /*
  544. * Memory controller device
  545. */
  546. #define to_mci(k) container_of(k, struct mem_ctl_info, dev)
  547. static ssize_t mci_reset_counters_store(struct device *dev,
  548. struct device_attribute *mattr,
  549. const char *data, size_t count)
  550. {
  551. struct mem_ctl_info *mci = to_mci(dev);
  552. int cnt, row, chan, i;
  553. mci->ue_mc = 0;
  554. mci->ce_mc = 0;
  555. mci->ue_noinfo_count = 0;
  556. mci->ce_noinfo_count = 0;
  557. for (row = 0; row < mci->nr_csrows; row++) {
  558. struct csrow_info *ri = mci->csrows[row];
  559. ri->ue_count = 0;
  560. ri->ce_count = 0;
  561. for (chan = 0; chan < ri->nr_channels; chan++)
  562. ri->channels[chan]->ce_count = 0;
  563. }
  564. cnt = 1;
  565. for (i = 0; i < mci->n_layers; i++) {
  566. cnt *= mci->layers[i].size;
  567. memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
  568. memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
  569. }
  570. mci->start_time = jiffies;
  571. return count;
  572. }
  573. /* Memory scrubbing interface:
  574. *
  575. * A MC driver can limit the scrubbing bandwidth based on the CPU type.
  576. * Therefore, ->set_sdram_scrub_rate should be made to return the actual
  577. * bandwidth that is accepted or 0 when scrubbing is to be disabled.
  578. *
  579. * Negative value still means that an error has occurred while setting
  580. * the scrub rate.
  581. */
  582. static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
  583. struct device_attribute *mattr,
  584. const char *data, size_t count)
  585. {
  586. struct mem_ctl_info *mci = to_mci(dev);
  587. unsigned long bandwidth = 0;
  588. int new_bw = 0;
  589. if (kstrtoul(data, 10, &bandwidth) < 0)
  590. return -EINVAL;
  591. new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
  592. if (new_bw < 0) {
  593. edac_printk(KERN_WARNING, EDAC_MC,
  594. "Error setting scrub rate to: %lu\n", bandwidth);
  595. return -EINVAL;
  596. }
  597. return count;
  598. }
  599. /*
  600. * ->get_sdram_scrub_rate() return value semantics same as above.
  601. */
  602. static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
  603. struct device_attribute *mattr,
  604. char *data)
  605. {
  606. struct mem_ctl_info *mci = to_mci(dev);
  607. int bandwidth = 0;
  608. bandwidth = mci->get_sdram_scrub_rate(mci);
  609. if (bandwidth < 0) {
  610. edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
  611. return bandwidth;
  612. }
  613. return sprintf(data, "%d\n", bandwidth);
  614. }
  615. /* default attribute files for the MCI object */
  616. static ssize_t mci_ue_count_show(struct device *dev,
  617. struct device_attribute *mattr,
  618. char *data)
  619. {
  620. struct mem_ctl_info *mci = to_mci(dev);
  621. return sprintf(data, "%d\n", mci->ue_mc);
  622. }
  623. static ssize_t mci_ce_count_show(struct device *dev,
  624. struct device_attribute *mattr,
  625. char *data)
  626. {
  627. struct mem_ctl_info *mci = to_mci(dev);
  628. return sprintf(data, "%d\n", mci->ce_mc);
  629. }
  630. static ssize_t mci_ce_noinfo_show(struct device *dev,
  631. struct device_attribute *mattr,
  632. char *data)
  633. {
  634. struct mem_ctl_info *mci = to_mci(dev);
  635. return sprintf(data, "%d\n", mci->ce_noinfo_count);
  636. }
  637. static ssize_t mci_ue_noinfo_show(struct device *dev,
  638. struct device_attribute *mattr,
  639. char *data)
  640. {
  641. struct mem_ctl_info *mci = to_mci(dev);
  642. return sprintf(data, "%d\n", mci->ue_noinfo_count);
  643. }
  644. static ssize_t mci_seconds_show(struct device *dev,
  645. struct device_attribute *mattr,
  646. char *data)
  647. {
  648. struct mem_ctl_info *mci = to_mci(dev);
  649. return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
  650. }
  651. static ssize_t mci_ctl_name_show(struct device *dev,
  652. struct device_attribute *mattr,
  653. char *data)
  654. {
  655. struct mem_ctl_info *mci = to_mci(dev);
  656. return sprintf(data, "%s\n", mci->ctl_name);
  657. }
  658. static ssize_t mci_size_mb_show(struct device *dev,
  659. struct device_attribute *mattr,
  660. char *data)
  661. {
  662. struct mem_ctl_info *mci = to_mci(dev);
  663. int total_pages = 0, csrow_idx, j;
  664. for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
  665. struct csrow_info *csrow = mci->csrows[csrow_idx];
  666. for (j = 0; j < csrow->nr_channels; j++) {
  667. struct dimm_info *dimm = csrow->channels[j]->dimm;
  668. total_pages += dimm->nr_pages;
  669. }
  670. }
  671. return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
  672. }
  673. static ssize_t mci_max_location_show(struct device *dev,
  674. struct device_attribute *mattr,
  675. char *data)
  676. {
  677. struct mem_ctl_info *mci = to_mci(dev);
  678. int i;
  679. char *p = data;
  680. for (i = 0; i < mci->n_layers; i++) {
  681. p += sprintf(p, "%s %d ",
  682. edac_layer_name[mci->layers[i].type],
  683. mci->layers[i].size - 1);
  684. }
  685. return p - data;
  686. }
  687. /* default Control file */
  688. static DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
  689. /* default Attribute files */
  690. static DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
  691. static DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
  692. static DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
  693. static DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
  694. static DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
  695. static DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
  696. static DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
  697. static DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
  698. /* memory scrubber attribute file */
  699. static DEVICE_ATTR(sdram_scrub_rate, 0, mci_sdram_scrub_rate_show,
  700. mci_sdram_scrub_rate_store); /* umode set later in is_visible */
  701. static struct attribute *mci_attrs[] = {
  702. &dev_attr_reset_counters.attr,
  703. &dev_attr_mc_name.attr,
  704. &dev_attr_size_mb.attr,
  705. &dev_attr_seconds_since_reset.attr,
  706. &dev_attr_ue_noinfo_count.attr,
  707. &dev_attr_ce_noinfo_count.attr,
  708. &dev_attr_ue_count.attr,
  709. &dev_attr_ce_count.attr,
  710. &dev_attr_max_location.attr,
  711. &dev_attr_sdram_scrub_rate.attr,
  712. NULL
  713. };
  714. static umode_t mci_attr_is_visible(struct kobject *kobj,
  715. struct attribute *attr, int idx)
  716. {
  717. struct device *dev = kobj_to_dev(kobj);
  718. struct mem_ctl_info *mci = to_mci(dev);
  719. umode_t mode = 0;
  720. if (attr != &dev_attr_sdram_scrub_rate.attr)
  721. return attr->mode;
  722. if (mci->get_sdram_scrub_rate)
  723. mode |= S_IRUGO;
  724. if (mci->set_sdram_scrub_rate)
  725. mode |= S_IWUSR;
  726. return mode;
  727. }
  728. static const struct attribute_group mci_attr_grp = {
  729. .attrs = mci_attrs,
  730. .is_visible = mci_attr_is_visible,
  731. };
  732. static const struct attribute_group *mci_attr_groups[] = {
  733. &mci_attr_grp,
  734. NULL
  735. };
  736. static void mci_attr_release(struct device *dev)
  737. {
  738. struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
  739. edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
  740. kfree(mci);
  741. }
  742. static const struct device_type mci_attr_type = {
  743. .groups = mci_attr_groups,
  744. .release = mci_attr_release,
  745. };
  746. /*
  747. * Create a new Memory Controller kobject instance,
  748. * mc<id> under the 'mc' directory
  749. *
  750. * Return:
  751. * 0 Success
  752. * !0 Failure
  753. */
  754. int edac_create_sysfs_mci_device(struct mem_ctl_info *mci,
  755. const struct attribute_group **groups)
  756. {
  757. char *name;
  758. int i, err;
  759. /*
  760. * The memory controller needs its own bus, in order to avoid
  761. * namespace conflicts at /sys/bus/edac.
  762. */
  763. name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
  764. if (!name)
  765. return -ENOMEM;
  766. mci->bus->name = name;
  767. edac_dbg(0, "creating bus %s\n", mci->bus->name);
  768. err = bus_register(mci->bus);
  769. if (err < 0) {
  770. kfree(name);
  771. return err;
  772. }
  773. /* get the /sys/devices/system/edac subsys reference */
  774. mci->dev.type = &mci_attr_type;
  775. device_initialize(&mci->dev);
  776. mci->dev.parent = mci_pdev;
  777. mci->dev.bus = mci->bus;
  778. mci->dev.groups = groups;
  779. dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
  780. dev_set_drvdata(&mci->dev, mci);
  781. pm_runtime_forbid(&mci->dev);
  782. edac_dbg(0, "creating device %s\n", dev_name(&mci->dev));
  783. err = device_add(&mci->dev);
  784. if (err < 0) {
  785. edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev));
  786. goto fail_unregister_bus;
  787. }
  788. /*
  789. * Create the dimm/rank devices
  790. */
  791. for (i = 0; i < mci->tot_dimms; i++) {
  792. struct dimm_info *dimm = mci->dimms[i];
  793. /* Only expose populated DIMMs */
  794. if (!dimm->nr_pages)
  795. continue;
  796. #ifdef CONFIG_EDAC_DEBUG
  797. edac_dbg(1, "creating dimm%d, located at ", i);
  798. if (edac_debug_level >= 1) {
  799. int lay;
  800. for (lay = 0; lay < mci->n_layers; lay++)
  801. printk(KERN_CONT "%s %d ",
  802. edac_layer_name[mci->layers[lay].type],
  803. dimm->location[lay]);
  804. printk(KERN_CONT "\n");
  805. }
  806. #endif
  807. err = edac_create_dimm_object(mci, dimm, i);
  808. if (err) {
  809. edac_dbg(1, "failure: create dimm %d obj\n", i);
  810. goto fail_unregister_dimm;
  811. }
  812. }
  813. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  814. err = edac_create_csrow_objects(mci);
  815. if (err < 0)
  816. goto fail_unregister_dimm;
  817. #endif
  818. edac_create_debugfs_nodes(mci);
  819. return 0;
  820. fail_unregister_dimm:
  821. for (i--; i >= 0; i--) {
  822. struct dimm_info *dimm = mci->dimms[i];
  823. if (!dimm->nr_pages)
  824. continue;
  825. device_unregister(&dimm->dev);
  826. }
  827. device_unregister(&mci->dev);
  828. fail_unregister_bus:
  829. bus_unregister(mci->bus);
  830. kfree(name);
  831. return err;
  832. }
  833. /*
  834. * remove a Memory Controller instance
  835. */
  836. void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
  837. {
  838. int i;
  839. edac_dbg(0, "\n");
  840. #ifdef CONFIG_EDAC_DEBUG
  841. edac_debugfs_remove_recursive(mci->debugfs);
  842. #endif
  843. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  844. edac_delete_csrow_objects(mci);
  845. #endif
  846. for (i = 0; i < mci->tot_dimms; i++) {
  847. struct dimm_info *dimm = mci->dimms[i];
  848. if (dimm->nr_pages == 0)
  849. continue;
  850. edac_dbg(0, "removing device %s\n", dev_name(&dimm->dev));
  851. device_unregister(&dimm->dev);
  852. }
  853. }
  854. void edac_unregister_sysfs(struct mem_ctl_info *mci)
  855. {
  856. struct bus_type *bus = mci->bus;
  857. const char *name = mci->bus->name;
  858. edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev));
  859. device_unregister(&mci->dev);
  860. bus_unregister(bus);
  861. kfree(name);
  862. }
  863. static void mc_attr_release(struct device *dev)
  864. {
  865. /*
  866. * There's no container structure here, as this is just the mci
  867. * parent device, used to create the /sys/devices/mc sysfs node.
  868. * So, there are no attributes on it.
  869. */
  870. edac_dbg(1, "Releasing device %s\n", dev_name(dev));
  871. kfree(dev);
  872. }
  873. static const struct device_type mc_attr_type = {
  874. .release = mc_attr_release,
  875. };
  876. /*
  877. * Init/exit code for the module. Basically, creates/removes /sys/class/rc
  878. */
  879. int __init edac_mc_sysfs_init(void)
  880. {
  881. int err;
  882. mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL);
  883. if (!mci_pdev) {
  884. err = -ENOMEM;
  885. goto out;
  886. }
  887. mci_pdev->bus = edac_get_sysfs_subsys();
  888. mci_pdev->type = &mc_attr_type;
  889. device_initialize(mci_pdev);
  890. dev_set_name(mci_pdev, "mc");
  891. err = device_add(mci_pdev);
  892. if (err < 0)
  893. goto out_put_device;
  894. edac_dbg(0, "device %s created\n", dev_name(mci_pdev));
  895. return 0;
  896. out_put_device:
  897. put_device(mci_pdev);
  898. out:
  899. return err;
  900. }
  901. void edac_mc_sysfs_exit(void)
  902. {
  903. device_unregister(mci_pdev);
  904. }