pci.c 3.4 KB

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  1. /*
  2. * PCI driver for the High Speed UART DMA
  3. *
  4. * Copyright (C) 2015 Intel Corporation
  5. * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
  6. *
  7. * Partially based on the bits found in drivers/tty/serial/mfd.c.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/bitops.h>
  14. #include <linux/device.h>
  15. #include <linux/module.h>
  16. #include <linux/pci.h>
  17. #include "hsu.h"
  18. #define HSU_PCI_DMASR 0x00
  19. #define HSU_PCI_DMAISR 0x04
  20. #define HSU_PCI_CHAN_OFFSET 0x100
  21. #define PCI_DEVICE_ID_INTEL_MFLD_HSU_DMA 0x081e
  22. #define PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA 0x1192
  23. static irqreturn_t hsu_pci_irq(int irq, void *dev)
  24. {
  25. struct hsu_dma_chip *chip = dev;
  26. struct pci_dev *pdev = to_pci_dev(chip->dev);
  27. u32 dmaisr;
  28. u32 status;
  29. unsigned short i;
  30. int ret = 0;
  31. int err;
  32. /*
  33. * On Intel Tangier B0 and Anniedale the interrupt line, disregarding
  34. * to have different numbers, is shared between HSU DMA and UART IPs.
  35. * Thus on such SoCs we are expecting that IRQ handler is called in
  36. * UART driver only.
  37. */
  38. if (pdev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA)
  39. return IRQ_HANDLED;
  40. dmaisr = readl(chip->regs + HSU_PCI_DMAISR);
  41. for (i = 0; i < chip->hsu->nr_channels; i++) {
  42. if (dmaisr & 0x1) {
  43. err = hsu_dma_get_status(chip, i, &status);
  44. if (err > 0)
  45. ret |= 1;
  46. else if (err == 0)
  47. ret |= hsu_dma_do_irq(chip, i, status);
  48. }
  49. dmaisr >>= 1;
  50. }
  51. return IRQ_RETVAL(ret);
  52. }
  53. static int hsu_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  54. {
  55. struct hsu_dma_chip *chip;
  56. int ret;
  57. ret = pcim_enable_device(pdev);
  58. if (ret)
  59. return ret;
  60. ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev));
  61. if (ret) {
  62. dev_err(&pdev->dev, "I/O memory remapping failed\n");
  63. return ret;
  64. }
  65. pci_set_master(pdev);
  66. pci_try_set_mwi(pdev);
  67. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  68. if (ret)
  69. return ret;
  70. ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  71. if (ret)
  72. return ret;
  73. chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
  74. if (!chip)
  75. return -ENOMEM;
  76. ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
  77. if (ret < 0)
  78. return ret;
  79. chip->dev = &pdev->dev;
  80. chip->regs = pcim_iomap_table(pdev)[0];
  81. chip->length = pci_resource_len(pdev, 0);
  82. chip->offset = HSU_PCI_CHAN_OFFSET;
  83. chip->irq = pci_irq_vector(pdev, 0);
  84. ret = hsu_dma_probe(chip);
  85. if (ret)
  86. return ret;
  87. ret = request_irq(chip->irq, hsu_pci_irq, 0, "hsu_dma_pci", chip);
  88. if (ret)
  89. goto err_register_irq;
  90. pci_set_drvdata(pdev, chip);
  91. return 0;
  92. err_register_irq:
  93. hsu_dma_remove(chip);
  94. return ret;
  95. }
  96. static void hsu_pci_remove(struct pci_dev *pdev)
  97. {
  98. struct hsu_dma_chip *chip = pci_get_drvdata(pdev);
  99. free_irq(chip->irq, chip);
  100. hsu_dma_remove(chip);
  101. }
  102. static const struct pci_device_id hsu_pci_id_table[] = {
  103. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MFLD_HSU_DMA), 0 },
  104. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA), 0 },
  105. { }
  106. };
  107. MODULE_DEVICE_TABLE(pci, hsu_pci_id_table);
  108. static struct pci_driver hsu_pci_driver = {
  109. .name = "hsu_dma_pci",
  110. .id_table = hsu_pci_id_table,
  111. .probe = hsu_pci_probe,
  112. .remove = hsu_pci_remove,
  113. };
  114. module_pci_driver(hsu_pci_driver);
  115. MODULE_LICENSE("GPL v2");
  116. MODULE_DESCRIPTION("High Speed UART DMA PCI driver");
  117. MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");