cipher.c 135 KB

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  1. /*
  2. * Copyright 2016 Broadcom
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License, version 2, as
  6. * published by the Free Software Foundation (the "GPL").
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License version 2 (GPLv2) for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * version 2 (GPLv2) along with this source code.
  15. */
  16. #include <linux/err.h>
  17. #include <linux/module.h>
  18. #include <linux/init.h>
  19. #include <linux/errno.h>
  20. #include <linux/kernel.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/scatterlist.h>
  24. #include <linux/crypto.h>
  25. #include <linux/kthread.h>
  26. #include <linux/rtnetlink.h>
  27. #include <linux/sched.h>
  28. #include <linux/of_address.h>
  29. #include <linux/of_device.h>
  30. #include <linux/io.h>
  31. #include <linux/bitops.h>
  32. #include <crypto/algapi.h>
  33. #include <crypto/aead.h>
  34. #include <crypto/internal/aead.h>
  35. #include <crypto/aes.h>
  36. #include <crypto/des.h>
  37. #include <crypto/hmac.h>
  38. #include <crypto/sha.h>
  39. #include <crypto/md5.h>
  40. #include <crypto/authenc.h>
  41. #include <crypto/skcipher.h>
  42. #include <crypto/hash.h>
  43. #include <crypto/sha3.h>
  44. #include "util.h"
  45. #include "cipher.h"
  46. #include "spu.h"
  47. #include "spum.h"
  48. #include "spu2.h"
  49. /* ================= Device Structure ================== */
  50. struct device_private iproc_priv;
  51. /* ==================== Parameters ===================== */
  52. int flow_debug_logging;
  53. module_param(flow_debug_logging, int, 0644);
  54. MODULE_PARM_DESC(flow_debug_logging, "Enable Flow Debug Logging");
  55. int packet_debug_logging;
  56. module_param(packet_debug_logging, int, 0644);
  57. MODULE_PARM_DESC(packet_debug_logging, "Enable Packet Debug Logging");
  58. int debug_logging_sleep;
  59. module_param(debug_logging_sleep, int, 0644);
  60. MODULE_PARM_DESC(debug_logging_sleep, "Packet Debug Logging Sleep");
  61. /*
  62. * The value of these module parameters is used to set the priority for each
  63. * algo type when this driver registers algos with the kernel crypto API.
  64. * To use a priority other than the default, set the priority in the insmod or
  65. * modprobe. Changing the module priority after init time has no effect.
  66. *
  67. * The default priorities are chosen to be lower (less preferred) than ARMv8 CE
  68. * algos, but more preferred than generic software algos.
  69. */
  70. static int cipher_pri = 150;
  71. module_param(cipher_pri, int, 0644);
  72. MODULE_PARM_DESC(cipher_pri, "Priority for cipher algos");
  73. static int hash_pri = 100;
  74. module_param(hash_pri, int, 0644);
  75. MODULE_PARM_DESC(hash_pri, "Priority for hash algos");
  76. static int aead_pri = 150;
  77. module_param(aead_pri, int, 0644);
  78. MODULE_PARM_DESC(aead_pri, "Priority for AEAD algos");
  79. /* A type 3 BCM header, expected to precede the SPU header for SPU-M.
  80. * Bits 3 and 4 in the first byte encode the channel number (the dma ringset).
  81. * 0x60 - ring 0
  82. * 0x68 - ring 1
  83. * 0x70 - ring 2
  84. * 0x78 - ring 3
  85. */
  86. char BCMHEADER[] = { 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28 };
  87. /*
  88. * Some SPU hw does not use BCM header on SPU messages. So BCM_HDR_LEN
  89. * is set dynamically after reading SPU type from device tree.
  90. */
  91. #define BCM_HDR_LEN iproc_priv.bcm_hdr_len
  92. /* min and max time to sleep before retrying when mbox queue is full. usec */
  93. #define MBOX_SLEEP_MIN 800
  94. #define MBOX_SLEEP_MAX 1000
  95. /**
  96. * select_channel() - Select a SPU channel to handle a crypto request. Selects
  97. * channel in round robin order.
  98. *
  99. * Return: channel index
  100. */
  101. static u8 select_channel(void)
  102. {
  103. u8 chan_idx = atomic_inc_return(&iproc_priv.next_chan);
  104. return chan_idx % iproc_priv.spu.num_chan;
  105. }
  106. /**
  107. * spu_ablkcipher_rx_sg_create() - Build up the scatterlist of buffers used to
  108. * receive a SPU response message for an ablkcipher request. Includes buffers to
  109. * catch SPU message headers and the response data.
  110. * @mssg: mailbox message containing the receive sg
  111. * @rctx: crypto request context
  112. * @rx_frag_num: number of scatterlist elements required to hold the
  113. * SPU response message
  114. * @chunksize: Number of bytes of response data expected
  115. * @stat_pad_len: Number of bytes required to pad the STAT field to
  116. * a 4-byte boundary
  117. *
  118. * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
  119. * when the request completes, whether the request is handled successfully or
  120. * there is an error.
  121. *
  122. * Returns:
  123. * 0 if successful
  124. * < 0 if an error
  125. */
  126. static int
  127. spu_ablkcipher_rx_sg_create(struct brcm_message *mssg,
  128. struct iproc_reqctx_s *rctx,
  129. u8 rx_frag_num,
  130. unsigned int chunksize, u32 stat_pad_len)
  131. {
  132. struct spu_hw *spu = &iproc_priv.spu;
  133. struct scatterlist *sg; /* used to build sgs in mbox message */
  134. struct iproc_ctx_s *ctx = rctx->ctx;
  135. u32 datalen; /* Number of bytes of response data expected */
  136. mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
  137. rctx->gfp);
  138. if (!mssg->spu.dst)
  139. return -ENOMEM;
  140. sg = mssg->spu.dst;
  141. sg_init_table(sg, rx_frag_num);
  142. /* Space for SPU message header */
  143. sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
  144. /* If XTS tweak in payload, add buffer to receive encrypted tweak */
  145. if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
  146. spu->spu_xts_tweak_in_payload())
  147. sg_set_buf(sg++, rctx->msg_buf.c.supdt_tweak,
  148. SPU_XTS_TWEAK_SIZE);
  149. /* Copy in each dst sg entry from request, up to chunksize */
  150. datalen = spu_msg_sg_add(&sg, &rctx->dst_sg, &rctx->dst_skip,
  151. rctx->dst_nents, chunksize);
  152. if (datalen < chunksize) {
  153. pr_err("%s(): failed to copy dst sg to mbox msg. chunksize %u, datalen %u",
  154. __func__, chunksize, datalen);
  155. return -EFAULT;
  156. }
  157. if (ctx->cipher.alg == CIPHER_ALG_RC4)
  158. /* Add buffer to catch 260-byte SUPDT field for RC4 */
  159. sg_set_buf(sg++, rctx->msg_buf.c.supdt_tweak, SPU_SUPDT_LEN);
  160. if (stat_pad_len)
  161. sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
  162. memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
  163. sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
  164. return 0;
  165. }
  166. /**
  167. * spu_ablkcipher_tx_sg_create() - Build up the scatterlist of buffers used to
  168. * send a SPU request message for an ablkcipher request. Includes SPU message
  169. * headers and the request data.
  170. * @mssg: mailbox message containing the transmit sg
  171. * @rctx: crypto request context
  172. * @tx_frag_num: number of scatterlist elements required to construct the
  173. * SPU request message
  174. * @chunksize: Number of bytes of request data
  175. * @pad_len: Number of pad bytes
  176. *
  177. * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
  178. * when the request completes, whether the request is handled successfully or
  179. * there is an error.
  180. *
  181. * Returns:
  182. * 0 if successful
  183. * < 0 if an error
  184. */
  185. static int
  186. spu_ablkcipher_tx_sg_create(struct brcm_message *mssg,
  187. struct iproc_reqctx_s *rctx,
  188. u8 tx_frag_num, unsigned int chunksize, u32 pad_len)
  189. {
  190. struct spu_hw *spu = &iproc_priv.spu;
  191. struct scatterlist *sg; /* used to build sgs in mbox message */
  192. struct iproc_ctx_s *ctx = rctx->ctx;
  193. u32 datalen; /* Number of bytes of response data expected */
  194. u32 stat_len;
  195. mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
  196. rctx->gfp);
  197. if (unlikely(!mssg->spu.src))
  198. return -ENOMEM;
  199. sg = mssg->spu.src;
  200. sg_init_table(sg, tx_frag_num);
  201. sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
  202. BCM_HDR_LEN + ctx->spu_req_hdr_len);
  203. /* if XTS tweak in payload, copy from IV (where crypto API puts it) */
  204. if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
  205. spu->spu_xts_tweak_in_payload())
  206. sg_set_buf(sg++, rctx->msg_buf.iv_ctr, SPU_XTS_TWEAK_SIZE);
  207. /* Copy in each src sg entry from request, up to chunksize */
  208. datalen = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
  209. rctx->src_nents, chunksize);
  210. if (unlikely(datalen < chunksize)) {
  211. pr_err("%s(): failed to copy src sg to mbox msg",
  212. __func__);
  213. return -EFAULT;
  214. }
  215. if (pad_len)
  216. sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
  217. stat_len = spu->spu_tx_status_len();
  218. if (stat_len) {
  219. memset(rctx->msg_buf.tx_stat, 0, stat_len);
  220. sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
  221. }
  222. return 0;
  223. }
  224. static int mailbox_send_message(struct brcm_message *mssg, u32 flags,
  225. u8 chan_idx)
  226. {
  227. int err;
  228. int retry_cnt = 0;
  229. struct device *dev = &(iproc_priv.pdev->dev);
  230. err = mbox_send_message(iproc_priv.mbox[chan_idx], mssg);
  231. if (flags & CRYPTO_TFM_REQ_MAY_SLEEP) {
  232. while ((err == -ENOBUFS) && (retry_cnt < SPU_MB_RETRY_MAX)) {
  233. /*
  234. * Mailbox queue is full. Since MAY_SLEEP is set, assume
  235. * not in atomic context and we can wait and try again.
  236. */
  237. retry_cnt++;
  238. usleep_range(MBOX_SLEEP_MIN, MBOX_SLEEP_MAX);
  239. err = mbox_send_message(iproc_priv.mbox[chan_idx],
  240. mssg);
  241. atomic_inc(&iproc_priv.mb_no_spc);
  242. }
  243. }
  244. if (err < 0) {
  245. atomic_inc(&iproc_priv.mb_send_fail);
  246. return err;
  247. }
  248. /* Check error returned by mailbox controller */
  249. err = mssg->error;
  250. if (unlikely(err < 0)) {
  251. dev_err(dev, "message error %d", err);
  252. /* Signal txdone for mailbox channel */
  253. }
  254. /* Signal txdone for mailbox channel */
  255. mbox_client_txdone(iproc_priv.mbox[chan_idx], err);
  256. return err;
  257. }
  258. /**
  259. * handle_ablkcipher_req() - Submit as much of a block cipher request as fits in
  260. * a single SPU request message, starting at the current position in the request
  261. * data.
  262. * @rctx: Crypto request context
  263. *
  264. * This may be called on the crypto API thread, or, when a request is so large
  265. * it must be broken into multiple SPU messages, on the thread used to invoke
  266. * the response callback. When requests are broken into multiple SPU
  267. * messages, we assume subsequent messages depend on previous results, and
  268. * thus always wait for previous results before submitting the next message.
  269. * Because requests are submitted in lock step like this, there is no need
  270. * to synchronize access to request data structures.
  271. *
  272. * Return: -EINPROGRESS: request has been accepted and result will be returned
  273. * asynchronously
  274. * Any other value indicates an error
  275. */
  276. static int handle_ablkcipher_req(struct iproc_reqctx_s *rctx)
  277. {
  278. struct spu_hw *spu = &iproc_priv.spu;
  279. struct crypto_async_request *areq = rctx->parent;
  280. struct ablkcipher_request *req =
  281. container_of(areq, struct ablkcipher_request, base);
  282. struct iproc_ctx_s *ctx = rctx->ctx;
  283. struct spu_cipher_parms cipher_parms;
  284. int err = 0;
  285. unsigned int chunksize = 0; /* Num bytes of request to submit */
  286. int remaining = 0; /* Bytes of request still to process */
  287. int chunk_start; /* Beginning of data for current SPU msg */
  288. /* IV or ctr value to use in this SPU msg */
  289. u8 local_iv_ctr[MAX_IV_SIZE];
  290. u32 stat_pad_len; /* num bytes to align status field */
  291. u32 pad_len; /* total length of all padding */
  292. bool update_key = false;
  293. struct brcm_message *mssg; /* mailbox message */
  294. /* number of entries in src and dst sg in mailbox message. */
  295. u8 rx_frag_num = 2; /* response header and STATUS */
  296. u8 tx_frag_num = 1; /* request header */
  297. flow_log("%s\n", __func__);
  298. cipher_parms.alg = ctx->cipher.alg;
  299. cipher_parms.mode = ctx->cipher.mode;
  300. cipher_parms.type = ctx->cipher_type;
  301. cipher_parms.key_len = ctx->enckeylen;
  302. cipher_parms.key_buf = ctx->enckey;
  303. cipher_parms.iv_buf = local_iv_ctr;
  304. cipher_parms.iv_len = rctx->iv_ctr_len;
  305. mssg = &rctx->mb_mssg;
  306. chunk_start = rctx->src_sent;
  307. remaining = rctx->total_todo - chunk_start;
  308. /* determine the chunk we are breaking off and update the indexes */
  309. if ((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
  310. (remaining > ctx->max_payload))
  311. chunksize = ctx->max_payload;
  312. else
  313. chunksize = remaining;
  314. rctx->src_sent += chunksize;
  315. rctx->total_sent = rctx->src_sent;
  316. /* Count number of sg entries to be included in this request */
  317. rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, chunksize);
  318. rctx->dst_nents = spu_sg_count(rctx->dst_sg, rctx->dst_skip, chunksize);
  319. if ((ctx->cipher.mode == CIPHER_MODE_CBC) &&
  320. rctx->is_encrypt && chunk_start)
  321. /*
  322. * Encrypting non-first first chunk. Copy last block of
  323. * previous result to IV for this chunk.
  324. */
  325. sg_copy_part_to_buf(req->dst, rctx->msg_buf.iv_ctr,
  326. rctx->iv_ctr_len,
  327. chunk_start - rctx->iv_ctr_len);
  328. if (rctx->iv_ctr_len) {
  329. /* get our local copy of the iv */
  330. __builtin_memcpy(local_iv_ctr, rctx->msg_buf.iv_ctr,
  331. rctx->iv_ctr_len);
  332. /* generate the next IV if possible */
  333. if ((ctx->cipher.mode == CIPHER_MODE_CBC) &&
  334. !rctx->is_encrypt) {
  335. /*
  336. * CBC Decrypt: next IV is the last ciphertext block in
  337. * this chunk
  338. */
  339. sg_copy_part_to_buf(req->src, rctx->msg_buf.iv_ctr,
  340. rctx->iv_ctr_len,
  341. rctx->src_sent - rctx->iv_ctr_len);
  342. } else if (ctx->cipher.mode == CIPHER_MODE_CTR) {
  343. /*
  344. * The SPU hardware increments the counter once for
  345. * each AES block of 16 bytes. So update the counter
  346. * for the next chunk, if there is one. Note that for
  347. * this chunk, the counter has already been copied to
  348. * local_iv_ctr. We can assume a block size of 16,
  349. * because we only support CTR mode for AES, not for
  350. * any other cipher alg.
  351. */
  352. add_to_ctr(rctx->msg_buf.iv_ctr, chunksize >> 4);
  353. }
  354. }
  355. if (ctx->cipher.alg == CIPHER_ALG_RC4) {
  356. rx_frag_num++;
  357. if (chunk_start) {
  358. /*
  359. * for non-first RC4 chunks, use SUPDT from previous
  360. * response as key for this chunk.
  361. */
  362. cipher_parms.key_buf = rctx->msg_buf.c.supdt_tweak;
  363. update_key = true;
  364. cipher_parms.type = CIPHER_TYPE_UPDT;
  365. } else if (!rctx->is_encrypt) {
  366. /*
  367. * First RC4 chunk. For decrypt, key in pre-built msg
  368. * header may have been changed if encrypt required
  369. * multiple chunks. So revert the key to the
  370. * ctx->enckey value.
  371. */
  372. update_key = true;
  373. cipher_parms.type = CIPHER_TYPE_INIT;
  374. }
  375. }
  376. if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
  377. flow_log("max_payload infinite\n");
  378. else
  379. flow_log("max_payload %u\n", ctx->max_payload);
  380. flow_log("sent:%u start:%u remains:%u size:%u\n",
  381. rctx->src_sent, chunk_start, remaining, chunksize);
  382. /* Copy SPU header template created at setkey time */
  383. memcpy(rctx->msg_buf.bcm_spu_req_hdr, ctx->bcm_spu_req_hdr,
  384. sizeof(rctx->msg_buf.bcm_spu_req_hdr));
  385. /*
  386. * Pass SUPDT field as key. Key field in finish() call is only used
  387. * when update_key has been set above for RC4. Will be ignored in
  388. * all other cases.
  389. */
  390. spu->spu_cipher_req_finish(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
  391. ctx->spu_req_hdr_len, !(rctx->is_encrypt),
  392. &cipher_parms, update_key, chunksize);
  393. atomic64_add(chunksize, &iproc_priv.bytes_out);
  394. stat_pad_len = spu->spu_wordalign_padlen(chunksize);
  395. if (stat_pad_len)
  396. rx_frag_num++;
  397. pad_len = stat_pad_len;
  398. if (pad_len) {
  399. tx_frag_num++;
  400. spu->spu_request_pad(rctx->msg_buf.spu_req_pad, 0,
  401. 0, ctx->auth.alg, ctx->auth.mode,
  402. rctx->total_sent, stat_pad_len);
  403. }
  404. spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
  405. ctx->spu_req_hdr_len);
  406. packet_log("payload:\n");
  407. dump_sg(rctx->src_sg, rctx->src_skip, chunksize);
  408. packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
  409. /*
  410. * Build mailbox message containing SPU request msg and rx buffers
  411. * to catch response message
  412. */
  413. memset(mssg, 0, sizeof(*mssg));
  414. mssg->type = BRCM_MESSAGE_SPU;
  415. mssg->ctx = rctx; /* Will be returned in response */
  416. /* Create rx scatterlist to catch result */
  417. rx_frag_num += rctx->dst_nents;
  418. if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
  419. spu->spu_xts_tweak_in_payload())
  420. rx_frag_num++; /* extra sg to insert tweak */
  421. err = spu_ablkcipher_rx_sg_create(mssg, rctx, rx_frag_num, chunksize,
  422. stat_pad_len);
  423. if (err)
  424. return err;
  425. /* Create tx scatterlist containing SPU request message */
  426. tx_frag_num += rctx->src_nents;
  427. if (spu->spu_tx_status_len())
  428. tx_frag_num++;
  429. if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
  430. spu->spu_xts_tweak_in_payload())
  431. tx_frag_num++; /* extra sg to insert tweak */
  432. err = spu_ablkcipher_tx_sg_create(mssg, rctx, tx_frag_num, chunksize,
  433. pad_len);
  434. if (err)
  435. return err;
  436. err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
  437. if (unlikely(err < 0))
  438. return err;
  439. return -EINPROGRESS;
  440. }
  441. /**
  442. * handle_ablkcipher_resp() - Process a block cipher SPU response. Updates the
  443. * total received count for the request and updates global stats.
  444. * @rctx: Crypto request context
  445. */
  446. static void handle_ablkcipher_resp(struct iproc_reqctx_s *rctx)
  447. {
  448. struct spu_hw *spu = &iproc_priv.spu;
  449. #ifdef DEBUG
  450. struct crypto_async_request *areq = rctx->parent;
  451. struct ablkcipher_request *req = ablkcipher_request_cast(areq);
  452. #endif
  453. struct iproc_ctx_s *ctx = rctx->ctx;
  454. u32 payload_len;
  455. /* See how much data was returned */
  456. payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr);
  457. /*
  458. * In XTS mode, the first SPU_XTS_TWEAK_SIZE bytes may be the
  459. * encrypted tweak ("i") value; we don't count those.
  460. */
  461. if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
  462. spu->spu_xts_tweak_in_payload() &&
  463. (payload_len >= SPU_XTS_TWEAK_SIZE))
  464. payload_len -= SPU_XTS_TWEAK_SIZE;
  465. atomic64_add(payload_len, &iproc_priv.bytes_in);
  466. flow_log("%s() offset: %u, bd_len: %u BD:\n",
  467. __func__, rctx->total_received, payload_len);
  468. dump_sg(req->dst, rctx->total_received, payload_len);
  469. if (ctx->cipher.alg == CIPHER_ALG_RC4)
  470. packet_dump(" supdt ", rctx->msg_buf.c.supdt_tweak,
  471. SPU_SUPDT_LEN);
  472. rctx->total_received += payload_len;
  473. if (rctx->total_received == rctx->total_todo) {
  474. atomic_inc(&iproc_priv.op_counts[SPU_OP_CIPHER]);
  475. atomic_inc(
  476. &iproc_priv.cipher_cnt[ctx->cipher.alg][ctx->cipher.mode]);
  477. }
  478. }
  479. /**
  480. * spu_ahash_rx_sg_create() - Build up the scatterlist of buffers used to
  481. * receive a SPU response message for an ahash request.
  482. * @mssg: mailbox message containing the receive sg
  483. * @rctx: crypto request context
  484. * @rx_frag_num: number of scatterlist elements required to hold the
  485. * SPU response message
  486. * @digestsize: length of hash digest, in bytes
  487. * @stat_pad_len: Number of bytes required to pad the STAT field to
  488. * a 4-byte boundary
  489. *
  490. * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
  491. * when the request completes, whether the request is handled successfully or
  492. * there is an error.
  493. *
  494. * Return:
  495. * 0 if successful
  496. * < 0 if an error
  497. */
  498. static int
  499. spu_ahash_rx_sg_create(struct brcm_message *mssg,
  500. struct iproc_reqctx_s *rctx,
  501. u8 rx_frag_num, unsigned int digestsize,
  502. u32 stat_pad_len)
  503. {
  504. struct spu_hw *spu = &iproc_priv.spu;
  505. struct scatterlist *sg; /* used to build sgs in mbox message */
  506. struct iproc_ctx_s *ctx = rctx->ctx;
  507. mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
  508. rctx->gfp);
  509. if (!mssg->spu.dst)
  510. return -ENOMEM;
  511. sg = mssg->spu.dst;
  512. sg_init_table(sg, rx_frag_num);
  513. /* Space for SPU message header */
  514. sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
  515. /* Space for digest */
  516. sg_set_buf(sg++, rctx->msg_buf.digest, digestsize);
  517. if (stat_pad_len)
  518. sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
  519. memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
  520. sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
  521. return 0;
  522. }
  523. /**
  524. * spu_ahash_tx_sg_create() - Build up the scatterlist of buffers used to send
  525. * a SPU request message for an ahash request. Includes SPU message headers and
  526. * the request data.
  527. * @mssg: mailbox message containing the transmit sg
  528. * @rctx: crypto request context
  529. * @tx_frag_num: number of scatterlist elements required to construct the
  530. * SPU request message
  531. * @spu_hdr_len: length in bytes of SPU message header
  532. * @hash_carry_len: Number of bytes of data carried over from previous req
  533. * @new_data_len: Number of bytes of new request data
  534. * @pad_len: Number of pad bytes
  535. *
  536. * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
  537. * when the request completes, whether the request is handled successfully or
  538. * there is an error.
  539. *
  540. * Return:
  541. * 0 if successful
  542. * < 0 if an error
  543. */
  544. static int
  545. spu_ahash_tx_sg_create(struct brcm_message *mssg,
  546. struct iproc_reqctx_s *rctx,
  547. u8 tx_frag_num,
  548. u32 spu_hdr_len,
  549. unsigned int hash_carry_len,
  550. unsigned int new_data_len, u32 pad_len)
  551. {
  552. struct spu_hw *spu = &iproc_priv.spu;
  553. struct scatterlist *sg; /* used to build sgs in mbox message */
  554. u32 datalen; /* Number of bytes of response data expected */
  555. u32 stat_len;
  556. mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
  557. rctx->gfp);
  558. if (!mssg->spu.src)
  559. return -ENOMEM;
  560. sg = mssg->spu.src;
  561. sg_init_table(sg, tx_frag_num);
  562. sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
  563. BCM_HDR_LEN + spu_hdr_len);
  564. if (hash_carry_len)
  565. sg_set_buf(sg++, rctx->hash_carry, hash_carry_len);
  566. if (new_data_len) {
  567. /* Copy in each src sg entry from request, up to chunksize */
  568. datalen = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
  569. rctx->src_nents, new_data_len);
  570. if (datalen < new_data_len) {
  571. pr_err("%s(): failed to copy src sg to mbox msg",
  572. __func__);
  573. return -EFAULT;
  574. }
  575. }
  576. if (pad_len)
  577. sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
  578. stat_len = spu->spu_tx_status_len();
  579. if (stat_len) {
  580. memset(rctx->msg_buf.tx_stat, 0, stat_len);
  581. sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
  582. }
  583. return 0;
  584. }
  585. /**
  586. * handle_ahash_req() - Process an asynchronous hash request from the crypto
  587. * API.
  588. * @rctx: Crypto request context
  589. *
  590. * Builds a SPU request message embedded in a mailbox message and submits the
  591. * mailbox message on a selected mailbox channel. The SPU request message is
  592. * constructed as a scatterlist, including entries from the crypto API's
  593. * src scatterlist to avoid copying the data to be hashed. This function is
  594. * called either on the thread from the crypto API, or, in the case that the
  595. * crypto API request is too large to fit in a single SPU request message,
  596. * on the thread that invokes the receive callback with a response message.
  597. * Because some operations require the response from one chunk before the next
  598. * chunk can be submitted, we always wait for the response for the previous
  599. * chunk before submitting the next chunk. Because requests are submitted in
  600. * lock step like this, there is no need to synchronize access to request data
  601. * structures.
  602. *
  603. * Return:
  604. * -EINPROGRESS: request has been submitted to SPU and response will be
  605. * returned asynchronously
  606. * -EAGAIN: non-final request included a small amount of data, which for
  607. * efficiency we did not submit to the SPU, but instead stored
  608. * to be submitted to the SPU with the next part of the request
  609. * other: an error code
  610. */
  611. static int handle_ahash_req(struct iproc_reqctx_s *rctx)
  612. {
  613. struct spu_hw *spu = &iproc_priv.spu;
  614. struct crypto_async_request *areq = rctx->parent;
  615. struct ahash_request *req = ahash_request_cast(areq);
  616. struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
  617. struct crypto_tfm *tfm = crypto_ahash_tfm(ahash);
  618. unsigned int blocksize = crypto_tfm_alg_blocksize(tfm);
  619. struct iproc_ctx_s *ctx = rctx->ctx;
  620. /* number of bytes still to be hashed in this req */
  621. unsigned int nbytes_to_hash = 0;
  622. int err = 0;
  623. unsigned int chunksize = 0; /* length of hash carry + new data */
  624. /*
  625. * length of new data, not from hash carry, to be submitted in
  626. * this hw request
  627. */
  628. unsigned int new_data_len;
  629. unsigned int __maybe_unused chunk_start = 0;
  630. u32 db_size; /* Length of data field, incl gcm and hash padding */
  631. int pad_len = 0; /* total pad len, including gcm, hash, stat padding */
  632. u32 data_pad_len = 0; /* length of GCM/CCM padding */
  633. u32 stat_pad_len = 0; /* length of padding to align STATUS word */
  634. struct brcm_message *mssg; /* mailbox message */
  635. struct spu_request_opts req_opts;
  636. struct spu_cipher_parms cipher_parms;
  637. struct spu_hash_parms hash_parms;
  638. struct spu_aead_parms aead_parms;
  639. unsigned int local_nbuf;
  640. u32 spu_hdr_len;
  641. unsigned int digestsize;
  642. u16 rem = 0;
  643. /*
  644. * number of entries in src and dst sg. Always includes SPU msg header.
  645. * rx always includes a buffer to catch digest and STATUS.
  646. */
  647. u8 rx_frag_num = 3;
  648. u8 tx_frag_num = 1;
  649. flow_log("total_todo %u, total_sent %u\n",
  650. rctx->total_todo, rctx->total_sent);
  651. memset(&req_opts, 0, sizeof(req_opts));
  652. memset(&cipher_parms, 0, sizeof(cipher_parms));
  653. memset(&hash_parms, 0, sizeof(hash_parms));
  654. memset(&aead_parms, 0, sizeof(aead_parms));
  655. req_opts.bd_suppress = true;
  656. hash_parms.alg = ctx->auth.alg;
  657. hash_parms.mode = ctx->auth.mode;
  658. hash_parms.type = HASH_TYPE_NONE;
  659. hash_parms.key_buf = (u8 *)ctx->authkey;
  660. hash_parms.key_len = ctx->authkeylen;
  661. /*
  662. * For hash algorithms below assignment looks bit odd but
  663. * it's needed for AES-XCBC and AES-CMAC hash algorithms
  664. * to differentiate between 128, 192, 256 bit key values.
  665. * Based on the key values, hash algorithm is selected.
  666. * For example for 128 bit key, hash algorithm is AES-128.
  667. */
  668. cipher_parms.type = ctx->cipher_type;
  669. mssg = &rctx->mb_mssg;
  670. chunk_start = rctx->src_sent;
  671. /*
  672. * Compute the amount remaining to hash. This may include data
  673. * carried over from previous requests.
  674. */
  675. nbytes_to_hash = rctx->total_todo - rctx->total_sent;
  676. chunksize = nbytes_to_hash;
  677. if ((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
  678. (chunksize > ctx->max_payload))
  679. chunksize = ctx->max_payload;
  680. /*
  681. * If this is not a final request and the request data is not a multiple
  682. * of a full block, then simply park the extra data and prefix it to the
  683. * data for the next request.
  684. */
  685. if (!rctx->is_final) {
  686. u8 *dest = rctx->hash_carry + rctx->hash_carry_len;
  687. u16 new_len; /* len of data to add to hash carry */
  688. rem = chunksize % blocksize; /* remainder */
  689. if (rem) {
  690. /* chunksize not a multiple of blocksize */
  691. chunksize -= rem;
  692. if (chunksize == 0) {
  693. /* Don't have a full block to submit to hw */
  694. new_len = rem - rctx->hash_carry_len;
  695. sg_copy_part_to_buf(req->src, dest, new_len,
  696. rctx->src_sent);
  697. rctx->hash_carry_len = rem;
  698. flow_log("Exiting with hash carry len: %u\n",
  699. rctx->hash_carry_len);
  700. packet_dump(" buf: ",
  701. rctx->hash_carry,
  702. rctx->hash_carry_len);
  703. return -EAGAIN;
  704. }
  705. }
  706. }
  707. /* if we have hash carry, then prefix it to the data in this request */
  708. local_nbuf = rctx->hash_carry_len;
  709. rctx->hash_carry_len = 0;
  710. if (local_nbuf)
  711. tx_frag_num++;
  712. new_data_len = chunksize - local_nbuf;
  713. /* Count number of sg entries to be used in this request */
  714. rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip,
  715. new_data_len);
  716. /* AES hashing keeps key size in type field, so need to copy it here */
  717. if (hash_parms.alg == HASH_ALG_AES)
  718. hash_parms.type = (enum hash_type)cipher_parms.type;
  719. else
  720. hash_parms.type = spu->spu_hash_type(rctx->total_sent);
  721. digestsize = spu->spu_digest_size(ctx->digestsize, ctx->auth.alg,
  722. hash_parms.type);
  723. hash_parms.digestsize = digestsize;
  724. /* update the indexes */
  725. rctx->total_sent += chunksize;
  726. /* if you sent a prebuf then that wasn't from this req->src */
  727. rctx->src_sent += new_data_len;
  728. if ((rctx->total_sent == rctx->total_todo) && rctx->is_final)
  729. hash_parms.pad_len = spu->spu_hash_pad_len(hash_parms.alg,
  730. hash_parms.mode,
  731. chunksize,
  732. blocksize);
  733. /*
  734. * If a non-first chunk, then include the digest returned from the
  735. * previous chunk so that hw can add to it (except for AES types).
  736. */
  737. if ((hash_parms.type == HASH_TYPE_UPDT) &&
  738. (hash_parms.alg != HASH_ALG_AES)) {
  739. hash_parms.key_buf = rctx->incr_hash;
  740. hash_parms.key_len = digestsize;
  741. }
  742. atomic64_add(chunksize, &iproc_priv.bytes_out);
  743. flow_log("%s() final: %u nbuf: %u ",
  744. __func__, rctx->is_final, local_nbuf);
  745. if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
  746. flow_log("max_payload infinite\n");
  747. else
  748. flow_log("max_payload %u\n", ctx->max_payload);
  749. flow_log("chunk_start: %u chunk_size: %u\n", chunk_start, chunksize);
  750. /* Prepend SPU header with type 3 BCM header */
  751. memcpy(rctx->msg_buf.bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
  752. hash_parms.prebuf_len = local_nbuf;
  753. spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr +
  754. BCM_HDR_LEN,
  755. &req_opts, &cipher_parms,
  756. &hash_parms, &aead_parms,
  757. new_data_len);
  758. if (spu_hdr_len == 0) {
  759. pr_err("Failed to create SPU request header\n");
  760. return -EFAULT;
  761. }
  762. /*
  763. * Determine total length of padding required. Put all padding in one
  764. * buffer.
  765. */
  766. data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode, chunksize);
  767. db_size = spu_real_db_size(0, 0, local_nbuf, new_data_len,
  768. 0, 0, hash_parms.pad_len);
  769. if (spu->spu_tx_status_len())
  770. stat_pad_len = spu->spu_wordalign_padlen(db_size);
  771. if (stat_pad_len)
  772. rx_frag_num++;
  773. pad_len = hash_parms.pad_len + data_pad_len + stat_pad_len;
  774. if (pad_len) {
  775. tx_frag_num++;
  776. spu->spu_request_pad(rctx->msg_buf.spu_req_pad, data_pad_len,
  777. hash_parms.pad_len, ctx->auth.alg,
  778. ctx->auth.mode, rctx->total_sent,
  779. stat_pad_len);
  780. }
  781. spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
  782. spu_hdr_len);
  783. packet_dump(" prebuf: ", rctx->hash_carry, local_nbuf);
  784. flow_log("Data:\n");
  785. dump_sg(rctx->src_sg, rctx->src_skip, new_data_len);
  786. packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
  787. /*
  788. * Build mailbox message containing SPU request msg and rx buffers
  789. * to catch response message
  790. */
  791. memset(mssg, 0, sizeof(*mssg));
  792. mssg->type = BRCM_MESSAGE_SPU;
  793. mssg->ctx = rctx; /* Will be returned in response */
  794. /* Create rx scatterlist to catch result */
  795. err = spu_ahash_rx_sg_create(mssg, rctx, rx_frag_num, digestsize,
  796. stat_pad_len);
  797. if (err)
  798. return err;
  799. /* Create tx scatterlist containing SPU request message */
  800. tx_frag_num += rctx->src_nents;
  801. if (spu->spu_tx_status_len())
  802. tx_frag_num++;
  803. err = spu_ahash_tx_sg_create(mssg, rctx, tx_frag_num, spu_hdr_len,
  804. local_nbuf, new_data_len, pad_len);
  805. if (err)
  806. return err;
  807. err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
  808. if (unlikely(err < 0))
  809. return err;
  810. return -EINPROGRESS;
  811. }
  812. /**
  813. * spu_hmac_outer_hash() - Request synchonous software compute of the outer hash
  814. * for an HMAC request.
  815. * @req: The HMAC request from the crypto API
  816. * @ctx: The session context
  817. *
  818. * Return: 0 if synchronous hash operation successful
  819. * -EINVAL if the hash algo is unrecognized
  820. * any other value indicates an error
  821. */
  822. static int spu_hmac_outer_hash(struct ahash_request *req,
  823. struct iproc_ctx_s *ctx)
  824. {
  825. struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
  826. unsigned int blocksize =
  827. crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
  828. int rc;
  829. switch (ctx->auth.alg) {
  830. case HASH_ALG_MD5:
  831. rc = do_shash("md5", req->result, ctx->opad, blocksize,
  832. req->result, ctx->digestsize, NULL, 0);
  833. break;
  834. case HASH_ALG_SHA1:
  835. rc = do_shash("sha1", req->result, ctx->opad, blocksize,
  836. req->result, ctx->digestsize, NULL, 0);
  837. break;
  838. case HASH_ALG_SHA224:
  839. rc = do_shash("sha224", req->result, ctx->opad, blocksize,
  840. req->result, ctx->digestsize, NULL, 0);
  841. break;
  842. case HASH_ALG_SHA256:
  843. rc = do_shash("sha256", req->result, ctx->opad, blocksize,
  844. req->result, ctx->digestsize, NULL, 0);
  845. break;
  846. case HASH_ALG_SHA384:
  847. rc = do_shash("sha384", req->result, ctx->opad, blocksize,
  848. req->result, ctx->digestsize, NULL, 0);
  849. break;
  850. case HASH_ALG_SHA512:
  851. rc = do_shash("sha512", req->result, ctx->opad, blocksize,
  852. req->result, ctx->digestsize, NULL, 0);
  853. break;
  854. default:
  855. pr_err("%s() Error : unknown hmac type\n", __func__);
  856. rc = -EINVAL;
  857. }
  858. return rc;
  859. }
  860. /**
  861. * ahash_req_done() - Process a hash result from the SPU hardware.
  862. * @rctx: Crypto request context
  863. *
  864. * Return: 0 if successful
  865. * < 0 if an error
  866. */
  867. static int ahash_req_done(struct iproc_reqctx_s *rctx)
  868. {
  869. struct spu_hw *spu = &iproc_priv.spu;
  870. struct crypto_async_request *areq = rctx->parent;
  871. struct ahash_request *req = ahash_request_cast(areq);
  872. struct iproc_ctx_s *ctx = rctx->ctx;
  873. int err;
  874. memcpy(req->result, rctx->msg_buf.digest, ctx->digestsize);
  875. if (spu->spu_type == SPU_TYPE_SPUM) {
  876. /* byte swap the output from the UPDT function to network byte
  877. * order
  878. */
  879. if (ctx->auth.alg == HASH_ALG_MD5) {
  880. __swab32s((u32 *)req->result);
  881. __swab32s(((u32 *)req->result) + 1);
  882. __swab32s(((u32 *)req->result) + 2);
  883. __swab32s(((u32 *)req->result) + 3);
  884. __swab32s(((u32 *)req->result) + 4);
  885. }
  886. }
  887. flow_dump(" digest ", req->result, ctx->digestsize);
  888. /* if this an HMAC then do the outer hash */
  889. if (rctx->is_sw_hmac) {
  890. err = spu_hmac_outer_hash(req, ctx);
  891. if (err < 0)
  892. return err;
  893. flow_dump(" hmac: ", req->result, ctx->digestsize);
  894. }
  895. if (rctx->is_sw_hmac || ctx->auth.mode == HASH_MODE_HMAC) {
  896. atomic_inc(&iproc_priv.op_counts[SPU_OP_HMAC]);
  897. atomic_inc(&iproc_priv.hmac_cnt[ctx->auth.alg]);
  898. } else {
  899. atomic_inc(&iproc_priv.op_counts[SPU_OP_HASH]);
  900. atomic_inc(&iproc_priv.hash_cnt[ctx->auth.alg]);
  901. }
  902. return 0;
  903. }
  904. /**
  905. * handle_ahash_resp() - Process a SPU response message for a hash request.
  906. * Checks if the entire crypto API request has been processed, and if so,
  907. * invokes post processing on the result.
  908. * @rctx: Crypto request context
  909. */
  910. static void handle_ahash_resp(struct iproc_reqctx_s *rctx)
  911. {
  912. struct iproc_ctx_s *ctx = rctx->ctx;
  913. #ifdef DEBUG
  914. struct crypto_async_request *areq = rctx->parent;
  915. struct ahash_request *req = ahash_request_cast(areq);
  916. struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
  917. unsigned int blocksize =
  918. crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
  919. #endif
  920. /*
  921. * Save hash to use as input to next op if incremental. Might be copying
  922. * too much, but that's easier than figuring out actual digest size here
  923. */
  924. memcpy(rctx->incr_hash, rctx->msg_buf.digest, MAX_DIGEST_SIZE);
  925. flow_log("%s() blocksize:%u digestsize:%u\n",
  926. __func__, blocksize, ctx->digestsize);
  927. atomic64_add(ctx->digestsize, &iproc_priv.bytes_in);
  928. if (rctx->is_final && (rctx->total_sent == rctx->total_todo))
  929. ahash_req_done(rctx);
  930. }
  931. /**
  932. * spu_aead_rx_sg_create() - Build up the scatterlist of buffers used to receive
  933. * a SPU response message for an AEAD request. Includes buffers to catch SPU
  934. * message headers and the response data.
  935. * @mssg: mailbox message containing the receive sg
  936. * @rctx: crypto request context
  937. * @rx_frag_num: number of scatterlist elements required to hold the
  938. * SPU response message
  939. * @assoc_len: Length of associated data included in the crypto request
  940. * @ret_iv_len: Length of IV returned in response
  941. * @resp_len: Number of bytes of response data expected to be written to
  942. * dst buffer from crypto API
  943. * @digestsize: Length of hash digest, in bytes
  944. * @stat_pad_len: Number of bytes required to pad the STAT field to
  945. * a 4-byte boundary
  946. *
  947. * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
  948. * when the request completes, whether the request is handled successfully or
  949. * there is an error.
  950. *
  951. * Returns:
  952. * 0 if successful
  953. * < 0 if an error
  954. */
  955. static int spu_aead_rx_sg_create(struct brcm_message *mssg,
  956. struct aead_request *req,
  957. struct iproc_reqctx_s *rctx,
  958. u8 rx_frag_num,
  959. unsigned int assoc_len,
  960. u32 ret_iv_len, unsigned int resp_len,
  961. unsigned int digestsize, u32 stat_pad_len)
  962. {
  963. struct spu_hw *spu = &iproc_priv.spu;
  964. struct scatterlist *sg; /* used to build sgs in mbox message */
  965. struct iproc_ctx_s *ctx = rctx->ctx;
  966. u32 datalen; /* Number of bytes of response data expected */
  967. u32 assoc_buf_len;
  968. u8 data_padlen = 0;
  969. if (ctx->is_rfc4543) {
  970. /* RFC4543: only pad after data, not after AAD */
  971. data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
  972. assoc_len + resp_len);
  973. assoc_buf_len = assoc_len;
  974. } else {
  975. data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
  976. resp_len);
  977. assoc_buf_len = spu->spu_assoc_resp_len(ctx->cipher.mode,
  978. assoc_len, ret_iv_len,
  979. rctx->is_encrypt);
  980. }
  981. if (ctx->cipher.mode == CIPHER_MODE_CCM)
  982. /* ICV (after data) must be in the next 32-bit word for CCM */
  983. data_padlen += spu->spu_wordalign_padlen(assoc_buf_len +
  984. resp_len +
  985. data_padlen);
  986. if (data_padlen)
  987. /* have to catch gcm pad in separate buffer */
  988. rx_frag_num++;
  989. mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
  990. rctx->gfp);
  991. if (!mssg->spu.dst)
  992. return -ENOMEM;
  993. sg = mssg->spu.dst;
  994. sg_init_table(sg, rx_frag_num);
  995. /* Space for SPU message header */
  996. sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
  997. if (assoc_buf_len) {
  998. /*
  999. * Don't write directly to req->dst, because SPU may pad the
  1000. * assoc data in the response
  1001. */
  1002. memset(rctx->msg_buf.a.resp_aad, 0, assoc_buf_len);
  1003. sg_set_buf(sg++, rctx->msg_buf.a.resp_aad, assoc_buf_len);
  1004. }
  1005. if (resp_len) {
  1006. /*
  1007. * Copy in each dst sg entry from request, up to chunksize.
  1008. * dst sg catches just the data. digest caught in separate buf.
  1009. */
  1010. datalen = spu_msg_sg_add(&sg, &rctx->dst_sg, &rctx->dst_skip,
  1011. rctx->dst_nents, resp_len);
  1012. if (datalen < (resp_len)) {
  1013. pr_err("%s(): failed to copy dst sg to mbox msg. expected len %u, datalen %u",
  1014. __func__, resp_len, datalen);
  1015. return -EFAULT;
  1016. }
  1017. }
  1018. /* If GCM/CCM data is padded, catch padding in separate buffer */
  1019. if (data_padlen) {
  1020. memset(rctx->msg_buf.a.gcmpad, 0, data_padlen);
  1021. sg_set_buf(sg++, rctx->msg_buf.a.gcmpad, data_padlen);
  1022. }
  1023. /* Always catch ICV in separate buffer */
  1024. sg_set_buf(sg++, rctx->msg_buf.digest, digestsize);
  1025. flow_log("stat_pad_len %u\n", stat_pad_len);
  1026. if (stat_pad_len) {
  1027. memset(rctx->msg_buf.rx_stat_pad, 0, stat_pad_len);
  1028. sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
  1029. }
  1030. memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
  1031. sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
  1032. return 0;
  1033. }
  1034. /**
  1035. * spu_aead_tx_sg_create() - Build up the scatterlist of buffers used to send a
  1036. * SPU request message for an AEAD request. Includes SPU message headers and the
  1037. * request data.
  1038. * @mssg: mailbox message containing the transmit sg
  1039. * @rctx: crypto request context
  1040. * @tx_frag_num: number of scatterlist elements required to construct the
  1041. * SPU request message
  1042. * @spu_hdr_len: length of SPU message header in bytes
  1043. * @assoc: crypto API associated data scatterlist
  1044. * @assoc_len: length of associated data
  1045. * @assoc_nents: number of scatterlist entries containing assoc data
  1046. * @aead_iv_len: length of AEAD IV, if included
  1047. * @chunksize: Number of bytes of request data
  1048. * @aad_pad_len: Number of bytes of padding at end of AAD. For GCM/CCM.
  1049. * @pad_len: Number of pad bytes
  1050. * @incl_icv: If true, write separate ICV buffer after data and
  1051. * any padding
  1052. *
  1053. * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
  1054. * when the request completes, whether the request is handled successfully or
  1055. * there is an error.
  1056. *
  1057. * Return:
  1058. * 0 if successful
  1059. * < 0 if an error
  1060. */
  1061. static int spu_aead_tx_sg_create(struct brcm_message *mssg,
  1062. struct iproc_reqctx_s *rctx,
  1063. u8 tx_frag_num,
  1064. u32 spu_hdr_len,
  1065. struct scatterlist *assoc,
  1066. unsigned int assoc_len,
  1067. int assoc_nents,
  1068. unsigned int aead_iv_len,
  1069. unsigned int chunksize,
  1070. u32 aad_pad_len, u32 pad_len, bool incl_icv)
  1071. {
  1072. struct spu_hw *spu = &iproc_priv.spu;
  1073. struct scatterlist *sg; /* used to build sgs in mbox message */
  1074. struct scatterlist *assoc_sg = assoc;
  1075. struct iproc_ctx_s *ctx = rctx->ctx;
  1076. u32 datalen; /* Number of bytes of data to write */
  1077. u32 written; /* Number of bytes of data written */
  1078. u32 assoc_offset = 0;
  1079. u32 stat_len;
  1080. mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
  1081. rctx->gfp);
  1082. if (!mssg->spu.src)
  1083. return -ENOMEM;
  1084. sg = mssg->spu.src;
  1085. sg_init_table(sg, tx_frag_num);
  1086. sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
  1087. BCM_HDR_LEN + spu_hdr_len);
  1088. if (assoc_len) {
  1089. /* Copy in each associated data sg entry from request */
  1090. written = spu_msg_sg_add(&sg, &assoc_sg, &assoc_offset,
  1091. assoc_nents, assoc_len);
  1092. if (written < assoc_len) {
  1093. pr_err("%s(): failed to copy assoc sg to mbox msg",
  1094. __func__);
  1095. return -EFAULT;
  1096. }
  1097. }
  1098. if (aead_iv_len)
  1099. sg_set_buf(sg++, rctx->msg_buf.iv_ctr, aead_iv_len);
  1100. if (aad_pad_len) {
  1101. memset(rctx->msg_buf.a.req_aad_pad, 0, aad_pad_len);
  1102. sg_set_buf(sg++, rctx->msg_buf.a.req_aad_pad, aad_pad_len);
  1103. }
  1104. datalen = chunksize;
  1105. if ((chunksize > ctx->digestsize) && incl_icv)
  1106. datalen -= ctx->digestsize;
  1107. if (datalen) {
  1108. /* For aead, a single msg should consume the entire src sg */
  1109. written = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
  1110. rctx->src_nents, datalen);
  1111. if (written < datalen) {
  1112. pr_err("%s(): failed to copy src sg to mbox msg",
  1113. __func__);
  1114. return -EFAULT;
  1115. }
  1116. }
  1117. if (pad_len) {
  1118. memset(rctx->msg_buf.spu_req_pad, 0, pad_len);
  1119. sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
  1120. }
  1121. if (incl_icv)
  1122. sg_set_buf(sg++, rctx->msg_buf.digest, ctx->digestsize);
  1123. stat_len = spu->spu_tx_status_len();
  1124. if (stat_len) {
  1125. memset(rctx->msg_buf.tx_stat, 0, stat_len);
  1126. sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
  1127. }
  1128. return 0;
  1129. }
  1130. /**
  1131. * handle_aead_req() - Submit a SPU request message for the next chunk of the
  1132. * current AEAD request.
  1133. * @rctx: Crypto request context
  1134. *
  1135. * Unlike other operation types, we assume the length of the request fits in
  1136. * a single SPU request message. aead_enqueue() makes sure this is true.
  1137. * Comments for other op types regarding threads applies here as well.
  1138. *
  1139. * Unlike incremental hash ops, where the spu returns the entire hash for
  1140. * truncated algs like sha-224, the SPU returns just the truncated hash in
  1141. * response to aead requests. So digestsize is always ctx->digestsize here.
  1142. *
  1143. * Return: -EINPROGRESS: crypto request has been accepted and result will be
  1144. * returned asynchronously
  1145. * Any other value indicates an error
  1146. */
  1147. static int handle_aead_req(struct iproc_reqctx_s *rctx)
  1148. {
  1149. struct spu_hw *spu = &iproc_priv.spu;
  1150. struct crypto_async_request *areq = rctx->parent;
  1151. struct aead_request *req = container_of(areq,
  1152. struct aead_request, base);
  1153. struct iproc_ctx_s *ctx = rctx->ctx;
  1154. int err;
  1155. unsigned int chunksize;
  1156. unsigned int resp_len;
  1157. u32 spu_hdr_len;
  1158. u32 db_size;
  1159. u32 stat_pad_len;
  1160. u32 pad_len;
  1161. struct brcm_message *mssg; /* mailbox message */
  1162. struct spu_request_opts req_opts;
  1163. struct spu_cipher_parms cipher_parms;
  1164. struct spu_hash_parms hash_parms;
  1165. struct spu_aead_parms aead_parms;
  1166. int assoc_nents = 0;
  1167. bool incl_icv = false;
  1168. unsigned int digestsize = ctx->digestsize;
  1169. /* number of entries in src and dst sg. Always includes SPU msg header.
  1170. */
  1171. u8 rx_frag_num = 2; /* and STATUS */
  1172. u8 tx_frag_num = 1;
  1173. /* doing the whole thing at once */
  1174. chunksize = rctx->total_todo;
  1175. flow_log("%s: chunksize %u\n", __func__, chunksize);
  1176. memset(&req_opts, 0, sizeof(req_opts));
  1177. memset(&hash_parms, 0, sizeof(hash_parms));
  1178. memset(&aead_parms, 0, sizeof(aead_parms));
  1179. req_opts.is_inbound = !(rctx->is_encrypt);
  1180. req_opts.auth_first = ctx->auth_first;
  1181. req_opts.is_aead = true;
  1182. req_opts.is_esp = ctx->is_esp;
  1183. cipher_parms.alg = ctx->cipher.alg;
  1184. cipher_parms.mode = ctx->cipher.mode;
  1185. cipher_parms.type = ctx->cipher_type;
  1186. cipher_parms.key_buf = ctx->enckey;
  1187. cipher_parms.key_len = ctx->enckeylen;
  1188. cipher_parms.iv_buf = rctx->msg_buf.iv_ctr;
  1189. cipher_parms.iv_len = rctx->iv_ctr_len;
  1190. hash_parms.alg = ctx->auth.alg;
  1191. hash_parms.mode = ctx->auth.mode;
  1192. hash_parms.type = HASH_TYPE_NONE;
  1193. hash_parms.key_buf = (u8 *)ctx->authkey;
  1194. hash_parms.key_len = ctx->authkeylen;
  1195. hash_parms.digestsize = digestsize;
  1196. if ((ctx->auth.alg == HASH_ALG_SHA224) &&
  1197. (ctx->authkeylen < SHA224_DIGEST_SIZE))
  1198. hash_parms.key_len = SHA224_DIGEST_SIZE;
  1199. aead_parms.assoc_size = req->assoclen;
  1200. if (ctx->is_esp && !ctx->is_rfc4543) {
  1201. /*
  1202. * 8-byte IV is included assoc data in request. SPU2
  1203. * expects AAD to include just SPI and seqno. So
  1204. * subtract off the IV len.
  1205. */
  1206. aead_parms.assoc_size -= GCM_RFC4106_IV_SIZE;
  1207. if (rctx->is_encrypt) {
  1208. aead_parms.return_iv = true;
  1209. aead_parms.ret_iv_len = GCM_RFC4106_IV_SIZE;
  1210. aead_parms.ret_iv_off = GCM_ESP_SALT_SIZE;
  1211. }
  1212. } else {
  1213. aead_parms.ret_iv_len = 0;
  1214. }
  1215. /*
  1216. * Count number of sg entries from the crypto API request that are to
  1217. * be included in this mailbox message. For dst sg, don't count space
  1218. * for digest. Digest gets caught in a separate buffer and copied back
  1219. * to dst sg when processing response.
  1220. */
  1221. rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, chunksize);
  1222. rctx->dst_nents = spu_sg_count(rctx->dst_sg, rctx->dst_skip, chunksize);
  1223. if (aead_parms.assoc_size)
  1224. assoc_nents = spu_sg_count(rctx->assoc, 0,
  1225. aead_parms.assoc_size);
  1226. mssg = &rctx->mb_mssg;
  1227. rctx->total_sent = chunksize;
  1228. rctx->src_sent = chunksize;
  1229. if (spu->spu_assoc_resp_len(ctx->cipher.mode,
  1230. aead_parms.assoc_size,
  1231. aead_parms.ret_iv_len,
  1232. rctx->is_encrypt))
  1233. rx_frag_num++;
  1234. aead_parms.iv_len = spu->spu_aead_ivlen(ctx->cipher.mode,
  1235. rctx->iv_ctr_len);
  1236. if (ctx->auth.alg == HASH_ALG_AES)
  1237. hash_parms.type = (enum hash_type)ctx->cipher_type;
  1238. /* General case AAD padding (CCM and RFC4543 special cases below) */
  1239. aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
  1240. aead_parms.assoc_size);
  1241. /* General case data padding (CCM decrypt special case below) */
  1242. aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
  1243. chunksize);
  1244. if (ctx->cipher.mode == CIPHER_MODE_CCM) {
  1245. /*
  1246. * for CCM, AAD len + 2 (rather than AAD len) needs to be
  1247. * 128-bit aligned
  1248. */
  1249. aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(
  1250. ctx->cipher.mode,
  1251. aead_parms.assoc_size + 2);
  1252. /*
  1253. * And when decrypting CCM, need to pad without including
  1254. * size of ICV which is tacked on to end of chunk
  1255. */
  1256. if (!rctx->is_encrypt)
  1257. aead_parms.data_pad_len =
  1258. spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
  1259. chunksize - digestsize);
  1260. /* CCM also requires software to rewrite portions of IV: */
  1261. spu->spu_ccm_update_iv(digestsize, &cipher_parms, req->assoclen,
  1262. chunksize, rctx->is_encrypt,
  1263. ctx->is_esp);
  1264. }
  1265. if (ctx->is_rfc4543) {
  1266. /*
  1267. * RFC4543: data is included in AAD, so don't pad after AAD
  1268. * and pad data based on both AAD + data size
  1269. */
  1270. aead_parms.aad_pad_len = 0;
  1271. if (!rctx->is_encrypt)
  1272. aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(
  1273. ctx->cipher.mode,
  1274. aead_parms.assoc_size + chunksize -
  1275. digestsize);
  1276. else
  1277. aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(
  1278. ctx->cipher.mode,
  1279. aead_parms.assoc_size + chunksize);
  1280. req_opts.is_rfc4543 = true;
  1281. }
  1282. if (spu_req_incl_icv(ctx->cipher.mode, rctx->is_encrypt)) {
  1283. incl_icv = true;
  1284. tx_frag_num++;
  1285. /* Copy ICV from end of src scatterlist to digest buf */
  1286. sg_copy_part_to_buf(req->src, rctx->msg_buf.digest, digestsize,
  1287. req->assoclen + rctx->total_sent -
  1288. digestsize);
  1289. }
  1290. atomic64_add(chunksize, &iproc_priv.bytes_out);
  1291. flow_log("%s()-sent chunksize:%u\n", __func__, chunksize);
  1292. /* Prepend SPU header with type 3 BCM header */
  1293. memcpy(rctx->msg_buf.bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
  1294. spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr +
  1295. BCM_HDR_LEN, &req_opts,
  1296. &cipher_parms, &hash_parms,
  1297. &aead_parms, chunksize);
  1298. /* Determine total length of padding. Put all padding in one buffer. */
  1299. db_size = spu_real_db_size(aead_parms.assoc_size, aead_parms.iv_len, 0,
  1300. chunksize, aead_parms.aad_pad_len,
  1301. aead_parms.data_pad_len, 0);
  1302. stat_pad_len = spu->spu_wordalign_padlen(db_size);
  1303. if (stat_pad_len)
  1304. rx_frag_num++;
  1305. pad_len = aead_parms.data_pad_len + stat_pad_len;
  1306. if (pad_len) {
  1307. tx_frag_num++;
  1308. spu->spu_request_pad(rctx->msg_buf.spu_req_pad,
  1309. aead_parms.data_pad_len, 0,
  1310. ctx->auth.alg, ctx->auth.mode,
  1311. rctx->total_sent, stat_pad_len);
  1312. }
  1313. spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
  1314. spu_hdr_len);
  1315. dump_sg(rctx->assoc, 0, aead_parms.assoc_size);
  1316. packet_dump(" aead iv: ", rctx->msg_buf.iv_ctr, aead_parms.iv_len);
  1317. packet_log("BD:\n");
  1318. dump_sg(rctx->src_sg, rctx->src_skip, chunksize);
  1319. packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
  1320. /*
  1321. * Build mailbox message containing SPU request msg and rx buffers
  1322. * to catch response message
  1323. */
  1324. memset(mssg, 0, sizeof(*mssg));
  1325. mssg->type = BRCM_MESSAGE_SPU;
  1326. mssg->ctx = rctx; /* Will be returned in response */
  1327. /* Create rx scatterlist to catch result */
  1328. rx_frag_num += rctx->dst_nents;
  1329. resp_len = chunksize;
  1330. /*
  1331. * Always catch ICV in separate buffer. Have to for GCM/CCM because of
  1332. * padding. Have to for SHA-224 and other truncated SHAs because SPU
  1333. * sends entire digest back.
  1334. */
  1335. rx_frag_num++;
  1336. if (((ctx->cipher.mode == CIPHER_MODE_GCM) ||
  1337. (ctx->cipher.mode == CIPHER_MODE_CCM)) && !rctx->is_encrypt) {
  1338. /*
  1339. * Input is ciphertxt plus ICV, but ICV not incl
  1340. * in output.
  1341. */
  1342. resp_len -= ctx->digestsize;
  1343. if (resp_len == 0)
  1344. /* no rx frags to catch output data */
  1345. rx_frag_num -= rctx->dst_nents;
  1346. }
  1347. err = spu_aead_rx_sg_create(mssg, req, rctx, rx_frag_num,
  1348. aead_parms.assoc_size,
  1349. aead_parms.ret_iv_len, resp_len, digestsize,
  1350. stat_pad_len);
  1351. if (err)
  1352. return err;
  1353. /* Create tx scatterlist containing SPU request message */
  1354. tx_frag_num += rctx->src_nents;
  1355. tx_frag_num += assoc_nents;
  1356. if (aead_parms.aad_pad_len)
  1357. tx_frag_num++;
  1358. if (aead_parms.iv_len)
  1359. tx_frag_num++;
  1360. if (spu->spu_tx_status_len())
  1361. tx_frag_num++;
  1362. err = spu_aead_tx_sg_create(mssg, rctx, tx_frag_num, spu_hdr_len,
  1363. rctx->assoc, aead_parms.assoc_size,
  1364. assoc_nents, aead_parms.iv_len, chunksize,
  1365. aead_parms.aad_pad_len, pad_len, incl_icv);
  1366. if (err)
  1367. return err;
  1368. err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
  1369. if (unlikely(err < 0))
  1370. return err;
  1371. return -EINPROGRESS;
  1372. }
  1373. /**
  1374. * handle_aead_resp() - Process a SPU response message for an AEAD request.
  1375. * @rctx: Crypto request context
  1376. */
  1377. static void handle_aead_resp(struct iproc_reqctx_s *rctx)
  1378. {
  1379. struct spu_hw *spu = &iproc_priv.spu;
  1380. struct crypto_async_request *areq = rctx->parent;
  1381. struct aead_request *req = container_of(areq,
  1382. struct aead_request, base);
  1383. struct iproc_ctx_s *ctx = rctx->ctx;
  1384. u32 payload_len;
  1385. unsigned int icv_offset;
  1386. u32 result_len;
  1387. /* See how much data was returned */
  1388. payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr);
  1389. flow_log("payload_len %u\n", payload_len);
  1390. /* only count payload */
  1391. atomic64_add(payload_len, &iproc_priv.bytes_in);
  1392. if (req->assoclen)
  1393. packet_dump(" assoc_data ", rctx->msg_buf.a.resp_aad,
  1394. req->assoclen);
  1395. /*
  1396. * Copy the ICV back to the destination
  1397. * buffer. In decrypt case, SPU gives us back the digest, but crypto
  1398. * API doesn't expect ICV in dst buffer.
  1399. */
  1400. result_len = req->cryptlen;
  1401. if (rctx->is_encrypt) {
  1402. icv_offset = req->assoclen + rctx->total_sent;
  1403. packet_dump(" ICV: ", rctx->msg_buf.digest, ctx->digestsize);
  1404. flow_log("copying ICV to dst sg at offset %u\n", icv_offset);
  1405. sg_copy_part_from_buf(req->dst, rctx->msg_buf.digest,
  1406. ctx->digestsize, icv_offset);
  1407. result_len += ctx->digestsize;
  1408. }
  1409. packet_log("response data: ");
  1410. dump_sg(req->dst, req->assoclen, result_len);
  1411. atomic_inc(&iproc_priv.op_counts[SPU_OP_AEAD]);
  1412. if (ctx->cipher.alg == CIPHER_ALG_AES) {
  1413. if (ctx->cipher.mode == CIPHER_MODE_CCM)
  1414. atomic_inc(&iproc_priv.aead_cnt[AES_CCM]);
  1415. else if (ctx->cipher.mode == CIPHER_MODE_GCM)
  1416. atomic_inc(&iproc_priv.aead_cnt[AES_GCM]);
  1417. else
  1418. atomic_inc(&iproc_priv.aead_cnt[AUTHENC]);
  1419. } else {
  1420. atomic_inc(&iproc_priv.aead_cnt[AUTHENC]);
  1421. }
  1422. }
  1423. /**
  1424. * spu_chunk_cleanup() - Do cleanup after processing one chunk of a request
  1425. * @rctx: request context
  1426. *
  1427. * Mailbox scatterlists are allocated for each chunk. So free them after
  1428. * processing each chunk.
  1429. */
  1430. static void spu_chunk_cleanup(struct iproc_reqctx_s *rctx)
  1431. {
  1432. /* mailbox message used to tx request */
  1433. struct brcm_message *mssg = &rctx->mb_mssg;
  1434. kfree(mssg->spu.src);
  1435. kfree(mssg->spu.dst);
  1436. memset(mssg, 0, sizeof(struct brcm_message));
  1437. }
  1438. /**
  1439. * finish_req() - Used to invoke the complete callback from the requester when
  1440. * a request has been handled asynchronously.
  1441. * @rctx: Request context
  1442. * @err: Indicates whether the request was successful or not
  1443. *
  1444. * Ensures that cleanup has been done for request
  1445. */
  1446. static void finish_req(struct iproc_reqctx_s *rctx, int err)
  1447. {
  1448. struct crypto_async_request *areq = rctx->parent;
  1449. flow_log("%s() err:%d\n\n", __func__, err);
  1450. /* No harm done if already called */
  1451. spu_chunk_cleanup(rctx);
  1452. if (areq)
  1453. areq->complete(areq, err);
  1454. }
  1455. /**
  1456. * spu_rx_callback() - Callback from mailbox framework with a SPU response.
  1457. * @cl: mailbox client structure for SPU driver
  1458. * @msg: mailbox message containing SPU response
  1459. */
  1460. static void spu_rx_callback(struct mbox_client *cl, void *msg)
  1461. {
  1462. struct spu_hw *spu = &iproc_priv.spu;
  1463. struct brcm_message *mssg = msg;
  1464. struct iproc_reqctx_s *rctx;
  1465. int err = 0;
  1466. rctx = mssg->ctx;
  1467. if (unlikely(!rctx)) {
  1468. /* This is fatal */
  1469. pr_err("%s(): no request context", __func__);
  1470. err = -EFAULT;
  1471. goto cb_finish;
  1472. }
  1473. /* process the SPU status */
  1474. err = spu->spu_status_process(rctx->msg_buf.rx_stat);
  1475. if (err != 0) {
  1476. if (err == SPU_INVALID_ICV)
  1477. atomic_inc(&iproc_priv.bad_icv);
  1478. err = -EBADMSG;
  1479. goto cb_finish;
  1480. }
  1481. /* Process the SPU response message */
  1482. switch (rctx->ctx->alg->type) {
  1483. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  1484. handle_ablkcipher_resp(rctx);
  1485. break;
  1486. case CRYPTO_ALG_TYPE_AHASH:
  1487. handle_ahash_resp(rctx);
  1488. break;
  1489. case CRYPTO_ALG_TYPE_AEAD:
  1490. handle_aead_resp(rctx);
  1491. break;
  1492. default:
  1493. err = -EINVAL;
  1494. goto cb_finish;
  1495. }
  1496. /*
  1497. * If this response does not complete the request, then send the next
  1498. * request chunk.
  1499. */
  1500. if (rctx->total_sent < rctx->total_todo) {
  1501. /* Deallocate anything specific to previous chunk */
  1502. spu_chunk_cleanup(rctx);
  1503. switch (rctx->ctx->alg->type) {
  1504. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  1505. err = handle_ablkcipher_req(rctx);
  1506. break;
  1507. case CRYPTO_ALG_TYPE_AHASH:
  1508. err = handle_ahash_req(rctx);
  1509. if (err == -EAGAIN)
  1510. /*
  1511. * we saved data in hash carry, but tell crypto
  1512. * API we successfully completed request.
  1513. */
  1514. err = 0;
  1515. break;
  1516. case CRYPTO_ALG_TYPE_AEAD:
  1517. err = handle_aead_req(rctx);
  1518. break;
  1519. default:
  1520. err = -EINVAL;
  1521. }
  1522. if (err == -EINPROGRESS)
  1523. /* Successfully submitted request for next chunk */
  1524. return;
  1525. }
  1526. cb_finish:
  1527. finish_req(rctx, err);
  1528. }
  1529. /* ==================== Kernel Cryptographic API ==================== */
  1530. /**
  1531. * ablkcipher_enqueue() - Handle ablkcipher encrypt or decrypt request.
  1532. * @req: Crypto API request
  1533. * @encrypt: true if encrypting; false if decrypting
  1534. *
  1535. * Return: -EINPROGRESS if request accepted and result will be returned
  1536. * asynchronously
  1537. * < 0 if an error
  1538. */
  1539. static int ablkcipher_enqueue(struct ablkcipher_request *req, bool encrypt)
  1540. {
  1541. struct iproc_reqctx_s *rctx = ablkcipher_request_ctx(req);
  1542. struct iproc_ctx_s *ctx =
  1543. crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
  1544. int err;
  1545. flow_log("%s() enc:%u\n", __func__, encrypt);
  1546. rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
  1547. CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
  1548. rctx->parent = &req->base;
  1549. rctx->is_encrypt = encrypt;
  1550. rctx->bd_suppress = false;
  1551. rctx->total_todo = req->nbytes;
  1552. rctx->src_sent = 0;
  1553. rctx->total_sent = 0;
  1554. rctx->total_received = 0;
  1555. rctx->ctx = ctx;
  1556. /* Initialize current position in src and dst scatterlists */
  1557. rctx->src_sg = req->src;
  1558. rctx->src_nents = 0;
  1559. rctx->src_skip = 0;
  1560. rctx->dst_sg = req->dst;
  1561. rctx->dst_nents = 0;
  1562. rctx->dst_skip = 0;
  1563. if (ctx->cipher.mode == CIPHER_MODE_CBC ||
  1564. ctx->cipher.mode == CIPHER_MODE_CTR ||
  1565. ctx->cipher.mode == CIPHER_MODE_OFB ||
  1566. ctx->cipher.mode == CIPHER_MODE_XTS ||
  1567. ctx->cipher.mode == CIPHER_MODE_GCM ||
  1568. ctx->cipher.mode == CIPHER_MODE_CCM) {
  1569. rctx->iv_ctr_len =
  1570. crypto_ablkcipher_ivsize(crypto_ablkcipher_reqtfm(req));
  1571. memcpy(rctx->msg_buf.iv_ctr, req->info, rctx->iv_ctr_len);
  1572. } else {
  1573. rctx->iv_ctr_len = 0;
  1574. }
  1575. /* Choose a SPU to process this request */
  1576. rctx->chan_idx = select_channel();
  1577. err = handle_ablkcipher_req(rctx);
  1578. if (err != -EINPROGRESS)
  1579. /* synchronous result */
  1580. spu_chunk_cleanup(rctx);
  1581. return err;
  1582. }
  1583. static int des_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
  1584. unsigned int keylen)
  1585. {
  1586. struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
  1587. u32 tmp[DES_EXPKEY_WORDS];
  1588. if (keylen == DES_KEY_SIZE) {
  1589. if (des_ekey(tmp, key) == 0) {
  1590. if (crypto_ablkcipher_get_flags(cipher) &
  1591. CRYPTO_TFM_REQ_WEAK_KEY) {
  1592. u32 flags = CRYPTO_TFM_RES_WEAK_KEY;
  1593. crypto_ablkcipher_set_flags(cipher, flags);
  1594. return -EINVAL;
  1595. }
  1596. }
  1597. ctx->cipher_type = CIPHER_TYPE_DES;
  1598. } else {
  1599. crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1600. return -EINVAL;
  1601. }
  1602. return 0;
  1603. }
  1604. static int threedes_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
  1605. unsigned int keylen)
  1606. {
  1607. struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
  1608. if (keylen == (DES_KEY_SIZE * 3)) {
  1609. const u32 *K = (const u32 *)key;
  1610. u32 flags = CRYPTO_TFM_RES_BAD_KEY_SCHED;
  1611. if (!((K[0] ^ K[2]) | (K[1] ^ K[3])) ||
  1612. !((K[2] ^ K[4]) | (K[3] ^ K[5]))) {
  1613. crypto_ablkcipher_set_flags(cipher, flags);
  1614. return -EINVAL;
  1615. }
  1616. ctx->cipher_type = CIPHER_TYPE_3DES;
  1617. } else {
  1618. crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1619. return -EINVAL;
  1620. }
  1621. return 0;
  1622. }
  1623. static int aes_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
  1624. unsigned int keylen)
  1625. {
  1626. struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
  1627. if (ctx->cipher.mode == CIPHER_MODE_XTS)
  1628. /* XTS includes two keys of equal length */
  1629. keylen = keylen / 2;
  1630. switch (keylen) {
  1631. case AES_KEYSIZE_128:
  1632. ctx->cipher_type = CIPHER_TYPE_AES128;
  1633. break;
  1634. case AES_KEYSIZE_192:
  1635. ctx->cipher_type = CIPHER_TYPE_AES192;
  1636. break;
  1637. case AES_KEYSIZE_256:
  1638. ctx->cipher_type = CIPHER_TYPE_AES256;
  1639. break;
  1640. default:
  1641. crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1642. return -EINVAL;
  1643. }
  1644. WARN_ON((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
  1645. ((ctx->max_payload % AES_BLOCK_SIZE) != 0));
  1646. return 0;
  1647. }
  1648. static int rc4_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
  1649. unsigned int keylen)
  1650. {
  1651. struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
  1652. int i;
  1653. ctx->enckeylen = ARC4_MAX_KEY_SIZE + ARC4_STATE_SIZE;
  1654. ctx->enckey[0] = 0x00; /* 0x00 */
  1655. ctx->enckey[1] = 0x00; /* i */
  1656. ctx->enckey[2] = 0x00; /* 0x00 */
  1657. ctx->enckey[3] = 0x00; /* j */
  1658. for (i = 0; i < ARC4_MAX_KEY_SIZE; i++)
  1659. ctx->enckey[i + ARC4_STATE_SIZE] = key[i % keylen];
  1660. ctx->cipher_type = CIPHER_TYPE_INIT;
  1661. return 0;
  1662. }
  1663. static int ablkcipher_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
  1664. unsigned int keylen)
  1665. {
  1666. struct spu_hw *spu = &iproc_priv.spu;
  1667. struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
  1668. struct spu_cipher_parms cipher_parms;
  1669. u32 alloc_len = 0;
  1670. int err;
  1671. flow_log("ablkcipher_setkey() keylen: %d\n", keylen);
  1672. flow_dump(" key: ", key, keylen);
  1673. switch (ctx->cipher.alg) {
  1674. case CIPHER_ALG_DES:
  1675. err = des_setkey(cipher, key, keylen);
  1676. break;
  1677. case CIPHER_ALG_3DES:
  1678. err = threedes_setkey(cipher, key, keylen);
  1679. break;
  1680. case CIPHER_ALG_AES:
  1681. err = aes_setkey(cipher, key, keylen);
  1682. break;
  1683. case CIPHER_ALG_RC4:
  1684. err = rc4_setkey(cipher, key, keylen);
  1685. break;
  1686. default:
  1687. pr_err("%s() Error: unknown cipher alg\n", __func__);
  1688. err = -EINVAL;
  1689. }
  1690. if (err)
  1691. return err;
  1692. /* RC4 already populated ctx->enkey */
  1693. if (ctx->cipher.alg != CIPHER_ALG_RC4) {
  1694. memcpy(ctx->enckey, key, keylen);
  1695. ctx->enckeylen = keylen;
  1696. }
  1697. /* SPU needs XTS keys in the reverse order the crypto API presents */
  1698. if ((ctx->cipher.alg == CIPHER_ALG_AES) &&
  1699. (ctx->cipher.mode == CIPHER_MODE_XTS)) {
  1700. unsigned int xts_keylen = keylen / 2;
  1701. memcpy(ctx->enckey, key + xts_keylen, xts_keylen);
  1702. memcpy(ctx->enckey + xts_keylen, key, xts_keylen);
  1703. }
  1704. if (spu->spu_type == SPU_TYPE_SPUM)
  1705. alloc_len = BCM_HDR_LEN + SPU_HEADER_ALLOC_LEN;
  1706. else if (spu->spu_type == SPU_TYPE_SPU2)
  1707. alloc_len = BCM_HDR_LEN + SPU2_HEADER_ALLOC_LEN;
  1708. memset(ctx->bcm_spu_req_hdr, 0, alloc_len);
  1709. cipher_parms.iv_buf = NULL;
  1710. cipher_parms.iv_len = crypto_ablkcipher_ivsize(cipher);
  1711. flow_log("%s: iv_len %u\n", __func__, cipher_parms.iv_len);
  1712. cipher_parms.alg = ctx->cipher.alg;
  1713. cipher_parms.mode = ctx->cipher.mode;
  1714. cipher_parms.type = ctx->cipher_type;
  1715. cipher_parms.key_buf = ctx->enckey;
  1716. cipher_parms.key_len = ctx->enckeylen;
  1717. /* Prepend SPU request message with BCM header */
  1718. memcpy(ctx->bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
  1719. ctx->spu_req_hdr_len =
  1720. spu->spu_cipher_req_init(ctx->bcm_spu_req_hdr + BCM_HDR_LEN,
  1721. &cipher_parms);
  1722. ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
  1723. ctx->enckeylen,
  1724. false);
  1725. atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_CIPHER]);
  1726. return 0;
  1727. }
  1728. static int ablkcipher_encrypt(struct ablkcipher_request *req)
  1729. {
  1730. flow_log("ablkcipher_encrypt() nbytes:%u\n", req->nbytes);
  1731. return ablkcipher_enqueue(req, true);
  1732. }
  1733. static int ablkcipher_decrypt(struct ablkcipher_request *req)
  1734. {
  1735. flow_log("ablkcipher_decrypt() nbytes:%u\n", req->nbytes);
  1736. return ablkcipher_enqueue(req, false);
  1737. }
  1738. static int ahash_enqueue(struct ahash_request *req)
  1739. {
  1740. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  1741. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1742. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  1743. int err = 0;
  1744. const char *alg_name;
  1745. flow_log("ahash_enqueue() nbytes:%u\n", req->nbytes);
  1746. rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
  1747. CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
  1748. rctx->parent = &req->base;
  1749. rctx->ctx = ctx;
  1750. rctx->bd_suppress = true;
  1751. memset(&rctx->mb_mssg, 0, sizeof(struct brcm_message));
  1752. /* Initialize position in src scatterlist */
  1753. rctx->src_sg = req->src;
  1754. rctx->src_skip = 0;
  1755. rctx->src_nents = 0;
  1756. rctx->dst_sg = NULL;
  1757. rctx->dst_skip = 0;
  1758. rctx->dst_nents = 0;
  1759. /* SPU2 hardware does not compute hash of zero length data */
  1760. if ((rctx->is_final == 1) && (rctx->total_todo == 0) &&
  1761. (iproc_priv.spu.spu_type == SPU_TYPE_SPU2)) {
  1762. alg_name = crypto_tfm_alg_name(crypto_ahash_tfm(tfm));
  1763. flow_log("Doing %sfinal %s zero-len hash request in software\n",
  1764. rctx->is_final ? "" : "non-", alg_name);
  1765. err = do_shash((unsigned char *)alg_name, req->result,
  1766. NULL, 0, NULL, 0, ctx->authkey,
  1767. ctx->authkeylen);
  1768. if (err < 0)
  1769. flow_log("Hash request failed with error %d\n", err);
  1770. return err;
  1771. }
  1772. /* Choose a SPU to process this request */
  1773. rctx->chan_idx = select_channel();
  1774. err = handle_ahash_req(rctx);
  1775. if (err != -EINPROGRESS)
  1776. /* synchronous result */
  1777. spu_chunk_cleanup(rctx);
  1778. if (err == -EAGAIN)
  1779. /*
  1780. * we saved data in hash carry, but tell crypto API
  1781. * we successfully completed request.
  1782. */
  1783. err = 0;
  1784. return err;
  1785. }
  1786. static int __ahash_init(struct ahash_request *req)
  1787. {
  1788. struct spu_hw *spu = &iproc_priv.spu;
  1789. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  1790. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1791. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  1792. flow_log("%s()\n", __func__);
  1793. /* Initialize the context */
  1794. rctx->hash_carry_len = 0;
  1795. rctx->is_final = 0;
  1796. rctx->total_todo = 0;
  1797. rctx->src_sent = 0;
  1798. rctx->total_sent = 0;
  1799. rctx->total_received = 0;
  1800. ctx->digestsize = crypto_ahash_digestsize(tfm);
  1801. /* If we add a hash whose digest is larger, catch it here. */
  1802. WARN_ON(ctx->digestsize > MAX_DIGEST_SIZE);
  1803. rctx->is_sw_hmac = false;
  1804. ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen, 0,
  1805. true);
  1806. return 0;
  1807. }
  1808. /**
  1809. * spu_no_incr_hash() - Determine whether incremental hashing is supported.
  1810. * @ctx: Crypto session context
  1811. *
  1812. * SPU-2 does not support incremental hashing (we'll have to revisit and
  1813. * condition based on chip revision or device tree entry if future versions do
  1814. * support incremental hash)
  1815. *
  1816. * SPU-M also doesn't support incremental hashing of AES-XCBC
  1817. *
  1818. * Return: true if incremental hashing is not supported
  1819. * false otherwise
  1820. */
  1821. bool spu_no_incr_hash(struct iproc_ctx_s *ctx)
  1822. {
  1823. struct spu_hw *spu = &iproc_priv.spu;
  1824. if (spu->spu_type == SPU_TYPE_SPU2)
  1825. return true;
  1826. if ((ctx->auth.alg == HASH_ALG_AES) &&
  1827. (ctx->auth.mode == HASH_MODE_XCBC))
  1828. return true;
  1829. /* Otherwise, incremental hashing is supported */
  1830. return false;
  1831. }
  1832. static int ahash_init(struct ahash_request *req)
  1833. {
  1834. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1835. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  1836. const char *alg_name;
  1837. struct crypto_shash *hash;
  1838. int ret;
  1839. gfp_t gfp;
  1840. if (spu_no_incr_hash(ctx)) {
  1841. /*
  1842. * If we get an incremental hashing request and it's not
  1843. * supported by the hardware, we need to handle it in software
  1844. * by calling synchronous hash functions.
  1845. */
  1846. alg_name = crypto_tfm_alg_name(crypto_ahash_tfm(tfm));
  1847. hash = crypto_alloc_shash(alg_name, 0, 0);
  1848. if (IS_ERR(hash)) {
  1849. ret = PTR_ERR(hash);
  1850. goto err;
  1851. }
  1852. gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
  1853. CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
  1854. ctx->shash = kmalloc(sizeof(*ctx->shash) +
  1855. crypto_shash_descsize(hash), gfp);
  1856. if (!ctx->shash) {
  1857. ret = -ENOMEM;
  1858. goto err_hash;
  1859. }
  1860. ctx->shash->tfm = hash;
  1861. ctx->shash->flags = 0;
  1862. /* Set the key using data we already have from setkey */
  1863. if (ctx->authkeylen > 0) {
  1864. ret = crypto_shash_setkey(hash, ctx->authkey,
  1865. ctx->authkeylen);
  1866. if (ret)
  1867. goto err_shash;
  1868. }
  1869. /* Initialize hash w/ this key and other params */
  1870. ret = crypto_shash_init(ctx->shash);
  1871. if (ret)
  1872. goto err_shash;
  1873. } else {
  1874. /* Otherwise call the internal function which uses SPU hw */
  1875. ret = __ahash_init(req);
  1876. }
  1877. return ret;
  1878. err_shash:
  1879. kfree(ctx->shash);
  1880. err_hash:
  1881. crypto_free_shash(hash);
  1882. err:
  1883. return ret;
  1884. }
  1885. static int __ahash_update(struct ahash_request *req)
  1886. {
  1887. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  1888. flow_log("ahash_update() nbytes:%u\n", req->nbytes);
  1889. if (!req->nbytes)
  1890. return 0;
  1891. rctx->total_todo += req->nbytes;
  1892. rctx->src_sent = 0;
  1893. return ahash_enqueue(req);
  1894. }
  1895. static int ahash_update(struct ahash_request *req)
  1896. {
  1897. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1898. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  1899. u8 *tmpbuf;
  1900. int ret;
  1901. int nents;
  1902. gfp_t gfp;
  1903. if (spu_no_incr_hash(ctx)) {
  1904. /*
  1905. * If we get an incremental hashing request and it's not
  1906. * supported by the hardware, we need to handle it in software
  1907. * by calling synchronous hash functions.
  1908. */
  1909. if (req->src)
  1910. nents = sg_nents(req->src);
  1911. else
  1912. return -EINVAL;
  1913. /* Copy data from req scatterlist to tmp buffer */
  1914. gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
  1915. CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
  1916. tmpbuf = kmalloc(req->nbytes, gfp);
  1917. if (!tmpbuf)
  1918. return -ENOMEM;
  1919. if (sg_copy_to_buffer(req->src, nents, tmpbuf, req->nbytes) !=
  1920. req->nbytes) {
  1921. kfree(tmpbuf);
  1922. return -EINVAL;
  1923. }
  1924. /* Call synchronous update */
  1925. ret = crypto_shash_update(ctx->shash, tmpbuf, req->nbytes);
  1926. kfree(tmpbuf);
  1927. } else {
  1928. /* Otherwise call the internal function which uses SPU hw */
  1929. ret = __ahash_update(req);
  1930. }
  1931. return ret;
  1932. }
  1933. static int __ahash_final(struct ahash_request *req)
  1934. {
  1935. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  1936. flow_log("ahash_final() nbytes:%u\n", req->nbytes);
  1937. rctx->is_final = 1;
  1938. return ahash_enqueue(req);
  1939. }
  1940. static int ahash_final(struct ahash_request *req)
  1941. {
  1942. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1943. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  1944. int ret;
  1945. if (spu_no_incr_hash(ctx)) {
  1946. /*
  1947. * If we get an incremental hashing request and it's not
  1948. * supported by the hardware, we need to handle it in software
  1949. * by calling synchronous hash functions.
  1950. */
  1951. ret = crypto_shash_final(ctx->shash, req->result);
  1952. /* Done with hash, can deallocate it now */
  1953. crypto_free_shash(ctx->shash->tfm);
  1954. kfree(ctx->shash);
  1955. } else {
  1956. /* Otherwise call the internal function which uses SPU hw */
  1957. ret = __ahash_final(req);
  1958. }
  1959. return ret;
  1960. }
  1961. static int __ahash_finup(struct ahash_request *req)
  1962. {
  1963. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  1964. flow_log("ahash_finup() nbytes:%u\n", req->nbytes);
  1965. rctx->total_todo += req->nbytes;
  1966. rctx->src_sent = 0;
  1967. rctx->is_final = 1;
  1968. return ahash_enqueue(req);
  1969. }
  1970. static int ahash_finup(struct ahash_request *req)
  1971. {
  1972. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1973. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  1974. u8 *tmpbuf;
  1975. int ret;
  1976. int nents;
  1977. gfp_t gfp;
  1978. if (spu_no_incr_hash(ctx)) {
  1979. /*
  1980. * If we get an incremental hashing request and it's not
  1981. * supported by the hardware, we need to handle it in software
  1982. * by calling synchronous hash functions.
  1983. */
  1984. if (req->src) {
  1985. nents = sg_nents(req->src);
  1986. } else {
  1987. ret = -EINVAL;
  1988. goto ahash_finup_exit;
  1989. }
  1990. /* Copy data from req scatterlist to tmp buffer */
  1991. gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
  1992. CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
  1993. tmpbuf = kmalloc(req->nbytes, gfp);
  1994. if (!tmpbuf) {
  1995. ret = -ENOMEM;
  1996. goto ahash_finup_exit;
  1997. }
  1998. if (sg_copy_to_buffer(req->src, nents, tmpbuf, req->nbytes) !=
  1999. req->nbytes) {
  2000. ret = -EINVAL;
  2001. goto ahash_finup_free;
  2002. }
  2003. /* Call synchronous update */
  2004. ret = crypto_shash_finup(ctx->shash, tmpbuf, req->nbytes,
  2005. req->result);
  2006. } else {
  2007. /* Otherwise call the internal function which uses SPU hw */
  2008. return __ahash_finup(req);
  2009. }
  2010. ahash_finup_free:
  2011. kfree(tmpbuf);
  2012. ahash_finup_exit:
  2013. /* Done with hash, can deallocate it now */
  2014. crypto_free_shash(ctx->shash->tfm);
  2015. kfree(ctx->shash);
  2016. return ret;
  2017. }
  2018. static int ahash_digest(struct ahash_request *req)
  2019. {
  2020. int err = 0;
  2021. flow_log("ahash_digest() nbytes:%u\n", req->nbytes);
  2022. /* whole thing at once */
  2023. err = __ahash_init(req);
  2024. if (!err)
  2025. err = __ahash_finup(req);
  2026. return err;
  2027. }
  2028. static int ahash_setkey(struct crypto_ahash *ahash, const u8 *key,
  2029. unsigned int keylen)
  2030. {
  2031. struct iproc_ctx_s *ctx = crypto_ahash_ctx(ahash);
  2032. flow_log("%s() ahash:%p key:%p keylen:%u\n",
  2033. __func__, ahash, key, keylen);
  2034. flow_dump(" key: ", key, keylen);
  2035. if (ctx->auth.alg == HASH_ALG_AES) {
  2036. switch (keylen) {
  2037. case AES_KEYSIZE_128:
  2038. ctx->cipher_type = CIPHER_TYPE_AES128;
  2039. break;
  2040. case AES_KEYSIZE_192:
  2041. ctx->cipher_type = CIPHER_TYPE_AES192;
  2042. break;
  2043. case AES_KEYSIZE_256:
  2044. ctx->cipher_type = CIPHER_TYPE_AES256;
  2045. break;
  2046. default:
  2047. pr_err("%s() Error: Invalid key length\n", __func__);
  2048. return -EINVAL;
  2049. }
  2050. } else {
  2051. pr_err("%s() Error: unknown hash alg\n", __func__);
  2052. return -EINVAL;
  2053. }
  2054. memcpy(ctx->authkey, key, keylen);
  2055. ctx->authkeylen = keylen;
  2056. return 0;
  2057. }
  2058. static int ahash_export(struct ahash_request *req, void *out)
  2059. {
  2060. const struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  2061. struct spu_hash_export_s *spu_exp = (struct spu_hash_export_s *)out;
  2062. spu_exp->total_todo = rctx->total_todo;
  2063. spu_exp->total_sent = rctx->total_sent;
  2064. spu_exp->is_sw_hmac = rctx->is_sw_hmac;
  2065. memcpy(spu_exp->hash_carry, rctx->hash_carry, sizeof(rctx->hash_carry));
  2066. spu_exp->hash_carry_len = rctx->hash_carry_len;
  2067. memcpy(spu_exp->incr_hash, rctx->incr_hash, sizeof(rctx->incr_hash));
  2068. return 0;
  2069. }
  2070. static int ahash_import(struct ahash_request *req, const void *in)
  2071. {
  2072. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  2073. struct spu_hash_export_s *spu_exp = (struct spu_hash_export_s *)in;
  2074. rctx->total_todo = spu_exp->total_todo;
  2075. rctx->total_sent = spu_exp->total_sent;
  2076. rctx->is_sw_hmac = spu_exp->is_sw_hmac;
  2077. memcpy(rctx->hash_carry, spu_exp->hash_carry, sizeof(rctx->hash_carry));
  2078. rctx->hash_carry_len = spu_exp->hash_carry_len;
  2079. memcpy(rctx->incr_hash, spu_exp->incr_hash, sizeof(rctx->incr_hash));
  2080. return 0;
  2081. }
  2082. static int ahash_hmac_setkey(struct crypto_ahash *ahash, const u8 *key,
  2083. unsigned int keylen)
  2084. {
  2085. struct iproc_ctx_s *ctx = crypto_ahash_ctx(ahash);
  2086. unsigned int blocksize =
  2087. crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
  2088. unsigned int digestsize = crypto_ahash_digestsize(ahash);
  2089. unsigned int index;
  2090. int rc;
  2091. flow_log("%s() ahash:%p key:%p keylen:%u blksz:%u digestsz:%u\n",
  2092. __func__, ahash, key, keylen, blocksize, digestsize);
  2093. flow_dump(" key: ", key, keylen);
  2094. if (keylen > blocksize) {
  2095. switch (ctx->auth.alg) {
  2096. case HASH_ALG_MD5:
  2097. rc = do_shash("md5", ctx->authkey, key, keylen, NULL,
  2098. 0, NULL, 0);
  2099. break;
  2100. case HASH_ALG_SHA1:
  2101. rc = do_shash("sha1", ctx->authkey, key, keylen, NULL,
  2102. 0, NULL, 0);
  2103. break;
  2104. case HASH_ALG_SHA224:
  2105. rc = do_shash("sha224", ctx->authkey, key, keylen, NULL,
  2106. 0, NULL, 0);
  2107. break;
  2108. case HASH_ALG_SHA256:
  2109. rc = do_shash("sha256", ctx->authkey, key, keylen, NULL,
  2110. 0, NULL, 0);
  2111. break;
  2112. case HASH_ALG_SHA384:
  2113. rc = do_shash("sha384", ctx->authkey, key, keylen, NULL,
  2114. 0, NULL, 0);
  2115. break;
  2116. case HASH_ALG_SHA512:
  2117. rc = do_shash("sha512", ctx->authkey, key, keylen, NULL,
  2118. 0, NULL, 0);
  2119. break;
  2120. case HASH_ALG_SHA3_224:
  2121. rc = do_shash("sha3-224", ctx->authkey, key, keylen,
  2122. NULL, 0, NULL, 0);
  2123. break;
  2124. case HASH_ALG_SHA3_256:
  2125. rc = do_shash("sha3-256", ctx->authkey, key, keylen,
  2126. NULL, 0, NULL, 0);
  2127. break;
  2128. case HASH_ALG_SHA3_384:
  2129. rc = do_shash("sha3-384", ctx->authkey, key, keylen,
  2130. NULL, 0, NULL, 0);
  2131. break;
  2132. case HASH_ALG_SHA3_512:
  2133. rc = do_shash("sha3-512", ctx->authkey, key, keylen,
  2134. NULL, 0, NULL, 0);
  2135. break;
  2136. default:
  2137. pr_err("%s() Error: unknown hash alg\n", __func__);
  2138. return -EINVAL;
  2139. }
  2140. if (rc < 0) {
  2141. pr_err("%s() Error %d computing shash for %s\n",
  2142. __func__, rc, hash_alg_name[ctx->auth.alg]);
  2143. return rc;
  2144. }
  2145. ctx->authkeylen = digestsize;
  2146. flow_log(" keylen > digestsize... hashed\n");
  2147. flow_dump(" newkey: ", ctx->authkey, ctx->authkeylen);
  2148. } else {
  2149. memcpy(ctx->authkey, key, keylen);
  2150. ctx->authkeylen = keylen;
  2151. }
  2152. /*
  2153. * Full HMAC operation in SPUM is not verified,
  2154. * So keeping the generation of IPAD, OPAD and
  2155. * outer hashing in software.
  2156. */
  2157. if (iproc_priv.spu.spu_type == SPU_TYPE_SPUM) {
  2158. memcpy(ctx->ipad, ctx->authkey, ctx->authkeylen);
  2159. memset(ctx->ipad + ctx->authkeylen, 0,
  2160. blocksize - ctx->authkeylen);
  2161. ctx->authkeylen = 0;
  2162. memcpy(ctx->opad, ctx->ipad, blocksize);
  2163. for (index = 0; index < blocksize; index++) {
  2164. ctx->ipad[index] ^= HMAC_IPAD_VALUE;
  2165. ctx->opad[index] ^= HMAC_OPAD_VALUE;
  2166. }
  2167. flow_dump(" ipad: ", ctx->ipad, blocksize);
  2168. flow_dump(" opad: ", ctx->opad, blocksize);
  2169. }
  2170. ctx->digestsize = digestsize;
  2171. atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_HMAC]);
  2172. return 0;
  2173. }
  2174. static int ahash_hmac_init(struct ahash_request *req)
  2175. {
  2176. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  2177. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2178. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  2179. unsigned int blocksize =
  2180. crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
  2181. flow_log("ahash_hmac_init()\n");
  2182. /* init the context as a hash */
  2183. ahash_init(req);
  2184. if (!spu_no_incr_hash(ctx)) {
  2185. /* SPU-M can do incr hashing but needs sw for outer HMAC */
  2186. rctx->is_sw_hmac = true;
  2187. ctx->auth.mode = HASH_MODE_HASH;
  2188. /* start with a prepended ipad */
  2189. memcpy(rctx->hash_carry, ctx->ipad, blocksize);
  2190. rctx->hash_carry_len = blocksize;
  2191. rctx->total_todo += blocksize;
  2192. }
  2193. return 0;
  2194. }
  2195. static int ahash_hmac_update(struct ahash_request *req)
  2196. {
  2197. flow_log("ahash_hmac_update() nbytes:%u\n", req->nbytes);
  2198. if (!req->nbytes)
  2199. return 0;
  2200. return ahash_update(req);
  2201. }
  2202. static int ahash_hmac_final(struct ahash_request *req)
  2203. {
  2204. flow_log("ahash_hmac_final() nbytes:%u\n", req->nbytes);
  2205. return ahash_final(req);
  2206. }
  2207. static int ahash_hmac_finup(struct ahash_request *req)
  2208. {
  2209. flow_log("ahash_hmac_finupl() nbytes:%u\n", req->nbytes);
  2210. return ahash_finup(req);
  2211. }
  2212. static int ahash_hmac_digest(struct ahash_request *req)
  2213. {
  2214. struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
  2215. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2216. struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
  2217. unsigned int blocksize =
  2218. crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
  2219. flow_log("ahash_hmac_digest() nbytes:%u\n", req->nbytes);
  2220. /* Perform initialization and then call finup */
  2221. __ahash_init(req);
  2222. if (iproc_priv.spu.spu_type == SPU_TYPE_SPU2) {
  2223. /*
  2224. * SPU2 supports full HMAC implementation in the
  2225. * hardware, need not to generate IPAD, OPAD and
  2226. * outer hash in software.
  2227. * Only for hash key len > hash block size, SPU2
  2228. * expects to perform hashing on the key, shorten
  2229. * it to digest size and feed it as hash key.
  2230. */
  2231. rctx->is_sw_hmac = false;
  2232. ctx->auth.mode = HASH_MODE_HMAC;
  2233. } else {
  2234. rctx->is_sw_hmac = true;
  2235. ctx->auth.mode = HASH_MODE_HASH;
  2236. /* start with a prepended ipad */
  2237. memcpy(rctx->hash_carry, ctx->ipad, blocksize);
  2238. rctx->hash_carry_len = blocksize;
  2239. rctx->total_todo += blocksize;
  2240. }
  2241. return __ahash_finup(req);
  2242. }
  2243. /* aead helpers */
  2244. static int aead_need_fallback(struct aead_request *req)
  2245. {
  2246. struct iproc_reqctx_s *rctx = aead_request_ctx(req);
  2247. struct spu_hw *spu = &iproc_priv.spu;
  2248. struct crypto_aead *aead = crypto_aead_reqtfm(req);
  2249. struct iproc_ctx_s *ctx = crypto_aead_ctx(aead);
  2250. u32 payload_len;
  2251. /*
  2252. * SPU hardware cannot handle the AES-GCM/CCM case where plaintext
  2253. * and AAD are both 0 bytes long. So use fallback in this case.
  2254. */
  2255. if (((ctx->cipher.mode == CIPHER_MODE_GCM) ||
  2256. (ctx->cipher.mode == CIPHER_MODE_CCM)) &&
  2257. (req->assoclen == 0)) {
  2258. if ((rctx->is_encrypt && (req->cryptlen == 0)) ||
  2259. (!rctx->is_encrypt && (req->cryptlen == ctx->digestsize))) {
  2260. flow_log("AES GCM/CCM needs fallback for 0 len req\n");
  2261. return 1;
  2262. }
  2263. }
  2264. /* SPU-M hardware only supports CCM digest size of 8, 12, or 16 bytes */
  2265. if ((ctx->cipher.mode == CIPHER_MODE_CCM) &&
  2266. (spu->spu_type == SPU_TYPE_SPUM) &&
  2267. (ctx->digestsize != 8) && (ctx->digestsize != 12) &&
  2268. (ctx->digestsize != 16)) {
  2269. flow_log("%s() AES CCM needs fallback for digest size %d\n",
  2270. __func__, ctx->digestsize);
  2271. return 1;
  2272. }
  2273. /*
  2274. * SPU-M on NSP has an issue where AES-CCM hash is not correct
  2275. * when AAD size is 0
  2276. */
  2277. if ((ctx->cipher.mode == CIPHER_MODE_CCM) &&
  2278. (spu->spu_subtype == SPU_SUBTYPE_SPUM_NSP) &&
  2279. (req->assoclen == 0)) {
  2280. flow_log("%s() AES_CCM needs fallback for 0 len AAD on NSP\n",
  2281. __func__);
  2282. return 1;
  2283. }
  2284. payload_len = req->cryptlen;
  2285. if (spu->spu_type == SPU_TYPE_SPUM)
  2286. payload_len += req->assoclen;
  2287. flow_log("%s() payload len: %u\n", __func__, payload_len);
  2288. if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
  2289. return 0;
  2290. else
  2291. return payload_len > ctx->max_payload;
  2292. }
  2293. static void aead_complete(struct crypto_async_request *areq, int err)
  2294. {
  2295. struct aead_request *req =
  2296. container_of(areq, struct aead_request, base);
  2297. struct iproc_reqctx_s *rctx = aead_request_ctx(req);
  2298. struct crypto_aead *aead = crypto_aead_reqtfm(req);
  2299. flow_log("%s() err:%d\n", __func__, err);
  2300. areq->tfm = crypto_aead_tfm(aead);
  2301. areq->complete = rctx->old_complete;
  2302. areq->data = rctx->old_data;
  2303. areq->complete(areq, err);
  2304. }
  2305. static int aead_do_fallback(struct aead_request *req, bool is_encrypt)
  2306. {
  2307. struct crypto_aead *aead = crypto_aead_reqtfm(req);
  2308. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  2309. struct iproc_reqctx_s *rctx = aead_request_ctx(req);
  2310. struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
  2311. int err;
  2312. u32 req_flags;
  2313. flow_log("%s() enc:%u\n", __func__, is_encrypt);
  2314. if (ctx->fallback_cipher) {
  2315. /* Store the cipher tfm and then use the fallback tfm */
  2316. rctx->old_tfm = tfm;
  2317. aead_request_set_tfm(req, ctx->fallback_cipher);
  2318. /*
  2319. * Save the callback and chain ourselves in, so we can restore
  2320. * the tfm
  2321. */
  2322. rctx->old_complete = req->base.complete;
  2323. rctx->old_data = req->base.data;
  2324. req_flags = aead_request_flags(req);
  2325. aead_request_set_callback(req, req_flags, aead_complete, req);
  2326. err = is_encrypt ? crypto_aead_encrypt(req) :
  2327. crypto_aead_decrypt(req);
  2328. if (err == 0) {
  2329. /*
  2330. * fallback was synchronous (did not return
  2331. * -EINPROGRESS). So restore request state here.
  2332. */
  2333. aead_request_set_callback(req, req_flags,
  2334. rctx->old_complete, req);
  2335. req->base.data = rctx->old_data;
  2336. aead_request_set_tfm(req, aead);
  2337. flow_log("%s() fallback completed successfully\n\n",
  2338. __func__);
  2339. }
  2340. } else {
  2341. err = -EINVAL;
  2342. }
  2343. return err;
  2344. }
  2345. static int aead_enqueue(struct aead_request *req, bool is_encrypt)
  2346. {
  2347. struct iproc_reqctx_s *rctx = aead_request_ctx(req);
  2348. struct crypto_aead *aead = crypto_aead_reqtfm(req);
  2349. struct iproc_ctx_s *ctx = crypto_aead_ctx(aead);
  2350. int err;
  2351. flow_log("%s() enc:%u\n", __func__, is_encrypt);
  2352. if (req->assoclen > MAX_ASSOC_SIZE) {
  2353. pr_err
  2354. ("%s() Error: associated data too long. (%u > %u bytes)\n",
  2355. __func__, req->assoclen, MAX_ASSOC_SIZE);
  2356. return -EINVAL;
  2357. }
  2358. rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
  2359. CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
  2360. rctx->parent = &req->base;
  2361. rctx->is_encrypt = is_encrypt;
  2362. rctx->bd_suppress = false;
  2363. rctx->total_todo = req->cryptlen;
  2364. rctx->src_sent = 0;
  2365. rctx->total_sent = 0;
  2366. rctx->total_received = 0;
  2367. rctx->is_sw_hmac = false;
  2368. rctx->ctx = ctx;
  2369. memset(&rctx->mb_mssg, 0, sizeof(struct brcm_message));
  2370. /* assoc data is at start of src sg */
  2371. rctx->assoc = req->src;
  2372. /*
  2373. * Init current position in src scatterlist to be after assoc data.
  2374. * src_skip set to buffer offset where data begins. (Assoc data could
  2375. * end in the middle of a buffer.)
  2376. */
  2377. if (spu_sg_at_offset(req->src, req->assoclen, &rctx->src_sg,
  2378. &rctx->src_skip) < 0) {
  2379. pr_err("%s() Error: Unable to find start of src data\n",
  2380. __func__);
  2381. return -EINVAL;
  2382. }
  2383. rctx->src_nents = 0;
  2384. rctx->dst_nents = 0;
  2385. if (req->dst == req->src) {
  2386. rctx->dst_sg = rctx->src_sg;
  2387. rctx->dst_skip = rctx->src_skip;
  2388. } else {
  2389. /*
  2390. * Expect req->dst to have room for assoc data followed by
  2391. * output data and ICV, if encrypt. So initialize dst_sg
  2392. * to point beyond assoc len offset.
  2393. */
  2394. if (spu_sg_at_offset(req->dst, req->assoclen, &rctx->dst_sg,
  2395. &rctx->dst_skip) < 0) {
  2396. pr_err("%s() Error: Unable to find start of dst data\n",
  2397. __func__);
  2398. return -EINVAL;
  2399. }
  2400. }
  2401. if (ctx->cipher.mode == CIPHER_MODE_CBC ||
  2402. ctx->cipher.mode == CIPHER_MODE_CTR ||
  2403. ctx->cipher.mode == CIPHER_MODE_OFB ||
  2404. ctx->cipher.mode == CIPHER_MODE_XTS ||
  2405. ctx->cipher.mode == CIPHER_MODE_GCM) {
  2406. rctx->iv_ctr_len =
  2407. ctx->salt_len +
  2408. crypto_aead_ivsize(crypto_aead_reqtfm(req));
  2409. } else if (ctx->cipher.mode == CIPHER_MODE_CCM) {
  2410. rctx->iv_ctr_len = CCM_AES_IV_SIZE;
  2411. } else {
  2412. rctx->iv_ctr_len = 0;
  2413. }
  2414. rctx->hash_carry_len = 0;
  2415. flow_log(" src sg: %p\n", req->src);
  2416. flow_log(" rctx->src_sg: %p, src_skip %u\n",
  2417. rctx->src_sg, rctx->src_skip);
  2418. flow_log(" assoc: %p, assoclen %u\n", rctx->assoc, req->assoclen);
  2419. flow_log(" dst sg: %p\n", req->dst);
  2420. flow_log(" rctx->dst_sg: %p, dst_skip %u\n",
  2421. rctx->dst_sg, rctx->dst_skip);
  2422. flow_log(" iv_ctr_len:%u\n", rctx->iv_ctr_len);
  2423. flow_dump(" iv: ", req->iv, rctx->iv_ctr_len);
  2424. flow_log(" authkeylen:%u\n", ctx->authkeylen);
  2425. flow_log(" is_esp: %s\n", ctx->is_esp ? "yes" : "no");
  2426. if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
  2427. flow_log(" max_payload infinite");
  2428. else
  2429. flow_log(" max_payload: %u\n", ctx->max_payload);
  2430. if (unlikely(aead_need_fallback(req)))
  2431. return aead_do_fallback(req, is_encrypt);
  2432. /*
  2433. * Do memory allocations for request after fallback check, because if we
  2434. * do fallback, we won't call finish_req() to dealloc.
  2435. */
  2436. if (rctx->iv_ctr_len) {
  2437. if (ctx->salt_len)
  2438. memcpy(rctx->msg_buf.iv_ctr + ctx->salt_offset,
  2439. ctx->salt, ctx->salt_len);
  2440. memcpy(rctx->msg_buf.iv_ctr + ctx->salt_offset + ctx->salt_len,
  2441. req->iv,
  2442. rctx->iv_ctr_len - ctx->salt_len - ctx->salt_offset);
  2443. }
  2444. rctx->chan_idx = select_channel();
  2445. err = handle_aead_req(rctx);
  2446. if (err != -EINPROGRESS)
  2447. /* synchronous result */
  2448. spu_chunk_cleanup(rctx);
  2449. return err;
  2450. }
  2451. static int aead_authenc_setkey(struct crypto_aead *cipher,
  2452. const u8 *key, unsigned int keylen)
  2453. {
  2454. struct spu_hw *spu = &iproc_priv.spu;
  2455. struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
  2456. struct crypto_tfm *tfm = crypto_aead_tfm(cipher);
  2457. struct crypto_authenc_keys keys;
  2458. int ret;
  2459. flow_log("%s() aead:%p key:%p keylen:%u\n", __func__, cipher, key,
  2460. keylen);
  2461. flow_dump(" key: ", key, keylen);
  2462. ret = crypto_authenc_extractkeys(&keys, key, keylen);
  2463. if (ret)
  2464. goto badkey;
  2465. if (keys.enckeylen > MAX_KEY_SIZE ||
  2466. keys.authkeylen > MAX_KEY_SIZE)
  2467. goto badkey;
  2468. ctx->enckeylen = keys.enckeylen;
  2469. ctx->authkeylen = keys.authkeylen;
  2470. memcpy(ctx->enckey, keys.enckey, keys.enckeylen);
  2471. /* May end up padding auth key. So make sure it's zeroed. */
  2472. memset(ctx->authkey, 0, sizeof(ctx->authkey));
  2473. memcpy(ctx->authkey, keys.authkey, keys.authkeylen);
  2474. switch (ctx->alg->cipher_info.alg) {
  2475. case CIPHER_ALG_DES:
  2476. if (ctx->enckeylen == DES_KEY_SIZE) {
  2477. u32 tmp[DES_EXPKEY_WORDS];
  2478. u32 flags = CRYPTO_TFM_RES_WEAK_KEY;
  2479. if (des_ekey(tmp, keys.enckey) == 0) {
  2480. if (crypto_aead_get_flags(cipher) &
  2481. CRYPTO_TFM_REQ_WEAK_KEY) {
  2482. crypto_aead_set_flags(cipher, flags);
  2483. return -EINVAL;
  2484. }
  2485. }
  2486. ctx->cipher_type = CIPHER_TYPE_DES;
  2487. } else {
  2488. goto badkey;
  2489. }
  2490. break;
  2491. case CIPHER_ALG_3DES:
  2492. if (ctx->enckeylen == (DES_KEY_SIZE * 3)) {
  2493. const u32 *K = (const u32 *)keys.enckey;
  2494. u32 flags = CRYPTO_TFM_RES_BAD_KEY_SCHED;
  2495. if (!((K[0] ^ K[2]) | (K[1] ^ K[3])) ||
  2496. !((K[2] ^ K[4]) | (K[3] ^ K[5]))) {
  2497. crypto_aead_set_flags(cipher, flags);
  2498. return -EINVAL;
  2499. }
  2500. ctx->cipher_type = CIPHER_TYPE_3DES;
  2501. } else {
  2502. crypto_aead_set_flags(cipher,
  2503. CRYPTO_TFM_RES_BAD_KEY_LEN);
  2504. return -EINVAL;
  2505. }
  2506. break;
  2507. case CIPHER_ALG_AES:
  2508. switch (ctx->enckeylen) {
  2509. case AES_KEYSIZE_128:
  2510. ctx->cipher_type = CIPHER_TYPE_AES128;
  2511. break;
  2512. case AES_KEYSIZE_192:
  2513. ctx->cipher_type = CIPHER_TYPE_AES192;
  2514. break;
  2515. case AES_KEYSIZE_256:
  2516. ctx->cipher_type = CIPHER_TYPE_AES256;
  2517. break;
  2518. default:
  2519. goto badkey;
  2520. }
  2521. break;
  2522. case CIPHER_ALG_RC4:
  2523. ctx->cipher_type = CIPHER_TYPE_INIT;
  2524. break;
  2525. default:
  2526. pr_err("%s() Error: Unknown cipher alg\n", __func__);
  2527. return -EINVAL;
  2528. }
  2529. flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
  2530. ctx->authkeylen);
  2531. flow_dump(" enc: ", ctx->enckey, ctx->enckeylen);
  2532. flow_dump(" auth: ", ctx->authkey, ctx->authkeylen);
  2533. /* setkey the fallback just in case we needto use it */
  2534. if (ctx->fallback_cipher) {
  2535. flow_log(" running fallback setkey()\n");
  2536. ctx->fallback_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
  2537. ctx->fallback_cipher->base.crt_flags |=
  2538. tfm->crt_flags & CRYPTO_TFM_REQ_MASK;
  2539. ret = crypto_aead_setkey(ctx->fallback_cipher, key, keylen);
  2540. if (ret) {
  2541. flow_log(" fallback setkey() returned:%d\n", ret);
  2542. tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
  2543. tfm->crt_flags |=
  2544. (ctx->fallback_cipher->base.crt_flags &
  2545. CRYPTO_TFM_RES_MASK);
  2546. }
  2547. }
  2548. ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
  2549. ctx->enckeylen,
  2550. false);
  2551. atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_AEAD]);
  2552. return ret;
  2553. badkey:
  2554. ctx->enckeylen = 0;
  2555. ctx->authkeylen = 0;
  2556. ctx->digestsize = 0;
  2557. crypto_aead_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  2558. return -EINVAL;
  2559. }
  2560. static int aead_gcm_ccm_setkey(struct crypto_aead *cipher,
  2561. const u8 *key, unsigned int keylen)
  2562. {
  2563. struct spu_hw *spu = &iproc_priv.spu;
  2564. struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
  2565. struct crypto_tfm *tfm = crypto_aead_tfm(cipher);
  2566. int ret = 0;
  2567. flow_log("%s() keylen:%u\n", __func__, keylen);
  2568. flow_dump(" key: ", key, keylen);
  2569. if (!ctx->is_esp)
  2570. ctx->digestsize = keylen;
  2571. ctx->enckeylen = keylen;
  2572. ctx->authkeylen = 0;
  2573. memcpy(ctx->enckey, key, ctx->enckeylen);
  2574. switch (ctx->enckeylen) {
  2575. case AES_KEYSIZE_128:
  2576. ctx->cipher_type = CIPHER_TYPE_AES128;
  2577. break;
  2578. case AES_KEYSIZE_192:
  2579. ctx->cipher_type = CIPHER_TYPE_AES192;
  2580. break;
  2581. case AES_KEYSIZE_256:
  2582. ctx->cipher_type = CIPHER_TYPE_AES256;
  2583. break;
  2584. default:
  2585. goto badkey;
  2586. }
  2587. flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
  2588. ctx->authkeylen);
  2589. flow_dump(" enc: ", ctx->enckey, ctx->enckeylen);
  2590. flow_dump(" auth: ", ctx->authkey, ctx->authkeylen);
  2591. /* setkey the fallback just in case we need to use it */
  2592. if (ctx->fallback_cipher) {
  2593. flow_log(" running fallback setkey()\n");
  2594. ctx->fallback_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
  2595. ctx->fallback_cipher->base.crt_flags |=
  2596. tfm->crt_flags & CRYPTO_TFM_REQ_MASK;
  2597. ret = crypto_aead_setkey(ctx->fallback_cipher, key,
  2598. keylen + ctx->salt_len);
  2599. if (ret) {
  2600. flow_log(" fallback setkey() returned:%d\n", ret);
  2601. tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
  2602. tfm->crt_flags |=
  2603. (ctx->fallback_cipher->base.crt_flags &
  2604. CRYPTO_TFM_RES_MASK);
  2605. }
  2606. }
  2607. ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
  2608. ctx->enckeylen,
  2609. false);
  2610. atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_AEAD]);
  2611. flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
  2612. ctx->authkeylen);
  2613. return ret;
  2614. badkey:
  2615. ctx->enckeylen = 0;
  2616. ctx->authkeylen = 0;
  2617. ctx->digestsize = 0;
  2618. crypto_aead_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  2619. return -EINVAL;
  2620. }
  2621. /**
  2622. * aead_gcm_esp_setkey() - setkey() operation for ESP variant of GCM AES.
  2623. * @cipher: AEAD structure
  2624. * @key: Key followed by 4 bytes of salt
  2625. * @keylen: Length of key plus salt, in bytes
  2626. *
  2627. * Extracts salt from key and stores it to be prepended to IV on each request.
  2628. * Digest is always 16 bytes
  2629. *
  2630. * Return: Value from generic gcm setkey.
  2631. */
  2632. static int aead_gcm_esp_setkey(struct crypto_aead *cipher,
  2633. const u8 *key, unsigned int keylen)
  2634. {
  2635. struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
  2636. flow_log("%s\n", __func__);
  2637. ctx->salt_len = GCM_ESP_SALT_SIZE;
  2638. ctx->salt_offset = GCM_ESP_SALT_OFFSET;
  2639. memcpy(ctx->salt, key + keylen - GCM_ESP_SALT_SIZE, GCM_ESP_SALT_SIZE);
  2640. keylen -= GCM_ESP_SALT_SIZE;
  2641. ctx->digestsize = GCM_ESP_DIGESTSIZE;
  2642. ctx->is_esp = true;
  2643. flow_dump("salt: ", ctx->salt, GCM_ESP_SALT_SIZE);
  2644. return aead_gcm_ccm_setkey(cipher, key, keylen);
  2645. }
  2646. /**
  2647. * rfc4543_gcm_esp_setkey() - setkey operation for RFC4543 variant of GCM/GMAC.
  2648. * cipher: AEAD structure
  2649. * key: Key followed by 4 bytes of salt
  2650. * keylen: Length of key plus salt, in bytes
  2651. *
  2652. * Extracts salt from key and stores it to be prepended to IV on each request.
  2653. * Digest is always 16 bytes
  2654. *
  2655. * Return: Value from generic gcm setkey.
  2656. */
  2657. static int rfc4543_gcm_esp_setkey(struct crypto_aead *cipher,
  2658. const u8 *key, unsigned int keylen)
  2659. {
  2660. struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
  2661. flow_log("%s\n", __func__);
  2662. ctx->salt_len = GCM_ESP_SALT_SIZE;
  2663. ctx->salt_offset = GCM_ESP_SALT_OFFSET;
  2664. memcpy(ctx->salt, key + keylen - GCM_ESP_SALT_SIZE, GCM_ESP_SALT_SIZE);
  2665. keylen -= GCM_ESP_SALT_SIZE;
  2666. ctx->digestsize = GCM_ESP_DIGESTSIZE;
  2667. ctx->is_esp = true;
  2668. ctx->is_rfc4543 = true;
  2669. flow_dump("salt: ", ctx->salt, GCM_ESP_SALT_SIZE);
  2670. return aead_gcm_ccm_setkey(cipher, key, keylen);
  2671. }
  2672. /**
  2673. * aead_ccm_esp_setkey() - setkey() operation for ESP variant of CCM AES.
  2674. * @cipher: AEAD structure
  2675. * @key: Key followed by 4 bytes of salt
  2676. * @keylen: Length of key plus salt, in bytes
  2677. *
  2678. * Extracts salt from key and stores it to be prepended to IV on each request.
  2679. * Digest is always 16 bytes
  2680. *
  2681. * Return: Value from generic ccm setkey.
  2682. */
  2683. static int aead_ccm_esp_setkey(struct crypto_aead *cipher,
  2684. const u8 *key, unsigned int keylen)
  2685. {
  2686. struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
  2687. flow_log("%s\n", __func__);
  2688. ctx->salt_len = CCM_ESP_SALT_SIZE;
  2689. ctx->salt_offset = CCM_ESP_SALT_OFFSET;
  2690. memcpy(ctx->salt, key + keylen - CCM_ESP_SALT_SIZE, CCM_ESP_SALT_SIZE);
  2691. keylen -= CCM_ESP_SALT_SIZE;
  2692. ctx->is_esp = true;
  2693. flow_dump("salt: ", ctx->salt, CCM_ESP_SALT_SIZE);
  2694. return aead_gcm_ccm_setkey(cipher, key, keylen);
  2695. }
  2696. static int aead_setauthsize(struct crypto_aead *cipher, unsigned int authsize)
  2697. {
  2698. struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
  2699. int ret = 0;
  2700. flow_log("%s() authkeylen:%u authsize:%u\n",
  2701. __func__, ctx->authkeylen, authsize);
  2702. ctx->digestsize = authsize;
  2703. /* setkey the fallback just in case we needto use it */
  2704. if (ctx->fallback_cipher) {
  2705. flow_log(" running fallback setauth()\n");
  2706. ret = crypto_aead_setauthsize(ctx->fallback_cipher, authsize);
  2707. if (ret)
  2708. flow_log(" fallback setauth() returned:%d\n", ret);
  2709. }
  2710. return ret;
  2711. }
  2712. static int aead_encrypt(struct aead_request *req)
  2713. {
  2714. flow_log("%s() cryptlen:%u %08x\n", __func__, req->cryptlen,
  2715. req->cryptlen);
  2716. dump_sg(req->src, 0, req->cryptlen + req->assoclen);
  2717. flow_log(" assoc_len:%u\n", req->assoclen);
  2718. return aead_enqueue(req, true);
  2719. }
  2720. static int aead_decrypt(struct aead_request *req)
  2721. {
  2722. flow_log("%s() cryptlen:%u\n", __func__, req->cryptlen);
  2723. dump_sg(req->src, 0, req->cryptlen + req->assoclen);
  2724. flow_log(" assoc_len:%u\n", req->assoclen);
  2725. return aead_enqueue(req, false);
  2726. }
  2727. /* ==================== Supported Cipher Algorithms ==================== */
  2728. static struct iproc_alg_s driver_algs[] = {
  2729. {
  2730. .type = CRYPTO_ALG_TYPE_AEAD,
  2731. .alg.aead = {
  2732. .base = {
  2733. .cra_name = "gcm(aes)",
  2734. .cra_driver_name = "gcm-aes-iproc",
  2735. .cra_blocksize = AES_BLOCK_SIZE,
  2736. .cra_flags = CRYPTO_ALG_NEED_FALLBACK
  2737. },
  2738. .setkey = aead_gcm_ccm_setkey,
  2739. .ivsize = GCM_AES_IV_SIZE,
  2740. .maxauthsize = AES_BLOCK_SIZE,
  2741. },
  2742. .cipher_info = {
  2743. .alg = CIPHER_ALG_AES,
  2744. .mode = CIPHER_MODE_GCM,
  2745. },
  2746. .auth_info = {
  2747. .alg = HASH_ALG_AES,
  2748. .mode = HASH_MODE_GCM,
  2749. },
  2750. .auth_first = 0,
  2751. },
  2752. {
  2753. .type = CRYPTO_ALG_TYPE_AEAD,
  2754. .alg.aead = {
  2755. .base = {
  2756. .cra_name = "ccm(aes)",
  2757. .cra_driver_name = "ccm-aes-iproc",
  2758. .cra_blocksize = AES_BLOCK_SIZE,
  2759. .cra_flags = CRYPTO_ALG_NEED_FALLBACK
  2760. },
  2761. .setkey = aead_gcm_ccm_setkey,
  2762. .ivsize = CCM_AES_IV_SIZE,
  2763. .maxauthsize = AES_BLOCK_SIZE,
  2764. },
  2765. .cipher_info = {
  2766. .alg = CIPHER_ALG_AES,
  2767. .mode = CIPHER_MODE_CCM,
  2768. },
  2769. .auth_info = {
  2770. .alg = HASH_ALG_AES,
  2771. .mode = HASH_MODE_CCM,
  2772. },
  2773. .auth_first = 0,
  2774. },
  2775. {
  2776. .type = CRYPTO_ALG_TYPE_AEAD,
  2777. .alg.aead = {
  2778. .base = {
  2779. .cra_name = "rfc4106(gcm(aes))",
  2780. .cra_driver_name = "gcm-aes-esp-iproc",
  2781. .cra_blocksize = AES_BLOCK_SIZE,
  2782. .cra_flags = CRYPTO_ALG_NEED_FALLBACK
  2783. },
  2784. .setkey = aead_gcm_esp_setkey,
  2785. .ivsize = GCM_RFC4106_IV_SIZE,
  2786. .maxauthsize = AES_BLOCK_SIZE,
  2787. },
  2788. .cipher_info = {
  2789. .alg = CIPHER_ALG_AES,
  2790. .mode = CIPHER_MODE_GCM,
  2791. },
  2792. .auth_info = {
  2793. .alg = HASH_ALG_AES,
  2794. .mode = HASH_MODE_GCM,
  2795. },
  2796. .auth_first = 0,
  2797. },
  2798. {
  2799. .type = CRYPTO_ALG_TYPE_AEAD,
  2800. .alg.aead = {
  2801. .base = {
  2802. .cra_name = "rfc4309(ccm(aes))",
  2803. .cra_driver_name = "ccm-aes-esp-iproc",
  2804. .cra_blocksize = AES_BLOCK_SIZE,
  2805. .cra_flags = CRYPTO_ALG_NEED_FALLBACK
  2806. },
  2807. .setkey = aead_ccm_esp_setkey,
  2808. .ivsize = CCM_AES_IV_SIZE,
  2809. .maxauthsize = AES_BLOCK_SIZE,
  2810. },
  2811. .cipher_info = {
  2812. .alg = CIPHER_ALG_AES,
  2813. .mode = CIPHER_MODE_CCM,
  2814. },
  2815. .auth_info = {
  2816. .alg = HASH_ALG_AES,
  2817. .mode = HASH_MODE_CCM,
  2818. },
  2819. .auth_first = 0,
  2820. },
  2821. {
  2822. .type = CRYPTO_ALG_TYPE_AEAD,
  2823. .alg.aead = {
  2824. .base = {
  2825. .cra_name = "rfc4543(gcm(aes))",
  2826. .cra_driver_name = "gmac-aes-esp-iproc",
  2827. .cra_blocksize = AES_BLOCK_SIZE,
  2828. .cra_flags = CRYPTO_ALG_NEED_FALLBACK
  2829. },
  2830. .setkey = rfc4543_gcm_esp_setkey,
  2831. .ivsize = GCM_RFC4106_IV_SIZE,
  2832. .maxauthsize = AES_BLOCK_SIZE,
  2833. },
  2834. .cipher_info = {
  2835. .alg = CIPHER_ALG_AES,
  2836. .mode = CIPHER_MODE_GCM,
  2837. },
  2838. .auth_info = {
  2839. .alg = HASH_ALG_AES,
  2840. .mode = HASH_MODE_GCM,
  2841. },
  2842. .auth_first = 0,
  2843. },
  2844. {
  2845. .type = CRYPTO_ALG_TYPE_AEAD,
  2846. .alg.aead = {
  2847. .base = {
  2848. .cra_name = "authenc(hmac(md5),cbc(aes))",
  2849. .cra_driver_name = "authenc-hmac-md5-cbc-aes-iproc",
  2850. .cra_blocksize = AES_BLOCK_SIZE,
  2851. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  2852. },
  2853. .setkey = aead_authenc_setkey,
  2854. .ivsize = AES_BLOCK_SIZE,
  2855. .maxauthsize = MD5_DIGEST_SIZE,
  2856. },
  2857. .cipher_info = {
  2858. .alg = CIPHER_ALG_AES,
  2859. .mode = CIPHER_MODE_CBC,
  2860. },
  2861. .auth_info = {
  2862. .alg = HASH_ALG_MD5,
  2863. .mode = HASH_MODE_HMAC,
  2864. },
  2865. .auth_first = 0,
  2866. },
  2867. {
  2868. .type = CRYPTO_ALG_TYPE_AEAD,
  2869. .alg.aead = {
  2870. .base = {
  2871. .cra_name = "authenc(hmac(sha1),cbc(aes))",
  2872. .cra_driver_name = "authenc-hmac-sha1-cbc-aes-iproc",
  2873. .cra_blocksize = AES_BLOCK_SIZE,
  2874. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  2875. },
  2876. .setkey = aead_authenc_setkey,
  2877. .ivsize = AES_BLOCK_SIZE,
  2878. .maxauthsize = SHA1_DIGEST_SIZE,
  2879. },
  2880. .cipher_info = {
  2881. .alg = CIPHER_ALG_AES,
  2882. .mode = CIPHER_MODE_CBC,
  2883. },
  2884. .auth_info = {
  2885. .alg = HASH_ALG_SHA1,
  2886. .mode = HASH_MODE_HMAC,
  2887. },
  2888. .auth_first = 0,
  2889. },
  2890. {
  2891. .type = CRYPTO_ALG_TYPE_AEAD,
  2892. .alg.aead = {
  2893. .base = {
  2894. .cra_name = "authenc(hmac(sha256),cbc(aes))",
  2895. .cra_driver_name = "authenc-hmac-sha256-cbc-aes-iproc",
  2896. .cra_blocksize = AES_BLOCK_SIZE,
  2897. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  2898. },
  2899. .setkey = aead_authenc_setkey,
  2900. .ivsize = AES_BLOCK_SIZE,
  2901. .maxauthsize = SHA256_DIGEST_SIZE,
  2902. },
  2903. .cipher_info = {
  2904. .alg = CIPHER_ALG_AES,
  2905. .mode = CIPHER_MODE_CBC,
  2906. },
  2907. .auth_info = {
  2908. .alg = HASH_ALG_SHA256,
  2909. .mode = HASH_MODE_HMAC,
  2910. },
  2911. .auth_first = 0,
  2912. },
  2913. {
  2914. .type = CRYPTO_ALG_TYPE_AEAD,
  2915. .alg.aead = {
  2916. .base = {
  2917. .cra_name = "authenc(hmac(md5),cbc(des))",
  2918. .cra_driver_name = "authenc-hmac-md5-cbc-des-iproc",
  2919. .cra_blocksize = DES_BLOCK_SIZE,
  2920. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  2921. },
  2922. .setkey = aead_authenc_setkey,
  2923. .ivsize = DES_BLOCK_SIZE,
  2924. .maxauthsize = MD5_DIGEST_SIZE,
  2925. },
  2926. .cipher_info = {
  2927. .alg = CIPHER_ALG_DES,
  2928. .mode = CIPHER_MODE_CBC,
  2929. },
  2930. .auth_info = {
  2931. .alg = HASH_ALG_MD5,
  2932. .mode = HASH_MODE_HMAC,
  2933. },
  2934. .auth_first = 0,
  2935. },
  2936. {
  2937. .type = CRYPTO_ALG_TYPE_AEAD,
  2938. .alg.aead = {
  2939. .base = {
  2940. .cra_name = "authenc(hmac(sha1),cbc(des))",
  2941. .cra_driver_name = "authenc-hmac-sha1-cbc-des-iproc",
  2942. .cra_blocksize = DES_BLOCK_SIZE,
  2943. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  2944. },
  2945. .setkey = aead_authenc_setkey,
  2946. .ivsize = DES_BLOCK_SIZE,
  2947. .maxauthsize = SHA1_DIGEST_SIZE,
  2948. },
  2949. .cipher_info = {
  2950. .alg = CIPHER_ALG_DES,
  2951. .mode = CIPHER_MODE_CBC,
  2952. },
  2953. .auth_info = {
  2954. .alg = HASH_ALG_SHA1,
  2955. .mode = HASH_MODE_HMAC,
  2956. },
  2957. .auth_first = 0,
  2958. },
  2959. {
  2960. .type = CRYPTO_ALG_TYPE_AEAD,
  2961. .alg.aead = {
  2962. .base = {
  2963. .cra_name = "authenc(hmac(sha224),cbc(des))",
  2964. .cra_driver_name = "authenc-hmac-sha224-cbc-des-iproc",
  2965. .cra_blocksize = DES_BLOCK_SIZE,
  2966. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  2967. },
  2968. .setkey = aead_authenc_setkey,
  2969. .ivsize = DES_BLOCK_SIZE,
  2970. .maxauthsize = SHA224_DIGEST_SIZE,
  2971. },
  2972. .cipher_info = {
  2973. .alg = CIPHER_ALG_DES,
  2974. .mode = CIPHER_MODE_CBC,
  2975. },
  2976. .auth_info = {
  2977. .alg = HASH_ALG_SHA224,
  2978. .mode = HASH_MODE_HMAC,
  2979. },
  2980. .auth_first = 0,
  2981. },
  2982. {
  2983. .type = CRYPTO_ALG_TYPE_AEAD,
  2984. .alg.aead = {
  2985. .base = {
  2986. .cra_name = "authenc(hmac(sha256),cbc(des))",
  2987. .cra_driver_name = "authenc-hmac-sha256-cbc-des-iproc",
  2988. .cra_blocksize = DES_BLOCK_SIZE,
  2989. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  2990. },
  2991. .setkey = aead_authenc_setkey,
  2992. .ivsize = DES_BLOCK_SIZE,
  2993. .maxauthsize = SHA256_DIGEST_SIZE,
  2994. },
  2995. .cipher_info = {
  2996. .alg = CIPHER_ALG_DES,
  2997. .mode = CIPHER_MODE_CBC,
  2998. },
  2999. .auth_info = {
  3000. .alg = HASH_ALG_SHA256,
  3001. .mode = HASH_MODE_HMAC,
  3002. },
  3003. .auth_first = 0,
  3004. },
  3005. {
  3006. .type = CRYPTO_ALG_TYPE_AEAD,
  3007. .alg.aead = {
  3008. .base = {
  3009. .cra_name = "authenc(hmac(sha384),cbc(des))",
  3010. .cra_driver_name = "authenc-hmac-sha384-cbc-des-iproc",
  3011. .cra_blocksize = DES_BLOCK_SIZE,
  3012. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3013. },
  3014. .setkey = aead_authenc_setkey,
  3015. .ivsize = DES_BLOCK_SIZE,
  3016. .maxauthsize = SHA384_DIGEST_SIZE,
  3017. },
  3018. .cipher_info = {
  3019. .alg = CIPHER_ALG_DES,
  3020. .mode = CIPHER_MODE_CBC,
  3021. },
  3022. .auth_info = {
  3023. .alg = HASH_ALG_SHA384,
  3024. .mode = HASH_MODE_HMAC,
  3025. },
  3026. .auth_first = 0,
  3027. },
  3028. {
  3029. .type = CRYPTO_ALG_TYPE_AEAD,
  3030. .alg.aead = {
  3031. .base = {
  3032. .cra_name = "authenc(hmac(sha512),cbc(des))",
  3033. .cra_driver_name = "authenc-hmac-sha512-cbc-des-iproc",
  3034. .cra_blocksize = DES_BLOCK_SIZE,
  3035. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3036. },
  3037. .setkey = aead_authenc_setkey,
  3038. .ivsize = DES_BLOCK_SIZE,
  3039. .maxauthsize = SHA512_DIGEST_SIZE,
  3040. },
  3041. .cipher_info = {
  3042. .alg = CIPHER_ALG_DES,
  3043. .mode = CIPHER_MODE_CBC,
  3044. },
  3045. .auth_info = {
  3046. .alg = HASH_ALG_SHA512,
  3047. .mode = HASH_MODE_HMAC,
  3048. },
  3049. .auth_first = 0,
  3050. },
  3051. {
  3052. .type = CRYPTO_ALG_TYPE_AEAD,
  3053. .alg.aead = {
  3054. .base = {
  3055. .cra_name = "authenc(hmac(md5),cbc(des3_ede))",
  3056. .cra_driver_name = "authenc-hmac-md5-cbc-des3-iproc",
  3057. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3058. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3059. },
  3060. .setkey = aead_authenc_setkey,
  3061. .ivsize = DES3_EDE_BLOCK_SIZE,
  3062. .maxauthsize = MD5_DIGEST_SIZE,
  3063. },
  3064. .cipher_info = {
  3065. .alg = CIPHER_ALG_3DES,
  3066. .mode = CIPHER_MODE_CBC,
  3067. },
  3068. .auth_info = {
  3069. .alg = HASH_ALG_MD5,
  3070. .mode = HASH_MODE_HMAC,
  3071. },
  3072. .auth_first = 0,
  3073. },
  3074. {
  3075. .type = CRYPTO_ALG_TYPE_AEAD,
  3076. .alg.aead = {
  3077. .base = {
  3078. .cra_name = "authenc(hmac(sha1),cbc(des3_ede))",
  3079. .cra_driver_name = "authenc-hmac-sha1-cbc-des3-iproc",
  3080. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3081. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3082. },
  3083. .setkey = aead_authenc_setkey,
  3084. .ivsize = DES3_EDE_BLOCK_SIZE,
  3085. .maxauthsize = SHA1_DIGEST_SIZE,
  3086. },
  3087. .cipher_info = {
  3088. .alg = CIPHER_ALG_3DES,
  3089. .mode = CIPHER_MODE_CBC,
  3090. },
  3091. .auth_info = {
  3092. .alg = HASH_ALG_SHA1,
  3093. .mode = HASH_MODE_HMAC,
  3094. },
  3095. .auth_first = 0,
  3096. },
  3097. {
  3098. .type = CRYPTO_ALG_TYPE_AEAD,
  3099. .alg.aead = {
  3100. .base = {
  3101. .cra_name = "authenc(hmac(sha224),cbc(des3_ede))",
  3102. .cra_driver_name = "authenc-hmac-sha224-cbc-des3-iproc",
  3103. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3104. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3105. },
  3106. .setkey = aead_authenc_setkey,
  3107. .ivsize = DES3_EDE_BLOCK_SIZE,
  3108. .maxauthsize = SHA224_DIGEST_SIZE,
  3109. },
  3110. .cipher_info = {
  3111. .alg = CIPHER_ALG_3DES,
  3112. .mode = CIPHER_MODE_CBC,
  3113. },
  3114. .auth_info = {
  3115. .alg = HASH_ALG_SHA224,
  3116. .mode = HASH_MODE_HMAC,
  3117. },
  3118. .auth_first = 0,
  3119. },
  3120. {
  3121. .type = CRYPTO_ALG_TYPE_AEAD,
  3122. .alg.aead = {
  3123. .base = {
  3124. .cra_name = "authenc(hmac(sha256),cbc(des3_ede))",
  3125. .cra_driver_name = "authenc-hmac-sha256-cbc-des3-iproc",
  3126. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3127. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3128. },
  3129. .setkey = aead_authenc_setkey,
  3130. .ivsize = DES3_EDE_BLOCK_SIZE,
  3131. .maxauthsize = SHA256_DIGEST_SIZE,
  3132. },
  3133. .cipher_info = {
  3134. .alg = CIPHER_ALG_3DES,
  3135. .mode = CIPHER_MODE_CBC,
  3136. },
  3137. .auth_info = {
  3138. .alg = HASH_ALG_SHA256,
  3139. .mode = HASH_MODE_HMAC,
  3140. },
  3141. .auth_first = 0,
  3142. },
  3143. {
  3144. .type = CRYPTO_ALG_TYPE_AEAD,
  3145. .alg.aead = {
  3146. .base = {
  3147. .cra_name = "authenc(hmac(sha384),cbc(des3_ede))",
  3148. .cra_driver_name = "authenc-hmac-sha384-cbc-des3-iproc",
  3149. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3150. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3151. },
  3152. .setkey = aead_authenc_setkey,
  3153. .ivsize = DES3_EDE_BLOCK_SIZE,
  3154. .maxauthsize = SHA384_DIGEST_SIZE,
  3155. },
  3156. .cipher_info = {
  3157. .alg = CIPHER_ALG_3DES,
  3158. .mode = CIPHER_MODE_CBC,
  3159. },
  3160. .auth_info = {
  3161. .alg = HASH_ALG_SHA384,
  3162. .mode = HASH_MODE_HMAC,
  3163. },
  3164. .auth_first = 0,
  3165. },
  3166. {
  3167. .type = CRYPTO_ALG_TYPE_AEAD,
  3168. .alg.aead = {
  3169. .base = {
  3170. .cra_name = "authenc(hmac(sha512),cbc(des3_ede))",
  3171. .cra_driver_name = "authenc-hmac-sha512-cbc-des3-iproc",
  3172. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3173. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
  3174. },
  3175. .setkey = aead_authenc_setkey,
  3176. .ivsize = DES3_EDE_BLOCK_SIZE,
  3177. .maxauthsize = SHA512_DIGEST_SIZE,
  3178. },
  3179. .cipher_info = {
  3180. .alg = CIPHER_ALG_3DES,
  3181. .mode = CIPHER_MODE_CBC,
  3182. },
  3183. .auth_info = {
  3184. .alg = HASH_ALG_SHA512,
  3185. .mode = HASH_MODE_HMAC,
  3186. },
  3187. .auth_first = 0,
  3188. },
  3189. /* ABLKCIPHER algorithms. */
  3190. {
  3191. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3192. .alg.crypto = {
  3193. .cra_name = "ecb(arc4)",
  3194. .cra_driver_name = "ecb-arc4-iproc",
  3195. .cra_blocksize = ARC4_BLOCK_SIZE,
  3196. .cra_ablkcipher = {
  3197. .min_keysize = ARC4_MIN_KEY_SIZE,
  3198. .max_keysize = ARC4_MAX_KEY_SIZE,
  3199. .ivsize = 0,
  3200. }
  3201. },
  3202. .cipher_info = {
  3203. .alg = CIPHER_ALG_RC4,
  3204. .mode = CIPHER_MODE_NONE,
  3205. },
  3206. .auth_info = {
  3207. .alg = HASH_ALG_NONE,
  3208. .mode = HASH_MODE_NONE,
  3209. },
  3210. },
  3211. {
  3212. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3213. .alg.crypto = {
  3214. .cra_name = "ofb(des)",
  3215. .cra_driver_name = "ofb-des-iproc",
  3216. .cra_blocksize = DES_BLOCK_SIZE,
  3217. .cra_ablkcipher = {
  3218. .min_keysize = DES_KEY_SIZE,
  3219. .max_keysize = DES_KEY_SIZE,
  3220. .ivsize = DES_BLOCK_SIZE,
  3221. }
  3222. },
  3223. .cipher_info = {
  3224. .alg = CIPHER_ALG_DES,
  3225. .mode = CIPHER_MODE_OFB,
  3226. },
  3227. .auth_info = {
  3228. .alg = HASH_ALG_NONE,
  3229. .mode = HASH_MODE_NONE,
  3230. },
  3231. },
  3232. {
  3233. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3234. .alg.crypto = {
  3235. .cra_name = "cbc(des)",
  3236. .cra_driver_name = "cbc-des-iproc",
  3237. .cra_blocksize = DES_BLOCK_SIZE,
  3238. .cra_ablkcipher = {
  3239. .min_keysize = DES_KEY_SIZE,
  3240. .max_keysize = DES_KEY_SIZE,
  3241. .ivsize = DES_BLOCK_SIZE,
  3242. }
  3243. },
  3244. .cipher_info = {
  3245. .alg = CIPHER_ALG_DES,
  3246. .mode = CIPHER_MODE_CBC,
  3247. },
  3248. .auth_info = {
  3249. .alg = HASH_ALG_NONE,
  3250. .mode = HASH_MODE_NONE,
  3251. },
  3252. },
  3253. {
  3254. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3255. .alg.crypto = {
  3256. .cra_name = "ecb(des)",
  3257. .cra_driver_name = "ecb-des-iproc",
  3258. .cra_blocksize = DES_BLOCK_SIZE,
  3259. .cra_ablkcipher = {
  3260. .min_keysize = DES_KEY_SIZE,
  3261. .max_keysize = DES_KEY_SIZE,
  3262. .ivsize = 0,
  3263. }
  3264. },
  3265. .cipher_info = {
  3266. .alg = CIPHER_ALG_DES,
  3267. .mode = CIPHER_MODE_ECB,
  3268. },
  3269. .auth_info = {
  3270. .alg = HASH_ALG_NONE,
  3271. .mode = HASH_MODE_NONE,
  3272. },
  3273. },
  3274. {
  3275. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3276. .alg.crypto = {
  3277. .cra_name = "ofb(des3_ede)",
  3278. .cra_driver_name = "ofb-des3-iproc",
  3279. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3280. .cra_ablkcipher = {
  3281. .min_keysize = DES3_EDE_KEY_SIZE,
  3282. .max_keysize = DES3_EDE_KEY_SIZE,
  3283. .ivsize = DES3_EDE_BLOCK_SIZE,
  3284. }
  3285. },
  3286. .cipher_info = {
  3287. .alg = CIPHER_ALG_3DES,
  3288. .mode = CIPHER_MODE_OFB,
  3289. },
  3290. .auth_info = {
  3291. .alg = HASH_ALG_NONE,
  3292. .mode = HASH_MODE_NONE,
  3293. },
  3294. },
  3295. {
  3296. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3297. .alg.crypto = {
  3298. .cra_name = "cbc(des3_ede)",
  3299. .cra_driver_name = "cbc-des3-iproc",
  3300. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3301. .cra_ablkcipher = {
  3302. .min_keysize = DES3_EDE_KEY_SIZE,
  3303. .max_keysize = DES3_EDE_KEY_SIZE,
  3304. .ivsize = DES3_EDE_BLOCK_SIZE,
  3305. }
  3306. },
  3307. .cipher_info = {
  3308. .alg = CIPHER_ALG_3DES,
  3309. .mode = CIPHER_MODE_CBC,
  3310. },
  3311. .auth_info = {
  3312. .alg = HASH_ALG_NONE,
  3313. .mode = HASH_MODE_NONE,
  3314. },
  3315. },
  3316. {
  3317. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3318. .alg.crypto = {
  3319. .cra_name = "ecb(des3_ede)",
  3320. .cra_driver_name = "ecb-des3-iproc",
  3321. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3322. .cra_ablkcipher = {
  3323. .min_keysize = DES3_EDE_KEY_SIZE,
  3324. .max_keysize = DES3_EDE_KEY_SIZE,
  3325. .ivsize = 0,
  3326. }
  3327. },
  3328. .cipher_info = {
  3329. .alg = CIPHER_ALG_3DES,
  3330. .mode = CIPHER_MODE_ECB,
  3331. },
  3332. .auth_info = {
  3333. .alg = HASH_ALG_NONE,
  3334. .mode = HASH_MODE_NONE,
  3335. },
  3336. },
  3337. {
  3338. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3339. .alg.crypto = {
  3340. .cra_name = "ofb(aes)",
  3341. .cra_driver_name = "ofb-aes-iproc",
  3342. .cra_blocksize = AES_BLOCK_SIZE,
  3343. .cra_ablkcipher = {
  3344. .min_keysize = AES_MIN_KEY_SIZE,
  3345. .max_keysize = AES_MAX_KEY_SIZE,
  3346. .ivsize = AES_BLOCK_SIZE,
  3347. }
  3348. },
  3349. .cipher_info = {
  3350. .alg = CIPHER_ALG_AES,
  3351. .mode = CIPHER_MODE_OFB,
  3352. },
  3353. .auth_info = {
  3354. .alg = HASH_ALG_NONE,
  3355. .mode = HASH_MODE_NONE,
  3356. },
  3357. },
  3358. {
  3359. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3360. .alg.crypto = {
  3361. .cra_name = "cbc(aes)",
  3362. .cra_driver_name = "cbc-aes-iproc",
  3363. .cra_blocksize = AES_BLOCK_SIZE,
  3364. .cra_ablkcipher = {
  3365. .min_keysize = AES_MIN_KEY_SIZE,
  3366. .max_keysize = AES_MAX_KEY_SIZE,
  3367. .ivsize = AES_BLOCK_SIZE,
  3368. }
  3369. },
  3370. .cipher_info = {
  3371. .alg = CIPHER_ALG_AES,
  3372. .mode = CIPHER_MODE_CBC,
  3373. },
  3374. .auth_info = {
  3375. .alg = HASH_ALG_NONE,
  3376. .mode = HASH_MODE_NONE,
  3377. },
  3378. },
  3379. {
  3380. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3381. .alg.crypto = {
  3382. .cra_name = "ecb(aes)",
  3383. .cra_driver_name = "ecb-aes-iproc",
  3384. .cra_blocksize = AES_BLOCK_SIZE,
  3385. .cra_ablkcipher = {
  3386. .min_keysize = AES_MIN_KEY_SIZE,
  3387. .max_keysize = AES_MAX_KEY_SIZE,
  3388. .ivsize = 0,
  3389. }
  3390. },
  3391. .cipher_info = {
  3392. .alg = CIPHER_ALG_AES,
  3393. .mode = CIPHER_MODE_ECB,
  3394. },
  3395. .auth_info = {
  3396. .alg = HASH_ALG_NONE,
  3397. .mode = HASH_MODE_NONE,
  3398. },
  3399. },
  3400. {
  3401. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3402. .alg.crypto = {
  3403. .cra_name = "ctr(aes)",
  3404. .cra_driver_name = "ctr-aes-iproc",
  3405. .cra_blocksize = AES_BLOCK_SIZE,
  3406. .cra_ablkcipher = {
  3407. /* .geniv = "chainiv", */
  3408. .min_keysize = AES_MIN_KEY_SIZE,
  3409. .max_keysize = AES_MAX_KEY_SIZE,
  3410. .ivsize = AES_BLOCK_SIZE,
  3411. }
  3412. },
  3413. .cipher_info = {
  3414. .alg = CIPHER_ALG_AES,
  3415. .mode = CIPHER_MODE_CTR,
  3416. },
  3417. .auth_info = {
  3418. .alg = HASH_ALG_NONE,
  3419. .mode = HASH_MODE_NONE,
  3420. },
  3421. },
  3422. {
  3423. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  3424. .alg.crypto = {
  3425. .cra_name = "xts(aes)",
  3426. .cra_driver_name = "xts-aes-iproc",
  3427. .cra_blocksize = AES_BLOCK_SIZE,
  3428. .cra_ablkcipher = {
  3429. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  3430. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  3431. .ivsize = AES_BLOCK_SIZE,
  3432. }
  3433. },
  3434. .cipher_info = {
  3435. .alg = CIPHER_ALG_AES,
  3436. .mode = CIPHER_MODE_XTS,
  3437. },
  3438. .auth_info = {
  3439. .alg = HASH_ALG_NONE,
  3440. .mode = HASH_MODE_NONE,
  3441. },
  3442. },
  3443. /* AHASH algorithms. */
  3444. {
  3445. .type = CRYPTO_ALG_TYPE_AHASH,
  3446. .alg.hash = {
  3447. .halg.digestsize = MD5_DIGEST_SIZE,
  3448. .halg.base = {
  3449. .cra_name = "md5",
  3450. .cra_driver_name = "md5-iproc",
  3451. .cra_blocksize = MD5_BLOCK_WORDS * 4,
  3452. .cra_flags = CRYPTO_ALG_ASYNC,
  3453. }
  3454. },
  3455. .cipher_info = {
  3456. .alg = CIPHER_ALG_NONE,
  3457. .mode = CIPHER_MODE_NONE,
  3458. },
  3459. .auth_info = {
  3460. .alg = HASH_ALG_MD5,
  3461. .mode = HASH_MODE_HASH,
  3462. },
  3463. },
  3464. {
  3465. .type = CRYPTO_ALG_TYPE_AHASH,
  3466. .alg.hash = {
  3467. .halg.digestsize = MD5_DIGEST_SIZE,
  3468. .halg.base = {
  3469. .cra_name = "hmac(md5)",
  3470. .cra_driver_name = "hmac-md5-iproc",
  3471. .cra_blocksize = MD5_BLOCK_WORDS * 4,
  3472. }
  3473. },
  3474. .cipher_info = {
  3475. .alg = CIPHER_ALG_NONE,
  3476. .mode = CIPHER_MODE_NONE,
  3477. },
  3478. .auth_info = {
  3479. .alg = HASH_ALG_MD5,
  3480. .mode = HASH_MODE_HMAC,
  3481. },
  3482. },
  3483. {.type = CRYPTO_ALG_TYPE_AHASH,
  3484. .alg.hash = {
  3485. .halg.digestsize = SHA1_DIGEST_SIZE,
  3486. .halg.base = {
  3487. .cra_name = "sha1",
  3488. .cra_driver_name = "sha1-iproc",
  3489. .cra_blocksize = SHA1_BLOCK_SIZE,
  3490. }
  3491. },
  3492. .cipher_info = {
  3493. .alg = CIPHER_ALG_NONE,
  3494. .mode = CIPHER_MODE_NONE,
  3495. },
  3496. .auth_info = {
  3497. .alg = HASH_ALG_SHA1,
  3498. .mode = HASH_MODE_HASH,
  3499. },
  3500. },
  3501. {.type = CRYPTO_ALG_TYPE_AHASH,
  3502. .alg.hash = {
  3503. .halg.digestsize = SHA1_DIGEST_SIZE,
  3504. .halg.base = {
  3505. .cra_name = "hmac(sha1)",
  3506. .cra_driver_name = "hmac-sha1-iproc",
  3507. .cra_blocksize = SHA1_BLOCK_SIZE,
  3508. }
  3509. },
  3510. .cipher_info = {
  3511. .alg = CIPHER_ALG_NONE,
  3512. .mode = CIPHER_MODE_NONE,
  3513. },
  3514. .auth_info = {
  3515. .alg = HASH_ALG_SHA1,
  3516. .mode = HASH_MODE_HMAC,
  3517. },
  3518. },
  3519. {.type = CRYPTO_ALG_TYPE_AHASH,
  3520. .alg.hash = {
  3521. .halg.digestsize = SHA224_DIGEST_SIZE,
  3522. .halg.base = {
  3523. .cra_name = "sha224",
  3524. .cra_driver_name = "sha224-iproc",
  3525. .cra_blocksize = SHA224_BLOCK_SIZE,
  3526. }
  3527. },
  3528. .cipher_info = {
  3529. .alg = CIPHER_ALG_NONE,
  3530. .mode = CIPHER_MODE_NONE,
  3531. },
  3532. .auth_info = {
  3533. .alg = HASH_ALG_SHA224,
  3534. .mode = HASH_MODE_HASH,
  3535. },
  3536. },
  3537. {.type = CRYPTO_ALG_TYPE_AHASH,
  3538. .alg.hash = {
  3539. .halg.digestsize = SHA224_DIGEST_SIZE,
  3540. .halg.base = {
  3541. .cra_name = "hmac(sha224)",
  3542. .cra_driver_name = "hmac-sha224-iproc",
  3543. .cra_blocksize = SHA224_BLOCK_SIZE,
  3544. }
  3545. },
  3546. .cipher_info = {
  3547. .alg = CIPHER_ALG_NONE,
  3548. .mode = CIPHER_MODE_NONE,
  3549. },
  3550. .auth_info = {
  3551. .alg = HASH_ALG_SHA224,
  3552. .mode = HASH_MODE_HMAC,
  3553. },
  3554. },
  3555. {.type = CRYPTO_ALG_TYPE_AHASH,
  3556. .alg.hash = {
  3557. .halg.digestsize = SHA256_DIGEST_SIZE,
  3558. .halg.base = {
  3559. .cra_name = "sha256",
  3560. .cra_driver_name = "sha256-iproc",
  3561. .cra_blocksize = SHA256_BLOCK_SIZE,
  3562. }
  3563. },
  3564. .cipher_info = {
  3565. .alg = CIPHER_ALG_NONE,
  3566. .mode = CIPHER_MODE_NONE,
  3567. },
  3568. .auth_info = {
  3569. .alg = HASH_ALG_SHA256,
  3570. .mode = HASH_MODE_HASH,
  3571. },
  3572. },
  3573. {.type = CRYPTO_ALG_TYPE_AHASH,
  3574. .alg.hash = {
  3575. .halg.digestsize = SHA256_DIGEST_SIZE,
  3576. .halg.base = {
  3577. .cra_name = "hmac(sha256)",
  3578. .cra_driver_name = "hmac-sha256-iproc",
  3579. .cra_blocksize = SHA256_BLOCK_SIZE,
  3580. }
  3581. },
  3582. .cipher_info = {
  3583. .alg = CIPHER_ALG_NONE,
  3584. .mode = CIPHER_MODE_NONE,
  3585. },
  3586. .auth_info = {
  3587. .alg = HASH_ALG_SHA256,
  3588. .mode = HASH_MODE_HMAC,
  3589. },
  3590. },
  3591. {
  3592. .type = CRYPTO_ALG_TYPE_AHASH,
  3593. .alg.hash = {
  3594. .halg.digestsize = SHA384_DIGEST_SIZE,
  3595. .halg.base = {
  3596. .cra_name = "sha384",
  3597. .cra_driver_name = "sha384-iproc",
  3598. .cra_blocksize = SHA384_BLOCK_SIZE,
  3599. }
  3600. },
  3601. .cipher_info = {
  3602. .alg = CIPHER_ALG_NONE,
  3603. .mode = CIPHER_MODE_NONE,
  3604. },
  3605. .auth_info = {
  3606. .alg = HASH_ALG_SHA384,
  3607. .mode = HASH_MODE_HASH,
  3608. },
  3609. },
  3610. {
  3611. .type = CRYPTO_ALG_TYPE_AHASH,
  3612. .alg.hash = {
  3613. .halg.digestsize = SHA384_DIGEST_SIZE,
  3614. .halg.base = {
  3615. .cra_name = "hmac(sha384)",
  3616. .cra_driver_name = "hmac-sha384-iproc",
  3617. .cra_blocksize = SHA384_BLOCK_SIZE,
  3618. }
  3619. },
  3620. .cipher_info = {
  3621. .alg = CIPHER_ALG_NONE,
  3622. .mode = CIPHER_MODE_NONE,
  3623. },
  3624. .auth_info = {
  3625. .alg = HASH_ALG_SHA384,
  3626. .mode = HASH_MODE_HMAC,
  3627. },
  3628. },
  3629. {
  3630. .type = CRYPTO_ALG_TYPE_AHASH,
  3631. .alg.hash = {
  3632. .halg.digestsize = SHA512_DIGEST_SIZE,
  3633. .halg.base = {
  3634. .cra_name = "sha512",
  3635. .cra_driver_name = "sha512-iproc",
  3636. .cra_blocksize = SHA512_BLOCK_SIZE,
  3637. }
  3638. },
  3639. .cipher_info = {
  3640. .alg = CIPHER_ALG_NONE,
  3641. .mode = CIPHER_MODE_NONE,
  3642. },
  3643. .auth_info = {
  3644. .alg = HASH_ALG_SHA512,
  3645. .mode = HASH_MODE_HASH,
  3646. },
  3647. },
  3648. {
  3649. .type = CRYPTO_ALG_TYPE_AHASH,
  3650. .alg.hash = {
  3651. .halg.digestsize = SHA512_DIGEST_SIZE,
  3652. .halg.base = {
  3653. .cra_name = "hmac(sha512)",
  3654. .cra_driver_name = "hmac-sha512-iproc",
  3655. .cra_blocksize = SHA512_BLOCK_SIZE,
  3656. }
  3657. },
  3658. .cipher_info = {
  3659. .alg = CIPHER_ALG_NONE,
  3660. .mode = CIPHER_MODE_NONE,
  3661. },
  3662. .auth_info = {
  3663. .alg = HASH_ALG_SHA512,
  3664. .mode = HASH_MODE_HMAC,
  3665. },
  3666. },
  3667. {
  3668. .type = CRYPTO_ALG_TYPE_AHASH,
  3669. .alg.hash = {
  3670. .halg.digestsize = SHA3_224_DIGEST_SIZE,
  3671. .halg.base = {
  3672. .cra_name = "sha3-224",
  3673. .cra_driver_name = "sha3-224-iproc",
  3674. .cra_blocksize = SHA3_224_BLOCK_SIZE,
  3675. }
  3676. },
  3677. .cipher_info = {
  3678. .alg = CIPHER_ALG_NONE,
  3679. .mode = CIPHER_MODE_NONE,
  3680. },
  3681. .auth_info = {
  3682. .alg = HASH_ALG_SHA3_224,
  3683. .mode = HASH_MODE_HASH,
  3684. },
  3685. },
  3686. {
  3687. .type = CRYPTO_ALG_TYPE_AHASH,
  3688. .alg.hash = {
  3689. .halg.digestsize = SHA3_224_DIGEST_SIZE,
  3690. .halg.base = {
  3691. .cra_name = "hmac(sha3-224)",
  3692. .cra_driver_name = "hmac-sha3-224-iproc",
  3693. .cra_blocksize = SHA3_224_BLOCK_SIZE,
  3694. }
  3695. },
  3696. .cipher_info = {
  3697. .alg = CIPHER_ALG_NONE,
  3698. .mode = CIPHER_MODE_NONE,
  3699. },
  3700. .auth_info = {
  3701. .alg = HASH_ALG_SHA3_224,
  3702. .mode = HASH_MODE_HMAC
  3703. },
  3704. },
  3705. {
  3706. .type = CRYPTO_ALG_TYPE_AHASH,
  3707. .alg.hash = {
  3708. .halg.digestsize = SHA3_256_DIGEST_SIZE,
  3709. .halg.base = {
  3710. .cra_name = "sha3-256",
  3711. .cra_driver_name = "sha3-256-iproc",
  3712. .cra_blocksize = SHA3_256_BLOCK_SIZE,
  3713. }
  3714. },
  3715. .cipher_info = {
  3716. .alg = CIPHER_ALG_NONE,
  3717. .mode = CIPHER_MODE_NONE,
  3718. },
  3719. .auth_info = {
  3720. .alg = HASH_ALG_SHA3_256,
  3721. .mode = HASH_MODE_HASH,
  3722. },
  3723. },
  3724. {
  3725. .type = CRYPTO_ALG_TYPE_AHASH,
  3726. .alg.hash = {
  3727. .halg.digestsize = SHA3_256_DIGEST_SIZE,
  3728. .halg.base = {
  3729. .cra_name = "hmac(sha3-256)",
  3730. .cra_driver_name = "hmac-sha3-256-iproc",
  3731. .cra_blocksize = SHA3_256_BLOCK_SIZE,
  3732. }
  3733. },
  3734. .cipher_info = {
  3735. .alg = CIPHER_ALG_NONE,
  3736. .mode = CIPHER_MODE_NONE,
  3737. },
  3738. .auth_info = {
  3739. .alg = HASH_ALG_SHA3_256,
  3740. .mode = HASH_MODE_HMAC,
  3741. },
  3742. },
  3743. {
  3744. .type = CRYPTO_ALG_TYPE_AHASH,
  3745. .alg.hash = {
  3746. .halg.digestsize = SHA3_384_DIGEST_SIZE,
  3747. .halg.base = {
  3748. .cra_name = "sha3-384",
  3749. .cra_driver_name = "sha3-384-iproc",
  3750. .cra_blocksize = SHA3_224_BLOCK_SIZE,
  3751. }
  3752. },
  3753. .cipher_info = {
  3754. .alg = CIPHER_ALG_NONE,
  3755. .mode = CIPHER_MODE_NONE,
  3756. },
  3757. .auth_info = {
  3758. .alg = HASH_ALG_SHA3_384,
  3759. .mode = HASH_MODE_HASH,
  3760. },
  3761. },
  3762. {
  3763. .type = CRYPTO_ALG_TYPE_AHASH,
  3764. .alg.hash = {
  3765. .halg.digestsize = SHA3_384_DIGEST_SIZE,
  3766. .halg.base = {
  3767. .cra_name = "hmac(sha3-384)",
  3768. .cra_driver_name = "hmac-sha3-384-iproc",
  3769. .cra_blocksize = SHA3_384_BLOCK_SIZE,
  3770. }
  3771. },
  3772. .cipher_info = {
  3773. .alg = CIPHER_ALG_NONE,
  3774. .mode = CIPHER_MODE_NONE,
  3775. },
  3776. .auth_info = {
  3777. .alg = HASH_ALG_SHA3_384,
  3778. .mode = HASH_MODE_HMAC,
  3779. },
  3780. },
  3781. {
  3782. .type = CRYPTO_ALG_TYPE_AHASH,
  3783. .alg.hash = {
  3784. .halg.digestsize = SHA3_512_DIGEST_SIZE,
  3785. .halg.base = {
  3786. .cra_name = "sha3-512",
  3787. .cra_driver_name = "sha3-512-iproc",
  3788. .cra_blocksize = SHA3_512_BLOCK_SIZE,
  3789. }
  3790. },
  3791. .cipher_info = {
  3792. .alg = CIPHER_ALG_NONE,
  3793. .mode = CIPHER_MODE_NONE,
  3794. },
  3795. .auth_info = {
  3796. .alg = HASH_ALG_SHA3_512,
  3797. .mode = HASH_MODE_HASH,
  3798. },
  3799. },
  3800. {
  3801. .type = CRYPTO_ALG_TYPE_AHASH,
  3802. .alg.hash = {
  3803. .halg.digestsize = SHA3_512_DIGEST_SIZE,
  3804. .halg.base = {
  3805. .cra_name = "hmac(sha3-512)",
  3806. .cra_driver_name = "hmac-sha3-512-iproc",
  3807. .cra_blocksize = SHA3_512_BLOCK_SIZE,
  3808. }
  3809. },
  3810. .cipher_info = {
  3811. .alg = CIPHER_ALG_NONE,
  3812. .mode = CIPHER_MODE_NONE,
  3813. },
  3814. .auth_info = {
  3815. .alg = HASH_ALG_SHA3_512,
  3816. .mode = HASH_MODE_HMAC,
  3817. },
  3818. },
  3819. {
  3820. .type = CRYPTO_ALG_TYPE_AHASH,
  3821. .alg.hash = {
  3822. .halg.digestsize = AES_BLOCK_SIZE,
  3823. .halg.base = {
  3824. .cra_name = "xcbc(aes)",
  3825. .cra_driver_name = "xcbc-aes-iproc",
  3826. .cra_blocksize = AES_BLOCK_SIZE,
  3827. }
  3828. },
  3829. .cipher_info = {
  3830. .alg = CIPHER_ALG_NONE,
  3831. .mode = CIPHER_MODE_NONE,
  3832. },
  3833. .auth_info = {
  3834. .alg = HASH_ALG_AES,
  3835. .mode = HASH_MODE_XCBC,
  3836. },
  3837. },
  3838. {
  3839. .type = CRYPTO_ALG_TYPE_AHASH,
  3840. .alg.hash = {
  3841. .halg.digestsize = AES_BLOCK_SIZE,
  3842. .halg.base = {
  3843. .cra_name = "cmac(aes)",
  3844. .cra_driver_name = "cmac-aes-iproc",
  3845. .cra_blocksize = AES_BLOCK_SIZE,
  3846. }
  3847. },
  3848. .cipher_info = {
  3849. .alg = CIPHER_ALG_NONE,
  3850. .mode = CIPHER_MODE_NONE,
  3851. },
  3852. .auth_info = {
  3853. .alg = HASH_ALG_AES,
  3854. .mode = HASH_MODE_CMAC,
  3855. },
  3856. },
  3857. };
  3858. static int generic_cra_init(struct crypto_tfm *tfm,
  3859. struct iproc_alg_s *cipher_alg)
  3860. {
  3861. struct spu_hw *spu = &iproc_priv.spu;
  3862. struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
  3863. unsigned int blocksize = crypto_tfm_alg_blocksize(tfm);
  3864. flow_log("%s()\n", __func__);
  3865. ctx->alg = cipher_alg;
  3866. ctx->cipher = cipher_alg->cipher_info;
  3867. ctx->auth = cipher_alg->auth_info;
  3868. ctx->auth_first = cipher_alg->auth_first;
  3869. ctx->max_payload = spu->spu_ctx_max_payload(ctx->cipher.alg,
  3870. ctx->cipher.mode,
  3871. blocksize);
  3872. ctx->fallback_cipher = NULL;
  3873. ctx->enckeylen = 0;
  3874. ctx->authkeylen = 0;
  3875. atomic_inc(&iproc_priv.stream_count);
  3876. atomic_inc(&iproc_priv.session_count);
  3877. return 0;
  3878. }
  3879. static int ablkcipher_cra_init(struct crypto_tfm *tfm)
  3880. {
  3881. struct crypto_alg *alg = tfm->__crt_alg;
  3882. struct iproc_alg_s *cipher_alg;
  3883. flow_log("%s()\n", __func__);
  3884. tfm->crt_ablkcipher.reqsize = sizeof(struct iproc_reqctx_s);
  3885. cipher_alg = container_of(alg, struct iproc_alg_s, alg.crypto);
  3886. return generic_cra_init(tfm, cipher_alg);
  3887. }
  3888. static int ahash_cra_init(struct crypto_tfm *tfm)
  3889. {
  3890. int err;
  3891. struct crypto_alg *alg = tfm->__crt_alg;
  3892. struct iproc_alg_s *cipher_alg;
  3893. cipher_alg = container_of(__crypto_ahash_alg(alg), struct iproc_alg_s,
  3894. alg.hash);
  3895. err = generic_cra_init(tfm, cipher_alg);
  3896. flow_log("%s()\n", __func__);
  3897. /*
  3898. * export state size has to be < 512 bytes. So don't include msg bufs
  3899. * in state size.
  3900. */
  3901. crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
  3902. sizeof(struct iproc_reqctx_s));
  3903. return err;
  3904. }
  3905. static int aead_cra_init(struct crypto_aead *aead)
  3906. {
  3907. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  3908. struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
  3909. struct crypto_alg *alg = tfm->__crt_alg;
  3910. struct aead_alg *aalg = container_of(alg, struct aead_alg, base);
  3911. struct iproc_alg_s *cipher_alg = container_of(aalg, struct iproc_alg_s,
  3912. alg.aead);
  3913. int err = generic_cra_init(tfm, cipher_alg);
  3914. flow_log("%s()\n", __func__);
  3915. crypto_aead_set_reqsize(aead, sizeof(struct iproc_reqctx_s));
  3916. ctx->is_esp = false;
  3917. ctx->salt_len = 0;
  3918. ctx->salt_offset = 0;
  3919. /* random first IV */
  3920. get_random_bytes(ctx->iv, MAX_IV_SIZE);
  3921. flow_dump(" iv: ", ctx->iv, MAX_IV_SIZE);
  3922. if (!err) {
  3923. if (alg->cra_flags & CRYPTO_ALG_NEED_FALLBACK) {
  3924. flow_log("%s() creating fallback cipher\n", __func__);
  3925. ctx->fallback_cipher =
  3926. crypto_alloc_aead(alg->cra_name, 0,
  3927. CRYPTO_ALG_ASYNC |
  3928. CRYPTO_ALG_NEED_FALLBACK);
  3929. if (IS_ERR(ctx->fallback_cipher)) {
  3930. pr_err("%s() Error: failed to allocate fallback for %s\n",
  3931. __func__, alg->cra_name);
  3932. return PTR_ERR(ctx->fallback_cipher);
  3933. }
  3934. }
  3935. }
  3936. return err;
  3937. }
  3938. static void generic_cra_exit(struct crypto_tfm *tfm)
  3939. {
  3940. atomic_dec(&iproc_priv.session_count);
  3941. }
  3942. static void aead_cra_exit(struct crypto_aead *aead)
  3943. {
  3944. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  3945. struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
  3946. generic_cra_exit(tfm);
  3947. if (ctx->fallback_cipher) {
  3948. crypto_free_aead(ctx->fallback_cipher);
  3949. ctx->fallback_cipher = NULL;
  3950. }
  3951. }
  3952. /**
  3953. * spu_functions_register() - Specify hardware-specific SPU functions based on
  3954. * SPU type read from device tree.
  3955. * @dev: device structure
  3956. * @spu_type: SPU hardware generation
  3957. * @spu_subtype: SPU hardware version
  3958. */
  3959. static void spu_functions_register(struct device *dev,
  3960. enum spu_spu_type spu_type,
  3961. enum spu_spu_subtype spu_subtype)
  3962. {
  3963. struct spu_hw *spu = &iproc_priv.spu;
  3964. if (spu_type == SPU_TYPE_SPUM) {
  3965. dev_dbg(dev, "Registering SPUM functions");
  3966. spu->spu_dump_msg_hdr = spum_dump_msg_hdr;
  3967. spu->spu_payload_length = spum_payload_length;
  3968. spu->spu_response_hdr_len = spum_response_hdr_len;
  3969. spu->spu_hash_pad_len = spum_hash_pad_len;
  3970. spu->spu_gcm_ccm_pad_len = spum_gcm_ccm_pad_len;
  3971. spu->spu_assoc_resp_len = spum_assoc_resp_len;
  3972. spu->spu_aead_ivlen = spum_aead_ivlen;
  3973. spu->spu_hash_type = spum_hash_type;
  3974. spu->spu_digest_size = spum_digest_size;
  3975. spu->spu_create_request = spum_create_request;
  3976. spu->spu_cipher_req_init = spum_cipher_req_init;
  3977. spu->spu_cipher_req_finish = spum_cipher_req_finish;
  3978. spu->spu_request_pad = spum_request_pad;
  3979. spu->spu_tx_status_len = spum_tx_status_len;
  3980. spu->spu_rx_status_len = spum_rx_status_len;
  3981. spu->spu_status_process = spum_status_process;
  3982. spu->spu_xts_tweak_in_payload = spum_xts_tweak_in_payload;
  3983. spu->spu_ccm_update_iv = spum_ccm_update_iv;
  3984. spu->spu_wordalign_padlen = spum_wordalign_padlen;
  3985. if (spu_subtype == SPU_SUBTYPE_SPUM_NS2)
  3986. spu->spu_ctx_max_payload = spum_ns2_ctx_max_payload;
  3987. else
  3988. spu->spu_ctx_max_payload = spum_nsp_ctx_max_payload;
  3989. } else {
  3990. dev_dbg(dev, "Registering SPU2 functions");
  3991. spu->spu_dump_msg_hdr = spu2_dump_msg_hdr;
  3992. spu->spu_ctx_max_payload = spu2_ctx_max_payload;
  3993. spu->spu_payload_length = spu2_payload_length;
  3994. spu->spu_response_hdr_len = spu2_response_hdr_len;
  3995. spu->spu_hash_pad_len = spu2_hash_pad_len;
  3996. spu->spu_gcm_ccm_pad_len = spu2_gcm_ccm_pad_len;
  3997. spu->spu_assoc_resp_len = spu2_assoc_resp_len;
  3998. spu->spu_aead_ivlen = spu2_aead_ivlen;
  3999. spu->spu_hash_type = spu2_hash_type;
  4000. spu->spu_digest_size = spu2_digest_size;
  4001. spu->spu_create_request = spu2_create_request;
  4002. spu->spu_cipher_req_init = spu2_cipher_req_init;
  4003. spu->spu_cipher_req_finish = spu2_cipher_req_finish;
  4004. spu->spu_request_pad = spu2_request_pad;
  4005. spu->spu_tx_status_len = spu2_tx_status_len;
  4006. spu->spu_rx_status_len = spu2_rx_status_len;
  4007. spu->spu_status_process = spu2_status_process;
  4008. spu->spu_xts_tweak_in_payload = spu2_xts_tweak_in_payload;
  4009. spu->spu_ccm_update_iv = spu2_ccm_update_iv;
  4010. spu->spu_wordalign_padlen = spu2_wordalign_padlen;
  4011. }
  4012. }
  4013. /**
  4014. * spu_mb_init() - Initialize mailbox client. Request ownership of a mailbox
  4015. * channel for the SPU being probed.
  4016. * @dev: SPU driver device structure
  4017. *
  4018. * Return: 0 if successful
  4019. * < 0 otherwise
  4020. */
  4021. static int spu_mb_init(struct device *dev)
  4022. {
  4023. struct mbox_client *mcl = &iproc_priv.mcl;
  4024. int err, i;
  4025. iproc_priv.mbox = devm_kcalloc(dev, iproc_priv.spu.num_chan,
  4026. sizeof(struct mbox_chan *), GFP_KERNEL);
  4027. if (!iproc_priv.mbox)
  4028. return -ENOMEM;
  4029. mcl->dev = dev;
  4030. mcl->tx_block = false;
  4031. mcl->tx_tout = 0;
  4032. mcl->knows_txdone = true;
  4033. mcl->rx_callback = spu_rx_callback;
  4034. mcl->tx_done = NULL;
  4035. for (i = 0; i < iproc_priv.spu.num_chan; i++) {
  4036. iproc_priv.mbox[i] = mbox_request_channel(mcl, i);
  4037. if (IS_ERR(iproc_priv.mbox[i])) {
  4038. err = (int)PTR_ERR(iproc_priv.mbox[i]);
  4039. dev_err(dev,
  4040. "Mbox channel %d request failed with err %d",
  4041. i, err);
  4042. iproc_priv.mbox[i] = NULL;
  4043. goto free_channels;
  4044. }
  4045. }
  4046. return 0;
  4047. free_channels:
  4048. for (i = 0; i < iproc_priv.spu.num_chan; i++) {
  4049. if (iproc_priv.mbox[i])
  4050. mbox_free_channel(iproc_priv.mbox[i]);
  4051. }
  4052. return err;
  4053. }
  4054. static void spu_mb_release(struct platform_device *pdev)
  4055. {
  4056. int i;
  4057. for (i = 0; i < iproc_priv.spu.num_chan; i++)
  4058. mbox_free_channel(iproc_priv.mbox[i]);
  4059. }
  4060. static void spu_counters_init(void)
  4061. {
  4062. int i;
  4063. int j;
  4064. atomic_set(&iproc_priv.session_count, 0);
  4065. atomic_set(&iproc_priv.stream_count, 0);
  4066. atomic_set(&iproc_priv.next_chan, (int)iproc_priv.spu.num_chan);
  4067. atomic64_set(&iproc_priv.bytes_in, 0);
  4068. atomic64_set(&iproc_priv.bytes_out, 0);
  4069. for (i = 0; i < SPU_OP_NUM; i++) {
  4070. atomic_set(&iproc_priv.op_counts[i], 0);
  4071. atomic_set(&iproc_priv.setkey_cnt[i], 0);
  4072. }
  4073. for (i = 0; i < CIPHER_ALG_LAST; i++)
  4074. for (j = 0; j < CIPHER_MODE_LAST; j++)
  4075. atomic_set(&iproc_priv.cipher_cnt[i][j], 0);
  4076. for (i = 0; i < HASH_ALG_LAST; i++) {
  4077. atomic_set(&iproc_priv.hash_cnt[i], 0);
  4078. atomic_set(&iproc_priv.hmac_cnt[i], 0);
  4079. }
  4080. for (i = 0; i < AEAD_TYPE_LAST; i++)
  4081. atomic_set(&iproc_priv.aead_cnt[i], 0);
  4082. atomic_set(&iproc_priv.mb_no_spc, 0);
  4083. atomic_set(&iproc_priv.mb_send_fail, 0);
  4084. atomic_set(&iproc_priv.bad_icv, 0);
  4085. }
  4086. static int spu_register_ablkcipher(struct iproc_alg_s *driver_alg)
  4087. {
  4088. struct spu_hw *spu = &iproc_priv.spu;
  4089. struct crypto_alg *crypto = &driver_alg->alg.crypto;
  4090. int err;
  4091. /* SPU2 does not support RC4 */
  4092. if ((driver_alg->cipher_info.alg == CIPHER_ALG_RC4) &&
  4093. (spu->spu_type == SPU_TYPE_SPU2))
  4094. return 0;
  4095. crypto->cra_module = THIS_MODULE;
  4096. crypto->cra_priority = cipher_pri;
  4097. crypto->cra_alignmask = 0;
  4098. crypto->cra_ctxsize = sizeof(struct iproc_ctx_s);
  4099. INIT_LIST_HEAD(&crypto->cra_list);
  4100. crypto->cra_init = ablkcipher_cra_init;
  4101. crypto->cra_exit = generic_cra_exit;
  4102. crypto->cra_type = &crypto_ablkcipher_type;
  4103. crypto->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC |
  4104. CRYPTO_ALG_KERN_DRIVER_ONLY;
  4105. crypto->cra_ablkcipher.setkey = ablkcipher_setkey;
  4106. crypto->cra_ablkcipher.encrypt = ablkcipher_encrypt;
  4107. crypto->cra_ablkcipher.decrypt = ablkcipher_decrypt;
  4108. err = crypto_register_alg(crypto);
  4109. /* Mark alg as having been registered, if successful */
  4110. if (err == 0)
  4111. driver_alg->registered = true;
  4112. pr_debug(" registered ablkcipher %s\n", crypto->cra_driver_name);
  4113. return err;
  4114. }
  4115. static int spu_register_ahash(struct iproc_alg_s *driver_alg)
  4116. {
  4117. struct spu_hw *spu = &iproc_priv.spu;
  4118. struct ahash_alg *hash = &driver_alg->alg.hash;
  4119. int err;
  4120. /* AES-XCBC is the only AES hash type currently supported on SPU-M */
  4121. if ((driver_alg->auth_info.alg == HASH_ALG_AES) &&
  4122. (driver_alg->auth_info.mode != HASH_MODE_XCBC) &&
  4123. (spu->spu_type == SPU_TYPE_SPUM))
  4124. return 0;
  4125. /* SHA3 algorithm variants are not registered for SPU-M or SPU2. */
  4126. if ((driver_alg->auth_info.alg >= HASH_ALG_SHA3_224) &&
  4127. (spu->spu_subtype != SPU_SUBTYPE_SPU2_V2))
  4128. return 0;
  4129. hash->halg.base.cra_module = THIS_MODULE;
  4130. hash->halg.base.cra_priority = hash_pri;
  4131. hash->halg.base.cra_alignmask = 0;
  4132. hash->halg.base.cra_ctxsize = sizeof(struct iproc_ctx_s);
  4133. hash->halg.base.cra_init = ahash_cra_init;
  4134. hash->halg.base.cra_exit = generic_cra_exit;
  4135. hash->halg.base.cra_flags = CRYPTO_ALG_ASYNC;
  4136. hash->halg.statesize = sizeof(struct spu_hash_export_s);
  4137. if (driver_alg->auth_info.mode != HASH_MODE_HMAC) {
  4138. hash->init = ahash_init;
  4139. hash->update = ahash_update;
  4140. hash->final = ahash_final;
  4141. hash->finup = ahash_finup;
  4142. hash->digest = ahash_digest;
  4143. if ((driver_alg->auth_info.alg == HASH_ALG_AES) &&
  4144. ((driver_alg->auth_info.mode == HASH_MODE_XCBC) ||
  4145. (driver_alg->auth_info.mode == HASH_MODE_CMAC))) {
  4146. hash->setkey = ahash_setkey;
  4147. }
  4148. } else {
  4149. hash->setkey = ahash_hmac_setkey;
  4150. hash->init = ahash_hmac_init;
  4151. hash->update = ahash_hmac_update;
  4152. hash->final = ahash_hmac_final;
  4153. hash->finup = ahash_hmac_finup;
  4154. hash->digest = ahash_hmac_digest;
  4155. }
  4156. hash->export = ahash_export;
  4157. hash->import = ahash_import;
  4158. err = crypto_register_ahash(hash);
  4159. /* Mark alg as having been registered, if successful */
  4160. if (err == 0)
  4161. driver_alg->registered = true;
  4162. pr_debug(" registered ahash %s\n",
  4163. hash->halg.base.cra_driver_name);
  4164. return err;
  4165. }
  4166. static int spu_register_aead(struct iproc_alg_s *driver_alg)
  4167. {
  4168. struct aead_alg *aead = &driver_alg->alg.aead;
  4169. int err;
  4170. aead->base.cra_module = THIS_MODULE;
  4171. aead->base.cra_priority = aead_pri;
  4172. aead->base.cra_alignmask = 0;
  4173. aead->base.cra_ctxsize = sizeof(struct iproc_ctx_s);
  4174. INIT_LIST_HEAD(&aead->base.cra_list);
  4175. aead->base.cra_flags |= CRYPTO_ALG_ASYNC;
  4176. /* setkey set in alg initialization */
  4177. aead->setauthsize = aead_setauthsize;
  4178. aead->encrypt = aead_encrypt;
  4179. aead->decrypt = aead_decrypt;
  4180. aead->init = aead_cra_init;
  4181. aead->exit = aead_cra_exit;
  4182. err = crypto_register_aead(aead);
  4183. /* Mark alg as having been registered, if successful */
  4184. if (err == 0)
  4185. driver_alg->registered = true;
  4186. pr_debug(" registered aead %s\n", aead->base.cra_driver_name);
  4187. return err;
  4188. }
  4189. /* register crypto algorithms the device supports */
  4190. static int spu_algs_register(struct device *dev)
  4191. {
  4192. int i, j;
  4193. int err;
  4194. for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
  4195. switch (driver_algs[i].type) {
  4196. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  4197. err = spu_register_ablkcipher(&driver_algs[i]);
  4198. break;
  4199. case CRYPTO_ALG_TYPE_AHASH:
  4200. err = spu_register_ahash(&driver_algs[i]);
  4201. break;
  4202. case CRYPTO_ALG_TYPE_AEAD:
  4203. err = spu_register_aead(&driver_algs[i]);
  4204. break;
  4205. default:
  4206. dev_err(dev,
  4207. "iproc-crypto: unknown alg type: %d",
  4208. driver_algs[i].type);
  4209. err = -EINVAL;
  4210. }
  4211. if (err) {
  4212. dev_err(dev, "alg registration failed with error %d\n",
  4213. err);
  4214. goto err_algs;
  4215. }
  4216. }
  4217. return 0;
  4218. err_algs:
  4219. for (j = 0; j < i; j++) {
  4220. /* Skip any algorithm not registered */
  4221. if (!driver_algs[j].registered)
  4222. continue;
  4223. switch (driver_algs[j].type) {
  4224. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  4225. crypto_unregister_alg(&driver_algs[j].alg.crypto);
  4226. driver_algs[j].registered = false;
  4227. break;
  4228. case CRYPTO_ALG_TYPE_AHASH:
  4229. crypto_unregister_ahash(&driver_algs[j].alg.hash);
  4230. driver_algs[j].registered = false;
  4231. break;
  4232. case CRYPTO_ALG_TYPE_AEAD:
  4233. crypto_unregister_aead(&driver_algs[j].alg.aead);
  4234. driver_algs[j].registered = false;
  4235. break;
  4236. }
  4237. }
  4238. return err;
  4239. }
  4240. /* ==================== Kernel Platform API ==================== */
  4241. static struct spu_type_subtype spum_ns2_types = {
  4242. SPU_TYPE_SPUM, SPU_SUBTYPE_SPUM_NS2
  4243. };
  4244. static struct spu_type_subtype spum_nsp_types = {
  4245. SPU_TYPE_SPUM, SPU_SUBTYPE_SPUM_NSP
  4246. };
  4247. static struct spu_type_subtype spu2_types = {
  4248. SPU_TYPE_SPU2, SPU_SUBTYPE_SPU2_V1
  4249. };
  4250. static struct spu_type_subtype spu2_v2_types = {
  4251. SPU_TYPE_SPU2, SPU_SUBTYPE_SPU2_V2
  4252. };
  4253. static const struct of_device_id bcm_spu_dt_ids[] = {
  4254. {
  4255. .compatible = "brcm,spum-crypto",
  4256. .data = &spum_ns2_types,
  4257. },
  4258. {
  4259. .compatible = "brcm,spum-nsp-crypto",
  4260. .data = &spum_nsp_types,
  4261. },
  4262. {
  4263. .compatible = "brcm,spu2-crypto",
  4264. .data = &spu2_types,
  4265. },
  4266. {
  4267. .compatible = "brcm,spu2-v2-crypto",
  4268. .data = &spu2_v2_types,
  4269. },
  4270. { /* sentinel */ }
  4271. };
  4272. MODULE_DEVICE_TABLE(of, bcm_spu_dt_ids);
  4273. static int spu_dt_read(struct platform_device *pdev)
  4274. {
  4275. struct device *dev = &pdev->dev;
  4276. struct spu_hw *spu = &iproc_priv.spu;
  4277. struct resource *spu_ctrl_regs;
  4278. const struct spu_type_subtype *matched_spu_type;
  4279. struct device_node *dn = pdev->dev.of_node;
  4280. int err, i;
  4281. /* Count number of mailbox channels */
  4282. spu->num_chan = of_count_phandle_with_args(dn, "mboxes", "#mbox-cells");
  4283. matched_spu_type = of_device_get_match_data(dev);
  4284. if (!matched_spu_type) {
  4285. dev_err(&pdev->dev, "Failed to match device\n");
  4286. return -ENODEV;
  4287. }
  4288. spu->spu_type = matched_spu_type->type;
  4289. spu->spu_subtype = matched_spu_type->subtype;
  4290. i = 0;
  4291. for (i = 0; (i < MAX_SPUS) && ((spu_ctrl_regs =
  4292. platform_get_resource(pdev, IORESOURCE_MEM, i)) != NULL); i++) {
  4293. spu->reg_vbase[i] = devm_ioremap_resource(dev, spu_ctrl_regs);
  4294. if (IS_ERR(spu->reg_vbase[i])) {
  4295. err = PTR_ERR(spu->reg_vbase[i]);
  4296. dev_err(&pdev->dev, "Failed to map registers: %d\n",
  4297. err);
  4298. spu->reg_vbase[i] = NULL;
  4299. return err;
  4300. }
  4301. }
  4302. spu->num_spu = i;
  4303. dev_dbg(dev, "Device has %d SPUs", spu->num_spu);
  4304. return 0;
  4305. }
  4306. int bcm_spu_probe(struct platform_device *pdev)
  4307. {
  4308. struct device *dev = &pdev->dev;
  4309. struct spu_hw *spu = &iproc_priv.spu;
  4310. int err = 0;
  4311. iproc_priv.pdev = pdev;
  4312. platform_set_drvdata(iproc_priv.pdev,
  4313. &iproc_priv);
  4314. err = spu_dt_read(pdev);
  4315. if (err < 0)
  4316. goto failure;
  4317. err = spu_mb_init(&pdev->dev);
  4318. if (err < 0)
  4319. goto failure;
  4320. if (spu->spu_type == SPU_TYPE_SPUM)
  4321. iproc_priv.bcm_hdr_len = 8;
  4322. else if (spu->spu_type == SPU_TYPE_SPU2)
  4323. iproc_priv.bcm_hdr_len = 0;
  4324. spu_functions_register(&pdev->dev, spu->spu_type, spu->spu_subtype);
  4325. spu_counters_init();
  4326. spu_setup_debugfs();
  4327. err = spu_algs_register(dev);
  4328. if (err < 0)
  4329. goto fail_reg;
  4330. return 0;
  4331. fail_reg:
  4332. spu_free_debugfs();
  4333. failure:
  4334. spu_mb_release(pdev);
  4335. dev_err(dev, "%s failed with error %d.\n", __func__, err);
  4336. return err;
  4337. }
  4338. int bcm_spu_remove(struct platform_device *pdev)
  4339. {
  4340. int i;
  4341. struct device *dev = &pdev->dev;
  4342. char *cdn;
  4343. for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
  4344. /*
  4345. * Not all algorithms were registered, depending on whether
  4346. * hardware is SPU or SPU2. So here we make sure to skip
  4347. * those algorithms that were not previously registered.
  4348. */
  4349. if (!driver_algs[i].registered)
  4350. continue;
  4351. switch (driver_algs[i].type) {
  4352. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  4353. crypto_unregister_alg(&driver_algs[i].alg.crypto);
  4354. dev_dbg(dev, " unregistered cipher %s\n",
  4355. driver_algs[i].alg.crypto.cra_driver_name);
  4356. driver_algs[i].registered = false;
  4357. break;
  4358. case CRYPTO_ALG_TYPE_AHASH:
  4359. crypto_unregister_ahash(&driver_algs[i].alg.hash);
  4360. cdn = driver_algs[i].alg.hash.halg.base.cra_driver_name;
  4361. dev_dbg(dev, " unregistered hash %s\n", cdn);
  4362. driver_algs[i].registered = false;
  4363. break;
  4364. case CRYPTO_ALG_TYPE_AEAD:
  4365. crypto_unregister_aead(&driver_algs[i].alg.aead);
  4366. dev_dbg(dev, " unregistered aead %s\n",
  4367. driver_algs[i].alg.aead.base.cra_driver_name);
  4368. driver_algs[i].registered = false;
  4369. break;
  4370. }
  4371. }
  4372. spu_free_debugfs();
  4373. spu_mb_release(pdev);
  4374. return 0;
  4375. }
  4376. /* ===== Kernel Module API ===== */
  4377. static struct platform_driver bcm_spu_pdriver = {
  4378. .driver = {
  4379. .name = "brcm-spu-crypto",
  4380. .of_match_table = of_match_ptr(bcm_spu_dt_ids),
  4381. },
  4382. .probe = bcm_spu_probe,
  4383. .remove = bcm_spu_remove,
  4384. };
  4385. module_platform_driver(bcm_spu_pdriver);
  4386. MODULE_AUTHOR("Rob Rice <rob.rice@broadcom.com>");
  4387. MODULE_DESCRIPTION("Broadcom symmetric crypto offload driver");
  4388. MODULE_LICENSE("GPL v2");