tpm_i2c_nuvoton.c 19 KB

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  1. /******************************************************************************
  2. * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501/NPCT6XX,
  3. * based on the TCG TPM Interface Spec version 1.2.
  4. * Specifications at www.trustedcomputinggroup.org
  5. *
  6. * Copyright (C) 2011, Nuvoton Technology Corporation.
  7. * Dan Morav <dan.morav@nuvoton.com>
  8. * Copyright (C) 2013, Obsidian Research Corp.
  9. * Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
  10. *
  11. * This program is free software: you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation, either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program. If not, see http://www.gnu.org/licenses/>.
  23. *
  24. * Nuvoton contact information: APC.Support@nuvoton.com
  25. *****************************************************************************/
  26. #include <linux/init.h>
  27. #include <linux/module.h>
  28. #include <linux/moduleparam.h>
  29. #include <linux/slab.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/wait.h>
  32. #include <linux/i2c.h>
  33. #include <linux/of_device.h>
  34. #include "tpm.h"
  35. /* I2C interface offsets */
  36. #define TPM_STS 0x00
  37. #define TPM_BURST_COUNT 0x01
  38. #define TPM_DATA_FIFO_W 0x20
  39. #define TPM_DATA_FIFO_R 0x40
  40. #define TPM_VID_DID_RID 0x60
  41. #define TPM_I2C_RETRIES 5
  42. /*
  43. * I2C bus device maximum buffer size w/o counting I2C address or command
  44. * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data
  45. */
  46. #define TPM_I2C_MAX_BUF_SIZE 32
  47. #define TPM_I2C_RETRY_COUNT 32
  48. #define TPM_I2C_BUS_DELAY 1000 /* usec */
  49. #define TPM_I2C_RETRY_DELAY_SHORT (2 * 1000) /* usec */
  50. #define TPM_I2C_RETRY_DELAY_LONG (10 * 1000) /* usec */
  51. #define TPM_I2C_DELAY_RANGE 300 /* usec */
  52. #define OF_IS_TPM2 ((void *)1)
  53. #define I2C_IS_TPM2 1
  54. struct priv_data {
  55. int irq;
  56. unsigned int intrs;
  57. wait_queue_head_t read_queue;
  58. };
  59. static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size,
  60. u8 *data)
  61. {
  62. s32 status;
  63. status = i2c_smbus_read_i2c_block_data(client, offset, size, data);
  64. dev_dbg(&client->dev,
  65. "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
  66. offset, size, (int)size, data, status);
  67. return status;
  68. }
  69. static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size,
  70. u8 *data)
  71. {
  72. s32 status;
  73. status = i2c_smbus_write_i2c_block_data(client, offset, size, data);
  74. dev_dbg(&client->dev,
  75. "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
  76. offset, size, (int)size, data, status);
  77. return status;
  78. }
  79. #define TPM_STS_VALID 0x80
  80. #define TPM_STS_COMMAND_READY 0x40
  81. #define TPM_STS_GO 0x20
  82. #define TPM_STS_DATA_AVAIL 0x10
  83. #define TPM_STS_EXPECT 0x08
  84. #define TPM_STS_RESPONSE_RETRY 0x02
  85. #define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */
  86. #define TPM_I2C_SHORT_TIMEOUT 750 /* ms */
  87. #define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */
  88. /* read TPM_STS register */
  89. static u8 i2c_nuvoton_read_status(struct tpm_chip *chip)
  90. {
  91. struct i2c_client *client = to_i2c_client(chip->dev.parent);
  92. s32 status;
  93. u8 data;
  94. status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data);
  95. if (status <= 0) {
  96. dev_err(&chip->dev, "%s() error return %d\n", __func__,
  97. status);
  98. data = TPM_STS_ERR_VAL;
  99. }
  100. return data;
  101. }
  102. /* write byte to TPM_STS register */
  103. static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data)
  104. {
  105. s32 status;
  106. int i;
  107. /* this causes the current command to be aborted */
  108. for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) {
  109. status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data);
  110. if (status < 0)
  111. usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY
  112. + TPM_I2C_DELAY_RANGE);
  113. }
  114. return status;
  115. }
  116. /* write commandReady to TPM_STS register */
  117. static void i2c_nuvoton_ready(struct tpm_chip *chip)
  118. {
  119. struct i2c_client *client = to_i2c_client(chip->dev.parent);
  120. s32 status;
  121. /* this causes the current command to be aborted */
  122. status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY);
  123. if (status < 0)
  124. dev_err(&chip->dev,
  125. "%s() fail to write TPM_STS.commandReady\n", __func__);
  126. }
  127. /* read burstCount field from TPM_STS register
  128. * return -1 on fail to read */
  129. static int i2c_nuvoton_get_burstcount(struct i2c_client *client,
  130. struct tpm_chip *chip)
  131. {
  132. unsigned long stop = jiffies + chip->timeout_d;
  133. s32 status;
  134. int burst_count = -1;
  135. u8 data;
  136. /* wait for burstcount to be non-zero */
  137. do {
  138. /* in I2C burstCount is 1 byte */
  139. status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1,
  140. &data);
  141. if (status > 0 && data > 0) {
  142. burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data);
  143. break;
  144. }
  145. usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY
  146. + TPM_I2C_DELAY_RANGE);
  147. } while (time_before(jiffies, stop));
  148. return burst_count;
  149. }
  150. /*
  151. * WPCT301/NPCT501/NPCT6XX SINT# supports only dataAvail
  152. * any call to this function which is not waiting for dataAvail will
  153. * set queue to NULL to avoid waiting for interrupt
  154. */
  155. static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value)
  156. {
  157. u8 status = i2c_nuvoton_read_status(chip);
  158. return (status != TPM_STS_ERR_VAL) && ((status & mask) == value);
  159. }
  160. static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value,
  161. u32 timeout, wait_queue_head_t *queue)
  162. {
  163. if ((chip->flags & TPM_CHIP_FLAG_IRQ) && queue) {
  164. s32 rc;
  165. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  166. unsigned int cur_intrs = priv->intrs;
  167. enable_irq(priv->irq);
  168. rc = wait_event_interruptible_timeout(*queue,
  169. cur_intrs != priv->intrs,
  170. timeout);
  171. if (rc > 0)
  172. return 0;
  173. /* At this point we know that the SINT pin is asserted, so we
  174. * do not need to do i2c_nuvoton_check_status */
  175. } else {
  176. unsigned long ten_msec, stop;
  177. bool status_valid;
  178. /* check current status */
  179. status_valid = i2c_nuvoton_check_status(chip, mask, value);
  180. if (status_valid)
  181. return 0;
  182. /* use polling to wait for the event */
  183. ten_msec = jiffies + usecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG);
  184. stop = jiffies + timeout;
  185. do {
  186. if (time_before(jiffies, ten_msec))
  187. usleep_range(TPM_I2C_RETRY_DELAY_SHORT,
  188. TPM_I2C_RETRY_DELAY_SHORT
  189. + TPM_I2C_DELAY_RANGE);
  190. else
  191. usleep_range(TPM_I2C_RETRY_DELAY_LONG,
  192. TPM_I2C_RETRY_DELAY_LONG
  193. + TPM_I2C_DELAY_RANGE);
  194. status_valid = i2c_nuvoton_check_status(chip, mask,
  195. value);
  196. if (status_valid)
  197. return 0;
  198. } while (time_before(jiffies, stop));
  199. }
  200. dev_err(&chip->dev, "%s(%02x, %02x) -> timeout\n", __func__, mask,
  201. value);
  202. return -ETIMEDOUT;
  203. }
  204. /* wait for dataAvail field to be set in the TPM_STS register */
  205. static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout,
  206. wait_queue_head_t *queue)
  207. {
  208. return i2c_nuvoton_wait_for_stat(chip,
  209. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  210. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  211. timeout, queue);
  212. }
  213. /* Read @count bytes into @buf from TPM_RD_FIFO register */
  214. static int i2c_nuvoton_recv_data(struct i2c_client *client,
  215. struct tpm_chip *chip, u8 *buf, size_t count)
  216. {
  217. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  218. s32 rc;
  219. int burst_count, bytes2read, size = 0;
  220. while (size < count &&
  221. i2c_nuvoton_wait_for_data_avail(chip,
  222. chip->timeout_c,
  223. &priv->read_queue) == 0) {
  224. burst_count = i2c_nuvoton_get_burstcount(client, chip);
  225. if (burst_count < 0) {
  226. dev_err(&chip->dev,
  227. "%s() fail to read burstCount=%d\n", __func__,
  228. burst_count);
  229. return -EIO;
  230. }
  231. bytes2read = min_t(size_t, burst_count, count - size);
  232. rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R,
  233. bytes2read, &buf[size]);
  234. if (rc < 0) {
  235. dev_err(&chip->dev,
  236. "%s() fail on i2c_nuvoton_read_buf()=%d\n",
  237. __func__, rc);
  238. return -EIO;
  239. }
  240. dev_dbg(&chip->dev, "%s(%d):", __func__, bytes2read);
  241. size += bytes2read;
  242. }
  243. return size;
  244. }
  245. /* Read TPM command results */
  246. static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  247. {
  248. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  249. struct device *dev = chip->dev.parent;
  250. struct i2c_client *client = to_i2c_client(dev);
  251. s32 rc;
  252. int status;
  253. int burst_count;
  254. int retries;
  255. int size = 0;
  256. u32 expected;
  257. if (count < TPM_HEADER_SIZE) {
  258. i2c_nuvoton_ready(chip); /* return to idle */
  259. dev_err(dev, "%s() count < header size\n", __func__);
  260. return -EIO;
  261. }
  262. for (retries = 0; retries < TPM_I2C_RETRIES; retries++) {
  263. if (retries > 0) {
  264. /* if this is not the first trial, set responseRetry */
  265. i2c_nuvoton_write_status(client,
  266. TPM_STS_RESPONSE_RETRY);
  267. }
  268. /*
  269. * read first available (> 10 bytes), including:
  270. * tag, paramsize, and result
  271. */
  272. status = i2c_nuvoton_wait_for_data_avail(
  273. chip, chip->timeout_c, &priv->read_queue);
  274. if (status != 0) {
  275. dev_err(dev, "%s() timeout on dataAvail\n", __func__);
  276. size = -ETIMEDOUT;
  277. continue;
  278. }
  279. burst_count = i2c_nuvoton_get_burstcount(client, chip);
  280. if (burst_count < 0) {
  281. dev_err(dev, "%s() fail to get burstCount\n", __func__);
  282. size = -EIO;
  283. continue;
  284. }
  285. size = i2c_nuvoton_recv_data(client, chip, buf,
  286. burst_count);
  287. if (size < TPM_HEADER_SIZE) {
  288. dev_err(dev, "%s() fail to read header\n", __func__);
  289. size = -EIO;
  290. continue;
  291. }
  292. /*
  293. * convert number of expected bytes field from big endian 32 bit
  294. * to machine native
  295. */
  296. expected = be32_to_cpu(*(__be32 *) (buf + 2));
  297. if (expected > count || expected < size) {
  298. dev_err(dev, "%s() expected > count\n", __func__);
  299. size = -EIO;
  300. continue;
  301. }
  302. rc = i2c_nuvoton_recv_data(client, chip, &buf[size],
  303. expected - size);
  304. size += rc;
  305. if (rc < 0 || size < expected) {
  306. dev_err(dev, "%s() fail to read remainder of result\n",
  307. __func__);
  308. size = -EIO;
  309. continue;
  310. }
  311. if (i2c_nuvoton_wait_for_stat(
  312. chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL,
  313. TPM_STS_VALID, chip->timeout_c,
  314. NULL)) {
  315. dev_err(dev, "%s() error left over data\n", __func__);
  316. size = -ETIMEDOUT;
  317. continue;
  318. }
  319. break;
  320. }
  321. i2c_nuvoton_ready(chip);
  322. dev_dbg(&chip->dev, "%s() -> %d\n", __func__, size);
  323. return size;
  324. }
  325. /*
  326. * Send TPM command.
  327. *
  328. * If interrupts are used (signaled by an irq set in the vendor structure)
  329. * tpm.c can skip polling for the data to be available as the interrupt is
  330. * waited for here
  331. */
  332. static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t len)
  333. {
  334. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  335. struct device *dev = chip->dev.parent;
  336. struct i2c_client *client = to_i2c_client(dev);
  337. u32 ordinal;
  338. unsigned long duration;
  339. size_t count = 0;
  340. int burst_count, bytes2write, retries, rc = -EIO;
  341. for (retries = 0; retries < TPM_RETRY; retries++) {
  342. i2c_nuvoton_ready(chip);
  343. if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY,
  344. TPM_STS_COMMAND_READY,
  345. chip->timeout_b, NULL)) {
  346. dev_err(dev, "%s() timeout on commandReady\n",
  347. __func__);
  348. rc = -EIO;
  349. continue;
  350. }
  351. rc = 0;
  352. while (count < len - 1) {
  353. burst_count = i2c_nuvoton_get_burstcount(client,
  354. chip);
  355. if (burst_count < 0) {
  356. dev_err(dev, "%s() fail get burstCount\n",
  357. __func__);
  358. rc = -EIO;
  359. break;
  360. }
  361. bytes2write = min_t(size_t, burst_count,
  362. len - 1 - count);
  363. rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W,
  364. bytes2write, &buf[count]);
  365. if (rc < 0) {
  366. dev_err(dev, "%s() fail i2cWriteBuf\n",
  367. __func__);
  368. break;
  369. }
  370. dev_dbg(dev, "%s(%d):", __func__, bytes2write);
  371. count += bytes2write;
  372. rc = i2c_nuvoton_wait_for_stat(chip,
  373. TPM_STS_VALID |
  374. TPM_STS_EXPECT,
  375. TPM_STS_VALID |
  376. TPM_STS_EXPECT,
  377. chip->timeout_c,
  378. NULL);
  379. if (rc < 0) {
  380. dev_err(dev, "%s() timeout on Expect\n",
  381. __func__);
  382. rc = -ETIMEDOUT;
  383. break;
  384. }
  385. }
  386. if (rc < 0)
  387. continue;
  388. /* write last byte */
  389. rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1,
  390. &buf[count]);
  391. if (rc < 0) {
  392. dev_err(dev, "%s() fail to write last byte\n",
  393. __func__);
  394. rc = -EIO;
  395. continue;
  396. }
  397. dev_dbg(dev, "%s(last): %02x", __func__, buf[count]);
  398. rc = i2c_nuvoton_wait_for_stat(chip,
  399. TPM_STS_VALID | TPM_STS_EXPECT,
  400. TPM_STS_VALID,
  401. chip->timeout_c, NULL);
  402. if (rc) {
  403. dev_err(dev, "%s() timeout on Expect to clear\n",
  404. __func__);
  405. rc = -ETIMEDOUT;
  406. continue;
  407. }
  408. break;
  409. }
  410. if (rc < 0) {
  411. /* retries == TPM_RETRY */
  412. i2c_nuvoton_ready(chip);
  413. return rc;
  414. }
  415. /* execute the TPM command */
  416. rc = i2c_nuvoton_write_status(client, TPM_STS_GO);
  417. if (rc < 0) {
  418. dev_err(dev, "%s() fail to write Go\n", __func__);
  419. i2c_nuvoton_ready(chip);
  420. return rc;
  421. }
  422. ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
  423. if (chip->flags & TPM_CHIP_FLAG_TPM2)
  424. duration = tpm2_calc_ordinal_duration(chip, ordinal);
  425. else
  426. duration = tpm_calc_ordinal_duration(chip, ordinal);
  427. rc = i2c_nuvoton_wait_for_data_avail(chip, duration, &priv->read_queue);
  428. if (rc) {
  429. dev_err(dev, "%s() timeout command duration\n", __func__);
  430. i2c_nuvoton_ready(chip);
  431. return rc;
  432. }
  433. dev_dbg(dev, "%s() -> %zd\n", __func__, len);
  434. return 0;
  435. }
  436. static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status)
  437. {
  438. return (status == TPM_STS_COMMAND_READY);
  439. }
  440. static const struct tpm_class_ops tpm_i2c = {
  441. .flags = TPM_OPS_AUTO_STARTUP,
  442. .status = i2c_nuvoton_read_status,
  443. .recv = i2c_nuvoton_recv,
  444. .send = i2c_nuvoton_send,
  445. .cancel = i2c_nuvoton_ready,
  446. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  447. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  448. .req_canceled = i2c_nuvoton_req_canceled,
  449. };
  450. /* The only purpose for the handler is to signal to any waiting threads that
  451. * the interrupt is currently being asserted. The driver does not do any
  452. * processing triggered by interrupts, and the chip provides no way to mask at
  453. * the source (plus that would be slow over I2C). Run the IRQ as a one-shot,
  454. * this means it cannot be shared. */
  455. static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id)
  456. {
  457. struct tpm_chip *chip = dev_id;
  458. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  459. priv->intrs++;
  460. wake_up(&priv->read_queue);
  461. disable_irq_nosync(priv->irq);
  462. return IRQ_HANDLED;
  463. }
  464. static int get_vid(struct i2c_client *client, u32 *res)
  465. {
  466. static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe };
  467. u32 temp;
  468. s32 rc;
  469. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  470. return -ENODEV;
  471. rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp);
  472. if (rc < 0)
  473. return rc;
  474. /* check WPCT301 values - ignore RID */
  475. if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) {
  476. /*
  477. * f/w rev 2.81 has an issue where the VID_DID_RID is not
  478. * reporting the right value. so give it another chance at
  479. * offset 0x20 (FIFO_W).
  480. */
  481. rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4,
  482. (u8 *) (&temp));
  483. if (rc < 0)
  484. return rc;
  485. /* check WPCT301 values - ignore RID */
  486. if (memcmp(&temp, vid_did_rid_value,
  487. sizeof(vid_did_rid_value)))
  488. return -ENODEV;
  489. }
  490. *res = temp;
  491. return 0;
  492. }
  493. static int i2c_nuvoton_probe(struct i2c_client *client,
  494. const struct i2c_device_id *id)
  495. {
  496. int rc;
  497. struct tpm_chip *chip;
  498. struct device *dev = &client->dev;
  499. struct priv_data *priv;
  500. u32 vid = 0;
  501. rc = get_vid(client, &vid);
  502. if (rc)
  503. return rc;
  504. dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid,
  505. (u8) (vid >> 16), (u8) (vid >> 24));
  506. chip = tpmm_chip_alloc(dev, &tpm_i2c);
  507. if (IS_ERR(chip))
  508. return PTR_ERR(chip);
  509. priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
  510. if (!priv)
  511. return -ENOMEM;
  512. if (dev->of_node) {
  513. const struct of_device_id *of_id;
  514. of_id = of_match_device(dev->driver->of_match_table, dev);
  515. if (of_id && of_id->data == OF_IS_TPM2)
  516. chip->flags |= TPM_CHIP_FLAG_TPM2;
  517. } else
  518. if (id->driver_data == I2C_IS_TPM2)
  519. chip->flags |= TPM_CHIP_FLAG_TPM2;
  520. init_waitqueue_head(&priv->read_queue);
  521. /* Default timeouts */
  522. chip->timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  523. chip->timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT);
  524. chip->timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  525. chip->timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  526. dev_set_drvdata(&chip->dev, priv);
  527. /*
  528. * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to:
  529. * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT
  530. * The IRQ should be set in the i2c_board_info (which is done
  531. * automatically in of_i2c_register_devices, for device tree users */
  532. priv->irq = client->irq;
  533. if (client->irq) {
  534. dev_dbg(dev, "%s() priv->irq\n", __func__);
  535. rc = devm_request_irq(dev, client->irq,
  536. i2c_nuvoton_int_handler,
  537. IRQF_TRIGGER_LOW,
  538. dev_name(&chip->dev),
  539. chip);
  540. if (rc) {
  541. dev_err(dev, "%s() Unable to request irq: %d for use\n",
  542. __func__, priv->irq);
  543. priv->irq = 0;
  544. } else {
  545. chip->flags |= TPM_CHIP_FLAG_IRQ;
  546. /* Clear any pending interrupt */
  547. i2c_nuvoton_ready(chip);
  548. /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */
  549. rc = i2c_nuvoton_wait_for_stat(chip,
  550. TPM_STS_COMMAND_READY,
  551. TPM_STS_COMMAND_READY,
  552. chip->timeout_b,
  553. NULL);
  554. if (rc == 0) {
  555. /*
  556. * TIS is in ready state
  557. * write dummy byte to enter reception state
  558. * TPM_DATA_FIFO_W <- rc (0)
  559. */
  560. rc = i2c_nuvoton_write_buf(client,
  561. TPM_DATA_FIFO_W,
  562. 1, (u8 *) (&rc));
  563. if (rc < 0)
  564. return rc;
  565. /* TPM_STS <- 0x40 (commandReady) */
  566. i2c_nuvoton_ready(chip);
  567. } else {
  568. /*
  569. * timeout_b reached - command was
  570. * aborted. TIS should now be in idle state -
  571. * only TPM_STS_VALID should be set
  572. */
  573. if (i2c_nuvoton_read_status(chip) !=
  574. TPM_STS_VALID)
  575. return -EIO;
  576. }
  577. }
  578. }
  579. return tpm_chip_register(chip);
  580. }
  581. static int i2c_nuvoton_remove(struct i2c_client *client)
  582. {
  583. struct tpm_chip *chip = i2c_get_clientdata(client);
  584. tpm_chip_unregister(chip);
  585. return 0;
  586. }
  587. static const struct i2c_device_id i2c_nuvoton_id[] = {
  588. {"tpm_i2c_nuvoton"},
  589. {"tpm2_i2c_nuvoton", .driver_data = I2C_IS_TPM2},
  590. {}
  591. };
  592. MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id);
  593. #ifdef CONFIG_OF
  594. static const struct of_device_id i2c_nuvoton_of_match[] = {
  595. {.compatible = "nuvoton,npct501"},
  596. {.compatible = "winbond,wpct301"},
  597. {.compatible = "nuvoton,npct601", .data = OF_IS_TPM2},
  598. {},
  599. };
  600. MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match);
  601. #endif
  602. static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume);
  603. static struct i2c_driver i2c_nuvoton_driver = {
  604. .id_table = i2c_nuvoton_id,
  605. .probe = i2c_nuvoton_probe,
  606. .remove = i2c_nuvoton_remove,
  607. .driver = {
  608. .name = "tpm_i2c_nuvoton",
  609. .pm = &i2c_nuvoton_pm_ops,
  610. .of_match_table = of_match_ptr(i2c_nuvoton_of_match),
  611. },
  612. };
  613. module_i2c_driver(i2c_nuvoton_driver);
  614. MODULE_AUTHOR("Dan Morav (dan.morav@nuvoton.com)");
  615. MODULE_DESCRIPTION("Nuvoton TPM I2C Driver");
  616. MODULE_LICENSE("GPL");