omap_l3_smx.c 7.7 KB

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  1. /*
  2. * OMAP3XXX L3 Interconnect Driver
  3. *
  4. * Copyright (C) 2011 Texas Corporation
  5. * Felipe Balbi <balbi@ti.com>
  6. * Santosh Shilimkar <santosh.shilimkar@ti.com>
  7. * Sricharan <r.sricharan@ti.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
  22. * USA
  23. */
  24. #include <linux/kernel.h>
  25. #include <linux/slab.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/io.h>
  29. #include <linux/module.h>
  30. #include <linux/of.h>
  31. #include <linux/of_device.h>
  32. #include "omap_l3_smx.h"
  33. static inline u64 omap3_l3_readll(void __iomem *base, u16 reg)
  34. {
  35. return __raw_readll(base + reg);
  36. }
  37. static inline void omap3_l3_writell(void __iomem *base, u16 reg, u64 value)
  38. {
  39. __raw_writell(value, base + reg);
  40. }
  41. static inline enum omap3_l3_code omap3_l3_decode_error_code(u64 error)
  42. {
  43. return (error & 0x0f000000) >> L3_ERROR_LOG_CODE;
  44. }
  45. static inline u32 omap3_l3_decode_addr(u64 error_addr)
  46. {
  47. return error_addr & 0xffffffff;
  48. }
  49. static inline unsigned omap3_l3_decode_cmd(u64 error)
  50. {
  51. return (error & 0x07) >> L3_ERROR_LOG_CMD;
  52. }
  53. static inline enum omap3_l3_initiator_id omap3_l3_decode_initid(u64 error)
  54. {
  55. return (error & 0xff00) >> L3_ERROR_LOG_INITID;
  56. }
  57. static inline unsigned omap3_l3_decode_req_info(u64 error)
  58. {
  59. return (error >> 32) & 0xffff;
  60. }
  61. static char *omap3_l3_code_string(u8 code)
  62. {
  63. switch (code) {
  64. case OMAP_L3_CODE_NOERROR:
  65. return "No Error";
  66. case OMAP_L3_CODE_UNSUP_CMD:
  67. return "Unsupported Command";
  68. case OMAP_L3_CODE_ADDR_HOLE:
  69. return "Address Hole";
  70. case OMAP_L3_CODE_PROTECT_VIOLATION:
  71. return "Protection Violation";
  72. case OMAP_L3_CODE_IN_BAND_ERR:
  73. return "In-band Error";
  74. case OMAP_L3_CODE_REQ_TOUT_NOT_ACCEPT:
  75. return "Request Timeout Not Accepted";
  76. case OMAP_L3_CODE_REQ_TOUT_NO_RESP:
  77. return "Request Timeout, no response";
  78. default:
  79. return "UNKNOWN error";
  80. }
  81. }
  82. static char *omap3_l3_initiator_string(u8 initid)
  83. {
  84. switch (initid) {
  85. case OMAP_L3_LCD:
  86. return "LCD";
  87. case OMAP_L3_SAD2D:
  88. return "SAD2D";
  89. case OMAP_L3_IA_MPU_SS_1:
  90. case OMAP_L3_IA_MPU_SS_2:
  91. case OMAP_L3_IA_MPU_SS_3:
  92. case OMAP_L3_IA_MPU_SS_4:
  93. case OMAP_L3_IA_MPU_SS_5:
  94. return "MPU";
  95. case OMAP_L3_IA_IVA_SS_1:
  96. case OMAP_L3_IA_IVA_SS_2:
  97. case OMAP_L3_IA_IVA_SS_3:
  98. return "IVA_SS";
  99. case OMAP_L3_IA_IVA_SS_DMA_1:
  100. case OMAP_L3_IA_IVA_SS_DMA_2:
  101. case OMAP_L3_IA_IVA_SS_DMA_3:
  102. case OMAP_L3_IA_IVA_SS_DMA_4:
  103. case OMAP_L3_IA_IVA_SS_DMA_5:
  104. case OMAP_L3_IA_IVA_SS_DMA_6:
  105. return "IVA_SS_DMA";
  106. case OMAP_L3_IA_SGX:
  107. return "SGX";
  108. case OMAP_L3_IA_CAM_1:
  109. case OMAP_L3_IA_CAM_2:
  110. case OMAP_L3_IA_CAM_3:
  111. return "CAM";
  112. case OMAP_L3_IA_DAP:
  113. return "DAP";
  114. case OMAP_L3_SDMA_WR_1:
  115. case OMAP_L3_SDMA_WR_2:
  116. return "SDMA_WR";
  117. case OMAP_L3_SDMA_RD_1:
  118. case OMAP_L3_SDMA_RD_2:
  119. case OMAP_L3_SDMA_RD_3:
  120. case OMAP_L3_SDMA_RD_4:
  121. return "SDMA_RD";
  122. case OMAP_L3_USBOTG:
  123. return "USB_OTG";
  124. case OMAP_L3_USBHOST:
  125. return "USB_HOST";
  126. default:
  127. return "UNKNOWN Initiator";
  128. }
  129. }
  130. /*
  131. * omap3_l3_block_irq - handles a register block's irq
  132. * @l3: struct omap3_l3 *
  133. * @base: register block base address
  134. * @error: L3_ERROR_LOG register of our block
  135. *
  136. * Called in hard-irq context. Caller should take care of locking
  137. *
  138. * OMAP36xx TRM gives, on page 2001, Figure 9-10, the Typical Error
  139. * Analysis Sequence, we are following that sequence here, please
  140. * refer to that Figure for more information on the subject.
  141. */
  142. static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3,
  143. u64 error, int error_addr)
  144. {
  145. u8 code = omap3_l3_decode_error_code(error);
  146. u8 initid = omap3_l3_decode_initid(error);
  147. u8 multi = error & L3_ERROR_LOG_MULTI;
  148. u32 address = omap3_l3_decode_addr(error_addr);
  149. pr_err("%s seen by %s %s at address %x\n",
  150. omap3_l3_code_string(code),
  151. omap3_l3_initiator_string(initid),
  152. multi ? "Multiple Errors" : "", address);
  153. WARN_ON(1);
  154. return IRQ_HANDLED;
  155. }
  156. static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
  157. {
  158. struct omap3_l3 *l3 = _l3;
  159. u64 status, clear;
  160. u64 error;
  161. u64 error_addr;
  162. u64 err_source = 0;
  163. void __iomem *base;
  164. int int_type;
  165. irqreturn_t ret = IRQ_NONE;
  166. int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
  167. if (!int_type) {
  168. status = omap3_l3_readll(l3->rt, L3_SI_FLAG_STATUS_0);
  169. /*
  170. * if we have a timeout error, there's nothing we can
  171. * do besides rebooting the board. So let's BUG on any
  172. * of such errors and handle the others. timeout error
  173. * is severe and not expected to occur.
  174. */
  175. BUG_ON(status & L3_STATUS_0_TIMEOUT_MASK);
  176. } else {
  177. status = omap3_l3_readll(l3->rt, L3_SI_FLAG_STATUS_1);
  178. /* No timeout error for debug sources */
  179. }
  180. /* identify the error source */
  181. err_source = __ffs(status);
  182. base = l3->rt + omap3_l3_bases[int_type][err_source];
  183. error = omap3_l3_readll(base, L3_ERROR_LOG);
  184. if (error) {
  185. error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR);
  186. ret |= omap3_l3_block_irq(l3, error, error_addr);
  187. }
  188. /* Clear the status register */
  189. clear = (L3_AGENT_STATUS_CLEAR_IA << int_type) |
  190. L3_AGENT_STATUS_CLEAR_TA;
  191. omap3_l3_writell(base, L3_AGENT_STATUS, clear);
  192. /* clear the error log register */
  193. omap3_l3_writell(base, L3_ERROR_LOG, error);
  194. return ret;
  195. }
  196. #if IS_BUILTIN(CONFIG_OF)
  197. static const struct of_device_id omap3_l3_match[] = {
  198. {
  199. .compatible = "ti,omap3-l3-smx",
  200. },
  201. { },
  202. };
  203. MODULE_DEVICE_TABLE(of, omap3_l3_match);
  204. #endif
  205. static int omap3_l3_probe(struct platform_device *pdev)
  206. {
  207. struct omap3_l3 *l3;
  208. struct resource *res;
  209. int ret;
  210. l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
  211. if (!l3)
  212. return -ENOMEM;
  213. platform_set_drvdata(pdev, l3);
  214. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  215. if (!res) {
  216. dev_err(&pdev->dev, "couldn't find resource\n");
  217. ret = -ENODEV;
  218. goto err0;
  219. }
  220. l3->rt = ioremap(res->start, resource_size(res));
  221. if (!l3->rt) {
  222. dev_err(&pdev->dev, "ioremap failed\n");
  223. ret = -ENOMEM;
  224. goto err0;
  225. }
  226. l3->debug_irq = platform_get_irq(pdev, 0);
  227. ret = request_irq(l3->debug_irq, omap3_l3_app_irq, IRQF_TRIGGER_RISING,
  228. "l3-debug-irq", l3);
  229. if (ret) {
  230. dev_err(&pdev->dev, "couldn't request debug irq\n");
  231. goto err1;
  232. }
  233. l3->app_irq = platform_get_irq(pdev, 1);
  234. ret = request_irq(l3->app_irq, omap3_l3_app_irq, IRQF_TRIGGER_RISING,
  235. "l3-app-irq", l3);
  236. if (ret) {
  237. dev_err(&pdev->dev, "couldn't request app irq\n");
  238. goto err2;
  239. }
  240. return 0;
  241. err2:
  242. free_irq(l3->debug_irq, l3);
  243. err1:
  244. iounmap(l3->rt);
  245. err0:
  246. kfree(l3);
  247. return ret;
  248. }
  249. static int omap3_l3_remove(struct platform_device *pdev)
  250. {
  251. struct omap3_l3 *l3 = platform_get_drvdata(pdev);
  252. free_irq(l3->app_irq, l3);
  253. free_irq(l3->debug_irq, l3);
  254. iounmap(l3->rt);
  255. kfree(l3);
  256. return 0;
  257. }
  258. static struct platform_driver omap3_l3_driver = {
  259. .probe = omap3_l3_probe,
  260. .remove = omap3_l3_remove,
  261. .driver = {
  262. .name = "omap_l3_smx",
  263. .of_match_table = of_match_ptr(omap3_l3_match),
  264. },
  265. };
  266. static int __init omap3_l3_init(void)
  267. {
  268. return platform_driver_register(&omap3_l3_driver);
  269. }
  270. postcore_initcall_sync(omap3_l3_init);
  271. static void __exit omap3_l3_exit(void)
  272. {
  273. platform_driver_unregister(&omap3_l3_driver);
  274. }
  275. module_exit(omap3_l3_exit);
  276. MODULE_AUTHOR("Felipe Balbi");
  277. MODULE_AUTHOR("Santosh Shilimkar");
  278. MODULE_AUTHOR("Sricharan R");
  279. MODULE_DESCRIPTION("OMAP3XXX L3 Interconnect Driver");
  280. MODULE_LICENSE("GPL");