pgtable.h 4.0 KB

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  1. /*
  2. * This file contains the functions and defines necessary to modify and
  3. * use the SuperH page table tree.
  4. *
  5. * Copyright (C) 1999 Niibe Yutaka
  6. * Copyright (C) 2002 - 2007 Paul Mundt
  7. *
  8. * This file is subject to the terms and conditions of the GNU General
  9. * Public License. See the file "COPYING" in the main directory of this
  10. * archive for more details.
  11. */
  12. #ifndef __ASM_SH_PGTABLE_H
  13. #define __ASM_SH_PGTABLE_H
  14. #ifdef CONFIG_X2TLB
  15. #include <asm/pgtable-3level.h>
  16. #else
  17. #include <asm/pgtable-2level.h>
  18. #endif
  19. #include <asm/page.h>
  20. #include <asm/mmu.h>
  21. #ifndef __ASSEMBLY__
  22. #include <asm/addrspace.h>
  23. #include <asm/fixmap.h>
  24. /*
  25. * ZERO_PAGE is a global shared page that is always zero: used
  26. * for zero-mapped memory areas etc..
  27. */
  28. extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
  29. #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
  30. #endif /* !__ASSEMBLY__ */
  31. /*
  32. * Effective and physical address definitions, to aid with sign
  33. * extension.
  34. */
  35. #define NEFF 32
  36. #define NEFF_SIGN (1LL << (NEFF - 1))
  37. #define NEFF_MASK (-1LL << NEFF)
  38. static inline unsigned long long neff_sign_extend(unsigned long val)
  39. {
  40. unsigned long long extended = val;
  41. return (extended & NEFF_SIGN) ? (extended | NEFF_MASK) : extended;
  42. }
  43. #ifdef CONFIG_29BIT
  44. #define NPHYS 29
  45. #else
  46. #define NPHYS 32
  47. #endif
  48. #define NPHYS_SIGN (1LL << (NPHYS - 1))
  49. #define NPHYS_MASK (-1LL << NPHYS)
  50. #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
  51. #define PGDIR_MASK (~(PGDIR_SIZE-1))
  52. /* Entries per level */
  53. #define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE))
  54. #define FIRST_USER_ADDRESS 0UL
  55. #define PHYS_ADDR_MASK29 0x1fffffff
  56. #define PHYS_ADDR_MASK32 0xffffffff
  57. static inline unsigned long phys_addr_mask(void)
  58. {
  59. /* Is the MMU in 29bit mode? */
  60. if (__in_29bit_mode())
  61. return PHYS_ADDR_MASK29;
  62. return PHYS_ADDR_MASK32;
  63. }
  64. #define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK)
  65. #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT)
  66. #ifdef CONFIG_SUPERH32
  67. #define VMALLOC_START (P3SEG)
  68. #else
  69. #define VMALLOC_START (0xf0000000)
  70. #endif
  71. #define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
  72. #if defined(CONFIG_SUPERH32)
  73. #include <asm/pgtable_32.h>
  74. #else
  75. #include <asm/pgtable_64.h>
  76. #endif
  77. /*
  78. * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page
  79. * protection for execute, and considers it the same as a read. Also, write
  80. * permission implies read permission. This is the closest we can get..
  81. *
  82. * SH-X2 (SH7785) and later parts take this to the opposite end of the extreme,
  83. * not only supporting separate execute, read, and write bits, but having
  84. * completely separate permission bits for user and kernel space.
  85. */
  86. /*xwr*/
  87. #define __P000 PAGE_NONE
  88. #define __P001 PAGE_READONLY
  89. #define __P010 PAGE_COPY
  90. #define __P011 PAGE_COPY
  91. #define __P100 PAGE_EXECREAD
  92. #define __P101 PAGE_EXECREAD
  93. #define __P110 PAGE_COPY
  94. #define __P111 PAGE_COPY
  95. #define __S000 PAGE_NONE
  96. #define __S001 PAGE_READONLY
  97. #define __S010 PAGE_WRITEONLY
  98. #define __S011 PAGE_SHARED
  99. #define __S100 PAGE_EXECREAD
  100. #define __S101 PAGE_EXECREAD
  101. #define __S110 PAGE_RWX
  102. #define __S111 PAGE_RWX
  103. typedef pte_t *pte_addr_t;
  104. #define kern_addr_valid(addr) (1)
  105. #define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
  106. /*
  107. * Initialise the page table caches
  108. */
  109. extern void pgtable_cache_init(void);
  110. struct vm_area_struct;
  111. struct mm_struct;
  112. extern void __update_cache(struct vm_area_struct *vma,
  113. unsigned long address, pte_t pte);
  114. extern void __update_tlb(struct vm_area_struct *vma,
  115. unsigned long address, pte_t pte);
  116. static inline void
  117. update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
  118. {
  119. pte_t pte = *ptep;
  120. __update_cache(vma, address, pte);
  121. __update_tlb(vma, address, pte);
  122. }
  123. extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
  124. extern void paging_init(void);
  125. extern void page_table_range_init(unsigned long start, unsigned long end,
  126. pgd_t *pgd);
  127. /* arch/sh/mm/mmap.c */
  128. #define HAVE_ARCH_UNMAPPED_AREA
  129. #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
  130. #include <asm-generic/pgtable.h>
  131. #endif /* __ASM_SH_PGTABLE_H */