addrspace.h 2.0 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970
  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1999 by Kaz Kojima
  7. *
  8. * Defitions for the address spaces of the SH CPUs.
  9. */
  10. #ifndef __ASM_SH_ADDRSPACE_H
  11. #define __ASM_SH_ADDRSPACE_H
  12. #ifdef __KERNEL__
  13. #include <cpu/addrspace.h>
  14. /* If this CPU supports segmentation, hook up the helpers */
  15. #ifdef P1SEG
  16. /*
  17. [ P0/U0 (virtual) ] 0x00000000 <------ User space
  18. [ P1 (fixed) cached ] 0x80000000 <------ Kernel space
  19. [ P2 (fixed) non-cachable] 0xA0000000 <------ Physical access
  20. [ P3 (virtual) cached] 0xC0000000 <------ vmalloced area
  21. [ P4 control ] 0xE0000000
  22. */
  23. /* Returns the privileged segment base of a given address */
  24. #define PXSEG(a) (((unsigned long)(a)) & 0xe0000000)
  25. #ifdef CONFIG_29BIT
  26. /*
  27. * Map an address to a certain privileged segment
  28. */
  29. #define P1SEGADDR(a) \
  30. ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG))
  31. #define P2SEGADDR(a) \
  32. ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG))
  33. #define P3SEGADDR(a) \
  34. ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
  35. #define P4SEGADDR(a) \
  36. ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
  37. #else
  38. /*
  39. * These will never work in 32-bit, don't even bother.
  40. */
  41. #define P1SEGADDR(a) ({ (void)(a); BUG(); NULL; })
  42. #define P2SEGADDR(a) ({ (void)(a); BUG(); NULL; })
  43. #define P3SEGADDR(a) ({ (void)(a); BUG(); NULL; })
  44. #define P4SEGADDR(a) ({ (void)(a); BUG(); NULL; })
  45. #endif
  46. #endif /* P1SEG */
  47. /* Check if an address can be reached in 29 bits */
  48. #define IS_29BIT(a) (((unsigned long)(a)) < 0x20000000)
  49. #ifdef CONFIG_SH_STORE_QUEUES
  50. /*
  51. * This is a special case for the SH-4 store queues, as pages for this
  52. * space still need to be faulted in before it's possible to flush the
  53. * store queue cache for writeout to the remapped region.
  54. */
  55. #define P3_ADDR_MAX (P4SEG_STORE_QUE + 0x04000000)
  56. #else
  57. #define P3_ADDR_MAX P4SEG
  58. #endif
  59. #endif /* __KERNEL__ */
  60. #endif /* __ASM_SH_ADDRSPACE_H */