tegra210-p2180.dtsi 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <dt-bindings/mfd/max77620.h>
  3. #include "tegra210.dtsi"
  4. / {
  5. model = "NVIDIA Jetson TX1";
  6. compatible = "nvidia,p2180", "nvidia,tegra210";
  7. aliases {
  8. rtc0 = "/i2c@7000d000/pmic@3c";
  9. rtc1 = "/rtc@7000e000";
  10. serial0 = &uarta;
  11. };
  12. chosen {
  13. stdout-path = "serial0:115200n8";
  14. };
  15. memory {
  16. device_type = "memory";
  17. reg = <0x0 0x80000000 0x1 0x0>;
  18. };
  19. gpu@57000000 {
  20. vdd-supply = <&vdd_gpu>;
  21. };
  22. /* debug port */
  23. serial@70006000 {
  24. status = "okay";
  25. };
  26. i2c@7000d000 {
  27. status = "okay";
  28. clock-frequency = <400000>;
  29. pmic: pmic@3c {
  30. compatible = "maxim,max77620";
  31. reg = <0x3c>;
  32. interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
  33. #interrupt-cells = <2>;
  34. interrupt-controller;
  35. #gpio-cells = <2>;
  36. gpio-controller;
  37. pinctrl-names = "default";
  38. pinctrl-0 = <&max77620_default>;
  39. max77620_default: pinmux {
  40. gpio0 {
  41. pins = "gpio0";
  42. function = "gpio";
  43. };
  44. gpio1 {
  45. pins = "gpio1";
  46. function = "fps-out";
  47. drive-push-pull = <1>;
  48. maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
  49. maxim,active-fps-power-up-slot = <7>;
  50. maxim,active-fps-power-down-slot = <0>;
  51. };
  52. gpio2_3 {
  53. pins = "gpio2", "gpio3";
  54. function = "fps-out";
  55. drive-open-drain = <1>;
  56. maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
  57. };
  58. gpio4 {
  59. pins = "gpio4";
  60. function = "32k-out1";
  61. };
  62. gpio5_6_7 {
  63. pins = "gpio5", "gpio6", "gpio7";
  64. function = "gpio";
  65. drive-push-pull = <1>;
  66. };
  67. };
  68. fps {
  69. fps0 {
  70. maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
  71. maxim,suspend-fps-time-period-us = <1280>;
  72. };
  73. fps1 {
  74. maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
  75. maxim,suspend-fps-time-period-us = <1280>;
  76. };
  77. fps2 {
  78. maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
  79. };
  80. };
  81. regulators {
  82. in-ldo0-1-supply = <&vdd_pre>;
  83. in-ldo7-8-supply = <&vdd_pre>;
  84. in-sd3-supply = <&vdd_5v0_sys>;
  85. vdd_soc: sd0 {
  86. regulator-name = "VDD_SOC";
  87. regulator-min-microvolt = <600000>;
  88. regulator-max-microvolt = <1400000>;
  89. regulator-always-on;
  90. regulator-boot-on;
  91. regulator-enable-ramp-delay = <146>;
  92. regulator-ramp-delay = <27500>;
  93. maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
  94. };
  95. vdd_ddr: sd1 {
  96. regulator-name = "VDD_DDR_1V1_PMIC";
  97. regulator-always-on;
  98. regulator-boot-on;
  99. regulator-enable-ramp-delay = <130>;
  100. regulator-ramp-delay = <27500>;
  101. maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
  102. };
  103. vdd_pre: sd2 {
  104. regulator-name = "VDD_PRE_REG_1V35";
  105. regulator-min-microvolt = <1350000>;
  106. regulator-max-microvolt = <1350000>;
  107. regulator-enable-ramp-delay = <176>;
  108. regulator-ramp-delay = <27500>;
  109. maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
  110. };
  111. vdd_1v8: sd3 {
  112. regulator-name = "VDD_1V8";
  113. regulator-min-microvolt = <1800000>;
  114. regulator-max-microvolt = <1800000>;
  115. regulator-always-on;
  116. regulator-boot-on;
  117. regulator-enable-ramp-delay = <242>;
  118. regulator-ramp-delay = <27500>;
  119. maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
  120. };
  121. vdd_sys_1v2: ldo0 {
  122. regulator-name = "AVDD_SYS_1V2";
  123. regulator-min-microvolt = <1200000>;
  124. regulator-max-microvolt = <1200000>;
  125. regulator-always-on;
  126. regulator-boot-on;
  127. regulator-enable-ramp-delay = <26>;
  128. regulator-ramp-delay = <100000>;
  129. maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
  130. };
  131. vdd_pex_1v05: ldo1 {
  132. regulator-name = "VDD_PEX_1V05";
  133. regulator-min-microvolt = <1050000>;
  134. regulator-max-microvolt = <1050000>;
  135. regulator-enable-ramp-delay = <22>;
  136. regulator-ramp-delay = <100000>;
  137. maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
  138. };
  139. vddio_sdmmc: ldo2 {
  140. regulator-name = "VDDIO_SDMMC";
  141. /*
  142. * Technically this supply should have
  143. * a supported range from 1.8 - 3.3 V.
  144. * However, that would cause the SDHCI
  145. * driver to request 2.7 V upon access
  146. * and that in turn will cause traffic
  147. * to be broken. Leave it at 3.3 V for
  148. * now.
  149. */
  150. regulator-min-microvolt = <3300000>;
  151. regulator-max-microvolt = <3300000>;
  152. regulator-always-on;
  153. regulator-boot-on;
  154. regulator-enable-ramp-delay = <62>;
  155. regulator-ramp-delay = <100000>;
  156. maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
  157. };
  158. vdd_cam_hv: ldo3 {
  159. regulator-name = "VDD_CAM_HV";
  160. regulator-min-microvolt = <2800000>;
  161. regulator-max-microvolt = <2800000>;
  162. regulator-enable-ramp-delay = <50>;
  163. regulator-ramp-delay = <100000>;
  164. maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
  165. };
  166. vdd_rtc: ldo4 {
  167. regulator-name = "VDD_RTC";
  168. regulator-min-microvolt = <850000>;
  169. regulator-max-microvolt = <850000>;
  170. regulator-always-on;
  171. regulator-boot-on;
  172. regulator-enable-ramp-delay = <22>;
  173. regulator-ramp-delay = <100000>;
  174. maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
  175. };
  176. vdd_ts_hv: ldo5 {
  177. regulator-name = "VDD_TS_HV";
  178. regulator-min-microvolt = <3300000>;
  179. regulator-max-microvolt = <3300000>;
  180. regulator-enable-ramp-delay = <62>;
  181. regulator-ramp-delay = <100000>;
  182. maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
  183. };
  184. vdd_ts: ldo6 {
  185. regulator-name = "VDD_TS_1V8";
  186. regulator-min-microvolt = <1800000>;
  187. regulator-max-microvolt = <1800000>;
  188. regulator-enable-ramp-delay = <36>;
  189. regulator-ramp-delay = <100000>;
  190. maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
  191. maxim,active-fps-power-up-slot = <7>;
  192. maxim,active-fps-power-down-slot = <0>;
  193. };
  194. avdd_1v05_pll: ldo7 {
  195. regulator-name = "AVDD_1V05_PLL";
  196. regulator-min-microvolt = <1050000>;
  197. regulator-max-microvolt = <1050000>;
  198. regulator-always-on;
  199. regulator-boot-on;
  200. regulator-enable-ramp-delay = <24>;
  201. regulator-ramp-delay = <100000>;
  202. maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
  203. };
  204. avdd_1v05: ldo8 {
  205. regulator-name = "AVDD_SATA_HDMI_DP_1V05";
  206. regulator-min-microvolt = <1050000>;
  207. regulator-max-microvolt = <1050000>;
  208. regulator-enable-ramp-delay = <22>;
  209. regulator-ramp-delay = <100000>;
  210. maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
  211. };
  212. };
  213. };
  214. };
  215. pmc@7000e400 {
  216. nvidia,invert-interrupt;
  217. };
  218. /* eMMC */
  219. sdhci@700b0600 {
  220. status = "okay";
  221. bus-width = <8>;
  222. non-removable;
  223. vqmmc-supply = <&vdd_1v8>;
  224. };
  225. clocks {
  226. compatible = "simple-bus";
  227. #address-cells = <1>;
  228. #size-cells = <0>;
  229. clk32k_in: clock@0 {
  230. compatible = "fixed-clock";
  231. reg = <0>;
  232. #clock-cells = <0>;
  233. clock-frequency = <32768>;
  234. };
  235. };
  236. cpus {
  237. cpu@0 {
  238. enable-method = "psci";
  239. };
  240. cpu@1 {
  241. enable-method = "psci";
  242. };
  243. cpu@2 {
  244. enable-method = "psci";
  245. };
  246. cpu@3 {
  247. enable-method = "psci";
  248. };
  249. };
  250. psci {
  251. compatible = "arm,psci-0.2";
  252. method = "smc";
  253. };
  254. regulators {
  255. vdd_gpu: regulator@100 {
  256. compatible = "pwm-regulator";
  257. reg = <100>;
  258. pwms = <&pwm 1 4880>;
  259. regulator-name = "VDD_GPU";
  260. regulator-min-microvolt = <710000>;
  261. regulator-max-microvolt = <1320000>;
  262. enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
  263. regulator-ramp-delay = <80>;
  264. regulator-enable-ramp-delay = <2000>;
  265. regulator-settling-time-us = <160>;
  266. };
  267. };
  268. };