tegra186-p3310.dtsi 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include "tegra186.dtsi"
  3. #include <dt-bindings/mfd/max77620.h>
  4. / {
  5. model = "NVIDIA Tegra186 P3310 Processor Module";
  6. compatible = "nvidia,p3310", "nvidia,tegra186";
  7. aliases {
  8. sdhci0 = "/sdhci@3460000";
  9. sdhci1 = "/sdhci@3400000";
  10. serial0 = &uarta;
  11. i2c0 = "/bpmp/i2c";
  12. i2c1 = "/i2c@3160000";
  13. i2c2 = "/i2c@c240000";
  14. i2c3 = "/i2c@3180000";
  15. i2c4 = "/i2c@3190000";
  16. i2c5 = "/i2c@31c0000";
  17. i2c6 = "/i2c@c250000";
  18. i2c7 = "/i2c@31e0000";
  19. };
  20. chosen {
  21. bootargs = "earlycon console=ttyS0,115200n8";
  22. stdout-path = "serial0:115200n8";
  23. };
  24. memory {
  25. device_type = "memory";
  26. reg = <0x0 0x80000000 0x2 0x00000000>;
  27. };
  28. ethernet@2490000 {
  29. status = "okay";
  30. phy-reset-gpios = <&gpio TEGRA_MAIN_GPIO(M, 4) GPIO_ACTIVE_LOW>;
  31. phy-handle = <&phy>;
  32. phy-mode = "rgmii";
  33. mdio {
  34. #address-cells = <1>;
  35. #size-cells = <0>;
  36. phy: phy@0 {
  37. compatible = "ethernet-phy-ieee802.3-c22";
  38. reg = <0x0>;
  39. interrupt-parent = <&gpio>;
  40. interrupts = <TEGRA_MAIN_GPIO(M, 5) IRQ_TYPE_LEVEL_LOW>;
  41. };
  42. };
  43. };
  44. memory-controller@2c00000 {
  45. status = "okay";
  46. };
  47. serial@3100000 {
  48. status = "okay";
  49. };
  50. i2c@3160000 {
  51. status = "okay";
  52. power-monitor@40 {
  53. compatible = "ti,ina3221";
  54. reg = <0x40>;
  55. };
  56. power-monitor@41 {
  57. compatible = "ti,ina3221";
  58. reg = <0x41>;
  59. };
  60. };
  61. i2c@3180000 {
  62. status = "okay";
  63. };
  64. ddc: i2c@3190000 {
  65. status = "okay";
  66. };
  67. i2c@31c0000 {
  68. status = "okay";
  69. };
  70. i2c@31e0000 {
  71. status = "okay";
  72. };
  73. /* SDMMC1 (SD/MMC) */
  74. sdhci@3400000 {
  75. cd-gpios = <&gpio TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
  76. wp-gpios = <&gpio TEGRA_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
  77. vqmmc-supply = <&vddio_sdmmc1>;
  78. };
  79. /* SDMMC3 (SDIO) */
  80. sdhci@3440000 {
  81. status = "okay";
  82. };
  83. /* SDMMC4 (eMMC) */
  84. sdhci@3460000 {
  85. status = "okay";
  86. bus-width = <8>;
  87. non-removable;
  88. vqmmc-supply = <&vdd_1v8_ap>;
  89. vmmc-supply = <&vdd_3v3_sys>;
  90. };
  91. hsp@3c00000 {
  92. status = "okay";
  93. };
  94. i2c@c240000 {
  95. status = "okay";
  96. };
  97. i2c@c250000 {
  98. status = "okay";
  99. };
  100. pmc@c360000 {
  101. nvidia,invert-interrupt;
  102. };
  103. cpus {
  104. cpu@0 {
  105. enable-method = "psci";
  106. };
  107. cpu@1 {
  108. enable-method = "psci";
  109. };
  110. cpu@2 {
  111. enable-method = "psci";
  112. };
  113. cpu@3 {
  114. enable-method = "psci";
  115. };
  116. cpu@4 {
  117. enable-method = "psci";
  118. };
  119. cpu@5 {
  120. enable-method = "psci";
  121. };
  122. };
  123. bpmp {
  124. i2c {
  125. status = "okay";
  126. pmic: pmic@3c {
  127. compatible = "maxim,max77620";
  128. reg = <0x3c>;
  129. interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
  130. #interrupt-cells = <2>;
  131. interrupt-controller;
  132. #gpio-cells = <2>;
  133. gpio-controller;
  134. pinctrl-names = "default";
  135. pinctrl-0 = <&max77620_default>;
  136. max77620_default: pinmux {
  137. gpio0 {
  138. pins = "gpio0";
  139. function = "gpio";
  140. };
  141. gpio1 {
  142. pins = "gpio1";
  143. function = "fps-out";
  144. maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
  145. };
  146. gpio2 {
  147. pins = "gpio2";
  148. function = "fps-out";
  149. maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
  150. };
  151. gpio3 {
  152. pins = "gpio3";
  153. function = "fps-out";
  154. maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
  155. };
  156. gpio4 {
  157. pins = "gpio4";
  158. function = "32k-out1";
  159. drive-push-pull = <1>;
  160. };
  161. gpio5 {
  162. pins = "gpio5";
  163. function = "gpio";
  164. drive-push-pull = <0>;
  165. };
  166. gpio6 {
  167. pins = "gpio6";
  168. function = "gpio";
  169. drive-push-pull = <1>;
  170. };
  171. gpio7 {
  172. pins = "gpio7";
  173. function = "gpio";
  174. drive-push-pull = <0>;
  175. };
  176. };
  177. fps {
  178. fps0 {
  179. maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
  180. maxim,shutdown-fps-time-period-us = <640>;
  181. };
  182. fps1 {
  183. maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
  184. maxim,shutdown-fps-time-period-us = <640>;
  185. };
  186. fps2 {
  187. maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
  188. maxim,shutdown-fps-time-period-us = <640>;
  189. };
  190. };
  191. regulators {
  192. in-sd0-supply = <&vdd_5v0_sys>;
  193. in-sd1-supply = <&vdd_5v0_sys>;
  194. in-sd2-supply = <&vdd_5v0_sys>;
  195. in-sd3-supply = <&vdd_5v0_sys>;
  196. in-ldo0-1-supply = <&vdd_5v0_sys>;
  197. in-ldo2-supply = <&vdd_5v0_sys>;
  198. in-ldo3-5-supply = <&vdd_5v0_sys>;
  199. in-ldo4-6-supply = <&vdd_1v8>;
  200. in-ldo7-8-supply = <&avdd_dsi_csi>;
  201. sd0 {
  202. regulator-name = "VDD_DDR_1V1_PMIC";
  203. regulator-min-microvolt = <1100000>;
  204. regulator-max-microvolt = <1100000>;
  205. regulator-always-on;
  206. regulator-boot-on;
  207. };
  208. avdd_dsi_csi: sd1 {
  209. regulator-name = "AVDD_DSI_CSI_1V2";
  210. regulator-min-microvolt = <1200000>;
  211. regulator-max-microvolt = <1200000>;
  212. /* XXX */
  213. regulator-always-on;
  214. regulator-boot-on;
  215. };
  216. vdd_1v8: sd2 {
  217. regulator-name = "VDD_1V8";
  218. regulator-min-microvolt = <1800000>;
  219. regulator-max-microvolt = <1800000>;
  220. /* XXX */
  221. regulator-always-on;
  222. regulator-boot-on;
  223. };
  224. vdd_3v3_sys: sd3 {
  225. regulator-name = "VDD_3V3_SYS";
  226. regulator-min-microvolt = <3300000>;
  227. regulator-max-microvolt = <3300000>;
  228. /* XXX */
  229. regulator-always-on;
  230. regulator-boot-on;
  231. };
  232. ldo0 {
  233. regulator-name = "VDD_1V8_AP_PLL";
  234. regulator-min-microvolt = <1800000>;
  235. regulator-max-microvolt = <1800000>;
  236. /* XXX */
  237. regulator-always-on;
  238. regulator-boot-on;
  239. };
  240. ldo2 {
  241. regulator-name = "VDDIO_3V3_AOHV";
  242. regulator-min-microvolt = <3300000>;
  243. regulator-max-microvolt = <3300000>;
  244. /* XXX */
  245. regulator-always-on;
  246. regulator-boot-on;
  247. };
  248. vddio_sdmmc1: ldo3 {
  249. regulator-name = "VDDIO_SDMMC1_AP";
  250. regulator-min-microvolt = <1800000>;
  251. regulator-max-microvolt = <3300000>;
  252. };
  253. ldo4 {
  254. regulator-name = "VDD_RTC";
  255. regulator-min-microvolt = <1000000>;
  256. regulator-max-microvolt = <1000000>;
  257. };
  258. vddio_sdmmc3: ldo5 {
  259. regulator-name = "VDDIO_SDMMC3_AP";
  260. regulator-min-microvolt = <2800000>;
  261. regulator-max-microvolt = <2800000>;
  262. };
  263. vdd_hdmi_1v05: ldo7 {
  264. regulator-name = "VDD_HDMI_1V05";
  265. regulator-min-microvolt = <1050000>;
  266. regulator-max-microvolt = <1050000>;
  267. /* XXX */
  268. regulator-always-on;
  269. regulator-boot-on;
  270. };
  271. vdd_pex: ldo8 {
  272. regulator-name = "VDD_PEX_1V05";
  273. regulator-min-microvolt = <1050000>;
  274. regulator-max-microvolt = <1050000>;
  275. /* XXX */
  276. regulator-always-on;
  277. regulator-boot-on;
  278. };
  279. };
  280. };
  281. };
  282. };
  283. psci {
  284. compatible = "arm,psci-1.0";
  285. status = "okay";
  286. method = "smc";
  287. };
  288. regulators {
  289. compatible = "simple-bus";
  290. #address-cells = <1>;
  291. #size-cells = <0>;
  292. vdd_5v0_sys: regulator@0 {
  293. compatible = "regulator-fixed";
  294. reg = <0>;
  295. regulator-name = "VDD_5V0_SYS";
  296. regulator-min-microvolt = <5000000>;
  297. regulator-max-microvolt = <5000000>;
  298. regulator-always-on;
  299. regulator-boot-on;
  300. };
  301. vdd_1v8_ap: regulator@1 {
  302. compatible = "regulator-fixed";
  303. reg = <1>;
  304. regulator-name = "VDD_1V8_AP";
  305. regulator-min-microvolt = <1800000>;
  306. regulator-max-microvolt = <1800000>;
  307. /* XXX */
  308. regulator-always-on;
  309. regulator-boot-on;
  310. gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
  311. enable-active-high;
  312. vin-supply = <&vdd_1v8>;
  313. };
  314. };
  315. };