fsl-ls1012a-qds.dts 2.3 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Device Tree file for Freescale LS1012A QDS Board.
  4. *
  5. * Copyright 2016 Freescale Semiconductor, Inc.
  6. *
  7. */
  8. /dts-v1/;
  9. #include "fsl-ls1012a.dtsi"
  10. / {
  11. model = "LS1012A QDS Board";
  12. compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
  13. sys_mclk: clock-mclk {
  14. compatible = "fixed-clock";
  15. #clock-cells = <0>;
  16. clock-frequency = <24576000>;
  17. };
  18. reg_3p3v: regulator-3p3v {
  19. compatible = "regulator-fixed";
  20. regulator-name = "3P3V";
  21. regulator-min-microvolt = <3300000>;
  22. regulator-max-microvolt = <3300000>;
  23. regulator-always-on;
  24. };
  25. sound {
  26. compatible = "simple-audio-card";
  27. simple-audio-card,format = "i2s";
  28. simple-audio-card,widgets =
  29. "Microphone", "Microphone Jack",
  30. "Headphone", "Headphone Jack",
  31. "Speaker", "Speaker Ext",
  32. "Line", "Line In Jack";
  33. simple-audio-card,routing =
  34. "MIC_IN", "Microphone Jack",
  35. "Microphone Jack", "Mic Bias",
  36. "LINE_IN", "Line In Jack",
  37. "Headphone Jack", "HP_OUT",
  38. "Speaker Ext", "LINE_OUT";
  39. simple-audio-card,cpu {
  40. sound-dai = <&sai2>;
  41. frame-master;
  42. bitclock-master;
  43. };
  44. simple-audio-card,codec {
  45. sound-dai = <&codec>;
  46. frame-master;
  47. bitclock-master;
  48. system-clock-frequency = <24576000>;
  49. };
  50. };
  51. };
  52. &dspi {
  53. bus-num = <0>;
  54. status = "okay";
  55. flash@0 {
  56. #address-cells = <1>;
  57. #size-cells = <1>;
  58. compatible = "n25q128a11", "jedec,spi-nor";
  59. reg = <0>;
  60. spi-max-frequency = <10000000>;
  61. };
  62. flash@1 {
  63. #address-cells = <1>;
  64. #size-cells = <1>;
  65. compatible = "sst25wf040b", "jedec,spi-nor";
  66. spi-cpol;
  67. spi-cpha;
  68. reg = <1>;
  69. spi-max-frequency = <10000000>;
  70. };
  71. flash@2 {
  72. #address-cells = <1>;
  73. #size-cells = <1>;
  74. compatible = "en25s64", "jedec,spi-nor";
  75. spi-cpol;
  76. spi-cpha;
  77. reg = <2>;
  78. spi-max-frequency = <10000000>;
  79. };
  80. };
  81. &duart0 {
  82. status = "okay";
  83. };
  84. &esdhc0 {
  85. status = "okay";
  86. };
  87. &esdhc1 {
  88. status = "okay";
  89. };
  90. &i2c0 {
  91. status = "okay";
  92. pca9547@77 {
  93. compatible = "nxp,pca9547";
  94. reg = <0x77>;
  95. #address-cells = <1>;
  96. #size-cells = <0>;
  97. i2c@4 {
  98. #address-cells = <1>;
  99. #size-cells = <0>;
  100. reg = <0x4>;
  101. codec: sgtl5000@a {
  102. #sound-dai-cells = <0>;
  103. compatible = "fsl,sgtl5000";
  104. reg = <0xa>;
  105. VDDA-supply = <&reg_3p3v>;
  106. VDDIO-supply = <&reg_3p3v>;
  107. clocks = <&sys_mclk>;
  108. };
  109. };
  110. };
  111. };
  112. &sai2 {
  113. status = "okay";
  114. };
  115. &sata {
  116. status = "okay";
  117. };