tlb-v4.S 1.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263
  1. /*
  2. * linux/arch/arm/mm/tlbv4.S
  3. *
  4. * Copyright (C) 1997-2002 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * ARM architecture version 4 TLB handling functions.
  11. * These assume a split I/D TLBs, and no write buffer.
  12. *
  13. * Processors: ARM720T
  14. */
  15. #include <linux/linkage.h>
  16. #include <linux/init.h>
  17. #include <asm/assembler.h>
  18. #include <asm/asm-offsets.h>
  19. #include <asm/tlbflush.h>
  20. #include "proc-macros.S"
  21. .align 5
  22. /*
  23. * v4_flush_user_tlb_range(start, end, mm)
  24. *
  25. * Invalidate a range of TLB entries in the specified user address space.
  26. *
  27. * - start - range start address
  28. * - end - range end address
  29. * - mm - mm_struct describing address space
  30. */
  31. .align 5
  32. ENTRY(v4_flush_user_tlb_range)
  33. vma_vm_mm ip, r2
  34. act_mm r3 @ get current->active_mm
  35. eors r3, ip, r3 @ == mm ?
  36. retne lr @ no, we dont do anything
  37. .v4_flush_kern_tlb_range:
  38. bic r0, r0, #0x0ff
  39. bic r0, r0, #0xf00
  40. 1: mcr p15, 0, r0, c8, c7, 1 @ invalidate TLB entry
  41. add r0, r0, #PAGE_SZ
  42. cmp r0, r1
  43. blo 1b
  44. ret lr
  45. /*
  46. * v4_flush_kern_tlb_range(start, end)
  47. *
  48. * Invalidate a range of TLB entries in the specified kernel
  49. * address range.
  50. *
  51. * - start - virtual address (may not be aligned)
  52. * - end - virtual address (may not be aligned)
  53. */
  54. .globl v4_flush_kern_tlb_range
  55. .equ v4_flush_kern_tlb_range, .v4_flush_kern_tlb_range
  56. __INITDATA
  57. /* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */
  58. define_tlb_functions v4, v4_tlb_flags